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dt-bindings: nvmem: qfprom: add IPQ8074 compatible

PATCH Superseded Robert Marko 3 participants 9 messages Jan 21, 2023 – Jan 23, 2023

Subsystems (4)
Device tree bindings Arm Qualcomm mailing list Arm Qualcomm support NVMEM framework

v1 of 2 Superseded Latest is v2 →

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Robert Marko

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#0 lore raw

PATCH 1/2 dt-bindings: nvmem: qfprom: add IPQ8074 compatible

Document IPQ8074 compatible for QFPROM, its compatible with the generic QFPROM fallback.

Signed-off-by Robert Marko <[email protected]>
---
 Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml +1 -0
index 9ddf3cef9e84..2173fe82317d 100644
@@ -19,6 +19,7 @@ properties:
           - qcom,apq8064-qfprom
           - qcom,apq8084-qfprom
           - qcom,ipq8064-qfprom
+          - qcom,ipq8074-qfprom
           - qcom,msm8916-qfprom
           - qcom,msm8974-qfprom
           - qcom,msm8976-qfprom
Signature · 1 line
2.39.1
author
#1 lore raw

PATCH 2/2 arm64: dts: qcom: ipq8074: add QFPROM node

IPQ8074 has efuses like other Qualcomm SoC-s that are required for determining various HW quirks which will be required later for CPR etc, so lets add the QFPROM node for start.

Individidual fuses will be added as they are required.

Signed-off-by Robert Marko <[email protected]>
---
 arch/arm64/boot/dts/qcom/ipq8074.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)
arch/arm64/boot/dts/qcom/ipq8074.dtsi +7 -0
index 8eba586065a3..f29491f647fe 100644
@@ -301,6 +301,13 @@ mdio: mdio@90000 {
 			status = "disabled";
 		};
 
+		qfprom: efuse@a4000 {
+			compatible = "qcom,ipq8074-qfprom", "qcom,qfprom";
+			reg = <0x000a4000 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+		};
+
 		prng: rng@e3000 {
 			compatible = "qcom,prng-ee";
 			reg = <0x000e3000 0x1000>;
Signature · 1 line
2.39.1
#2 lore raw

Re: [PATCH 2/2] arm64: dts: qcom: ipq8074: add QFPROM node

Quoted 16 lines · Robert Marko

IPQ8074 has efuses like other Qualcomm SoC-s that are required for determining various HW quirks which will be required later for CPR etc, so lets add the QFPROM node for start.

Individidual fuses will be added as they are required.

Signed-off-by Robert Marko <[email protected]>
---
  arch/arm64/boot/dts/qcom/ipq8074.dtsi | 7 +++++++
  1 file changed, 7 insertions(+)
arch/arm64/boot/dts/qcom/ipq8074.dtsi +0 -0
index 8eba586065a3..f29491f647fe 100644

arch/arm64/boot/dts/qcom/ipq8074.dtsi mdio: mdio@90000 { · line 306

Quoted 6 lines
arch/arm64/boot/dts/qcom/ipq8074.dtsi +3 -0
@@ -301,6 +301,13 @@ mdio: mdio@90000 {
  			status = "disabled";
  		};
 
+		qfprom: efuse@a4000 {
+			compatible = "qcom,ipq8074-qfprom", "qcom,qfprom";
+			reg = <0x000a4000 0x1000>;

From the HW document, I see the overall size of this region is 0x2000, any reason to stick with 0x1000?

Thanks, Kathiravan T.

Quoted 7 lines
arch/arm64/boot/dts/qcom/ipq8074.dtsi +4 -0
+			#address-cells = <1>;
+			#size-cells = <1>;
+		};
+
  		prng: rng@e3000 {
  			compatible = "qcom,prng-ee";
  			reg = <0x000e3000 0x1000>;
author
#3 lore raw

Re: [PATCH 2/2] arm64: dts: qcom: ipq8074: add QFPROM node

Quoted 22 lines · Kathiravan Thirumoorthy
Quoted 19 lines · Robert Marko

IPQ8074 has efuses like other Qualcomm SoC-s that are required for determining various HW quirks which will be required later for CPR etc, so lets add the QFPROM node for start.

Individidual fuses will be added as they are required.

Signed-off-by Robert Marko <[email protected]>
---
  arch/arm64/boot/dts/qcom/ipq8074.dtsi | 7 +++++++
  1 file changed, 7 insertions(+)
arch/arm64/boot/dts/qcom/ipq8074.dtsi +0 -0
index 8eba586065a3..f29491f647fe 100644
@@ -301,6 +301,13 @@ mdio: mdio@90000 {
                      status = "disabled";
              };
Quoted 7 lines

arch/arm64/boot/dts/qcom/ipq8074.dtsi mdio: mdio@90000 { · line 306

Quoted 3 lines
arch/arm64/boot/dts/qcom/ipq8074.dtsi +3 -0
+             qfprom: efuse@a4000 {
+                     compatible = "qcom,ipq8074-qfprom", "qcom,qfprom";
+                     reg = <0x000a4000 0x1000>;

From the HW document, I see the overall size of this region is 0x2000,
any reason to stick with 0x1000?

Like always, I dont have access to docs and 0x1000 is all I could find downstream
being used.

Any chance you can share the regions inside of QFPROM, it would be great to use the ECC corrected one if available.

Regards,
Robert

Quoted 11 lines

Thanks, Kathiravan T.

Quoted 7 lines
arch/arm64/boot/dts/qcom/ipq8074.dtsi +4 -0
+                     #address-cells = <1>;
+                     #size-cells = <1>;
+             };
+
              prng: rng@e3000 {
                      compatible = "qcom,prng-ee";
                      reg = <0x000e3000 0x1000>;
#4 lore raw

Re: [PATCH 2/2] arm64: dts: qcom: ipq8074: add QFPROM node

Quoted 29 lines · Robert Marko
Quoted 21 lines · Kathiravan Thirumoorthy
Quoted 19 lines · Robert Marko

IPQ8074 has efuses like other Qualcomm SoC-s that are required for determining various HW quirks which will be required later for CPR etc, so lets add the QFPROM node for start.

Individidual fuses will be added as they are required.

Signed-off-by Robert Marko <[email protected]>
---
   arch/arm64/boot/dts/qcom/ipq8074.dtsi | 7 +++++++
   1 file changed, 7 insertions(+)
arch/arm64/boot/dts/qcom/ipq8074.dtsi +0 -0
index 8eba586065a3..f29491f647fe 100644
@@ -301,6 +301,13 @@ mdio: mdio@90000 {
                       status = "disabled";
               };
Quoted 6 lines

arch/arm64/boot/dts/qcom/ipq8074.dtsi mdio: mdio@90000 { · line 306

Quoted 3 lines
arch/arm64/boot/dts/qcom/ipq8074.dtsi +3 -0
+             qfprom: efuse@a4000 {
+                     compatible = "qcom,ipq8074-qfprom", "qcom,qfprom";
+                     reg = <0x000a4000 0x1000>;

From the HW document, I see the overall size of this region is 0x2000,
any reason to stick with 0x1000?

Quoted 6 lines

Like always, I dont have access to docs and 0x1000 is all I could find downstream
being used.

Any chance you can share the regions inside of QFPROM, it would be great to use the ECC corrected one if available.

Sorry, What do you refer by "ECC corrected" here?

Thanks, Kathiravan T.

Quoted 13 lines

Regards,
Robert

Quoted 10 lines

Thanks, Kathiravan T.

Quoted 7 lines
arch/arm64/boot/dts/qcom/ipq8074.dtsi +4 -0
+                     #address-cells = <1>;
+                     #size-cells = <1>;
+             };
+
               prng: rng@e3000 {
                       compatible = "qcom,prng-ee";
                       reg = <0x000e3000 0x1000>;
author
#5 lore raw

Re: [PATCH 2/2] arm64: dts: qcom: ipq8074: add QFPROM node

Quoted 32 lines · Kathiravan Thirumoorthy
Quoted 29 lines · Robert Marko
Quoted 27 lines · Kathiravan Thirumoorthy
Quoted 16 lines · Robert Marko

IPQ8074 has efuses like other Qualcomm SoC-s that are required for determining various HW quirks which will be required later for CPR etc, so lets add the QFPROM node for start.

Individidual fuses will be added as they are required.

Signed-off-by Robert Marko <[email protected]>
---
   arch/arm64/boot/dts/qcom/ipq8074.dtsi | 7 +++++++
   1 file changed, 7 insertions(+)
arch/arm64/boot/dts/qcom/ipq8074.dtsi +0 -0
index 8eba586065a3..f29491f647fe 100644

arch/arm64/boot/dts/qcom/ipq8074.dtsi mdio: mdio@90000 { · line 306

Quoted 6 lines
arch/arm64/boot/dts/qcom/ipq8074.dtsi +3 -0
@@ -301,6 +301,13 @@ mdio: mdio@90000 {
                       status = "disabled";
               };
 
+             qfprom: efuse@a4000 {
+                     compatible = "qcom,ipq8074-qfprom", "qcom,qfprom";
+                     reg = <0x000a4000 0x1000>;

From the HW document, I see the overall size of this region is 0x2000,
any reason to stick with 0x1000?

Quoted 8 lines
Quoted 6 lines

Like always, I dont have access to docs and 0x1000 is all I could find downstream
being used.

Any chance you can share the regions inside of QFPROM, it would be great to use the ECC corrected one if available.

Sorry, What do you refer by "ECC corrected" here?

Isnt there a corrected region in the QFPROM meant for reading? As far as I understand it's protected by FEC.

Regards,
Robert

Quoted 17 lines

Thanks, Kathiravan T.

Quoted 13 lines

Regards,
Robert

Quoted 10 lines

Thanks, Kathiravan T.

Quoted 7 lines
arch/arm64/boot/dts/qcom/ipq8074.dtsi +4 -0
+                     #address-cells = <1>;
+                     #size-cells = <1>;
+             };
+
               prng: rng@e3000 {
                       compatible = "qcom,prng-ee";
                       reg = <0x000e3000 0x1000>;
#6 lore raw

Re: [PATCH 2/2] arm64: dts: qcom: ipq8074: add QFPROM node

Quoted 35 lines · Robert Marko
Quoted 33 lines · Kathiravan Thirumoorthy
Quoted 31 lines · Robert Marko
Quoted 20 lines · Kathiravan Thirumoorthy
Quoted 19 lines · Robert Marko

IPQ8074 has efuses like other Qualcomm SoC-s that are required for determining various HW quirks which will be required later for CPR etc, so lets add the QFPROM node for start.

Individidual fuses will be added as they are required.

Signed-off-by Robert Marko <[email protected]>
---
    arch/arm64/boot/dts/qcom/ipq8074.dtsi | 7 +++++++
    1 file changed, 7 insertions(+)
arch/arm64/boot/dts/qcom/ipq8074.dtsi +0 -0
index 8eba586065a3..f29491f647fe 100644
@@ -301,6 +301,13 @@ mdio: mdio@90000 {
                        status = "disabled";
                };
Quoted 5 lines

arch/arm64/boot/dts/qcom/ipq8074.dtsi mdio: mdio@90000 { · line 306

Quoted 3 lines
arch/arm64/boot/dts/qcom/ipq8074.dtsi +3 -0
+             qfprom: efuse@a4000 {
+                     compatible = "qcom,ipq8074-qfprom", "qcom,qfprom";
+                     reg = <0x000a4000 0x1000>;

From the HW document, I see the overall size of this region is 0x2000,
any reason to stick with 0x1000?

Like always, I dont have access to docs and 0x1000 is all I could find downstream
being used.

Quoted 5 lines
Quoted 3 lines
Quoted 2 lines

Any chance you can share the regions inside of QFPROM, it would be great to use the ECC corrected one if available.

Sorry, What do you refer by "ECC corrected" here?

Isnt there a corrected region in the QFPROM meant for reading? As far as I understand it's protected by FEC.

Yes, there are two regions for the QFPROM, the region which you used here is the one used for reading and there is a error correction logic for it and it is size is 8KB not 4KB.

Thanks, Kathiravan T.

Quoted 18 lines

Regards,
Robert

Quoted 15 lines

Thanks, Kathiravan T.

Quoted 12 lines

Regards,
Robert

Quoted 10 lines

Thanks, Kathiravan T.

Quoted 7 lines
arch/arm64/boot/dts/qcom/ipq8074.dtsi +4 -0
+                     #address-cells = <1>;
+                     #size-cells = <1>;
+             };
+
                prng: rng@e3000 {
                        compatible = "qcom,prng-ee";
                        reg = <0x000e3000 0x1000>;
author
#7 lore raw

Re: [PATCH 2/2] arm64: dts: qcom: ipq8074: add QFPROM node

Quoted 40 lines · Kathiravan Thirumoorthy
Quoted 37 lines · Robert Marko
Quoted 35 lines · Kathiravan Thirumoorthy
Quoted 33 lines · Robert Marko
Quoted 20 lines · Kathiravan Thirumoorthy
Quoted 19 lines · Robert Marko

IPQ8074 has efuses like other Qualcomm SoC-s that are required for determining various HW quirks which will be required later for CPR etc, so lets add the QFPROM node for start.

Individidual fuses will be added as they are required.

Signed-off-by Robert Marko <[email protected]>
---
    arch/arm64/boot/dts/qcom/ipq8074.dtsi | 7 +++++++
    1 file changed, 7 insertions(+)
arch/arm64/boot/dts/qcom/ipq8074.dtsi +0 -0
index 8eba586065a3..f29491f647fe 100644
@@ -301,6 +301,13 @@ mdio: mdio@90000 {
                        status = "disabled";
                };
Quoted 5 lines

arch/arm64/boot/dts/qcom/ipq8074.dtsi mdio: mdio@90000 { · line 306

Quoted 3 lines
arch/arm64/boot/dts/qcom/ipq8074.dtsi +3 -0
+             qfprom: efuse@a4000 {
+                     compatible = "qcom,ipq8074-qfprom", "qcom,qfprom";
+                     reg = <0x000a4000 0x1000>;

From the HW document, I see the overall size of this region is 0x2000,
any reason to stick with 0x1000?

Like always, I dont have access to docs and 0x1000 is all I could find downstream
being used.

Any chance you can share the regions inside of QFPROM, it would be great to use the ECC corrected one if available.

Quoted 8 lines
Quoted 3 lines
Quoted 1 line

Sorry, What do you refer by "ECC corrected" here?

Isnt there a corrected region in the QFPROM meant for reading? As far as I understand it's protected by FEC.

Yes, there are two regions for the QFPROM, the region which you used here is the one used for reading and there is a error correction logic for it and it is size is 8KB not 4KB.

Ok, thanks for the info, I will expand the size to 0x2000 then in v2.

Regards,
Robert

Quoted 21 lines

Thanks, Kathiravan T.

Quoted 18 lines

Regards,
Robert

Quoted 15 lines

Thanks, Kathiravan T.

Quoted 12 lines

Regards,
Robert

Quoted 10 lines

Thanks, Kathiravan T.

Quoted 7 lines
arch/arm64/boot/dts/qcom/ipq8074.dtsi +4 -0
+                     #address-cells = <1>;
+                     #size-cells = <1>;
+             };
+
                prng: rng@e3000 {
                        compatible = "qcom,prng-ee";
                        reg = <0x000e3000 0x1000>;