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mtd: spinand: Add support for AllianceMemory AS5F34G04SND

PATCH Superseded Mario Kicherer 2 participants 2 messages Jan 25, 2023 – Jan 26, 2023

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v3 of 4 Superseded Latest is v4 →

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#0 lore raw

PATCH v3 1/1 mtd: spinand: Add support for AllianceMemory AS5F34G04SND

Add support for AllianceMemory AS5F34G04SND SPI NAND flash

Datasheet:
- https://www.alliancememory.com/wp-content/uploads/pdf/flash/AllianceMemory_SPI_NAND_Flash_July2020_Rev1.0.pdf

---
 drivers/mtd/nand/spi/Makefile         |   2 +-
 drivers/mtd/nand/spi/alliancememory.c | 110 ++++++++++++++++++++++++++
 drivers/mtd/nand/spi/core.c           |   1 +
 include/linux/mtd/spinand.h           |   1 +
 4 files changed, 113 insertions(+), 1 deletion(-)
 create mode 100644 drivers/mtd/nand/spi/alliancememory.c
drivers/mtd/nand/spi/Makefile +1 -1
index b520fe634041..4ec973b8b6bf 100644
@@ -1,3 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0
-spinand-objs := core.o ato.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
+spinand-objs := core.o alliancememory.o ato.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
drivers/mtd/nand/spi/alliancememory.c new file +110 -0

110 lines not on this page · raw message

drivers/mtd/nand/spi/core.c +1 -0
index dacd9c0e8b20..638391f77d8c 100644
@@ -937,6 +937,7 @@ static const struct nand_ops spinand_ops = {
 };
 
 static const struct spinand_manufacturer *spinand_manufacturers[] = {
+	&alliancememory_spinand_manufacturer,
 	&ato_spinand_manufacturer,
 	&gigadevice_spinand_manufacturer,
 	&macronix_spinand_manufacturer,
include/linux/mtd/spinand.h +1 -0
index 6d3392a7edc6..01be9f0f008a 100644
@@ -260,6 +260,7 @@ struct spinand_manufacturer {
 };
 
 /* SPI NAND manufacturers */
+extern const struct spinand_manufacturer alliancememory_spinand_manufacturer;
 extern const struct spinand_manufacturer ato_spinand_manufacturer;
 extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
 extern const struct spinand_manufacturer macronix_spinand_manufacturer;
Signature · 6 lines
2.34.1


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maintainer
#1 lore raw

Hi Mario,

[email protected] wrote on Wed, 25 Jan 2023 13:22:04 +0100:

Quoted 59 lines

Add support for AllianceMemory AS5F34G04SND SPI NAND flash

Datasheet:
- https://www.alliancememory.com/wp-content/uploads/pdf/flash/AllianceMemory_SPI_NAND_Flash_July2020_Rev1.0.pdf

---
 drivers/mtd/nand/spi/Makefile         |   2 +-
 drivers/mtd/nand/spi/alliancememory.c | 110 ++++++++++++++++++++++++++
 drivers/mtd/nand/spi/core.c           |   1 +
 include/linux/mtd/spinand.h           |   1 +
 4 files changed, 113 insertions(+), 1 deletion(-)
 create mode 100644 drivers/mtd/nand/spi/alliancememory.c
drivers/mtd/nand/spi/Makefile +1 -1
index b520fe634041..4ec973b8b6bf 100644
@@ -1,3 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0
-spinand-objs := core.o ato.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
+spinand-objs := core.o alliancememory.o ato.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
drivers/mtd/nand/spi/alliancememory.c new file +29 -0
new file mode 100644
index 000000000000..3430ac4d18fc
@@ -0,0 +1,110 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Author: Mario Kicherer <[email protected]>
+ */
+
+#include <linux/device.h>
+#include <linux/kernel.h>
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_ALLIANCEMEMORY	0x52
+
+#define AM_STATUS_ECC_BITMASK		(3 << 4)
+
+#define AM_STATUS_ECC_NONE_DETECTED	(0 << 4)
+#define AM_STATUS_ECC_1_CORRECTED	(1 << 4)
+#define AM_STATUS_ECC_1_DETECTED	(2 << 4)
+#define AM_STATUS_ECC_MAX_CORRECTED	(3 << 4)
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+			   SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+			   SPINAND_PROG_LOAD(true, 0, NULL, 0));

drivers/mtd/nand/spi/alliancememory.c line 39

Quoted 10 lines
drivers/mtd/nand/spi/alliancememory.c new file +10 -0
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+			   SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+			   SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int as5f34g04snd_ooblayout_ecc(struct mtd_info *mtd, int section,
+				      struct mtd_oob_region *region)
+{
+	region->offset = 0x48;
+	region->length = 0x38;

This NAND series uses the end of the oob area to store the ecc bytes. You can just hardcode how much ECC bytes are used because that's only what matters and do something more readable:

ecc_bytes = [32 if page is 2k and OOB 64B] || [56 if page is 2k and OOB is 128B] || [112 if page is 4k and OOB 256]

offset = mtd->oobsize - ecc_bytes
length = ecc_bytes

Quoted 4 lines
drivers/mtd/nand/spi/alliancememory.c new file +4 -0
+
+	return 0;
+}
+

drivers/mtd/nand/spi/alliancememory.c line 53

Quoted 10 lines
drivers/mtd/nand/spi/alliancememory.c new file +10 -0
+static int as5f34g04snd_ooblayout_free(struct mtd_info *mtd, int section,
+				       struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	/*
+	 * It is unclear how many bytes are used for the bad block marker. We
+	 * reserve the common two bytes here.
+	 */

You could maybe indicate in the comment that the free area is made of sequential 4 or 8 identical chunks where each first 4 bytes are unprotected.

drivers/mtd/nand/spi/alliancememory.c line 56

Quoted 3 lines
drivers/mtd/nand/spi/alliancememory.c new file +3 -0
+
+	region->offset = 2;
+	region->length = 0x48 - 2;

And here again:
offset = 2
length = mtd->oobsize - 2 - ecc_bytes

drivers/mtd/nand/spi/alliancememory.c line 42

Quoted 3 lines
drivers/mtd/nand/spi/alliancememory.c new file +3 -0
+
+	return 0;
+}

Thanks,
Miquèl

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