nvmem: add and use generic MMIO NVMEM

From: Rafał Miłecki <[email protected]>

Content of some NVMEM devices can be read using MMIO. Some of them (probably very few though) may be also programmable that way. Add generic binding to allow describing such hardware.

This *doesn't* apply to any more complicated devices that need more complex interface e.g. for writing. While such devices could be supported for reading purposes by the same driver - they should get their own binding.

This binding will gain even more usability once we fully support NVMEM layouts (describing content of NVMEM devices in an independent way).

Signed-off-by Rafał Miłecki <[email protected]>

---
V3: Make it clear this binding should NOT be used for more complex devices

---
 .../devicetree/bindings/nvmem/mmio.yaml       | 50 +++++++++++++++++++
 1 file changed, 50 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nvmem/mmio.yaml

drivers/nvmem/mmio.c new file +6 -0

+	default:
+		memcpy_toio(priv->base + offset, val, bytes);
+	}
+
+	return 0;
+}

drivers/nvmem/mmio.c line 58

Quoted 10 lines · Rafał Miłecki

+static int mmio_nvmem_write(void *context, unsigned int offset, void *val, size_t bytes)

drivers/nvmem/mmio.c new file +8 -0

+{
+	struct mmio_nvmem *priv = context;
+
+	switch (priv->io_width) {
+	case 1:
+	case 2:
+	case 4:
+		return -EOPNOTSUPP;

I'm just curious: (since read supports those cases)

what size writes are typically used here?
And what value for priv->io_width?

From: Rafał Miłecki <[email protected]>

Some NVMEM devices can be accessed by simply mapping memory and reading from / writing to it. This driver adds support for a generic "mmio-nvmem" DT binding used by such devices.

One of such devices is Broadcom's NVRAM. It's already supported (see NVMEM_BRCM_NVRAM) but existing driver covers both:
1. NVMEM device access
2. NVMEM content parsing

Once we get support for NVMEM layouts then existing NVRAM driver will get converted into a layout and generic driver will take over responsibility for data access. That's why it claims "brcm,nvram" (conditionally for now).

Signed-off-by Rafał Miłecki <[email protected]>

---
V3: Support "reg-io-width", basic writing & "brcm,nvram" string

---
  drivers/nvmem/Kconfig  |  10 ++++
  drivers/nvmem/Makefile |   2 +
  drivers/nvmem/mmio.c   | 125 +++++++++++++++++++++++++++++++++++++++++
  3 files changed, 137 insertions(+)

create mode 100644 drivers/nvmem/mmio.c

drivers/nvmem/Kconfig +10 -0

index 6dec38805041..189ea85bd67d 100644
@@ -166,6 +166,16 @@ config NVMEM_MICROCHIP_OTPC
  	  This driver enable the OTP controller available on Microchip SAMA7G5
  	  SoCs. It controls the access to the OTP memory connected to it.
 
+config NVMEM_MMIO
+	tristate "MMIO access based NVMEM support"
+	depends on HAS_IOMEM
+	help
+	  This driver provides support for NVMEM devices that can be accessed
+	  using MMIO.
+
+	  This driver can also be built as a module. If so, the module
+	  will be called nvmem-mmio.
+
  config NVMEM_MTK_EFUSE
  	tristate "Mediatek SoCs EFUSE support"
  	depends on ARCH_MEDIATEK || COMPILE_TEST

drivers/nvmem/Makefile +2 -0

index 6a1efffa88f0..767a9db2bfc1 100644
@@ -35,6 +35,8 @@ obj-$(CONFIG_NVMEM_MESON_MX_EFUSE)	+= nvmem_meson_mx_efuse.o
  nvmem_meson_mx_efuse-y			:= meson-mx-efuse.o
  obj-$(CONFIG_NVMEM_MICROCHIP_OTPC)	+= nvmem-microchip-otpc.o
  nvmem-microchip-otpc-y			:= microchip-otpc.o
+obj-$(CONFIG_NVMEM_MMIO)		+= nvmem-mmio.o
+nvmem-mmio-y				:= mmio.o
  obj-$(CONFIG_NVMEM_MTK_EFUSE)		+= nvmem_mtk-efuse.o
  nvmem_mtk-efuse-y			:= mtk-efuse.o
  obj-$(CONFIG_NVMEM_MXS_OCOTP)		+= nvmem-mxs-ocotp.o

drivers/nvmem/mmio.c new file +19 -0

new file mode 100644
index 000000000000..e247c943eea2
@@ -0,0 +1,125 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2023 Rafał Miłecki <[email protected]>
+ */
+
+#include <linux/io.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/nvmem-provider.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/property.h>
+#include <linux/slab.h>
+
+struct mmio_nvmem {
+	void __iomem *base;
+	u32 io_width;
+};
+

drivers/nvmem/mmio.c new file +15 -0

+	switch (priv->io_width) {
+	case 1:
+		for (dst8 = val; bytes; bytes -= 1, offset += 1)
+			*dst8++ = readb(priv->base + offset);
+		break;
+	case 2:
+		for (dst16 = val; bytes; bytes -= 2, offset += 2)
+			*dst16++ = readw(priv->base + offset);
+		break;
+	case 4:
+		for (dst32 = val; bytes; bytes -= 4, offset += 4)
+			*dst32++ = readl(priv->base + offset);
+		break;
+	default:
+		memcpy_fromio(val, priv->base + offset, bytes);

drivers/nvmem/mmio.c new file +24 -0

+	}
+
+	return 0;
+}
+
+static int mmio_nvmem_probe(struct platform_device *pdev)
+{
+	struct nvmem_config config = {
+		.name = "mmio-nvmem",
+		.id = NVMEM_DEVID_AUTO,
+		.read_only = true,
+		.reg_read = mmio_nvmem_read,
+	};
+	struct device *dev = &pdev->dev;
+	struct mmio_nvmem *priv;
+	struct resource *res;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);

drivers/nvmem/mmio.c new file +21 -0

+	{},
+};
+
+static struct platform_driver mmio_nvmem_driver = {
+	.probe = mmio_nvmem_probe,
+	.driver = {
+		.name = "mmio_nvmem",
+		.of_match_table = mmio_nvmem_of_match_table,
+	},
+};
+
+static int __init mmio_nvmem_init(void)
+{
+	return platform_driver_register(&mmio_nvmem_driver);
+}
+
+subsys_initcall_sync(mmio_nvmem_init);
+
+MODULE_AUTHOR("Rafał Miłecki");
+MODULE_LICENSE("GPL");
+MODULE_DEVICE_TABLE(of, mmio_nvmem_of_match_table);