pinctrl: s32: driver improvements and generic struct use

Instead of relying on of_match_device(), using of_device_get_match_data() can simplify implementation and avoid code duplication.

Signed-off-by Chester Lin <[email protected]>

Quoted 3 lines · Chester Lin

Instead of relying on of_match_device(), using of_device_get_match_data() can simplify implementation and avoid code duplication.

Suggested-by?

Quoted 1 line

Signed-off-by Chester Lin <[email protected]>

...

Review

Quoted 2 lines

(quoted diff) +2 -0

+       soc_info = (struct s32_pinctrl_soc_info *)
+                       of_device_get_match_data(&pdev->dev);

Drop the ugly casting, it's not needed.

Signature · 2 lines

With Best Regards,
Andy Shevchenko

Quoted 1 line · Andy Shevchenko

On Mon, Mar 20, 2023 at 6:39 PM Chester Lin <[email protected]> wrote:

Quoted 4 lines

Review

Quoted 2 lines

(quoted diff) +2 -0

+       soc_info = (struct s32_pinctrl_soc_info *)
+                       of_device_get_match_data(&pdev->dev);

Drop the ugly casting, it's not needed.

Actually it's used for suppressing the compiler warning since some members in this soc_info need to be filled by pinctrl-s32cc.

Move common codes into smaller inline functions and remove some argument handlings that are not actually used by either S32 MSCR register or generic config params.

case PIN_CONFIG_OUTPUT_ENABLE:

drivers/pinctrl/nxp/pinctrl-s32cc.c +1 -4

-               if (arg)
-                       *config |= S32_MSCR_OBE;
-               else
-                       *config &= ~S32_MSCR_OBE;
+               *config |= S32_MSCR_OBE;

Quoted 4 lines · Chester Lin

Move common codes into smaller inline functions and remove some argument handlings that are not actually used by either S32 MSCR register or generic config params.

...

Quoted 6 lines

case PIN_CONFIG_OUTPUT_ENABLE:

drivers/pinctrl/nxp/pinctrl-s32cc.c +1 -4

-               if (arg)
-                       *config |= S32_MSCR_OBE;
-               else
-                       *config &= ~S32_MSCR_OBE;
+               *config |= S32_MSCR_OBE;

drivers/pinctrl/nxp/pinctrl-s32cc.c static int s32_get_pin_conf(enum pin_config_param param, u32 arg, · line 524

Quoted 10 lines

drivers/pinctrl/nxp/pinctrl-s32cc.c +1 -4

                *mask |= S32_MSCR_OBE;
                break;
        case PIN_CONFIG_INPUT_ENABLE:
-               if (arg)
-                       *config |= S32_MSCR_IBE;
-               else
-                       *config &= ~S32_MSCR_IBE;
+               *config |= S32_MSCR_IBE;
                *mask |= S32_MSCR_IBE;
                break;

Isn't it a regression here?
Otherwise needs an explicit explanation in the commit message on what's going on here and why it's not a regression.

...

drivers/pinctrl/nxp/pinctrl-s32cc.c static int s32_get_pin_conf(enum pin_config_param param, u32 arg, · line 543

Quoted 5 lines

case PIN_CONFIG_BIAS_DISABLE:

drivers/pinctrl/nxp/pinctrl-s32cc.c +1 -2

-               *config &= ~(S32_MSCR_PUS | S32_MSCR_PUE);
-               *mask |= S32_MSCR_PUS | S32_MSCR_PUE;
+               s32_pin_set_pull(param, mask, config);
                break;

This now can be unified with PU and PD cases above.

Signature · 2 lines

With Best Regards,
Andy Shevchenko

Use generic data structure to describe pin control functions and groups in S32 SoC family and drop duplicated struct members.

Signed-off-by Chester Lin <[email protected]>

---
Changes in v2:
- Simply use generic 'struct pinfunction' rather than having extra 'struct s32_pmx_func'.

 drivers/pinctrl/nxp/pinctrl-s32.h   | 26 ++--------
 drivers/pinctrl/nxp/pinctrl-s32cc.c | 76 +++++++++++++++--------------
 2 files changed, 45 insertions(+), 57 deletions(-)

drivers/pinctrl/nxp/pinctrl-s32.h +5 -21

index 545bf16b988d..2f7aecd462e4 100644
@@ -15,31 +15,15 @@ struct platform_device;
 
 /**
  * struct s32_pin_group - describes an S32 pin group
- * @name: the name of this specific pin group
- * @npins: the number of pins in this group array, i.e. the number of
- *         elements in pin_ids and pin_sss so we can iterate over that array
- * @pin_ids: an array of pin IDs in this group
- * @pin_sss: an array of source signal select configs paired with pin_ids
+ * @data: generic data describes group name, number of pins, and a pin array in
+       this group.
+ * @pin_sss: an array of source signal select configs paired with pin array.
  */
 struct s32_pin_group {
-       const char *name;
-       unsigned int npins;
-       unsigned int *pin_ids;
+       struct pingroup data;
        unsigned int *pin_sss;
 };
 
-/**
- * struct s32_pmx_func - describes S32 pinmux functions
- * @name: the name of this specific function
- * @groups: corresponding pin groups
- * @num_groups: the number of groups
- */
-struct s32_pmx_func {
-       const char *name;
-       const char **groups;
-       unsigned int num_groups;
-};
-
 /**
  * struct s32_pin_range - pin ID range for each memory region.
  * @start: start pin ID

@@ -56,7 +40,7 @@ struct s32_pinctrl_soc_info {
        unsigned int npins;
        struct s32_pin_group *groups;
        unsigned int ngroups;
-       struct s32_pmx_func *functions;
+       struct pinfunction *functions;
        unsigned int nfunctions;
        unsigned int grp_index;
        const struct s32_pin_range *mem_pin_ranges;

drivers/pinctrl/nxp/pinctrl-s32cc.c +38 -36

index cb8a0844c0fa..4ed0cc905232 100644
@@ -188,7 +188,7 @@ static const char *s32_get_group_name(struct pinctrl_dev *pctldev,
        struct s32_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
        const struct s32_pinctrl_soc_info *info = ipctl->info;
 
-       return info->groups[selector].name;
+       return info->groups[selector].data.name;
 }
 
 static int s32_get_group_pins(struct pinctrl_dev *pctldev,

@@ -198,8 +198,8 @@ static int s32_get_group_pins(struct pinctrl_dev *pctldev,
        struct s32_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
        const struct s32_pinctrl_soc_info *info = ipctl->info;
 
-       *pins = info->groups[selector].pin_ids;
-       *npins = info->groups[selector].npins;
+       *pins = info->groups[selector].data.pins;
+       *npins = info->groups[selector].data.npins;
 
        return 0;
 }

@@ -314,23 +314,23 @@ static int s32_pmx_set(struct pinctrl_dev *pctldev, unsigned int selector,
        grp = &info->groups[group];
 
        dev_dbg(ipctl->dev, "set mux for function %s group %s\n",
-               info->functions[selector].name, grp->name);
+               info->functions[selector].name, grp->data.name);
 
        /* Check beforehand so we don't have a partial config. */
-       for (i = 0; i < grp->npins; i++) {
-               if (s32_check_pin(pctldev, grp->pin_ids[i]) != 0) {
+       for (i = 0; i < grp->data.npins; i++) {
+               if (s32_check_pin(pctldev, grp->data.pins[i]) != 0) {
                        dev_err(info->dev, "invalid pin: %u in group: %u\n",
-                               grp->pin_ids[i], group);
+                               grp->data.pins[i], group);
                        return -EINVAL;
                }
        }
 
-       for (i = 0, ret = 0; i < grp->npins && !ret; i++) {
-               ret = s32_regmap_update(pctldev, grp->pin_ids[i],
+       for (i = 0, ret = 0; i < grp->data.npins && !ret; i++) {
+               ret = s32_regmap_update(pctldev, grp->data.pins[i],
                                        S32_MSCR_SSS_MASK, grp->pin_sss[i]);
                if (ret) {
                        dev_err(info->dev, "Failed to set pin %u\n",
-                               grp->pin_ids[i]);
+                               grp->data.pins[i]);
                        return ret;
                }
        }

@@ -364,7 +364,7 @@ static int s32_pmx_get_groups(struct pinctrl_dev *pctldev,
        const struct s32_pinctrl_soc_info *info = ipctl->info;
 
        *groups = info->functions[selector].groups;
-       *num_groups = info->functions[selector].num_groups;
+       *num_groups = info->functions[selector].ngroups;
 
        return 0;
 }

@@ -602,8 +602,8 @@ static int s32_pconf_group_set(struct pinctrl_dev *pctldev, unsigned int selecto
        int i, ret;
 
        grp = &info->groups[selector];
-       for (i = 0; i < grp->npins; i++) {
-               ret = s32_pinconf_mscr_update(pctldev, grp->pin_ids[i],
+       for (i = 0; i < grp->data.npins; i++) {
+               ret = s32_pinconf_mscr_update(pctldev, grp->data.pins[i],
                                              configs, num_configs);
                if (ret)
                        return ret;

@@ -637,9 +637,9 @@ static void s32_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
 
        seq_puts(s, "\n");
        grp = &info->groups[selector];
-       for (i = 0; i < grp->npins; i++) {
-               name = pin_get_name(pctldev, grp->pin_ids[i]);
-               ret = s32_regmap_read(pctldev, grp->pin_ids[i], &config);
+       for (i = 0; i < grp->data.npins; i++) {
+               name = pin_get_name(pctldev, grp->data.pins[i]);
+               ret = s32_regmap_read(pctldev, grp->data.pins[i], &config);
                if (ret)
                        return;
                seq_printf(s, "%s: 0x%x\n", name, config);

@@ -732,6 +732,7 @@ static int s32_pinctrl_parse_groups(struct device_node *np,
        const __be32 *p;
        struct device *dev;
        struct property *prop;
+       unsigned int *pins, *sss;
        int i, npins;
        u32 pinmux;
 

@@ -740,38 +741,38 @@ static int s32_pinctrl_parse_groups(struct device_node *np,
        dev_dbg(dev, "group: %pOFn\n", np);
 
        /* Initialise group */
-       grp->name = np->name;
+       grp->data.name = np->name;
 
        npins = of_property_count_elems_of_size(np, "pinmux", sizeof(u32));
        if (npins < 0) {
                dev_err(dev, "Failed to read 'pinmux' property in node %s.\n",
-                       grp->name);
+                       grp->data.name);
                return -EINVAL;
        }
        if (!npins) {
-               dev_err(dev, "The group %s has no pins.\n", grp->name);
+               dev_err(dev, "The group %s has no pins.\n", grp->data.name);
                return -EINVAL;
        }
 
-       grp->npins = npins;
+       grp->data.npins = npins;
 
-       grp->pin_ids = devm_kcalloc(info->dev, grp->npins,
-                                   sizeof(unsigned int), GFP_KERNEL);
-       grp->pin_sss = devm_kcalloc(info->dev, grp->npins,
-                                   sizeof(unsigned int), GFP_KERNEL);
-       if (!grp->pin_ids || !grp->pin_sss)
+       pins = devm_kcalloc(info->dev, npins, sizeof(*pins), GFP_KERNEL);
+       sss = devm_kcalloc(info->dev, npins, sizeof(*sss), GFP_KERNEL);
+       if (!pins || !sss)
                return -ENOMEM;
 
        i = 0;
        of_property_for_each_u32(np, "pinmux", prop, p, pinmux) {
-               grp->pin_ids[i] = get_pin_no(pinmux);
-               grp->pin_sss[i] = get_pin_func(pinmux);
+               pins[i] = get_pin_no(pinmux);
+               sss[i] = get_pin_func(pinmux);
 
-               dev_dbg(info->dev, "pin-id: 0x%x, sss: 0x%x",
-                       grp->pin_ids[i], grp->pin_sss[i]);
+               dev_dbg(info->dev, "pin: 0x%x, sss: 0x%x", pins[i], sss[i]);
                i++;
        }
 
+       grp->data.pins = pins;
+       grp->pin_sss = sss;
+
        return 0;
 }
 

@@ -780,8 +781,9 @@ static int s32_pinctrl_parse_functions(struct device_node *np,
                                        u32 index)
 {
        struct device_node *child;
-       struct s32_pmx_func *func;
+       struct pinfunction *func;
        struct s32_pin_group *grp;
+       char **groups;
        u32 i = 0;
        int ret = 0;
 

@@ -791,18 +793,18 @@ static int s32_pinctrl_parse_functions(struct device_node *np,
 
        /* Initialise function */
        func->name = np->name;
-       func->num_groups = of_get_child_count(np);
-       if (func->num_groups == 0) {
+       func->ngroups = of_get_child_count(np);
+       if (func->ngroups == 0) {
                dev_err(info->dev, "no groups defined in %pOF\n", np);
                return -EINVAL;
        }
-       func->groups = devm_kcalloc(info->dev, func->num_groups,
-                                   sizeof(*func->groups), GFP_KERNEL);
-       if (!func->groups)
+       groups = devm_kcalloc(info->dev, func->ngroups,
+                             sizeof(*func->groups), GFP_KERNEL);
+       if (!groups)
                return -ENOMEM;
 
        for_each_child_of_node(np, child) {
-               func->groups[i] = child->name;
+               groups[i] = (char *)child->name;
                grp = &info->groups[info->grp_index++];
                ret = s32_pinctrl_parse_groups(child, grp, info);
                if (ret)

drivers/pinctrl/nxp/pinctrl-s32cc.c +0 -0

        return 0;
 }

Quoted 3 lines · Chester Lin

Use generic data structure to describe pin control functions and groups in S32 SoC family and drop duplicated struct members.

Not sure about the need of the casting, see below, otherwise LGTM.

Reviewed-by Andy Shevchenko <[email protected]>

Quoted 247 lines

Signed-off-by Chester Lin <[email protected]>

---
Changes in v2:
- Simply use generic 'struct pinfunction' rather than having extra 'struct s32_pmx_func'.

 drivers/pinctrl/nxp/pinctrl-s32.h   | 26 ++--------
 drivers/pinctrl/nxp/pinctrl-s32cc.c | 76 +++++++++++++++--------------
 2 files changed, 45 insertions(+), 57 deletions(-)

drivers/pinctrl/nxp/pinctrl-s32.h +5 -21

index 545bf16b988d..2f7aecd462e4 100644
@@ -15,31 +15,15 @@ struct platform_device;
 
 /**
  * struct s32_pin_group - describes an S32 pin group
- * @name: the name of this specific pin group
- * @npins: the number of pins in this group array, i.e. the number of
- *         elements in pin_ids and pin_sss so we can iterate over that array
- * @pin_ids: an array of pin IDs in this group
- * @pin_sss: an array of source signal select configs paired with pin_ids
+ * @data: generic data describes group name, number of pins, and a pin array in
+       this group.
+ * @pin_sss: an array of source signal select configs paired with pin array.
  */
 struct s32_pin_group {
-       const char *name;
-       unsigned int npins;
-       unsigned int *pin_ids;
+       struct pingroup data;
        unsigned int *pin_sss;
 };
 
-/**
- * struct s32_pmx_func - describes S32 pinmux functions
- * @name: the name of this specific function
- * @groups: corresponding pin groups
- * @num_groups: the number of groups
- */
-struct s32_pmx_func {
-       const char *name;
-       const char **groups;
-       unsigned int num_groups;
-};
-
 /**
  * struct s32_pin_range - pin ID range for each memory region.
  * @start: start pin ID

@@ -56,7 +40,7 @@ struct s32_pinctrl_soc_info {
        unsigned int npins;
        struct s32_pin_group *groups;
        unsigned int ngroups;
-       struct s32_pmx_func *functions;
+       struct pinfunction *functions;
        unsigned int nfunctions;
        unsigned int grp_index;
        const struct s32_pin_range *mem_pin_ranges;

drivers/pinctrl/nxp/pinctrl-s32cc.c +38 -36

index cb8a0844c0fa..4ed0cc905232 100644
@@ -188,7 +188,7 @@ static const char *s32_get_group_name(struct pinctrl_dev *pctldev,
        struct s32_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
        const struct s32_pinctrl_soc_info *info = ipctl->info;
 
-       return info->groups[selector].name;
+       return info->groups[selector].data.name;
 }
 
 static int s32_get_group_pins(struct pinctrl_dev *pctldev,

@@ -198,8 +198,8 @@ static int s32_get_group_pins(struct pinctrl_dev *pctldev,
        struct s32_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
        const struct s32_pinctrl_soc_info *info = ipctl->info;
 
-       *pins = info->groups[selector].pin_ids;
-       *npins = info->groups[selector].npins;
+       *pins = info->groups[selector].data.pins;
+       *npins = info->groups[selector].data.npins;
 
        return 0;
 }

@@ -314,23 +314,23 @@ static int s32_pmx_set(struct pinctrl_dev *pctldev, unsigned int selector,
        grp = &info->groups[group];
 
        dev_dbg(ipctl->dev, "set mux for function %s group %s\n",
-               info->functions[selector].name, grp->name);
+               info->functions[selector].name, grp->data.name);
 
        /* Check beforehand so we don't have a partial config. */
-       for (i = 0; i < grp->npins; i++) {
-               if (s32_check_pin(pctldev, grp->pin_ids[i]) != 0) {
+       for (i = 0; i < grp->data.npins; i++) {
+               if (s32_check_pin(pctldev, grp->data.pins[i]) != 0) {
                        dev_err(info->dev, "invalid pin: %u in group: %u\n",
-                               grp->pin_ids[i], group);
+                               grp->data.pins[i], group);
                        return -EINVAL;
                }
        }
 
-       for (i = 0, ret = 0; i < grp->npins && !ret; i++) {
-               ret = s32_regmap_update(pctldev, grp->pin_ids[i],
+       for (i = 0, ret = 0; i < grp->data.npins && !ret; i++) {
+               ret = s32_regmap_update(pctldev, grp->data.pins[i],
                                        S32_MSCR_SSS_MASK, grp->pin_sss[i]);
                if (ret) {
                        dev_err(info->dev, "Failed to set pin %u\n",
-                               grp->pin_ids[i]);
+                               grp->data.pins[i]);
                        return ret;
                }
        }

@@ -364,7 +364,7 @@ static int s32_pmx_get_groups(struct pinctrl_dev *pctldev,
        const struct s32_pinctrl_soc_info *info = ipctl->info;
 
        *groups = info->functions[selector].groups;
-       *num_groups = info->functions[selector].num_groups;
+       *num_groups = info->functions[selector].ngroups;
 
        return 0;
 }

@@ -602,8 +602,8 @@ static int s32_pconf_group_set(struct pinctrl_dev *pctldev, unsigned int selecto
        int i, ret;
 
        grp = &info->groups[selector];
-       for (i = 0; i < grp->npins; i++) {
-               ret = s32_pinconf_mscr_update(pctldev, grp->pin_ids[i],
+       for (i = 0; i < grp->data.npins; i++) {
+               ret = s32_pinconf_mscr_update(pctldev, grp->data.pins[i],
                                              configs, num_configs);
                if (ret)
                        return ret;

@@ -637,9 +637,9 @@ static void s32_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
 
        seq_puts(s, "\n");
        grp = &info->groups[selector];
-       for (i = 0; i < grp->npins; i++) {
-               name = pin_get_name(pctldev, grp->pin_ids[i]);
-               ret = s32_regmap_read(pctldev, grp->pin_ids[i], &config);
+       for (i = 0; i < grp->data.npins; i++) {
+               name = pin_get_name(pctldev, grp->data.pins[i]);
+               ret = s32_regmap_read(pctldev, grp->data.pins[i], &config);
                if (ret)
                        return;
                seq_printf(s, "%s: 0x%x\n", name, config);

@@ -732,6 +732,7 @@ static int s32_pinctrl_parse_groups(struct device_node *np,
        const __be32 *p;
        struct device *dev;
        struct property *prop;
+       unsigned int *pins, *sss;
        int i, npins;
        u32 pinmux;
 

@@ -740,38 +741,38 @@ static int s32_pinctrl_parse_groups(struct device_node *np,
        dev_dbg(dev, "group: %pOFn\n", np);
 
        /* Initialise group */
-       grp->name = np->name;
+       grp->data.name = np->name;
 
        npins = of_property_count_elems_of_size(np, "pinmux", sizeof(u32));
        if (npins < 0) {
                dev_err(dev, "Failed to read 'pinmux' property in node %s.\n",
-                       grp->name);
+                       grp->data.name);
                return -EINVAL;
        }
        if (!npins) {
-               dev_err(dev, "The group %s has no pins.\n", grp->name);
+               dev_err(dev, "The group %s has no pins.\n", grp->data.name);
                return -EINVAL;
        }
 
-       grp->npins = npins;
+       grp->data.npins = npins;
 
-       grp->pin_ids = devm_kcalloc(info->dev, grp->npins,
-                                   sizeof(unsigned int), GFP_KERNEL);
-       grp->pin_sss = devm_kcalloc(info->dev, grp->npins,
-                                   sizeof(unsigned int), GFP_KERNEL);
-       if (!grp->pin_ids || !grp->pin_sss)
+       pins = devm_kcalloc(info->dev, npins, sizeof(*pins), GFP_KERNEL);
+       sss = devm_kcalloc(info->dev, npins, sizeof(*sss), GFP_KERNEL);
+       if (!pins || !sss)
                return -ENOMEM;
 
        i = 0;
        of_property_for_each_u32(np, "pinmux", prop, p, pinmux) {
-               grp->pin_ids[i] = get_pin_no(pinmux);
-               grp->pin_sss[i] = get_pin_func(pinmux);
+               pins[i] = get_pin_no(pinmux);
+               sss[i] = get_pin_func(pinmux);
 
-               dev_dbg(info->dev, "pin-id: 0x%x, sss: 0x%x",
-                       grp->pin_ids[i], grp->pin_sss[i]);
+               dev_dbg(info->dev, "pin: 0x%x, sss: 0x%x", pins[i], sss[i]);
                i++;
        }
 
+       grp->data.pins = pins;
+       grp->pin_sss = sss;
+
        return 0;
 }
 

@@ -780,8 +781,9 @@ static int s32_pinctrl_parse_functions(struct device_node *np,
                                        u32 index)
 {
        struct device_node *child;
-       struct s32_pmx_func *func;
+       struct pinfunction *func;
        struct s32_pin_group *grp;
+       char **groups;
        u32 i = 0;
        int ret = 0;
 

@@ -791,18 +793,18 @@ static int s32_pinctrl_parse_functions(struct device_node *np,
 
        /* Initialise function */
        func->name = np->name;
-       func->num_groups = of_get_child_count(np);
-       if (func->num_groups == 0) {
+       func->ngroups = of_get_child_count(np);
+       if (func->ngroups == 0) {
                dev_err(info->dev, "no groups defined in %pOF\n", np);
                return -EINVAL;
        }
-       func->groups = devm_kcalloc(info->dev, func->num_groups,
-                                   sizeof(*func->groups), GFP_KERNEL);
-       if (!func->groups)
+       groups = devm_kcalloc(info->dev, func->ngroups,
+                             sizeof(*func->groups), GFP_KERNEL);
+       if (!groups)
                return -ENOMEM;
 
        for_each_child_of_node(np, child) {
-               func->groups[i] = child->name;
+               groups[i] = (char *)child->name;
                grp = &info->groups[info->grp_index++];
                ret = s32_pinctrl_parse_groups(child, grp, info);
                if (ret)

@@ -810,6 +812,8 @@ static int s32_pinctrl_parse_functions(struct device_node *np,
                i++;
        }
 

drivers/pinctrl/nxp/pinctrl-s32cc.c static int s32_pinctrl_parse_functions(struct device_node *np, · line 815

Quoted 1 line

drivers/pinctrl/nxp/pinctrl-s32cc.c +1 -0

+       func->groups = (const char **)groups;

Hmm... Why is casting needed?

Quoted 3 lines

drivers/pinctrl/nxp/pinctrl-s32cc.c +0 -0

        return 0;
 }

Signature · 2 lines

With Best Regards,
Andy Shevchenko

Quoted 1 line · Andy Shevchenko

On Mon, Mar 20, 2023 at 6:39 PM Chester Lin <[email protected]> wrote:

Quoted 3 lines

drivers/pinctrl/nxp/pinctrl-s32cc.c static int s32_pinctrl_parse_functions(struct device_node *np, · line 807

Quoted 3 lines

        for_each_child_of_node(np, child) {

drivers/pinctrl/nxp/pinctrl-s32cc.c +1 -1

-               func->groups[i] = child->name;
+               groups[i] = (char *)child->name;

Quoted 3 lines

Quoted 1 line

+ func->groups = (const char **)groups;

Hmm... Why is casting needed?

It's used for fulfilling the type checking done by kbuild otherwise an error will occur:

drivers/pinctrl/nxp/pinctrl-s32cc.c:815:22: error: assignment to 'const char * const*' from incompatible pointer type 'char **' [-Werror=incompatible-pointer-types]

In 'struct pinfunction', the member 'groups' is declared as (const char * const *).