can: bxcan: add support for single peripheral configuration
Subsystems (7)
Dario Binacchi
maintainercover can: bxcan: add support for single peripheral configuration
The series adds support for managing bxCAN controllers in single peripheral configuration.
Unlike stm32f4 SOCs, where bxCAN controllers are only in dual peripheral configuration, stm32f7 SOCs contain three CAN peripherals, CAN1 and CAN2 in dual peripheral configuration and CAN3 in single peripheral configuration:
- Dual CAN peripheral configuration:
* CAN1: Primary bxCAN for managing the communication between a secondary bxCAN and the 512-byte SRAM memory.
* CAN2: Secondary bxCAN with no direct access to the SRAM memory. This means that the two bxCAN cells share the 512-byte SRAM memory and CAN2 can't be used without enabling CAN1.
- Single CAN peripheral configuration:
* CAN3: Primary bxCAN with dedicated Memory Access Controller unit and 512-byte SRAM memory.
The driver has been tested on the stm32f769i-discovery board with a kernel version 5.19.0-rc2 in loopback + silent mode:
ip link set can[0-2] type can bitrate 125000 loopback on listen-only on ip link set up can0
candump can[0-2] -L &
cansend can[0-2] 300#AC.AB.AD.AE.75.49.AD.D1
Dario Binacchi (4):
dt-bindings: mfd: stm32f7: add binding definition for CAN3
ARM: dts: stm32: add CAN support on stm32f746
ARM: dts: stm32: add pin map for CAN controller on stm32f7
can: bxcan: add support for single peripheral configuration
arch/arm/boot/dts/stm32f7-pinctrl.dtsi | 82 ++++++++++++++++++++++++++ arch/arm/boot/dts/stm32f746.dtsi | 39 ++++++++++++ drivers/net/can/bxcan.c | 20 ++++++- include/dt-bindings/mfd/stm32f7-rcc.h | 1 + 4 files changed, 139 insertions(+), 3 deletions(-)
Signature · 1 line
2.32.0
Dario Binacchi
maintainerPATCH 1/4 dt-bindings: mfd: stm32f7: add binding definition for CAN3
Add binding definition for CAN3 peripheral.
---
include/dt-bindings/mfd/stm32f7-rcc.h | 1 + 1 file changed, 1 insertion(+)
include/dt-bindings/mfd/stm32f7-rcc.h +1 -0
@@ -64,6 +64,7 @@#define STM32F7_RCC_APB1_TIM14 8#define STM32F7_RCC_APB1_LPTIM1 9#define STM32F7_RCC_APB1_WWDG 11 +#define STM32F7_RCC_APB1_CAN3 13#define STM32F7_RCC_APB1_SPI2 14#define STM32F7_RCC_APB1_SPI3 15#define STM32F7_RCC_APB1_SPDIFRX 16
Signature · 1 line
2.32.0
Re: [PATCH 1/4] dt-bindings: mfd: stm32f7: add binding definition for CAN3
Quoted 7 lines · Dario Binacchi
Add binding definition for CAN3 peripheral.
Signed-off-by Dario Binacchi <[email protected]>---
include/dt-bindings/mfd/stm32f7-rcc.h | 1 + 1 file changed, 1 insertion(+)
Applied, thanks
Signature · 1 line
Lee Jones [李琼斯]
Marc Kleine-Budde
maintainerRe: [PATCH 1/4] dt-bindings: mfd: stm32f7: add binding definition for CAN3
Hey Lee Jones,
Quoted 11 lines · Lee Jones
Quoted 7 lines · Dario Binacchi
Add binding definition for CAN3 peripheral.
Signed-off-by Dario Binacchi <[email protected]>---
include/dt-bindings/mfd/stm32f7-rcc.h | 1 + 1 file changed, 1 insertion(+)Applied, thanks
I upstreamed the v2 of this series
(https://lore.kernel.org/all/[email protected]/)
that doesn't contain this change to net/main without noticing that the DT changes in that series depend on it.
This broke the DT compilation of the stm32f746.dtsi in the net/main tree. I don't see the stm32f7-rcc.h changes in linus/master so I'm afraid this will break mainline too :/
What are the possible solutions? I see:
1) revert the stm32f746.dtsi changes via net/main
2) upstream the stm32f7-rcc.h changes via net/main, too
3) upstream the stm32f7-rcc.h changes via you tree, so that it hits mainline in the v6.4 release cycle.
I'm in favor of solution number 1. Thoughts?
Sorry for the mess,
Marc
Signature · 4 lines
Pengutronix e.K. | Marc Kleine-Budde | Embedded Linux | https://www.pengutronix.de | Vertretung Nürnberg | Phone: +49-5121-206917-129 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
Re: [PATCH 1/4] dt-bindings: mfd: stm32f7: add binding definition for CAN3
Quoted 24 lines · Marc Kleine-Budde
Hey Lee Jones,
Quoted 11 lines · Lee Jones
Quoted 7 lines · Dario Binacchi
Add binding definition for CAN3 peripheral.
Signed-off-by Dario Binacchi <[email protected]>---
include/dt-bindings/mfd/stm32f7-rcc.h | 1 + 1 file changed, 1 insertion(+)Applied, thanks
I upstreamed the v2 of this series
(https://lore.kernel.org/all/[email protected]/)
that doesn't contain this change to net/main without noticing that the DT changes in that series depend on it.This broke the DT compilation of the
stm32f746.dtsiin the net/main tree. I don't see thestm32f7-rcc.hchanges in linus/master so I'm afraid this will break mainline too :/
Quoted 7 lines
What are the possible solutions? I see:
1) revert thestm32f746.dtsichanges via net/main
2) upstream thestm32f7-rcc.hchanges via net/main, too
3) upstream thestm32f7-rcc.hchanges via you tree, so that it hits mainline in the v6.4 release cycle.I'm in favor of solution number 1. Thoughts?
DTS should never go with driver changes or with driver trees, not only because it hides ABI breaks but also for above reasons. The best if you just drop or revert DTS commits, so they can go via platform maintainer.
Best regards,
Krzysztof
Marc Kleine-Budde
maintainerRe: [PATCH 1/4] dt-bindings: mfd: stm32f7: add binding definition for CAN3
Quoted 31 lines · Krzysztof Kozlowski
Quoted 30 lines · Marc Kleine-Budde
Hey Lee Jones,
Quoted 11 lines · Lee Jones
Quoted 7 lines · Dario Binacchi
Add binding definition for CAN3 peripheral.
Signed-off-by Dario Binacchi <[email protected]>---
include/dt-bindings/mfd/stm32f7-rcc.h | 1 + 1 file changed, 1 insertion(+)Applied, thanks
I upstreamed the v2 of this series
(https://lore.kernel.org/all/[email protected]/)
that doesn't contain this change to net/main without noticing that the DT changes in that series depend on it.This broke the DT compilation of the
stm32f746.dtsiin the net/main tree. I don't see thestm32f7-rcc.hchanges in linus/master so I'm afraid this will break mainline too :/What are the possible solutions? I see:
1) revert thestm32f746.dtsichanges via net/main
2) upstream thestm32f7-rcc.hchanges via net/main, too
3) upstream thestm32f7-rcc.hchanges via you tree, so that it hits mainline in the v6.4 release cycle.
Quoted 5 lines
Quoted 1 line
I'm in favor of solution number 1. Thoughts?
DTS should never go with driver changes or with driver trees, not only because it hides ABI breaks but also for above reasons. The best if you just drop or revert DTS commits, so they can go via platform maintainer.
Reverted: https://lore.kernel.org/[email protected]
Thanks,
Marc
Signature · 4 lines
Pengutronix e.K. | Marc Kleine-Budde | Embedded Linux | https://www.pengutronix.de | Vertretung Nürnberg | Phone: +49-5121-206917-129 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
Dario Binacchi
maintainerPATCH 2/4 ARM: dts: stm32: add CAN support on stm32f746
In reply to Dario BinacchiAdd support for bxcan (Basic eXtended CAN controller) to STM32F746. The chip contains three CAN peripherals, CAN1 and CAN2 in dual peripheral configuration and CAN3 in single peripheral configuration:
- Dual CAN peripheral configuration:
* CAN1: Primary bxCAN for managing the communication between a secondary bxCAN and the 512-byte SRAM memory.
* CAN2: Secondary bxCAN with no direct access to the SRAM memory. This means that the two bxCAN cells share the 512-byte SRAM memory and CAN2 can't be used without enabling CAN1.
- Single CAN peripheral configuration:
* CAN3: Primary bxCAN with dedicated Memory Access Controller unit and 512-byte SRAM memory.
-------------------------------------------------------------------------
| features | CAN1 | CAN2 | CAN 3 |
-------------------------------------------------------------------------
| SRAM | 512-byte shared between CAN1 & CAN2 | 512-byte |
-------------------------------------------------------------------------
| Filters | 26 filters shared between CAN1 & CAN2 | 14 filters |
-------------------------------------------------------------------------
---
arch/arm/boot/dts/stm32f746.dtsi | 39 ++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+)
arch/arm/boot/dts/stm32f746.dtsi +39 -0
@@ -257,6 +257,16 @@ rtc: rtc@40002800 { status = "disabled"; }; + can3: can@40003400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40003400 0x400>; + interrupts = <104>, <105>, <106>, <107>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F7_APB1_RESET(CAN3)>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>; + status = "disabled"; + }; + usart2: serial@40004400 { compatible = "st,stm32f7-uart"; reg = <0x40004400 0x400>;
@@ -337,6 +347,35 @@ i2c4: i2c@40006000 { status = "disabled"; }; + can1: can@40006400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006400 0x200>; + interrupts = <19>, <20>, <21>, <22>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F7_APB1_RESET(CAN1)>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>; + st,can-primary; + st,gcan = <&gcan>; + status = "disabled"; + }; + + gcan: gcan@40006600 { + compatible = "st,stm32f4-gcan", "syscon"; + reg = <0x40006600 0x200>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>; + }; + + can2: can@40006800 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006800 0x200>; + interrupts = <63>, <64>, <65>, <66>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F7_APB1_RESET(CAN2)>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN2)>; + st,gcan = <&gcan>; + status = "disabled"; + }; + cec: cec@40006c00 { compatible = "st,stm32-cec"; reg = <0x40006C00 0x400>;
Signature · 1 line
2.32.0
Dario Binacchi
maintainerPATCH 3/4 ARM: dts: stm32: add pin map for CAN controller on stm32f7
In reply to Dario BinacchiAdd pin configurations for using CAN controller on stm32f7.
---
arch/arm/boot/dts/stm32f7-pinctrl.dtsi | 82 ++++++++++++++++++++++++++ 1 file changed, 82 insertions(+)
arch/arm/boot/dts/stm32f7-pinctrl.dtsi +82 -0
@@ -283,6 +283,88 @@ pins2 { slew-rate = <2>; }; }; + + can1_pins_a: can1-0 { + pins1 { + pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */ + bias-pull-up; + }; + }; + + can1_pins_b: can1-1 { + pins1 { + pinmux = <STM32_PINMUX('B', 9, AF9)>; /* CAN1_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('B', 8, AF9)>; /* CAN1_RX */ + bias-pull-up; + }; + }; + + can1_pins_c: can1-2 { + pins1 { + pinmux = <STM32_PINMUX('D', 1, AF9)>; /* CAN1_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */ + bias-pull-up; + + }; + }; + + can1_pins_d: can1-3 { + pins1 { + pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */ + bias-pull-up; + + }; + }; + + can2_pins_a: can2-0 { + pins1 { + pinmux = <STM32_PINMUX('B', 6, AF9)>; /* CAN2_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */ + bias-pull-up; + }; + }; + + can2_pins_b: can2-1 { + pins1 { + pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('B', 12, AF9)>; /* CAN2_RX */ + bias-pull-up; + }; + }; + + can3_pins_a: can3-0 { + pins1 { + pinmux = <STM32_PINMUX('A', 15, AF11)>; /* CAN3_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('A', 8, AF11)>; /* CAN3_RX */ + bias-pull-up; + }; + }; + + can3_pins_b: can3-1 { + pins1 { + pinmux = <STM32_PINMUX('B', 4, AF11)>; /* CAN3_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('B', 3, AF11)>; /* CAN3_RX */ + bias-pull-up; + }; + }; }; }; };
Signature · 1 line
2.32.0
Dario Binacchi
maintainerPATCH 4/4 can: bxcan: add support for single peripheral configuration
In reply to Dario BinacchiAdd support for bxCAN controller in single peripheral configuration:
- primary bxCAN
- dedicated Memory Access Controller unit
- 512-byte SRAM memory
- 14 fiter banks
---
drivers/net/can/bxcan.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-)
drivers/net/can/bxcan.c +17 -3
@@ -155,6 +155,7 @@ struct bxcan_regs {u32 reserved0[88 ];/* 0x20 */ struct bxcan_mb tx_mb[BXCAN_TX_MB_NUM ];/* 0x180 - tx mailbox */ struct bxcan_mb rx_mb[BXCAN_RX_MB_NUM ];/* 0x1b0 - rx mailbox */ +u32 reserved1[12 ];/* 0x1d0 */ };struct bxcan_priv {
@@ -922,6 +923,12 @@ static int bxcan_get_berr_counter(const struct net_device *ndev,return 0 ; } +static const struct regmap_config bxcan_gcan_regmap_config = { + .reg_bits =32 , + .val_bits =32 , + .reg_stride =4 , +}; +static int bxcan_probe (struct platform_device *pdev) {struct device_node *np = pdev->dev.of_node;
@@ -942,11 +949,18 @@ static int bxcan_probe(struct platform_device *pdev) gcan =syscon_regmap_lookup_by_phandle (np,"st,gcan" );if (IS_ERR (gcan)) { -dev_err (dev,"failed to get shared memory base address\n" ); -return PTR_ERR (gcan); + primary = true; + gcan =devm_regmap_init_mmio (dev, + regs +sizeof (struct bxcan_regs ), + &bxcan_gcan_regmap_config); +if (IS_ERR (gcan)) { +dev_err (dev,"failed to get filter base address\n" ); +return PTR_ERR (gcan); + } + }else { + primary =of_property_read_bool (np,"st,can-primary" ); } - primary =of_property_read_bool (np,"st,can-primary" ); clk =devm_clk_get (dev,NULL );if (IS_ERR (clk)) {dev_err (dev,"failed to get clock\n" );
Signature · 1 line
2.32.0
Marc Kleine-Budde
maintainerQuoted 42 lines · Dario Binacchi
Add support for bxCAN controller in single peripheral configuration:
- primary bxCAN
- dedicated Memory Access Controller unit
- 512-byte SRAM memory
- 14 fiter banksSigned-off-by Dario Binacchi <[email protected]>---
drivers/net/can/bxcan.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-)drivers/net/can/bxcan.c +7
-0@@ -155,6 +155,7 @@ struct bxcan_regs {u32 reserved0[88 ];/* 0x20 */ struct bxcan_mb tx_mb[BXCAN_TX_MB_NUM ];/* 0x180 - tx mailbox */ struct bxcan_mb rx_mb[BXCAN_RX_MB_NUM ];/* 0x1b0 - rx mailbox */ +u32 reserved1[12 ];/* 0x1d0 */ };struct bxcan_priv {@@ -922,6 +923,12 @@ static int bxcan_get_berr_counter(const struct net_device *ndev,return 0 ; } +static const struct regmap_config bxcan_gcan_regmap_config = { + .reg_bits =32 , + .val_bits =32 , + .reg_stride =4 , +}; +static int bxcan_probe (struct platform_device *pdev) {struct device_node *np = pdev->dev.of_node;@@ -942,11 +949,18 @@ static int bxcan_probe(struct platform_device *pdev) gcan =syscon_regmap_lookup_by_phandle (np,"st,gcan" );if (IS_ERR (gcan)) {
drivers/net/can/bxcan.c static int bxcan_probe(struct platform_device *pdev) · line 959
Quoted 10 lines
drivers/net/can/bxcan.c +8
-2-dev_err (dev,"failed to get shared memory base address\n" ); -return PTR_ERR (gcan); + primary = true; + gcan =devm_regmap_init_mmio (dev, + regs +sizeof (struct bxcan_regs ), + &bxcan_gcan_regmap_config); +if (IS_ERR (gcan)) { +dev_err (dev,"failed to get filter base address\n" ); +return PTR_ERR (gcan); + }
This probably works. Can we do better, i.e. without this additional code?
If you add a syscon node for the single instance CAN, too, you don't need a code change here, right?
drivers/net/can/bxcan.c static int bxcan_probe(struct platform_device *pdev) · line 966
Quoted 8 lines
drivers/net/can/bxcan.c +2
-1+ }else { + primary =of_property_read_bool (np,"st,can-primary" ); } - primary =of_property_read_bool (np,"st,can-primary" ); clk =devm_clk_get (dev,NULL );if (IS_ERR (clk)) {dev_err (dev,"failed to get clock\n" );
Marc
Signature · 4 lines
Pengutronix e.K. | Marc Kleine-Budde | Embedded Linux | https://www.pengutronix.de | Vertretung Nürnberg | Phone: +49-5121-206917-129 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
Dario Binacchi
maintainerHi Marc,
Quoted 57 lines · Marc Kleine-Budde
Quoted 42 lines · Dario Binacchi
Add support for bxCAN controller in single peripheral configuration:
- primary bxCAN
- dedicated Memory Access Controller unit
- 512-byte SRAM memory
- 14 fiter banksSigned-off-by Dario Binacchi <[email protected]>---
drivers/net/can/bxcan.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-)drivers/net/can/bxcan.c +7
-0@@ -155,6 +155,7 @@ struct bxcan_regs {u32 reserved0[88 ];/* 0x20 */ struct bxcan_mb tx_mb[BXCAN_TX_MB_NUM ];/* 0x180 - tx mailbox */ struct bxcan_mb rx_mb[BXCAN_RX_MB_NUM ];/* 0x1b0 - rx mailbox */ +u32 reserved1[12 ];/* 0x1d0 */ };struct bxcan_priv {@@ -922,6 +923,12 @@ static int bxcan_get_berr_counter(const struct net_device *ndev,return 0 ; } +static const struct regmap_config bxcan_gcan_regmap_config = { + .reg_bits =32 , + .val_bits =32 , + .reg_stride =4 , +}; +static int bxcan_probe (struct platform_device *pdev) {struct device_node *np = pdev->dev.of_node;@@ -942,11 +949,18 @@ static int bxcan_probe(struct platform_device *pdev) gcan =syscon_regmap_lookup_by_phandle (np,"st,gcan" );if (IS_ERR (gcan)) {drivers/net/can/bxcan.c static int bxcan_probe(struct platform_device *pdev) · line 959
Quoted 10 lines
drivers/net/can/bxcan.c +8
-2-dev_err (dev,"failed to get shared memory base address\n" ); -return PTR_ERR (gcan); + primary = true; + gcan =devm_regmap_init_mmio (dev, + regs +sizeof (struct bxcan_regs ), + &bxcan_gcan_regmap_config); +if (IS_ERR (gcan)) { +dev_err (dev,"failed to get filter base address\n" ); +return PTR_ERR (gcan); + }This probably works. Can we do better, i.e. without this additional code?
Quoted 2 lines
If you add a syscon node for the single instance CAN, too, you don't need a code change here, right?
I think so.
I have only one doubt about it. This implementation allows, implicitly, to distinguish if the peripheral is in single configuration (without handle to the gcan node) or in double configuration (with handle to the gcan node). For example, in single configuration the peripheral has 14 filter banks, while in double configuration there are 26 shared banks. Without code changes, this kind of information is lost. Is it better then, for future developments, to add a new
boolean property to the can node of the dts (e.g. single-conf)?
Thanks and regards,
Dario
Quoted 17 lines
drivers/net/can/bxcan.c static int bxcan_probe(struct platform_device *pdev) · line 966
Quoted 9 lines
drivers/net/can/bxcan.c +2
-1+ }else { + primary =of_property_read_bool (np,"st,can-primary" ); } - primary =of_property_read_bool (np,"st,can-primary" ); clk =devm_clk_get (dev,NULL );if (IS_ERR (clk)) {dev_err (dev,"failed to get clock\n" );Marc
--
Pengutronix e.K. | Marc Kleine-Budde | Embedded Linux | https://www.pengutronix.de |Vertretung Nürnberg | Phone: +49-5121-206917-129 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
Signature · 17 lines
Dario Binacchi Senior Embedded Linux Developer [email protected] __________________________________ Amarula Solutions SRL Via Le Canevare 30, 31100 Treviso, Veneto, IT T. +39 042 243 5310 [email protected] www.amarulasolutions.com
Marc Kleine-Budde
maintainerQuoted 7 lines · Dario Binacchi
Quoted 4 lines
This probably works. Can we do better, i.e. without this additional code?
If you add a syscon node for the single instance CAN, too, you don't need a code change here, right?
I think so.
Quoted 9 lines
I have only one doubt about it. This implementation allows, implicitly, to distinguish if the peripheral is in single configuration (without handle to the gcan node) or in double configuration (with handle to the gcan node). For example, in single configuration the peripheral has 14 filter banks, while in double configuration there are 26 shared banks. Without code changes, this kind of information is lost. Is it better then, for future developments, to add a new boolean property to the can node of the dts (e.g. single-conf)?
The DT ist not yet mainline, so we can still change it. Another option is to have "st,can-primary" and "st,can-secondary" for the shared peripherals and nothing for the single instance.
regards,
Marc
Signature · 4 lines
Pengutronix e.K. | Marc Kleine-Budde | Embedded Linux | https://www.pengutronix.de | Vertretung Nürnberg | Phone: +49-5121-206917-129 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
Dario Binacchi
maintainerHi Marc,
Quoted 19 lines · Marc Kleine-Budde
Quoted 7 lines · Dario Binacchi
Quoted 4 lines
This probably works. Can we do better, i.e. without this additional code?
If you add a syscon node for the single instance CAN, too, you don't need a code change here, right?
I think so.
Quoted 9 lines
I have only one doubt about it. This implementation allows, implicitly, to distinguish if the peripheral is in single configuration (without handle to the gcan node) or in double configuration (with handle to the gcan node). For example, in single configuration the peripheral has 14 filter banks, while in double configuration there are 26 shared banks. Without code changes, this kind of information is lost. Is it better then, for future developments, to add a new boolean property to the can node of the dts (e.g. single-conf)?
Quoted 3 lines
The DT ist not yet mainline, so we can still change it. Another option is to have "st,can-primary" and "st,can-secondary" for the shared peripherals and nothing for the single instance.
I did some tests following your suggestion. It is however necessary to make some small changes to the driver.
I will send v2 as soon as possible.
Thanks and regards,
Dario
Quoted 9 lines
regards,
Marc--
Pengutronix e.K. | Marc Kleine-Budde | Embedded Linux | https://www.pengutronix.de |Vertretung Nürnberg | Phone: +49-5121-206917-129 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
Signature · 17 lines
Dario Binacchi Senior Embedded Linux Developer [email protected] __________________________________ Amarula Solutions SRL Via Le Canevare 30, 31100 Treviso, Veneto, IT T. +39 042 243 5310 [email protected] www.amarulasolutions.com
Quoted 5 lines · Dario Binacchi
Add support for bxCAN controller in single peripheral configuration:
- primary bxCAN
- dedicated Memory Access Controller unit
- 512-byte SRAM memory
- 14 fiter banks
nit: s/fiter/filter/ ?