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dt-bindings: soc: qcom: aoss-qmp: add compatible for sa8775p

PATCH Applied Bartosz Golaszewski 4 participants 5 messages May 4, 2023 – May 15, 2023

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Bartosz Golaszewski

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#0 lore raw

PATCH 1/2 dt-bindings: soc: qcom: aoss-qmp: add compatible for sa8775p

From: Bartosz Golaszewski <[email protected]>

Document the AOSS QMP compatible for SA8775P.

Signed-off-by Bartosz Golaszewski <[email protected]>
---
 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml +1 -0
index 798f15588ee2..9dc8e48c8af4 100644
@@ -26,6 +26,7 @@ properties:
     items:
       - enum:
           - qcom,qdu1000-aoss-qmp
+          - qcom,sa8775p-aoss-qmp
           - qcom,sc7180-aoss-qmp
           - qcom,sc7280-aoss-qmp
           - qcom,sc8180x-aoss-qmp
Signature · 1 line
2.39.2
author
#1 lore raw

PATCH 2/2 arm64: dts: qcom: sa8775p: enable AOSS

From: Bartosz Golaszewski <[email protected]>

Enable the always-on subsystem controller on SA8775P platforms for use by upcoming support for other peripherals.

Signed-off-by Bartosz Golaszewski <[email protected]>
---
 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)
arch/arm64/boot/dts/qcom/sa8775p.dtsi +11 -0
index 0737ba38fefe..c5e2e3256bc4 100644
@@ -9,6 +9,7 @@
 #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
+#include <dt-bindings/mailbox/qcom-ipcc.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
 

@@ -752,6 +753,16 @@ pdc: interrupt-controller@b220000 {
 			interrupt-controller;
 		};
 
+		aoss_qmp: power-management@c300000 {
+			compatible = "qcom,sa8775p-aoss-qmp", "qcom,aoss-qmp";
+			reg = <0x0 0x0c300000 0x0 0x400>;
+			interrupts-extended = <&ipcc IPCC_CLIENT_AOP
+					       IPCC_MPROC_SIGNAL_GLINK_QMP
+					       IRQ_TYPE_EDGE_RISING>;
+			mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>;
+			#clock-cells = <0>;
+		};
+
 		spmi_bus: spmi@c440000 {
 			compatible = "qcom,spmi-pmic-arb";
 			reg = <0x0 0x0c440000 0x0 0x1100>,
Signature · 1 line
2.39.2
Reviewed-by on v1 2/2
#2 lore raw

Re: [PATCH 2/2] arm64: dts: qcom: sa8775p: enable AOSS

Quoted 7 lines · Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Enable the always-on subsystem controller on SA8775P platforms for use by upcoming support for other peripherals.

Signed-off-by Bartosz Golaszewski <[email protected]>

---

Reviewed-by Konrad Dybcio <[email protected]>

Konrad

Quoted 32 lines
 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)
arch/arm64/boot/dts/qcom/sa8775p.dtsi +11 -0
index 0737ba38fefe..c5e2e3256bc4 100644
@@ -9,6 +9,7 @@
 #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
+#include <dt-bindings/mailbox/qcom-ipcc.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
 

@@ -752,6 +753,16 @@ pdc: interrupt-controller@b220000 {
 			interrupt-controller;
 		};
 
+		aoss_qmp: power-management@c300000 {
+			compatible = "qcom,sa8775p-aoss-qmp", "qcom,aoss-qmp";
+			reg = <0x0 0x0c300000 0x0 0x400>;
+			interrupts-extended = <&ipcc IPCC_CLIENT_AOP
+					       IPCC_MPROC_SIGNAL_GLINK_QMP
+					       IRQ_TYPE_EDGE_RISING>;
+			mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>;
+			#clock-cells = <0>;
+		};
+
 		spmi_bus: spmi@c440000 {
 			compatible = "qcom,spmi-pmic-arb";
 			reg = <0x0 0x0c440000 0x0 0x1100>,
maintainer Applied
#4 lore raw

Re: (subset) [PATCH 1/2] dt-bindings: soc: qcom: aoss-qmp: add compatible for sa8775p

In reply to Bartosz Golaszewski
Quoted 5 lines · Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Document the AOSS QMP compatible for SA8775P.

Applied, thanks!

[1/2] dt-bindings: soc: qcom: aoss-qmp: add compatible for sa8775p

      commit: 0dc608855195c8f79e499e2a608b26e56e259810

Best regards,

Signature · 1 line
Bjorn Andersson <[email protected]>