dt-bindings: samsung,mipi-dsim: Add 'lane-polarities'
Subsystems (5)
PATCH v3 1/2 dt-bindings: samsung,mipi-dsim: Add 'lane-polarities'
From: Fabio Estevam <[email protected]>
The Samsung DSIM IP block allows the inversion of the clock and data lanes.
Add an optional property called 'lane-polarities' that describes the polarities of the MIPI DSI clock and data lanes.
This property is useful for properly describing the hardware when the board designer decided to switch the polarities of the MIPI DSI clock and/or data lanes.
---
Changes since v2:
- Use video-interfaces.yaml (Rob).
.../display/bridge/samsung,mipi-dsim.yaml | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+)
Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml +29 -0
@@ -105,6 +105,35 @@ properties: DSI output port node to the panel or the next bridge in the chain. + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + oneOf: + - minItems: 1 + maxItems: 4 + uniqueItems: true + items: + enum: [ 1, 2, 3, 4 ] + description: + See ../../media/video-interfaces.yaml for details. + + lane-polarities: + minItems: 1 + maxItems: 5 + items: + enum: [ 0, 1 ] + description: + See ../../media/video-interfaces.yaml for details. + The Samsung MIPI DSI IP requires that all the data lanes have + the same polarity. + + dependencies: + lane-polarities: [data-lanes] + required: - clock-names - clocks
Signature · 1 line
2.34.1
PATCH v3 2/2 drm: bridge: samsung-dsim: Implement support for clock/data polarity swap
From: Marek Vasut <[email protected]>
Implement support for DSI clock and data lane DN/DP polarity swap by means of decoding 'lane-polarities' DT property. The controller does support DN/DP swap of clock lane and all data lanes, the controller does not support polarity swap of individual data lane bundles, add a check which verifies all data lanes have the same polarity.
This has been validated on an imx8mm board that actually has the MIPI DSI clock lanes inverted.
---
Changes since v2:
- None
drivers/gpu/drm/bridge/samsung-dsim.c | 27 ++++++++++++++++++++++++++- include/drm/bridge/samsung-dsim.h | 2 ++ 2 files changed, 28 insertions(+), 1 deletion(-)
drivers/gpu/drm/bridge/samsung-dsim.c +26 -1
@@ -183,6 +183,8 @@#define DSIM_AFC_CTL (x) (((x) & 0x7) << 5)/* DSIM_PLLCTRL */ +#define DSIM_PLL_DPDNSWAP_CLK (1 << 25) +#define DSIM_PLL_DPDNSWAP_DAT (1 << 24)#define DSIM_FREQ_BAND (x) ((x) << 24)#define DSIM_PLL_EN BIT(23)#define DSIM_PLL_P (x, offset) ((x) << (offset))
@@ -622,6 +624,11 @@ static unsigned long samsung_dsim_set_pll(struct samsung_dsim *dsi, reg |=DSIM_FREQ_BAND (band); } +if (dsi->swap_dn_dp_clk) + reg |=DSIM_PLL_DPDNSWAP_CLK ; +if (dsi->swap_dn_dp_data) + reg |=DSIM_PLL_DPDNSWAP_DAT ; +samsung_dsim_write (dsi,DSIM_PLLCTRL_REG , reg); timeout =1000 ;
@@ -1696,7 +1703,9 @@ static int samsung_dsim_parse_dt(struct samsung_dsim *dsi) {struct device *dev = dsi->dev;struct device_node *node = dev->of_node; -int ret; +u32 lane_polarities[5 ] = {0 }; +struct device_node *endpoint; +int i, nr_lanes, ret; ret =samsung_dsim_of_read_u32 (node,"samsung,pll-clock-frequency" , &dsi->pll_clk_rate);
@@ -1713,6 +1722,22 @@ static int samsung_dsim_parse_dt(struct samsung_dsim *dsi)if (ret <0 )return ret; + endpoint =of_graph_get_endpoint_by_regs (node,1 ,-1 ); + nr_lanes =of_property_count_u32_elems (endpoint,"data-lanes" ); +if (nr_lanes >0 && nr_lanes <=4 ) { +/* Polarity 0 is clock lane, 1..4 are data lanes. */ +of_property_read_u32_array (endpoint,"lane-polarities" , + lane_polarities, nr_lanes +1 ); +for (i =1 ; i <= nr_lanes; i++) { +if (lane_polarities[1 ] != lane_polarities[i]) +DRM_DEV_ERROR (dsi->dev,"Data lanes polarities do not match" ); + } +if (lane_polarities[0 ]) + dsi->swap_dn_dp_clk = true; +if (lane_polarities[1 ]) + dsi->swap_dn_dp_data = true; + } +return 0 ; }
include/drm/bridge/samsung-dsim.h +2 -0
@@ -95,6 +95,8 @@ struct samsung_dsim {u32 mode_flags;u32 format; +bool swap_dn_dp_clk; +bool swap_dn_dp_data;int state;struct drm_property *brightness;struct completion completed;
Signature · 1 line
2.34.1
Quoted 26 lines · Fabio Estevam
From: Fabio Estevam <[email protected]>
The Samsung DSIM IP block allows the inversion of the clock and data lanes.
Add an optional property called 'lane-polarities' that describes the polarities of the MIPI DSI clock and data lanes.
This property is useful for properly describing the hardware when the board designer decided to switch the polarities of the MIPI DSI clock and/or data lanes.
Signed-off-by Fabio Estevam <[email protected]>---
Changes since v2:
- Usevideo-interfaces.yaml(Rob)..../display/bridge/samsung,mipi-dsim.yaml | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+)Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml +0
-0@@ -105,6 +105,35 @@ properties: DSI output port node to the panel or the next bridge
Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml properties: · line 115
Quoted 10 lines
Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml +8
-0in the chain. + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + oneOf:
Drop oneOf, no need for it.
Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml properties: · line 122
Quoted 7 lines
Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml +7
-0+ - minItems: 1 + maxItems: 4 + uniqueItems: true + items: + enum: [ 1, 2, 3, 4 ] + description: + See ../../media/video-interfaces.yaml for details.
Drop description, it's obvious.
Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml properties: · line 128
Quoted 6 lines
Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml +6
-0+ + lane-polarities: + minItems: 1 + maxItems: 5 + items: + enum: [ 0, 1 ]
Drop items, it's already in video-interfaces.
Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml properties: · line 130
Quoted 2 lines
Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml +2
-0+ description: + See ../../media/video-interfaces.yaml for details.
Drop this piece.
Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml properties: · line 139
Quoted 9 lines
Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml +6
-0+ The Samsung MIPI DSI IP requires that all the data lanes have + the same polarity. + + dependencies: + lane-polarities: [data-lanes] + required: - clock-names - clocks
Best regards,
Krzysztof