Add support for Allwinner GPADC on D1/T113s/R329/T507 SoCs
Subsystems (4)
v5 cover Add support for Allwinner GPADC on D1/T113s/R329/T507 SoCs
This series adds support for general purpose ADC (GPADC) on new Allwinner's SoCs, such as D1, T113s, T507 and R329. The implemented driver provides basic functionality for getting ADC channels data.
Change History:
v5:
- Fixed DT bindings properties for child nodes
v4:
- Fixed DT bindings warnings
- Used GENMASK to clear the irq register
- Minor formatting fixes
v3:
- Added DT bindings dual license, fixed property order and example formatting
- Added explanations comments for timeout and mutex
- Dropped unnecessary regmap and used readl/writel instead
- Added error message about getting channel number
- Renamed labels and variables to make them self-explanatory
v2:
- Added lastch flag to avoid addition work for already selected channel
- Added reset assertion on module remove
- Added dynamic channel allocation and dropped iio_chan_spec arrays
- Changed IIO_CHAN_INFO_SCALE type to FRACTIONAL_LOG2
- Dropped separate compatible strings and configs for T113s and R329
- Fixed includes
- Fixed Kconfig description
- Removed duplicate probe error messages
- Used FIELD_PREP for bit setup
v1:
- Initial version
Maxim Kiselev (3):
iio: adc: Add Allwinner D1/T113s/R329/T507 SoCs GPADC
dt-bindings: iio: adc: Add Allwinner D1/T113s/R329/T507 SoCs GPADC
riscv: dts: allwinner: d1: Add GPADC node
.../iio/adc/allwinner,sun20i-d1-gpadc.yaml | 91 ++++++ .../boot/dts/allwinner/sunxi-d1s-t113.dtsi | 10 + drivers/iio/adc/Kconfig | 10 + drivers/iio/adc/Makefile | 1 + drivers/iio/adc/sun20i-gpadc-iio.c | 281 ++++++++++++++++++ 5 files changed, 393 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml create mode 100644 drivers/iio/adc/sun20i-gpadc-iio.c
Signature · 1 line
2.39.2
PATCH v5 1/3 iio: adc: Add Allwinner D1/T113s/R329/T507 SoCs GPADC
From: Maxim Kiselev <[email protected]>
The General Purpose ADC (GPADC) can convert the external signal into a certain proportion of digital value, to realize the measurement of analog signal, which can be applied to power detection and key detection.
Theoretically, this ADC can support up to 16 channels. All SoCs below contain this GPADC IP. The only difference between them is the number of available channels:
T113 - 1 channel
D1 - 2 channels
R329 - 4 channels
T507 - 4 channels
--- drivers/iio/adc/Kconfig | 10 + drivers/iio/adc/Makefile | 1 + drivers/iio/adc/sun20i-gpadc-iio.c | 281 +++++++++++++++++++++++++++++ 3 files changed, 292 insertions(+) create mode 100644 drivers/iio/adc/sun20i-gpadc-iio.c
drivers/iio/adc/Kconfig +10 -0
@@ -1123,6 +1123,16 @@ config SUN4I_GPADC To compile this driver as a module, choose M here: the module will be called sun4i-gpadc-iio. +config SUN20I_GPADC + tristate "Support for the Allwinner SoCs GPADC" + depends on ARCH_SUNXI || COMPILE_TEST + help + Say yes here to build support for Allwinner (D1, T113, T507 and R329) + SoCs GPADC. This ADC provides up to 16 channels. + + To compile this driver as a module, choose M here: the module will be + called sun20i-gpadc-iio. + config TI_ADC081C tristate "Texas Instruments ADC081C/ADC101C/ADC121C family" depends on I2C
drivers/iio/adc/Makefile +1 -0
@@ -95,6 +95,7 @@ obj-$(CONFIG_RZG2L_ADC) += rzg2l_adc.o obj-$(CONFIG_SC27XX_ADC) += sc27xx_adc.o obj-$(CONFIG_SPEAR_ADC) += spear_adc.o obj-$(CONFIG_SUN4I_GPADC) += sun4i-gpadc-iio.o +obj-$(CONFIG_SUN20I_GPADC) += sun20i-gpadc-iio.o obj-$(CONFIG_STM32_ADC_CORE) += stm32-adc-core.o obj-$(CONFIG_STM32_ADC) += stm32-adc.o obj-$(CONFIG_STM32_DFSDM_CORE) += stm32-dfsdm-core.o
drivers/iio/adc/sun20i-gpadc-iio.c new file +281 -0
281 lines not on this page · raw message
Signature · 1 line
2.39.2
PATCH v5 2/3 dt-bindings: iio: adc: Add Allwinner D1/T113s/R329/T507 SoCs GPADC
In reply to Maksim KiselevFrom: Maxim Kiselev <[email protected]>
Allwinner's D1/T113s/R329/T507 SoCs have a new general purpose ADC. This ADC is the same for all of this SoCs. The only difference is the number of available channels.
--- .../iio/adc/allwinner,sun20i-d1-gpadc.yaml | 91 +++++++++++++++++++ 1 file changed, 91 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml
Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml new file +91 -0
@@ -0,0 +1,91 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/allwinner,sun20i-d1-gpadc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner D1 General Purpose ADC + +maintainers: + - Maksim Kiselev <[email protected]> + +properties: + compatible: + enum: + - allwinner,sun20i-d1-gpadc + + "#io-channel-cells": + const: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + + resets: + maxItems: 1 + +patternProperties: + "^channel@([0-15])$": + $ref: adc.yaml + type: object + description: + Represents the internal channels of the ADC. + + properties: + reg: + items: + minimum: 0 + maximum: 15 + + required: + - reg + + unevaluatedProperties: false + +required: + - "#io-channel-cells" + - clocks + - compatible + - interrupts + - reg + - resets + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/sun20i-d1-ccu.h> + #include <dt-bindings/reset/sun20i-d1-ccu.h> + #include <dt-bindings/interrupt-controller/irq.h> + + gpadc: adc@2009000 { + compatible = "allwinner,sun20i-d1-gpadc"; + reg = <0x2009000 0x1000>; + clocks = <&ccu CLK_BUS_GPADC>; + resets = <&ccu RST_BUS_GPADC>; + interrupts = <73 IRQ_TYPE_LEVEL_HIGH>; + #io-channel-cells = <1>; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + }; + + channel@1 { + reg = <1>; + }; + }; +...
Signature · 1 line
2.39.2
Re: [PATCH v5 2/3] dt-bindings: iio: adc: Add Allwinner D1/T113s/R329/T507 SoCs GPADC
Quoted 7 lines · Maksim Kiselev
From: Maxim Kiselev <[email protected]>
Allwinner's D1/T113s/R329/T507 SoCs have a new general purpose ADC. This ADC is the same for all of this SoCs. The only difference is the number of available channels.
Signed-off-by Maxim Kiselev <[email protected]>
Looks fine to me chief.
Quoted 16 lines
--- .../iio/adc/allwinner,sun20i-d1-gpadc.yaml | 91 +++++++++++++++++++ 1 file changed, 91 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yamlDocumentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml new file +5
-0@@ -0,0 +1,91 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/allwinner,sun20i-d1-gpadc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#
Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml line 15
Quoted 10 lines
Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml new file +10
-0+ +title: Allwinner D1 General Purpose ADC + +maintainers: + - Maksim Kiselev <[email protected]> + +properties: + compatible: + enum: + - allwinner,sun20i-d1-gpadc
btw, do you intend coming along later and adding some of the other ones, or do you only have the d1 yourself?
Cheers,
Conor.
Re: [PATCH v5 2/3] dt-bindings: iio: adc: Add Allwinner D1/T113s/R329/T507 SoCs GPADC
вс, 11 июн. 2023 г. в 01:17, Conor Dooley <[email protected]>:
...
Quoted 2 lines
btw, do you intend coming along later and adding some of the other ones, or do you only have the d1 yourself?
At the moment I have only the T113s, which shares most of the periphery and, accordingly, devicetree with the D1.
Rob Herring
maintainerRe: [PATCH v5 2/3] dt-bindings: iio: adc: Add Allwinner D1/T113s/R329/T507 SoCs GPADC
In reply to Maksim KiselevQuoted 47 lines · Maksim Kiselev
From: Maxim Kiselev <[email protected]>
Allwinner's D1/T113s/R329/T507 SoCs have a new general purpose ADC. This ADC is the same for all of this SoCs. The only difference is the number of available channels.
Signed-off-by Maxim Kiselev <[email protected]>--- .../iio/adc/allwinner,sun20i-d1-gpadc.yaml | 91 +++++++++++++++++++ 1 file changed, 91 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yamlDocumentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml new file +29
-0@@ -0,0 +1,91 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/allwinner,sun20i-d1-gpadc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner D1 General Purpose ADC + +maintainers: + - Maksim Kiselev <[email protected]> + +properties: + compatible: + enum: + - allwinner,sun20i-d1-gpadc + + "#io-channel-cells": + const: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + clocks: + maxItems: 1 + + interrupts:
Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml line 39
Quoted 10 lines
Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml new file +10
-0+ maxItems: 1 + + reg: + maxItems: 1 + + resets: + maxItems: 1 + +patternProperties: + "^channel@([0-15])$":
0-15? That's not how regex's work. Unit-addresses are in hex as well.
"^channel@[0-9a-f]$"
Quoted 55 lines
Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml new file +52
-0+ $ref: adc.yaml + type: object + description: + Represents the internal channels of the ADC. + + properties: + reg: + items: + minimum: 0 + maximum: 15 + + required: + - reg + + unevaluatedProperties: false + +required: + - "#io-channel-cells" + - clocks + - compatible + - interrupts + - reg + - resets + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/sun20i-d1-ccu.h> + #include <dt-bindings/reset/sun20i-d1-ccu.h> + #include <dt-bindings/interrupt-controller/irq.h> + + gpadc: adc@2009000 { + compatible = "allwinner,sun20i-d1-gpadc"; + reg = <0x2009000 0x1000>; + clocks = <&ccu CLK_BUS_GPADC>; + resets = <&ccu RST_BUS_GPADC>; + interrupts = <73 IRQ_TYPE_LEVEL_HIGH>; + #io-channel-cells = <1>; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + }; + + channel@1 { + reg = <1>; + }; + }; +...Signature · 1 line
2.39.2
PATCH v5 3/3 riscv: dts: allwinner: d1: Add GPADC node
In reply to Maksim KiselevFrom: Maxim Kiselev <[email protected]>
This patch adds declaration of the general purpose ADC for D1 and T113s SoCs.
--- arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)
arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +10 -0
@@ -138,6 +138,16 @@ ccu: clock-controller@2001000 { #reset-cells = <1>; }; + gpadc: adc@2009000 { + compatible = "allwinner,sun20i-d1-gpadc"; + reg = <0x2009000 0x1000>; + clocks = <&ccu CLK_BUS_GPADC>; + resets = <&ccu RST_BUS_GPADC>; + interrupts = <SOC_PERIPHERAL_IRQ(57) IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + #io-channel-cells = <1>; + }; + dmic: dmic@2031000 { compatible = "allwinner,sun20i-d1-dmic", "allwinner,sun50i-h6-dmic";
Signature · 1 line
2.39.2