FAILED: patch "[PATCH] arm64: dts: qcom: sm8550: Use the correct LLCC register" failed to apply to 6.1-stable tree
[email protected]
maintainerThe patch below does not apply to the 6.1-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.1.y
git checkout FETCH_HEAD
git cherry-pick -x 661a4f089317c877aecd598fb70cd46510cc8d29
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '2023061918-disabled-spoiler-d23d@gregkh' --subject-prefix 'PATCH 6.1.y' HEAD^..
Possible dependencies:
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From 661a4f089317c877aecd598fb70cd46510cc8d29 Mon Sep 17 00:00:00 2001
From: Konrad Dybcio <[email protected]>
Date: Wed, 17 May 2023 04:18:50 +0200
Subject: [PATCH] arm64: dts: qcom: sm8550: Use the correct LLCC register
scheme
During the ABI-breaking (for good reasons) conversion of the LLCC register description, SM8550 was not taken into account, resulting in LLCC being broken on any kernel containing the patch referenced in the fixes tag.
Fix it by describing the regions properly.
arch/arm64/boot/dts/qcom/sm8550.dtsi +9 -2
@@ -3771,9 +3771,16 @@ gem_noc: interconnect@24100000 { system-cache-controller@25000000 { compatible = "qcom,sm8550-llcc"; - reg = <0 0x25000000 0 0x800000>, + reg = <0 0x25000000 0 0x200000>, + <0 0x25200000 0 0x200000>, + <0 0x25400000 0 0x200000>, + <0 0x25600000 0 0x200000>, <0 0x25800000 0 0x200000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg-names = "llcc0_base", + "llcc1_base", + "llcc2_base", + "llcc3_base", + "llcc_broadcast_base"; interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; };