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Add JH7110 USB PHY driver support

PATCH Applied Minda Chen 2 participants 7 messages Jun 29, 2023 – Jul 11, 2023

Subsystems (5)
Device tree bindings RISC-V Generic PHY framework StarFive devicetrees +1 more subsystems
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Minda Chen

author maintainer
#0 lore raw

v8 cover Add JH7110 USB PHY driver support

This patchset adds USB and PCIe PHY for the StarFive JH7110 SoC. The patch has been tested on the VisionFive 2 board.

This patchset is base on v6.4-rc6

patch 1 is usb phy dt-binding document.
patch 2 is Pcie PHY dt-binding document.
patch 3 is USB 2.0 PHY driver.
patch 4 is PCIe PHY driver.
patch 5 is PCIe PHY dts

Previous version are merged with USB controller patch.
For USB controller patch is accepted. Now remove the USB controller patch. And remove the dependency.

previous change can be seen list below.
(start from old patch set v3)
v3: https://patchwork.kernel.org/project/linux-phy/cover/[email protected]/
v4: https://patchwork.kernel.org/project/linux-phy/cover/[email protected]/
v5: https://patchwork.kernel.org/project/linux-phy/cover/[email protected]/
v6: https://patchwork.kernel.org/project/linux-phy/cover/[email protected]/
v7: https://patchwork.kernel.org/project/linux-phy/cover/[email protected]/

changes:
v8:
(patch 3) remame jh7110_usb2_mode_set to usb2_set_ls_keeplive . make function more accurate. (patch 4) remove depend on USB_PHY and fix compile robot error.

v7:
(patch3 and patch 4) Add /driver/phy/starfive directory, Makefile and Kconfig. Remove the dependency. (patch 5) add PCIe PHY dts configuration. (USB 2.0 PHY clock reply on other patch, Dont add this first).

v6:
1. (patch 3) remove the platform remove function.
2. (patch 4)
- add switch to pcie mode function.
- remove the redundant init/exit function.

v5:
1. (patch 1) set correct model name and commit title.
2. (patch 2) change to '-item' in syscon property. change commit title.

v4:
1. (patch 1) split PCIe PHY dt-binding doc to patch 2.
2. (patch 2) PCIe PHY add stg and sys con configuration to dt-binding doc.
3. (patch 3)
- split PCIe PHY driver to patch 4.
- replace dr_mode to phy mode in jh7110_usb2_phy.
4. (patch 4)
- Makefile and Kconfig sorted by alphabet sequence.
- Add PCIe PHY stg and syscon PHY connection configuration for USB 3.0.

v3:
1. Add patch 1 - 4. Add USB PHY driver and dt-binding doc. USB PHY codes are moved to patch 3 and patch 4.

Minda Chen (5):
dt-bindings: phy: Add StarFive JH7110 USB PHY
dt-bindings: phy: Add StarFive JH7110 PCIe PHY
phy: starfive: Add JH7110 USB 2.0 PHY driver
phy: starfive: Add JH7110 PCIE 2.0 PHY driver
riscv: dts: starfive: Add PCIe PHY dts configuration for JH7110

 .../phy/starfive,jh7110-pcie-phy.yaml         |  58 +++++
 .../bindings/phy/starfive,jh7110-usb-phy.yaml |  50 +++++
 MAINTAINERS                                   |   8 +
 arch/riscv/boot/dts/starfive/jh7110.dtsi      |  12 ++
 drivers/phy/Kconfig                           |   1 +
 drivers/phy/Makefile                          |   1 +
 drivers/phy/starfive/Kconfig                  |  24 +++
 drivers/phy/starfive/Makefile                 |   3 +
 drivers/phy/starfive/phy-jh7110-pcie.c        | 204 ++++++++++++++++++
 drivers/phy/starfive/phy-jh7110-usb.c         | 152 +++++++++++++
 10 files changed, 513 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/starfive,jh7110-pcie-phy.yaml
 create mode 100644 Documentation/devicetree/bindings/phy/starfive,jh7110-usb-phy.yaml
 create mode 100644 drivers/phy/starfive/Kconfig
 create mode 100644 drivers/phy/starfive/Makefile
 create mode 100644 drivers/phy/starfive/phy-jh7110-pcie.c
 create mode 100644 drivers/phy/starfive/phy-jh7110-usb.c

base-commit: 858fd168a95c5b9669aac8db6c14a9aeab446375

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#1 lore raw

PATCH v8 1/5 dt-bindings: phy: Add StarFive JH7110 USB PHY

Add StarFive JH7110 SoC USB 2.0 PHY dt-binding.

Signed-off-by Minda Chen <[email protected]>
Reviewed-by Hal Feng <[email protected]>
Reviewed-by Rob Herring <[email protected]>
Reviewed-by Roger Quadros <[email protected]>
---
 .../bindings/phy/starfive,jh7110-usb-phy.yaml | 50 +++++++++++++++++++
 1 file changed, 50 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/starfive,jh7110-usb-phy.yaml
Documentation/devicetree/bindings/phy/starfive,jh7110-usb-phy.yaml new file +50 -0
new file mode 100644
index 000000000000..269e9f9f12b6
@@ -0,0 +1,50 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/starfive,jh7110-usb-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7110 USB 2.0 PHY
+
+maintainers:
+  - Minda Chen <[email protected]>
+
+properties:
+  compatible:
+    const: starfive,jh7110-usb-phy
+
+  reg:
+    maxItems: 1
+
+  "#phy-cells":
+    const: 0
+
+  clocks:
+    items:
+      - description: PHY 125m
+      - description: app 125m
+
+  clock-names:
+    items:
+      - const: 125m
+      - const: app_125m
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - "#phy-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    phy@10200000 {
+        compatible = "starfive,jh7110-usb-phy";
+        reg = <0x10200000 0x10000>;
+        clocks = <&syscrg 95>,
+                 <&stgcrg 6>;
+        clock-names = "125m", "app_125m";
+        #phy-cells = <0>;
+    };
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#2 lore raw

PATCH v8 2/5 dt-bindings: phy: Add StarFive JH7110 PCIe PHY

In reply to Minda Chen

Add StarFive JH7110 SoC PCIe 2.0 PHY dt-binding. PCIe PHY0 (phy@10210000) can be used as USB 3.0 PHY.

Signed-off-by Minda Chen <[email protected]>
Reviewed-by Hal Feng <[email protected]>
Reviewed-by Rob Herring <[email protected]>
Reviewed-by Roger Quadros <[email protected]>
---
 .../phy/starfive,jh7110-pcie-phy.yaml         | 58 +++++++++++++++++++
 1 file changed, 58 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/starfive,jh7110-pcie-phy.yaml
Documentation/devicetree/bindings/phy/starfive,jh7110-pcie-phy.yaml new file +58 -0
new file mode 100644
index 000000000000..2e83a6164cd1
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/starfive,jh7110-pcie-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7110 PCIe 2.0 PHY
+
+maintainers:
+  - Minda Chen <[email protected]>
+
+properties:
+  compatible:
+    const: starfive,jh7110-pcie-phy
+
+  reg:
+    maxItems: 1
+
+  "#phy-cells":
+    const: 0
+
+  starfive,sys-syscon:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    items:
+      - items:
+          - description: phandle to System Register Controller sys_syscon node.
+          - description: PHY connect offset of SYS_SYSCONSAIF__SYSCFG register for USB PHY.
+    description:
+      The phandle to System Register Controller syscon node and the PHY connect offset
+      of SYS_SYSCONSAIF__SYSCFG register. Connect PHY to USB3 controller.
+
+  starfive,stg-syscon:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    items:
+      - items:
+          - description: phandle to System Register Controller stg_syscon node.
+          - description: PHY mode offset of STG_SYSCONSAIF__SYSCFG register.
+          - description: PHY enable for USB offset of STG_SYSCONSAIF__SYSCFG register.
+    description:
+      The phandle to System Register Controller syscon node and the offset
+      of STG_SYSCONSAIF__SYSCFG register for PCIe PHY. Total 2 regsisters offset.
+
+required:
+  - compatible
+  - reg
+  - "#phy-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    phy@10210000 {
+        compatible = "starfive,jh7110-pcie-phy";
+        reg = <0x10210000 0x10000>;
+        #phy-cells = <0>;
+        starfive,sys-syscon = <&sys_syscon 0x18>;
+        starfive,stg-syscon = <&stg_syscon 0x148 0x1f4>;
+    };
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#3 lore raw

PATCH v8 3/5 phy: starfive: Add JH7110 USB 2.0 PHY driver

In reply to Minda Chen

Add Starfive JH7110 SoC USB 2.0 PHY driver support. USB 2.0 PHY default connect to Cadence USB controller.

Signed-off-by Minda Chen <[email protected]>
Reviewed-by Roger Quadros <[email protected]>
---
 MAINTAINERS                           |   6 +
 drivers/phy/Kconfig                   |   1 +
 drivers/phy/Makefile                  |   1 +
 drivers/phy/starfive/Kconfig          |  14 +++
 drivers/phy/starfive/Makefile         |   2 +
 drivers/phy/starfive/phy-jh7110-usb.c | 152 ++++++++++++++++++++++++++
 6 files changed, 176 insertions(+)
 create mode 100644 drivers/phy/starfive/Kconfig
 create mode 100644 drivers/phy/starfive/Makefile
 create mode 100644 drivers/phy/starfive/phy-jh7110-usb.c
MAINTAINERS +6 -0
index f794002a192e..d2ce89a8d31c 100644
@@ -20174,6 +20174,12 @@ S:	Supported
 F:	Documentation/devicetree/bindings/watchdog/starfive*
 F:	drivers/watchdog/starfive-wdt.c
 
+STARFIVE JH71X0 USB PHY DRIVER
+M:	Minda Chen <[email protected]>
+S:	Supported
+F:	Documentation/devicetree/bindings/phy/starfive,jh7110-usb-phy.yaml
+F:	drivers/phy/starfive/phy-jh7110-usb.c
+
 STATIC BRANCH/CALL
 M:	Peter Zijlstra <[email protected]>
 M:	Josh Poimboeuf <[email protected]>
drivers/phy/Kconfig +1 -0
index f46e3148d286..0000149edbc4 100644
@@ -91,6 +91,7 @@ source "drivers/phy/rockchip/Kconfig"
 source "drivers/phy/samsung/Kconfig"
 source "drivers/phy/socionext/Kconfig"
 source "drivers/phy/st/Kconfig"
+source "drivers/phy/starfive/Kconfig"
 source "drivers/phy/sunplus/Kconfig"
 source "drivers/phy/tegra/Kconfig"
 source "drivers/phy/ti/Kconfig"
drivers/phy/Makefile +1 -0
index 54f312c10a40..fb3dc9de6111 100644
@@ -31,6 +31,7 @@ obj-y					+= allwinner/	\
 					   samsung/	\
 					   socionext/	\
 					   st/		\
+					   starfive/	\
 					   sunplus/	\
 					   tegra/	\
 					   ti/		\
drivers/phy/starfive/Kconfig new file +14 -0
new file mode 100644
index 000000000000..65b5f879bbf9
@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Phy drivers for StarFive platforms
+#
+
+config PHY_STARFIVE_JH7110_USB
+	tristate "Starfive JH7110 USB 2.0 PHY support"
+	depends on USB_SUPPORT
+	select GENERIC_PHY
+	help
+	  Enable this to support the StarFive USB 2.0 PHY,
+	  used with the Cadence USB controller.
+	  If M is selected, the module will be called
+	  phy-jh7110-usb.ko.
drivers/phy/starfive/Makefile new file +2 -0
new file mode 100644
index 000000000000..52e9a09cc619
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_PHY_STARFIVE_JH7110_USB)	+= phy-jh7110-usb.o
drivers/phy/starfive/phy-jh7110-usb.c new file +152 -0

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#4 lore raw

PATCH v8 4/5 phy: starfive: Add JH7110 PCIE 2.0 PHY driver

In reply to Minda Chen

Add Starfive JH7110 SoC PCIe 2.0 PHY driver support. PCIe 2.0 PHY default connect to PCIe controller. PCIe PHY can connect to USB 3.0 controller.

Signed-off-by Minda Chen <[email protected]>
Reviewed-by Roger Quadros <[email protected]>
---
 MAINTAINERS                            |   4 +-
 drivers/phy/starfive/Kconfig           |  10 ++
 drivers/phy/starfive/Makefile          |   1 +
 drivers/phy/starfive/phy-jh7110-pcie.c | 204 +++++++++++++++++++++++++
 4 files changed, 218 insertions(+), 1 deletion(-)
 create mode 100644 drivers/phy/starfive/phy-jh7110-pcie.c
MAINTAINERS +3 -1
index d2ce89a8d31c..b5d0a9e391bb 100644
@@ -20174,10 +20174,12 @@ S:	Supported
 F:	Documentation/devicetree/bindings/watchdog/starfive*
 F:	drivers/watchdog/starfive-wdt.c
 
-STARFIVE JH71X0 USB PHY DRIVER
+STARFIVE JH71X0 PCIE AND USB PHY DRIVER
 M:	Minda Chen <[email protected]>
 S:	Supported
+F:	Documentation/devicetree/bindings/phy/starfive,jh7110-pcie-phy.yaml
 F:	Documentation/devicetree/bindings/phy/starfive,jh7110-usb-phy.yaml
+F:	drivers/phy/starfive/phy-jh7110-pcie.c
 F:	drivers/phy/starfive/phy-jh7110-usb.c
 
 STATIC BRANCH/CALL
drivers/phy/starfive/Kconfig +10 -0
index 65b5f879bbf9..da9a98cdf7e3 100644
@@ -3,6 +3,16 @@
 # Phy drivers for StarFive platforms
 #
 
+config PHY_STARFIVE_JH7110_PCIE
+	tristate "Starfive JH7110 PCIE 2.0/USB 3.0 PHY support"
+	depends on HAS_IOMEM
+	select GENERIC_PHY
+	help
+	  Enable this to support the StarFive PCIe 2.0 PHY,
+	  or used as USB 3.0 PHY.
+	  If M is selected, the module will be called
+	  phy-jh7110-pcie.ko.
+
 config PHY_STARFIVE_JH7110_USB
 	tristate "Starfive JH7110 USB 2.0 PHY support"
 	depends on USB_SUPPORT
drivers/phy/starfive/Makefile +1 -0
index 52e9a09cc619..1c62d93e3280 100644
@@ -1,2 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_PHY_STARFIVE_JH7110_PCIE)	+= phy-jh7110-pcie.o
 obj-$(CONFIG_PHY_STARFIVE_JH7110_USB)	+= phy-jh7110-usb.o
drivers/phy/starfive/phy-jh7110-pcie.c new file +204 -0

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#5 lore raw

PATCH v8 5/5 riscv: dts: starfive: Add PCIe PHY dts configuration for JH7110

In reply to Minda Chen

Add PCIe PHY dts configuration for StarFive JH7110 SoC. PCIe0 PHY can be use as USB 3.0 PHY.

Signed-off-by Minda Chen <[email protected]>
Reviewed-by Hal Feng <[email protected]>
---
 arch/riscv/boot/dts/starfive/jh7110.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)
arch/riscv/boot/dts/starfive/jh7110.dtsi +12 -0
index 4c5fdb905da8..7e5c3ae83aa1 100644
@@ -353,6 +353,18 @@
 			status = "disabled";
 		};
 
+		pciephy0: phy@10210000 {
+			compatible = "starfive,jh7110-pcie-phy";
+			reg = <0x0 0x10210000 0x0 0x10000>;
+			#phy-cells = <0>;
+		};
+
+		pciephy1: phy@10220000 {
+			compatible = "starfive,jh7110-pcie-phy";
+			reg = <0x0 0x10220000 0x0 0x10000>;
+			#phy-cells = <0>;
+		};
+
 		uart3: serial@12000000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0x0 0x12000000 0x0 0x10000>;
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#6 lore raw

Re: (subset) [PATCH v8 0/5] Add JH7110 USB PHY driver support

In reply to Minda Chen
Quoted 5 lines · Minda Chen

This patchset adds USB and PCIe PHY for the StarFive JH7110 SoC. The patch has been tested on the VisionFive 2 board.

This patchset is base on v6.4-rc6

Quoted 7 lines

patch 1 is usb phy dt-binding document.
patch 2 is Pcie PHY dt-binding document.
patch 3 is USB 2.0 PHY driver.
patch 4 is PCIe PHY driver.
patch 5 is PCIe PHY dts

[...]

Applied, thanks!

[1/5] dt-bindings: phy: Add StarFive JH7110 USB PHY

      commit: 6172141bf8ce6ec8f0b5d33533bf5a5646880e3c
[2/5] dt-bindings: phy: Add StarFive JH7110 PCIe PHY
      commit: 2b236fd4912141074a1cf34a7b3ef724d5bc8d8d
[3/5] phy: starfive: Add JH7110 USB 2.0 PHY driver
      commit: 7ac349186842972ee2b17413a0eee34231324eb1
[4/5] phy: starfive: Add JH7110 PCIE 2.0 PHY driver
      commit: 26cea0e28057d4ee440af4157f13a5312e3918b7

Best regards,

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~Vinod



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