Add SPI module for StarFive JH7110 SoC

Hi,

This patchset adds initial rudimentary support for the StarFive SPI controller. And this driver will be used in StarFive's VisionFive 2 board. The first patch constrain minItems of clocks for JH7110 SPI and Patch 2 adds support for StarFive JH7110 SPI.

Changes v2->v3:
- Rebaed to v6.5rc3.
- Registered one more clock.
- Dropped commit that changed the number of clocks in YAML.
- Rewrited the commit comment.

Changes v1->v2:
- Rebaed to v6.5rc1.
- Submitted reference file separately.
- Dropped 'status' node as it was 'okay' by default.
- Dropped Co-developed-by message.

The patch series is based on v6.5rc3.

William Qiu (2):
dt-bindings: spi: add reference file to YAML
riscv: dts: starfive: Add spi node and pins configuration

 .../devicetree/bindings/spi/spi-pl022.yaml    |   1 +
 .../jh7110-starfive-visionfive-2.dtsi         |  50 +++++++++
 arch/riscv/boot/dts/starfive/jh7110.dtsi      | 105 ++++++++++++++++++
 3 files changed, 156 insertions(+)

--
2.34.1

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In JH7110 SoC, the spi module needs to use "arm,primecell-periphid" to override the h/w ID value to correctly init "spi_dev", so add "primecell.yaml" as the reference file for YAML.

---
 Documentation/devicetree/bindings/spi/spi-pl022.yaml | 1 +
 1 file changed, 1 insertion(+)

index 91e540a92faf..5e5a704a766e 100644
@@ -11,6 +11,7 @@ maintainers:
 
 allOf:
   - $ref: spi-controller.yaml#
+  - $ref: /schemas/arm/primecell.yaml#
 
 # We need a select here so we don't match all nodes with 'arm,primecell'
 select:

2.34.1


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Add StarFive JH7110 SPI controller node and pins configuration on VisionFive 2 board.

---
 .../jh7110-starfive-visionfive-2.dtsi         |  50 +++++++++
 arch/riscv/boot/dts/starfive/jh7110.dtsi      | 105 ++++++++++++++++++
 2 files changed, 155 insertions(+)

index fa0061eb33a7..9e6ccf460877 100644
@@ -143,6 +143,18 @@ &i2c6 {
 	status = "okay";
 };
 
+&spi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_pins>;
+	status = "okay";
+
+	spi_dev0: spi@0 {
+		compatible = "rohm,dh2228fv";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+	};
+};
+
 &sysgpio {
 	i2c0_pins: i2c0-0 {
 		i2c-pins {

@@ -200,6 +212,44 @@ GPOEN_SYS_I2C6_DATA,
 		};
 	};
 
+	spi0_pins: spi0-0 {
+		mosi-pins {
+			pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD,
+					      GPOEN_ENABLE,
+					      GPI_NONE)>;
+			bias-disable;
+			input-disable;
+			input-schmitt-disable;
+		};
+
+		miso-pins {
+			pinmux = <GPIOMUX(53, GPOUT_LOW,
+					      GPOEN_DISABLE,
+					      GPI_SYS_SPI0_RXD)>;
+			bias-pull-up;
+			input-enable;
+			input-schmitt-enable;
+		};
+
+		sck-pins {
+			pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_CLK,
+					      GPOEN_ENABLE,
+					      GPI_SYS_SPI0_CLK)>;
+			bias-disable;
+			input-disable;
+			input-schmitt-disable;
+		};
+
+		ss-pins {
+			pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_FSS,
+					      GPOEN_ENABLE,
+					      GPI_SYS_SPI0_FSS)>;
+			bias-disable;
+			input-disable;
+			input-schmitt-disable;
+		};
+	};
+
 	uart0_pins: uart0-0 {
 		tx-pins {
 			pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,

2.34.1


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Applied to

https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/2] dt-bindings: spi: add reference file to YAML

      commit: 8858babff615ee366bf570c1facfbd0845dd924e

All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying to this mail.

Thanks,
Mark

From: Conor Dooley <[email protected]>

Applied to riscv-dt-for-next, thanks!

[2/2] riscv: dts: starfive: Add spi node and pins configuration

      https://git.kernel.org/conor/c/74fb20c8f05d

Thanks,
Conor.

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