dt-bindings: irqchip: convert st,stih407-irq-syscfg to DT schema

PATCH Superseded Raphael Gallais-Pou 3 participants 3 messages Aug 1, 2023 – Aug 4, 2023

Subsystems (2)

Device tree bindings irqchip drivers

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Raphael Gallais-Pou

author

2023-08-01 21:43 UTC #0 lore raw

PATCH 1/1 dt-bindings: irqchip: convert st,stih407-irq-syscfg to DT schema

Convert deprecated format to DT schema format.

Signed-off-by Raphael Gallais-Pou <[email protected]>

---
 .../st,sti-irq-syscfg.txt                     | 30 ---------
 .../st,stih407-irq-syscfg.yaml                | 67 +++++++++++++++++++
 2 files changed, 67 insertions(+), 30 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml

Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt deleted +0 ~~-30~~

deleted file mode 100644
index 977d7ed3670e..000000000000
@@ -1,30 +0,0 @@
-STMicroelectronics STi System Configuration Controlled IRQs
------------------------------------------------------------
-
-On STi based systems; External, CTI (Core Sight), PMU (Performance Management),
-and PL310 L2 Cache IRQs are controlled using System Configuration registers.
-This driver is used to unmask them prior to use.
-
-Required properties:
-- compatible	: Should be "st,stih407-irq-syscfg"
-- st,syscfg	: Phandle to Cortex-A9 IRQ system config registers
-- st,irq-device	: Array of IRQs to enable - should be 2 in length
-- st,fiq-device	: Array of FIQs to enable - should be 2 in length
-
-Optional properties:
-- st,invert-ext	: External IRQs can be inverted at will.  This property inverts
-		  these IRQs using bitwise logic.  A number of defines have been
-		  provided for convenience:
-			ST_IRQ_SYSCFG_EXT_1_INV
-			ST_IRQ_SYSCFG_EXT_2_INV
-			ST_IRQ_SYSCFG_EXT_3_INV
-Example:
-
-irq-syscfg {
-	compatible    = "st,stih407-irq-syscfg";
-	st,syscfg     = <&syscfg_cpu>;
-	st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
-			<ST_IRQ_SYSCFG_PMU_1>;
-	st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
-			<ST_IRQ_SYSCFG_DISABLED>;
-};

Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml new file +67 -0

67 lines not on this page · raw message

Signature · 1 line

2.41.0

Conor Dooley

Reviewed-by on v1 1/1

2023-08-03 16:06 UTC #1 lore raw

Quoted 3 lines · Raphael Gallais-Pou

Convert deprecated format to DT schema format.
Signed-off-by Raphael Gallais-Pou <[email protected]>

This seems ok to me,

Reviewed-by Conor Dooley <[email protected]>

Thanks,
Conor.

Rob Herring

maintainer

2023-08-04 15:06 UTC #2 lore raw

In reply to Raphael Gallais-Pou

Quoted 65 lines · Raphael Gallais-Pou

Convert deprecated format to DT schema format.

Signed-off-by Raphael Gallais-Pou <[email protected]>

---
 .../st,sti-irq-syscfg.txt                     | 30 ---------
 .../st,stih407-irq-syscfg.yaml                | 67 +++++++++++++++++++
 2 files changed, 67 insertions(+), 30 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml

Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt deleted +0 ~~-30~~

deleted file mode 100644
index 977d7ed3670e..000000000000
@@ -1,30 +0,0 @@
-STMicroelectronics STi System Configuration Controlled IRQs
------------------------------------------------------------
-
-On STi based systems; External, CTI (Core Sight), PMU (Performance Management),
-and PL310 L2 Cache IRQs are controlled using System Configuration registers.
-This driver is used to unmask them prior to use.
-
-Required properties:
-- compatible	: Should be "st,stih407-irq-syscfg"
-- st,syscfg	: Phandle to Cortex-A9 IRQ system config registers
-- st,irq-device	: Array of IRQs to enable - should be 2 in length
-- st,fiq-device	: Array of FIQs to enable - should be 2 in length
-
-Optional properties:
-- st,invert-ext	: External IRQs can be inverted at will.  This property inverts
-		  these IRQs using bitwise logic.  A number of defines have been
-		  provided for convenience:
-			ST_IRQ_SYSCFG_EXT_1_INV
-			ST_IRQ_SYSCFG_EXT_2_INV
-			ST_IRQ_SYSCFG_EXT_3_INV
-Example:
-
-irq-syscfg {
-	compatible    = "st,stih407-irq-syscfg";
-	st,syscfg     = <&syscfg_cpu>;
-	st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
-			<ST_IRQ_SYSCFG_PMU_1>;
-	st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
-			<ST_IRQ_SYSCFG_DISABLED>;
-};

Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml new file +13 -0

new file mode 100644
index 000000000000..fce18d444c56
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/st,stih407-irq-syscfg.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STMicroelectronics STi System Configuration Controlled IRQs
+
+maintainers:
+  - Patrice Chotard <[email protected]>
+
+description:
+  On STi based systems; External, CTI (Core Sight), PMU (Performance

Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml line 23

Quoted 10 lines

Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml new file +10 -0

+  Management), and PL310 L2 Cache IRQs are controlled using System
+  Configuration registers.  This driver is used to unmask them prior to use.
+
+properties:
+  compatible:
+    const: st,stih407-irq-syscfg
+
+  st,syscfg:
+    description: Phandle to Cortex-A9 IRQ system config registers
+    $ref: "/schemas/types.yaml#/definitions/phandle"

Drop quotes. Here and other $refs.

Quoted 13 lines

Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml new file +13 -0

+
+  st,irq-device:
+    description: Array of IRQs to enable.
+    $ref: "/schemas/types.yaml#/definitions/uint32-array"
+    items:
+      - description: Enable the IRQ of the channel one.
+      - description: Enable the IRQ of the channel two.
+
+  st,fiq-device:
+    description: Array of FIQs to enable.
+    $ref: "/schemas/types.yaml#/definitions/uint32-array"
+    items:
+      - description: Enable the IRQ of the channel one.

Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml line 46

Quoted 10 lines

Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml new file +10 -0

+      - description: Enable the IRQ of the channel two.
+
+  st,invert-ext:
+    description: External IRQs can be inverted at will. This property inverts
+      these IRQs using bitwise logic.
+    $ref: "/schemas/types.yaml#/definitions/uint32"
+    enum:
+      - ST_IRQ_SYSCFG_EXT_1_INV
+      - ST_IRQ_SYSCFG_EXT_2_INV
+      - ST_IRQ_SYSCFG_EXT_3_INV

Defines don't work here. Add the property to the example and you'll see.

Quoted 24 lines

Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml new file +21 -0

+
+required:
+  - compatible
+  - st,syscfg
+  - st,irq-device
+  - st,fiq-device
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq-st.h>
+    irq-syscfg {
+        compatible    = "st,stih407-irq-syscfg";
+        st,syscfg     = <&syscfg_cpu>;
+        st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
+                        <ST_IRQ_SYSCFG_PMU_1>;
+        st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
+                        <ST_IRQ_SYSCFG_DISABLED>;
+    };
+...

Signature · 1 line

2.41.0