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wifi: rtw89: 8852c: update RF configurations to improve performance

PATCH In review Ping-Ke Shih 2 participants 4 messages Aug 30, 2023 – Sep 4, 2023 Realtek wireless driver (rtw89)

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Ping-Ke Shih

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#0 lore raw

cover wifi: rtw89: 8852c: update RF configurations to improve performance

In low attenuation test, we find performance isn't good as expected, and then find the cause is belong to RF TX configurations, so update setting to yield expected performance.

This symptom is not obvious in field, because throughput is a little lower then expected but it is stable.

Kuan-Chung Chen (2):
wifi: rtw89: 8852c: Update bandedge parameters for better performance
wifi: rtw89: 8852c: Fix TSSI causes transmit power inaccuracy

 drivers/net/wireless/realtek/rtw89/reg.h      |  8 ++++
 drivers/net/wireless/realtek/rtw89/rtw8852c.c |  5 +++
 .../net/wireless/realtek/rtw89/rtw8852c_rfk.c | 23 +++++++++-
 .../realtek/rtw89/rtw8852c_rfk_table.c        | 42 +++++++++----------
 .../wireless/realtek/rtw89/rtw8852c_table.c   |  9 ++--
 5 files changed, 61 insertions(+), 26 deletions(-)
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2.25.1
author maintainer
#1 lore raw

PATCH 1/2 wifi: rtw89: 8852c: Update bandedge parameters for better performance

From: Kuan-Chung Chen <[email protected]>

TSSI configures bandedge to TX proper waveform, these new bandedge parameters improve the accuracy of transmit power compensation. This helps to avoid throughput degradation.

Signed-off-by Kuan-Chung Chen <[email protected]>
Signed-off-by Ping-Ke Shih <[email protected]>
---
 drivers/net/wireless/realtek/rtw89/reg.h            | 4 ++++
 drivers/net/wireless/realtek/rtw89/rtw8852c.c       | 5 +++++
 drivers/net/wireless/realtek/rtw89/rtw8852c_table.c | 9 ++++++---
 3 files changed, 15 insertions(+), 3 deletions(-)
drivers/net/wireless/realtek/rtw89/reg.h +4 -0
index c0aac4d3678a..f9b15a1cc790 100644
@@ -4619,6 +4619,8 @@
 #define R_TXGAIN_SCALE 0x58F0
 #define B_TXGAIN_SCALE_EN BIT(19)
 #define B_TXGAIN_SCALE_OFT GENMASK(31, 24)
+#define R_P0_DAC_COMP_POST_DPD_EN 0x58F8
+#define B_P0_DAC_COMP_POST_DPD_EN BIT(31)
 #define R_P0_TSSI_BASE 0x5C00
 #define R_S0_DACKI 0x5E00
 #define B_S0_DACKI_AR GENMASK(31, 28)

@@ -4675,6 +4677,8 @@
 #define B_P1_TSSI_MV_MIX GENMASK(19, 11)
 #define B_P1_TSSI_MV_AVG GENMASK(13, 11)
 #define B_P1_TSSI_MV_CLR BIT(14)
+#define R_P1_DAC_COMP_POST_DPD_EN 0x78F8
+#define B_P1_DAC_COMP_POST_DPD_EN BIT(31)
 #define R_TSSI_THOF 0x7C00
 #define R_S1_DACKI 0x7E00
 #define B_S1_DACKI_AR GENMASK(31, 28)
drivers/net/wireless/realtek/rtw89/rtw8852c.c +5 -0
index 1e16cc0a05dc..00f1236e2193 100644
@@ -1975,6 +1975,11 @@ static void rtw8852c_set_tx_shape(struct rtw89_dev *rtwdev,
 	rtw89_phy_tssi_ctrl_set_bandedge_cfg(rtwdev,
 					     (enum rtw89_mac_idx)phy_idx,
 					     tx_shape_ofdm);
+
+	rtw89_phy_write32_set(rtwdev, R_P0_DAC_COMP_POST_DPD_EN,
+			      B_P0_DAC_COMP_POST_DPD_EN);
+	rtw89_phy_write32_set(rtwdev, R_P1_DAC_COMP_POST_DPD_EN,
+			      B_P1_DAC_COMP_POST_DPD_EN);
 }
 
 static void rtw8852c_set_txpwr(struct rtw89_dev *rtwdev,
drivers/net/wireless/realtek/rtw89/rtw8852c_table.c +6 -3
index 4b272fdf1fd7..2ffd979750e3 100644
@@ -56452,9 +56452,12 @@ const struct rtw89_txpwr_track_cfg rtw89_8852c_trk_cfg = {
 
 const struct rtw89_phy_tssi_dbw_table rtw89_8852c_tssi_dbw_table = {
 	.data[RTW89_TSSI_BANDEDGE_FLAT] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
-	.data[RTW89_TSSI_BANDEDGE_LOW] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
-	.data[RTW89_TSSI_BANDEDGE_MID] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
-	.data[RTW89_TSSI_BANDEDGE_HIGH] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+	.data[RTW89_TSSI_BANDEDGE_LOW] = {0x1d, 0x1d, 0x1d, 0x2f, 0xf, 0xf, 0x2f, 0x38,
+					  0x28, 0x18, 0x8, 0x8, 0x18, 0x28, 0x38},
+	.data[RTW89_TSSI_BANDEDGE_MID] = {0x24, 0x24, 0x24, 0x3b, 0x13, 0x13, 0x3b, 0x46,
+					  0x32, 0x1e, 0xa, 0xa, 0x1e, 0x32, 0x46},
+	.data[RTW89_TSSI_BANDEDGE_HIGH] = {0x2a, 0x2a, 0x2a, 0x46, 0x17, 0x17, 0x46, 0x53,
+					   0x3b, 0x24, 0xc, 0xc, 0x24, 0x3b, 0x53},
 };
 
 const struct rtw89_rfe_parms rtw89_8852c_dflt_parms = {
Signature · 1 line
2.25.1
#2 lore raw

Re: [PATCH 1/2] wifi: rtw89: 8852c: Update bandedge parameters for better performance

Quoted 8 lines · Ping-Ke Shih

From: Kuan-Chung Chen <[email protected]>

TSSI configures bandedge to TX proper waveform, these new bandedge parameters improve the accuracy of transmit power compensation. This helps to avoid throughput degradation.

Signed-off-by Kuan-Chung Chen <[email protected]>
Signed-off-by Ping-Ke Shih <[email protected]>

2 patches applied to wireless-next.git, thanks.

8f969ba1de42 wifi: rtw89: 8852c: Update bandedge parameters for better performance dae446493902 wifi: rtw89: 8852c: Fix TSSI causes transmit power inaccuracy

Signature · 3 lines
https://patchwork.kernel.org/project/linux-wireless/patch/[email protected]/

https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches
author maintainer
#3 lore raw

PATCH 2/2 wifi: rtw89: 8852c: Fix TSSI causes transmit power inaccuracy

In reply to Ping-Ke Shih

From: Kuan-Chung Chen <[email protected]>

Modify TSSI ADC FIFO Clock follow RX ADC Clock can avoid transmit power inaccuracy.

Signed-off-by Kuan-Chung Chen <[email protected]>
Signed-off-by Ping-Ke Shih <[email protected]>
---
 drivers/net/wireless/realtek/rtw89/reg.h      |  4 ++
 .../net/wireless/realtek/rtw89/rtw8852c_rfk.c | 23 +++++++++-
 .../realtek/rtw89/rtw8852c_rfk_table.c        | 42 +++++++++----------
 3 files changed, 46 insertions(+), 23 deletions(-)
drivers/net/wireless/realtek/rtw89/reg.h +4 -0
index f9b15a1cc790..7d25b76d90f5 100644
@@ -4539,6 +4539,8 @@
 #define B_P0_TSSI_ALIM2 GENMASK(29, 0)
 #define R_P0_TSSI_ALIM4 0x5640
 #define R_TSSI_PA_K8 0x5644
+#define R_P0_TSSI_ADC_CLK 0x566c
+#define B_P0_TSSI_ADC_CLK GENMASK(17, 16)
 #define R_UPD_CLK 0x5670
 #define B_DAC_VAL BIT(31)
 #define B_ACK_VAL GENMASK(30, 29)

@@ -4651,6 +4653,8 @@
 #define B_P1_TSSI_ALIM31 GENMASK(9, 0)
 #define R_P1_TSSI_ALIM2 0x763c
 #define B_P1_TSSI_ALIM2 GENMASK(29, 0)
+#define R_P1_TSSI_ADC_CLK 0x766c
+#define B_P1_TSSI_ADC_CLK GENMASK(17, 16)
 #define R_P1_TSSIC 0x7814
 #define B_P1_TSSIC_BYPASS BIT(11)
 #define R_P1_TMETER 0x7810
drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c +21 -2
index de7714f871d5..7636368c8659 100644
@@ -2893,18 +2893,37 @@ static void _tssi_set_sys(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,
 			  enum rtw89_rf_path path)
 {
 	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
+	enum rtw89_bandwidth bw = chan->band_width;
 	enum rtw89_band band = chan->band_type;
+	u32 clk = 0x0;
 
 	rtw89_rfk_parser(rtwdev, &rtw8852c_tssi_sys_defs_tbl);
 
-	if (path == RF_PATH_A)
+	switch (bw) {
+	case RTW89_CHANNEL_WIDTH_80:
+		clk = 0x1;
+		break;
+	case RTW89_CHANNEL_WIDTH_80_80:
+	case RTW89_CHANNEL_WIDTH_160:
+		clk = 0x2;
+		break;
+	default:
+		break;
+	}
+
+	if (path == RF_PATH_A) {
+		rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ADC_CLK,
+				       B_P0_TSSI_ADC_CLK, clk);
 		rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G,
 					 &rtw8852c_tssi_sys_defs_2g_a_tbl,
 					 &rtw8852c_tssi_sys_defs_5g_a_tbl);
-	else
+	} else {
+		rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_ADC_CLK,
+				       B_P1_TSSI_ADC_CLK, clk);
 		rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G,
 					 &rtw8852c_tssi_sys_defs_2g_b_tbl,
 					 &rtw8852c_tssi_sys_defs_5g_b_tbl);
+	}
 }
 
 static void _tssi_ini_txpwr_ctrl_bb(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,
drivers/net/wireless/realtek/rtw89/rtw8852c_rfk_table.c +21 -21

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