Skip to contentSkip to conversation

dt-bindings: arm,coresight-cti: Drop type for 'cpu' property

PATCH Applied Rob Herring 3 participants 8 messages Sep 25, 2023 – Oct 30, 2023

Subsystems (2)
lore
Share & tools
lore

Rob Herring

author maintainer
#0 lore raw

PATCH 1/2 dt-bindings: arm,coresight-cti: Drop type for 'cpu' property

'cpu' has been added as a single phandle type to dtschema, so drop the type here.

---
 Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml | 1 -
 1 file changed, 1 deletion(-)
Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml +0 -1
index 6216cfb0a188..b9bdfc8969cd 100644
@@ -92,7 +92,6 @@ properties:
     maxItems: 1
 
   cpu:
-    $ref: /schemas/types.yaml#/definitions/phandle
     description:
       Handle to cpu this device is associated with. This must appear in the
       base cti node if compatible string arm,coresight-cti-v8-arch is used,
Signature · 1 line
2.40.1
author maintainer
#1 lore raw

PATCH 2/2 dt-bindings: arm,coresight-cti: Add missing additionalProperties on child nodes

Just as unevaluatedProperties or additionalProperties are required at the top level of schemas, they should (and will) also be required for child node schemas. That ensures only documented properties are present for any node.

Adding additionalProperties constraint on 'trig-conns' nodes results in warnings that 'cpu' and 'arm,cs-dev-assoc' are not allowed. These are already defined for the parent node, but need to be duplicated for the child node. Drop the free form description that the properties also apply to the child nodes.

---
 .../bindings/arm/arm,coresight-cti.yaml       | 33 ++++++++++++++-----
 1 file changed, 24 insertions(+), 9 deletions(-)
Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml +24 -9
index b9bdfc8969cd..2d5545a2b49c 100644
@@ -93,9 +93,7 @@ properties:
 
   cpu:
     description:
-      Handle to cpu this device is associated with. This must appear in the
-      base cti node if compatible string arm,coresight-cti-v8-arch is used,
-      or may appear in a trig-conns child node when appropriate.
+      Handle to cpu this CTI is associated with.
 
   power-domains:
     maxItems: 1
@@ -112,12 +110,12 @@ properties:
     description:
       defines a phandle reference to an associated CoreSight trace device.
       When the associated trace device is enabled, then the respective CTI
-      will be enabled. Use in a trig-conns node, or in CTI base node when
-      compatible string arm,coresight-cti-v8-arch used. If the associated
-      device has not been registered then the node name will be stored as
-      the connection name for later resolution. If the associated device is
-      not a CoreSight device or not registered then the node name will remain
-      the connection name and automatic enabling will not occur.
+      will be enabled. Use in CTI base node when compatible string
+      arm,coresight-cti-v8-arch used. If the associated device has not been
+      registered then the node name will be stored as the connection name for
+      later resolution. If the associated device is not a CoreSight device or
+      not registered then the node name will remain the connection name and
+      automatic enabling will not occur.
 
   # size cells and address cells required if trig-conns node present.
   "#size-cells":
@@ -129,6 +127,8 @@ properties:
 patternProperties:
   '^trig-conns@([0-9]+)$':
     type: object
+    additionalProperties: false
+
     description:
       A trigger connections child node which describes the trigger signals
       between this CTI and another hardware device. This device may be a CPU,
@@ -140,6 +140,21 @@ patternProperties:
       reg:
         maxItems: 1
 
+      cpu:
+        description:
+          Handle to cpu this trigger connection is associated with.
+
+      arm,cs-dev-assoc:
+        $ref: /schemas/types.yaml#/definitions/phandle
+        description:
+          defines a phandle reference to an associated CoreSight trace device.
+          When the associated trace device is enabled, then the respective CTI
+          will be enabled. If the associated device has not been registered
+          then the node name will be stored as the connection name for later
+          resolution. If the associated device is not a CoreSight device or
+          not registered then the node name will remain the connection name
+          and automatic enabling will not occur.
+
       arm,trig-in-sigs:
         $ref: /schemas/types.yaml#/definitions/uint32-array
         minItems: 1
Signature · 1 line
2.40.1
Reviewed-by on v1 2/2
#2 lore raw

Re: [PATCH 2/2] dt-bindings: arm,coresight-cti: Add missing additionalProperties on child nodes

Quoted 83 lines · Rob Herring

Just as unevaluatedProperties or additionalProperties are required at the top level of schemas, they should (and will) also be required for child node schemas. That ensures only documented properties are present for any node.

Adding additionalProperties constraint on 'trig-conns' nodes results in warnings that 'cpu' and 'arm,cs-dev-assoc' are not allowed. These are already defined for the parent node, but need to be duplicated for the child node. Drop the free form description that the properties also apply to the child nodes.

---
 .../bindings/arm/arm,coresight-cti.yaml       | 33 ++++++++++++++-----
 1 file changed, 24 insertions(+), 9 deletions(-)
Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml +24 -10
index b9bdfc8969cd..2d5545a2b49c 100644
@@ -93,9 +93,7 @@ properties:
 
   cpu:
     description:
-      Handle to cpu this device is associated with. This must appear in the
-      base cti node if compatible string arm,coresight-cti-v8-arch is used,
-      or may appear in a trig-conns child node when appropriate.
+      Handle to cpu this CTI is associated with.
 
   power-domains:
     maxItems: 1
@@ -112,12 +110,12 @@ properties:
     description:
       defines a phandle reference to an associated CoreSight trace device.
       When the associated trace device is enabled, then the respective CTI
-      will be enabled. Use in a trig-conns node, or in CTI base node when
-      compatible string arm,coresight-cti-v8-arch used. If the associated
-      device has not been registered then the node name will be stored as
-      the connection name for later resolution. If the associated device is
-      not a CoreSight device or not registered then the node name will remain
-      the connection name and automatic enabling will not occur.
+      will be enabled. Use in CTI base node when compatible string
+      arm,coresight-cti-v8-arch used. If the associated device has not been
+      registered then the node name will be stored as the connection name for
+      later resolution. If the associated device is not a CoreSight device or
+      not registered then the node name will remain the connection name and
+      automatic enabling will not occur.
 
   # size cells and address cells required if trig-conns node present.
   "#size-cells":
@@ -129,6 +127,8 @@ properties:
 patternProperties:
   '^trig-conns@([0-9]+)$':
     type: object
+    additionalProperties: false
+
     description:
       A trigger connections child node which describes the trigger signals
       between this CTI and another hardware device. This device may be a CPU,
@@ -140,6 +140,21 @@ patternProperties:
       reg:
         maxItems: 1
 
+      cpu:
+        description:
+          Handle to cpu this trigger connection is associated with.
+
+      arm,cs-dev-assoc:
+        $ref: /schemas/types.yaml#/definitions/phandle
+        description:
+          defines a phandle reference to an associated CoreSight trace device.
+          When the associated trace device is enabled, then the respective CTI
+          will be enabled. If the associated device has not been registered
+          then the node name will be stored as the connection name for later
+          resolution. If the associated device is not a CoreSight device or
+          not registered then the node name will remain the connection name
+          and automatic enabling will not occur.
+
       arm,trig-in-sigs:
         $ref: /schemas/types.yaml#/definitions/uint32-array
         minItems: 1
--
Quoted 2 lines

2.40.1

Signature · 3 lines
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK
Acked-by on v1 2/2
#3 lore raw

Re: [PATCH 2/2] dt-bindings: arm,coresight-cti: Add missing additionalProperties on child nodes

In reply to Rob Herring
Quoted 5 lines · Rob Herring

Just as unevaluatedProperties or additionalProperties are required at the top level of schemas, they should (and will) also be required for child node schemas. That ensures only documented properties are present for any node.

Quoted 7 lines

Adding additionalProperties constraint on 'trig-conns' nodes results in warnings that 'cpu' and 'arm,cs-dev-assoc' are not allowed. These are already defined for the parent node, but need to be duplicated for the child node. Drop the free form description that the properties also apply to the child nodes.

Thanks,
Conor.

author maintainer Applied
#4 lore raw

Re: [PATCH 2/2] dt-bindings: arm,coresight-cti: Add missing additionalProperties on child nodes

In reply to Rob Herring
Quoted 11 lines · Rob Herring

Just as unevaluatedProperties or additionalProperties are required at the top level of schemas, they should (and will) also be required for child node schemas. That ensures only documented properties are present for any node.

Adding additionalProperties constraint on 'trig-conns' nodes results in warnings that 'cpu' and 'arm,cs-dev-assoc' are not allowed. These are already defined for the parent node, but need to be duplicated for the child node. Drop the free form description that the properties also apply to the child nodes.

Quoted 5 lines
---
 .../bindings/arm/arm,coresight-cti.yaml       | 33 ++++++++++++++-----
 1 file changed, 24 insertions(+), 9 deletions(-)

Applied, thanks!

Reviewed-by on v1 1/2
#5 lore raw
In reply to Rob Herring
Quoted 22 lines · Rob Herring

'cpu' has been added as a single phandle type to dtschema, so drop the type here.

---
 Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml | 1 -
 1 file changed, 1 deletion(-)
Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml +0 -2
index 6216cfb0a188..b9bdfc8969cd 100644
@@ -92,7 +92,6 @@ properties:
     maxItems: 1
 
   cpu:
-    $ref: /schemas/types.yaml#/definitions/phandle
     description:
       Handle to cpu this device is associated with. This must appear in the
       base cti node if compatible string arm,coresight-cti-v8-arch is used,
--
Quoted 2 lines

2.40.1

Signature · 3 lines
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK
Acked-by on v1 1/2
#6 lore raw
In reply to Rob Herring
Quoted 4 lines · Rob Herring

'cpu' has been added as a single phandle type to dtschema, so drop the type here.

Thanks,
Conor.

Quoted 19 lines
---
 Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml | 1 -
 1 file changed, 1 deletion(-)
Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml +0 -1
index 6216cfb0a188..b9bdfc8969cd 100644
@@ -92,7 +92,6 @@ properties:
     maxItems: 1
 
   cpu:
-    $ref: /schemas/types.yaml#/definitions/phandle
     description:
       Handle to cpu this device is associated with. This must appear in the
       base cti node if compatible string arm,coresight-cti-v8-arch is used,
Signature · 1 line
2.40.1