Skip to contentSkip to conversation

ARM/arm64: dts: qcom: fix USB wakeup interrupt types

PATCH Applied Johan Hovold 10 participants 23 messages Nov 20, 2023 – Dec 14, 2023

Subsystems (5)
lore
Share & tools
lore
#0 lore raw

cover ARM/arm64: dts: qcom: fix USB wakeup interrupt types

When testing a recent series that addresses resource leaks in the Qualcomm dwc3 glue driver [1], I realised that probe deferral can break wakeup from suspend due to how the wakeup interrupts are currently requested.

The following series fixes this by no longer overriding the firmware defined trigger types for the wakeup interrupts:

	https://lore.kernel.org/lkml/[email protected]/

It turns out a number Qualcomm devicetrees have also gotten the trigger types wrong, something which this series addresses.

Specifically, the HS/SS PHY wakeup interrupts are level triggered while the DP/DM HS PHY interrupts are edge triggered, and which edge to trigger on depends both on the use-case and on whether a Low speed or Full/High speed device is connected.

Fortunately, there should be no dependency between this series and USB one as all devicetree use the correct trigger type for the HS/SS PHY interrupts and the HS one has never been armed by Linux anyway. The DP/DM interrupt trigger types are also updated on suspend currently.

The only exception may be sc7280 where a recent cleanup patch inadvertently switched the SS and DP trigger types, but that one should just be backported anyway.

Note that the binding example is updated in the USB driver series mentioned above.

Johan

[1] https://lore.kernel.org/lkml/[email protected]/

Johan Hovold (11):
ARM: dts: qcom: sdx55: fix USB wakeup interrupt types
arm64: dts: qcom: sa8775p: fix USB wakeup interrupt types
arm64: dts: qcom: sc7180: fix USB wakeup interrupt types
arm64: dts: qcom: sc7280: fix usb_1 wakeup interrupt types
arm64: dts: qcom: sc7280: fix usb_2 wakeup interrupt types
arm64: dts: qcom: sc8180x: fix USB wakeup interrupt types
arm64: dts: qcom: sdm670: fix USB wakeup interrupt types
arm64: dts: qcom: sdm845: fix USB wakeup interrupt types
arm64: dts: qcom: sm6375: fix USB wakeup interrupt types
arm64: dts: qcom: sm8150: fix USB wakeup interrupt types
arm64: dts: qcom: sm8550: fix USB wakeup interrupt types

 arch/arm/boot/dts/qcom/qcom-sdx55.dtsi |  4 ++--
 arch/arm64/boot/dts/qcom/sa8775p.dtsi  | 12 ++++++------
 arch/arm64/boot/dts/qcom/sc7180.dtsi   |  4 ++--
 arch/arm64/boot/dts/qcom/sc7280.dtsi   |  8 ++++----
 arch/arm64/boot/dts/qcom/sc8180x.dtsi  |  8 ++++----
 arch/arm64/boot/dts/qcom/sdm670.dtsi   |  4 ++--
 arch/arm64/boot/dts/qcom/sdm845.dtsi   |  8 ++++----
 arch/arm64/boot/dts/qcom/sm6375.dtsi   |  4 ++--
 arch/arm64/boot/dts/qcom/sm8150.dtsi   |  8 ++++----
 arch/arm64/boot/dts/qcom/sm8550.dtsi   |  4 ++--
 10 files changed, 32 insertions(+), 32 deletions(-)
Signature · 1 line
2.41.0
#1 lore raw

PATCH 1/11 ARM: dts: qcom: sdx55: fix USB wakeup interrupt types

The DP/DM wakeup interrupts are edge triggered and which edge to trigger on depends on use-case and whether a Low speed or Full/High speed device is connected.

Fixes fea4b41022f3 ("ARM: dts: qcom: sdx55: Add USB3 and PHY support")
Cc Manivannan Sadhasivam <[email protected]>
---
 arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/boot/dts/qcom/qcom-sdx55.dtsi +2 -2
index 2aa5089a8513..e30dbf12990a 100644
@@ -587,8 +587,8 @@ usb: usb@a6f8800 {
 
 			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+				     <GIC_SPI 158 IRQ_TYPE_EDGE_BOTH>,
+				     <GIC_SPI 157 IRQ_TYPE_EDGE_BOTH>;
 			interrupt-names = "hs_phy_irq", "ss_phy_irq",
 					  "dm_hs_phy_irq", "dp_hs_phy_irq";
 
Signature · 1 line
2.41.0
#2 lore raw

PATCH 2/11 arm64: dts: qcom: sa8775p: fix USB wakeup interrupt types

In reply to Johan Hovold

The DP/DM wakeup interrupts are edge triggered and which edge to trigger on depends on use-case and whether a Low speed or Full/High speed device is connected.

Note that only triggering on rising edges can be used to detect resume events but not disconnect events.

Fixes de1001525c1a ("arm64: dts: qcom: sa8775p: add USB nodes")
Cc Shazad Hussain <[email protected]>
---
 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)
arch/arm64/boot/dts/qcom/sa8775p.dtsi +6 -6
index b6a93b11cbbd..4b42a329460c 100644
@@ -1610,8 +1610,8 @@ usb_0: usb@a6f8800 {
 			assigned-clock-rates = <19200000>, <200000000>;
 
 			interrupts-extended = <&intc GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>,
-					      <&pdc 14 IRQ_TYPE_EDGE_RISING>,
-					      <&pdc 15 IRQ_TYPE_EDGE_RISING>,
+					      <&pdc 14 IRQ_TYPE_EDGE_BOTH>,
+					      <&pdc 15 IRQ_TYPE_EDGE_BOTH>,
 					      <&pdc 12 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "pwr_event",
 					  "dp_hs_phy_irq",
@@ -1697,8 +1697,8 @@ usb_1: usb@a8f8800 {
 			assigned-clock-rates = <19200000>, <200000000>;
 
 			interrupts-extended = <&intc GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
-					      <&pdc 8 IRQ_TYPE_EDGE_RISING>,
-					      <&pdc 7 IRQ_TYPE_EDGE_RISING>,
+					      <&pdc 8 IRQ_TYPE_EDGE_BOTH>,
+					      <&pdc 7 IRQ_TYPE_EDGE_BOTH>,
 					      <&pdc 13 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "pwr_event",
 					  "dp_hs_phy_irq",
@@ -1760,8 +1760,8 @@ usb_2: usb@a4f8800 {
 			assigned-clock-rates = <19200000>, <200000000>;
 
 			interrupts-extended = <&intc GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>,
-					      <&pdc 10 IRQ_TYPE_EDGE_RISING>,
-					      <&pdc 9 IRQ_TYPE_EDGE_RISING>;
+					      <&pdc 10 IRQ_TYPE_EDGE_BOTH>,
+					      <&pdc 9 IRQ_TYPE_EDGE_BOTH>;
 			interrupt-names = "pwr_event",
 					  "dp_hs_phy_irq",
 					  "dm_hs_phy_irq";
Signature · 1 line
2.41.0
Reviewed-by on v1 2/11
#3 lore raw

Re: [PATCH 02/11] arm64: dts: qcom: sa8775p: fix USB wakeup interrupt types

Quoted 10 lines · Johan Hovold

The DP/DM wakeup interrupts are edge triggered and which edge to trigger on depends on use-case and whether a Low speed or Full/High speed device is connected.

Note that only triggering on rising edges can be used to detect resume events but not disconnect events.

Fixes de1001525c1a ("arm64: dts: qcom: sa8775p: add USB nodes")
Cc Shazad Hussain <[email protected]>
Quoted 45 lines
---
 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)
arch/arm64/boot/dts/qcom/sa8775p.dtsi +6 -6
index b6a93b11cbbd..4b42a329460c 100644
@@ -1610,8 +1610,8 @@ usb_0: usb@a6f8800 {
 			assigned-clock-rates = <19200000>, <200000000>;
 
 			interrupts-extended = <&intc GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>,
-					      <&pdc 14 IRQ_TYPE_EDGE_RISING>,
-					      <&pdc 15 IRQ_TYPE_EDGE_RISING>,
+					      <&pdc 14 IRQ_TYPE_EDGE_BOTH>,
+					      <&pdc 15 IRQ_TYPE_EDGE_BOTH>,
 					      <&pdc 12 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "pwr_event",
 					  "dp_hs_phy_irq",
@@ -1697,8 +1697,8 @@ usb_1: usb@a8f8800 {
 			assigned-clock-rates = <19200000>, <200000000>;
 
 			interrupts-extended = <&intc GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
-					      <&pdc 8 IRQ_TYPE_EDGE_RISING>,
-					      <&pdc 7 IRQ_TYPE_EDGE_RISING>,
+					      <&pdc 8 IRQ_TYPE_EDGE_BOTH>,
+					      <&pdc 7 IRQ_TYPE_EDGE_BOTH>,
 					      <&pdc 13 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "pwr_event",
 					  "dp_hs_phy_irq",
@@ -1760,8 +1760,8 @@ usb_2: usb@a4f8800 {
 			assigned-clock-rates = <19200000>, <200000000>;
 
 			interrupts-extended = <&intc GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>,
-					      <&pdc 10 IRQ_TYPE_EDGE_RISING>,
-					      <&pdc 9 IRQ_TYPE_EDGE_RISING>;
+					      <&pdc 10 IRQ_TYPE_EDGE_BOTH>,
+					      <&pdc 9 IRQ_TYPE_EDGE_BOTH>;
 			interrupt-names = "pwr_event",
 					  "dp_hs_phy_irq",
 					  "dm_hs_phy_irq";
Signature · 1 line
2.41.0
#4 lore raw

PATCH 3/11 arm64: dts: qcom: sc7180: fix USB wakeup interrupt types

In reply to Johan Hovold

The DP/DM wakeup interrupts are edge triggered and which edge to trigger on depends on use-case and whether a Low speed or Full/High speed device is connected.

Fixes 0b766e7fe5a2 ("arm64: dts: qcom: sc7180: Add USB related nodes")
---
 arch/arm64/boot/dts/qcom/sc7180.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/qcom/sc7180.dtsi +2 -2
index 11f353d416b4..8dc50d4afe29 100644
@@ -2966,8 +2966,8 @@ usb_1: usb@a6f8800 {
 
 			interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 					      <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
-					      <&pdc 8 IRQ_TYPE_LEVEL_HIGH>,
-					      <&pdc 9 IRQ_TYPE_LEVEL_HIGH>;
+					      <&pdc 8 IRQ_TYPE_EDGE_BOTH>,
+					      <&pdc 9 IRQ_TYPE_EDGE_BOTH>;
 			interrupt-names = "hs_phy_irq", "ss_phy_irq",
 					  "dm_hs_phy_irq", "dp_hs_phy_irq";
 
Signature · 1 line
2.41.0
#5 lore raw

PATCH 4/11 arm64: dts: qcom: sc7280: fix usb_1 wakeup interrupt types

In reply to Johan Hovold

A recent cleanup reordering the usb_1 wakeup interrupts inadvertently switched the DP and SuperSpeed interrupt trigger types.

Fixes 4a7ffc10d195 ("arm64: dts: qcom: align DWC3 USB interrupts with DT schema")
Cc Krzysztof Kozlowski <[email protected]>
---
 arch/arm64/boot/dts/qcom/sc7280.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/qcom/sc7280.dtsi +2 -2
index 66f1eb83cca7..8b968062a2c4 100644
@@ -3681,9 +3681,9 @@ usb_1: usb@a6f8800 {
 			assigned-clock-rates = <19200000>, <200000000>;
 
 			interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
-					      <&pdc 14 IRQ_TYPE_LEVEL_HIGH>,
+					      <&pdc 14 IRQ_TYPE_EDGE_BOTH>,
 					      <&pdc 15 IRQ_TYPE_EDGE_BOTH>,
-					      <&pdc 17 IRQ_TYPE_EDGE_BOTH>;
+					      <&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "hs_phy_irq",
 					  "dp_hs_phy_irq",
 					  "dm_hs_phy_irq",
Signature · 1 line
2.41.0
Reviewed-by on v1 4/11
#6 lore raw

Re: [PATCH 04/11] arm64: dts: qcom: sc7280: fix usb_1 wakeup interrupt types

Quoted 7 lines · Johan Hovold

A recent cleanup reordering the usb_1 wakeup interrupts inadvertently switched the DP and SuperSpeed interrupt trigger types.

Fixes 4a7ffc10d195 ("arm64: dts: qcom: align DWC3 USB interrupts with DT schema")
Cc Krzysztof Kozlowski <[email protected]>

Thanks, damn copy-pasting habit.

Best regards,
Krzysztof

#7 lore raw

PATCH 5/11 arm64: dts: qcom: sc7280: fix usb_2 wakeup interrupt types

In reply to Johan Hovold

The DP/DM wakeup interrupts are edge triggered and which edge to trigger on depends on use-case and whether a Low speed or Full/High speed device is connected.

Note that only triggering on rising edges can be used to detect resume events but not disconnect events.

Fixes bb9efa59c665 ("arm64: dts: qcom: sc7280: Add USB related nodes")
---
 arch/arm64/boot/dts/qcom/sc7280.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/qcom/sc7280.dtsi +2 -2
index 8b968062a2c4..5ca77acd2a46 100644
@@ -3426,8 +3426,8 @@ usb_2: usb@8cf8800 {
 			assigned-clock-rates = <19200000>, <200000000>;
 
 			interrupts-extended = <&intc GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
-					      <&pdc 12 IRQ_TYPE_EDGE_RISING>,
-					      <&pdc 13 IRQ_TYPE_EDGE_RISING>;
+					      <&pdc 12 IRQ_TYPE_EDGE_BOTH>,
+					      <&pdc 13 IRQ_TYPE_EDGE_BOTH>;
 			interrupt-names = "hs_phy_irq",
 					  "dp_hs_phy_irq",
 					  "dm_hs_phy_irq";
Signature · 1 line
2.41.0
#8 lore raw

PATCH 6/11 arm64: dts: qcom: sc8180x: fix USB wakeup interrupt types

In reply to Johan Hovold

The DP/DM wakeup interrupts are edge triggered and which edge to trigger on depends on use-case and whether a Low speed or Full/High speed device is connected.

Fixes b080f53a8f44 ("arm64: dts: qcom: sc8180x: Add remoteprocs, wifi and usb nodes")
Cc Vinod Koul <[email protected]>
---
 arch/arm64/boot/dts/qcom/sc8180x.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
arch/arm64/boot/dts/qcom/sc8180x.dtsi +4 -4
index a34f438ef2d9..7a9cb0418ac1 100644
@@ -2550,8 +2550,8 @@ usb_prim: usb@a6f8800 {
 			reg = <0 0x0a6f8800 0 0x400>;
 			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
+				     <GIC_SPI 488 IRQ_TYPE_EDGE_BOTH>,
+				     <GIC_SPI 489 IRQ_TYPE_EDGE_BOTH>;
 			interrupt-names = "hs_phy_irq",
 					  "ss_phy_irq",
 					  "dm_hs_phy_irq",
@@ -2624,8 +2624,8 @@ usb_sec: usb@a8f8800 {
 			power-domains = <&gcc USB30_SEC_GDSC>;
 			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 490 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 491 IRQ_TYPE_LEVEL_HIGH>;
+				     <GIC_SPI 490 IRQ_TYPE_EDGE_BOTH>,
+				     <GIC_SPI 491 IRQ_TYPE_EDGE_BOTH>;
 			interrupt-names = "hs_phy_irq", "ss_phy_irq",
 					  "dm_hs_phy_irq", "dp_hs_phy_irq";
 
Signature · 1 line
2.41.0
#9 lore raw

PATCH 7/11 arm64: dts: qcom: sdm670: fix USB wakeup interrupt types

In reply to Johan Hovold

The DP/DM wakeup interrupts are edge triggered and which edge to trigger on depends on use-case and whether a Low speed or Full/High speed device is connected.

Fixes 07c8ded6e373 ("arm64: dts: qcom: add sdm670 and pixel 3a device trees")
Cc Richard Acayan <[email protected]>
---
 arch/arm64/boot/dts/qcom/sdm670.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/qcom/sdm670.dtsi +2 -2
index ba2043d67370..c873560ae9d5 100644
@@ -1297,8 +1297,8 @@ usb_1: usb@a6f8800 {
 
 			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
+				     <GIC_SPI 488 IRQ_TYPE_EDGE_BOTH>,
+				     <GIC_SPI 489 IRQ_TYPE_EDGE_BOTH>;
 			interrupt-names = "hs_phy_irq", "ss_phy_irq",
 					  "dm_hs_phy_irq", "dp_hs_phy_irq";
 
Signature · 1 line
2.41.0
Acked-by on v1 7/11
#10 lore raw

Re: [PATCH 07/11] arm64: dts: qcom: sdm670: fix USB wakeup interrupt types

Quoted 9 lines · Johan Hovold

The DP/DM wakeup interrupts are edge triggered and which edge to trigger on depends on use-case and whether a Low speed or Full/High speed device is connected.

Fixes 07c8ded6e373 ("arm64: dts: qcom: add sdm670 and pixel 3a device trees")
Cc Richard Acayan <[email protected]>

---

Quoted 21 lines
 arch/arm64/boot/dts/qcom/sdm670.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/qcom/sdm670.dtsi +2 -2
index ba2043d67370..c873560ae9d5 100644
@@ -1297,8 +1297,8 @@ usb_1: usb@a6f8800 {
 
 			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
+				     <GIC_SPI 488 IRQ_TYPE_EDGE_BOTH>,
+				     <GIC_SPI 489 IRQ_TYPE_EDGE_BOTH>;
 			interrupt-names = "hs_phy_irq", "ss_phy_irq",
 					  "dm_hs_phy_irq", "dp_hs_phy_irq";
 
Signature · 1 line
2.41.0
#11 lore raw

PATCH 8/11 arm64: dts: qcom: sdm845: fix USB wakeup interrupt types

In reply to Johan Hovold

The DP/DM wakeup interrupts are edge triggered and which edge to trigger on depends on use-case and whether a Low speed or Full/High speed device is connected.

Fixes ca4db2b538a1 ("arm64: dts: qcom: sdm845: Add USB-related nodes")
---
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
arch/arm64/boot/dts/qcom/sdm845.dtsi +4 -4
index bf5e6eb9d313..0d2be706505a 100644
@@ -4055,8 +4055,8 @@ usb_1: usb@a6f8800 {
 
 			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
+				     <GIC_SPI 488 IRQ_TYPE_EDGE_BOTH>,
+				     <GIC_SPI 489 IRQ_TYPE_EDGE_BOTH>;
 			interrupt-names = "hs_phy_irq", "ss_phy_irq",
 					  "dm_hs_phy_irq", "dp_hs_phy_irq";
 
@@ -4106,8 +4106,8 @@ usb_2: usb@a8f8800 {
 
 			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 490 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 491 IRQ_TYPE_LEVEL_HIGH>;
+				     <GIC_SPI 490 IRQ_TYPE_EDGE_BOTH>,
+				     <GIC_SPI 491 IRQ_TYPE_EDGE_BOTH>;
 			interrupt-names = "hs_phy_irq", "ss_phy_irq",
 					  "dm_hs_phy_irq", "dp_hs_phy_irq";
 
Signature · 1 line
2.41.0
#12 lore raw

PATCH 9/11 arm64: dts: qcom: sm6375: fix USB wakeup interrupt types

In reply to Johan Hovold

The DP/DM wakeup interrupts are edge triggered and which edge to trigger on depends on use-case and whether a Low speed or Full/High speed device is connected.

Fixes 59d34ca97f91 ("arm64: dts: qcom: Add initial device tree for SM6375")
Cc Konrad Dybcio <[email protected]>
---
 arch/arm64/boot/dts/qcom/sm6375.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/qcom/sm6375.dtsi +2 -2
index e7ff55443da7..b479f3d9a3a8 100644
@@ -1362,8 +1362,8 @@ usb_1: usb@4ef8800 {
 
 			interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+				     <GIC_SPI 93 IRQ_TYPE_EDGE_BOTH>,
+				     <GIC_SPI 94 IRQ_TYPE_EDGE_BOTH>;
 			interrupt-names = "hs_phy_irq",
 					  "ss_phy_irq",
 					  "dm_hs_phy_irq",
Signature · 1 line
2.41.0
#13 lore raw

PATCH 10/11 arm64: dts: qcom: sm8150: fix USB wakeup interrupt types

In reply to Johan Hovold

The DP/DM wakeup interrupts are edge triggered and which edge to trigger on depends on use-case and whether a Low speed or Full/High speed device is connected.

Fixes 0c9dde0d2015 ("arm64: dts: qcom: sm8150: Add secondary USB and PHY nodes")
Fixes b33d2868e8d3 ("arm64: dts: qcom: sm8150: Add USB and PHY device nodes")
Cc Jonathan Marek <[email protected]>
Cc Jack Pham <[email protected]>
---
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
arch/arm64/boot/dts/qcom/sm8150.dtsi +4 -4
index 97623af13464..3e7048d8ac55 100644
@@ -3567,8 +3567,8 @@ usb_1: usb@a6f8800 {
 
 			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
+				     <GIC_SPI 488 IRQ_TYPE_EDGE_BOTH>,
+				     <GIC_SPI 489 IRQ_TYPE_EDGE_BOTH>;
 			interrupt-names = "hs_phy_irq", "ss_phy_irq",
 					  "dm_hs_phy_irq", "dp_hs_phy_irq";
 
@@ -3620,8 +3620,8 @@ usb_2: usb@a8f8800 {
 
 			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 490 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 491 IRQ_TYPE_LEVEL_HIGH>;
+				     <GIC_SPI 490 IRQ_TYPE_EDGE_BOTH>,
+				     <GIC_SPI 491 IRQ_TYPE_EDGE_BOTH>;
 			interrupt-names = "hs_phy_irq", "ss_phy_irq",
 					  "dm_hs_phy_irq", "dp_hs_phy_irq";
 
Signature · 1 line
2.41.0
Reviewed-by on v1 10/11
#14 lore raw

Re: [PATCH 10/11] arm64: dts: qcom: sm8150: fix USB wakeup interrupt types

Quoted 11 lines · Johan Hovold

The DP/DM wakeup interrupts are edge triggered and which edge to trigger on depends on use-case and whether a Low speed or Full/High speed device is connected.

Fixes 0c9dde0d2015 ("arm64: dts: qcom: sm8150: Add secondary USB and PHY nodes")
Fixes b33d2868e8d3 ("arm64: dts: qcom: sm8150: Add USB and PHY device nodes")
Cc Jonathan Marek <[email protected]>
Cc Jack Pham <[email protected]>

---

Quoted 28 lines
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
arch/arm64/boot/dts/qcom/sm8150.dtsi +4 -4
index 97623af13464..3e7048d8ac55 100644
@@ -3567,8 +3567,8 @@ usb_1: usb@a6f8800 {
 
 			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
+				     <GIC_SPI 488 IRQ_TYPE_EDGE_BOTH>,
+				     <GIC_SPI 489 IRQ_TYPE_EDGE_BOTH>;
 			interrupt-names = "hs_phy_irq", "ss_phy_irq",
 					  "dm_hs_phy_irq", "dp_hs_phy_irq";
 
@@ -3620,8 +3620,8 @@ usb_2: usb@a8f8800 {
 
 			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 490 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 491 IRQ_TYPE_LEVEL_HIGH>;
+				     <GIC_SPI 490 IRQ_TYPE_EDGE_BOTH>,
+				     <GIC_SPI 491 IRQ_TYPE_EDGE_BOTH>;
 			interrupt-names = "hs_phy_irq", "ss_phy_irq",
 					  "dm_hs_phy_irq", "dp_hs_phy_irq";
#15 lore raw

PATCH 11/11 arm64: dts: qcom: sm8550: fix USB wakeup interrupt types

In reply to Johan Hovold

The DP/DM wakeup interrupts are edge triggered and which edge to trigger on depends on use-case and whether a Low speed or Full/High speed device is connected.

Note that only triggering on rising edges can be used to detect resume events but not disconnect events.

Fixes 7f7e5c1b037f ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes")
Cc Abel Vesa <[email protected]>
---
 arch/arm64/boot/dts/qcom/sm8550.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/qcom/sm8550.dtsi +2 -2
index 7b9ddde0b2c9..9b5b098bb7e8 100644
@@ -2923,8 +2923,8 @@ usb_1: usb@a6f8800 {
 
 			interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
 					      <&pdc 17 IRQ_TYPE_LEVEL_HIGH>,
-					      <&pdc 15 IRQ_TYPE_EDGE_RISING>,
-					      <&pdc 14 IRQ_TYPE_EDGE_RISING>;
+					      <&pdc 15 IRQ_TYPE_EDGE_BOTH>,
+					      <&pdc 14 IRQ_TYPE_EDGE_BOTH>;
 			interrupt-names = "hs_phy_irq",
 					  "ss_phy_irq",
 					  "dm_hs_phy_irq",
Signature · 1 line
2.41.0
Reviewed-by on v1 11/11
#16 lore raw

Re: [PATCH 11/11] arm64: dts: qcom: sm8550: fix USB wakeup interrupt types

Quoted 10 lines · Johan Hovold

The DP/DM wakeup interrupts are edge triggered and which edge to trigger on depends on use-case and whether a Low speed or Full/High speed device is connected.

Note that only triggering on rising edges can be used to detect resume events but not disconnect events.

Fixes 7f7e5c1b037f ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes")
Cc Abel Vesa <[email protected]>
Quoted 22 lines
---
 arch/arm64/boot/dts/qcom/sm8550.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/qcom/sm8550.dtsi +2 -2
index 7b9ddde0b2c9..9b5b098bb7e8 100644
@@ -2923,8 +2923,8 @@ usb_1: usb@a6f8800 {
 
 			interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
 					      <&pdc 17 IRQ_TYPE_LEVEL_HIGH>,
-					      <&pdc 15 IRQ_TYPE_EDGE_RISING>,
-					      <&pdc 14 IRQ_TYPE_EDGE_RISING>;
+					      <&pdc 15 IRQ_TYPE_EDGE_BOTH>,
+					      <&pdc 14 IRQ_TYPE_EDGE_BOTH>;
 			interrupt-names = "hs_phy_irq",
 					  "ss_phy_irq",
 					  "dm_hs_phy_irq",
Signature · 1 line
2.41.0
maintainer Applied
#17 lore raw

Re: (subset) [PATCH 00/11] ARM/arm64: dts: qcom: fix USB wakeup interrupt types

In reply to Johan Hovold
Quoted 9 lines · Johan Hovold

When testing a recent series that addresses resource leaks in the Qualcomm dwc3 glue driver [1], I realised that probe deferral can break wakeup from suspend due to how the wakeup interrupts are currently requested.

The following series fixes this by no longer overriding the firmware defined trigger types for the wakeup interrupts:

[...]

Applied, thanks!

[01/11] ARM: dts: qcom: sdx55: fix USB wakeup interrupt types

        commit: d0ec3c4c11c3b30e1f2d344973b2a7bf0f986734

Best regards,

Signature · 1 line
Bjorn Andersson <[email protected]>
#18 lore raw
In reply to Johan Hovold
Quoted 8 lines · Johan Hovold

It turns out a number Qualcomm devicetrees have also gotten the trigger types wrong, something which this series addresses.

Specifically, the HS/SS PHY wakeup interrupts are level triggered while the DP/DM HS PHY interrupts are edge triggered, and which edge to trigger on depends both on the use-case and on whether a Low speed or Full/High speed device is connected.

Quoted 4 lines

Fortunately, there should be no dependency between this series and USB one as all devicetree use the correct trigger type for the HS/SS PHY interrupts and the HS one has never been armed by Linux anyway. The DP/DM interrupt trigger types are also updated on suspend currently.

Konrad reported off-list that the sc8180x patch in this series breaks probe of the dwc3 driver.

Turns out a number of these SoCs were using GIC interrupts for the DP/DM_HS_PHY interrupts despite the fact that the driver tries to reconfigure these as IRQ_TYPE_EDGE_FALLING (which the GIC does not support) to detect disconnect events during suspend.

This is obviously broken and the proper fix is to replace the GIC interrupts with the corresponding PDC interrupts. I believe Konrad is digging out the magic numbers at this moment.

The following patches will need a follow-up fix:

Quoted 7 lines

ARM: dts: qcom: sdx55: fix USB wakeup interrupt types

arm64: dts: qcom: sc8180x: fix USB wakeup interrupt types
arm64: dts: qcom: sdm670: fix USB wakeup interrupt types
arm64: dts: qcom: sdm845: fix USB wakeup interrupt types
arm64: dts: qcom: sm6375: fix USB wakeup interrupt types
arm64: dts: qcom: sm8150: fix USB wakeup interrupt types

Sorry about not noticing this.

Johan

#19 lore raw
Quoted 23 lines · Johan Hovold
Quoted 8 lines · Johan Hovold

It turns out a number Qualcomm devicetrees have also gotten the trigger types wrong, something which this series addresses.

Specifically, the HS/SS PHY wakeup interrupts are level triggered while the DP/DM HS PHY interrupts are edge triggered, and which edge to trigger on depends both on the use-case and on whether a Low speed or Full/High speed device is connected.

Quoted 4 lines

Fortunately, there should be no dependency between this series and USB one as all devicetree use the correct trigger type for the HS/SS PHY interrupts and the HS one has never been armed by Linux anyway. The DP/DM interrupt trigger types are also updated on suspend currently.

Konrad reported off-list that the sc8180x patch in this series breaks probe of the dwc3 driver.

Turns out a number of these SoCs were using GIC interrupts for the DP/DM_HS_PHY interrupts despite the fact that the driver tries to reconfigure these as IRQ_TYPE_EDGE_FALLING (which the GIC does not support) to detect disconnect events during suspend.

Quoted 14 lines

This is obviously broken and the proper fix is to replace the GIC interrupts with the corresponding PDC interrupts. I believe Konrad is digging out the magic numbers at this moment.

The following patches will need a follow-up fix:

Quoted 7 lines

ARM: dts: qcom: sdx55: fix USB wakeup interrupt types

arm64: dts: qcom: sc8180x: fix USB wakeup interrupt types
arm64: dts: qcom: sdm670: fix USB wakeup interrupt types
arm64: dts: qcom: sdm845: fix USB wakeup interrupt types
arm64: dts: qcom: sm6375: fix USB wakeup interrupt types
arm64: dts: qcom: sm8150: fix USB wakeup interrupt types

Hi Johan,

If it helps, I tried to dig up the PDC numbers for corresponding
GIC_SPI vectors:

SM8150:

eud_p0_dpse_int_mx apps_pdc_irq_out[9] SYS_apcsQgicSPI[489]
eud_p0_dmse_int_mx  apps_pdc_irq_out[8] SYS_apcsQgicSPI[488]
qmp_usb3_lfps_rxterm_irq apps_pdc_irq_out[6] SYS_apcsQgicSPI[486]
usb31_power_event_irq SYS_apcsQgicSPI[130]
usb31_hs_phy_irq SYS_apcsQgicSPI[131]

interrupts-extended = <&pdc 9 IRQ_TYPE_EDGE_RISING>,

			<&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
			<&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
			<&pdc 8 IRQ_TYPE_EDGE_RISING>;

interrupt-names = "dp_hs_phy_irq", "pwr_event_irq",

		"ss_phy_irq", "dm_hs_phy_irq";

--

sdm845-670-usb-common.dtsi

interrupts = <0 489 0>, <0 130 0>, <0 486 0>, <0 488 0>; interrupt-names = "dp_hs_phy_irq", "pwr_event_irq",

		"ss_phy_irq", "dm_hs_phy_irq";

interrupts = <0 491 0>, <0 135 0>, <0 487 0>, <0 490 0>; interrupt-names = "dp_hs_phy_irq", "pwr_event_irq",

		"ss_phy_irq", "dm_hs_phy_irq";

eud_p0_dpse_int_mx apps_pdc_irq_out[9] SYS_apssQgicSPI[489]
eud_p0_dmse_int_mx apps_pdc_irq_out[8] SYS_apssQgicSPI[488]
eud_p1_dmse_int_mx apps_pdc_irq_out[10] SYS_apssQgicSPI[490]
eud_p1_dpse_int_mx apps_pdc_irq_out[11] SYS_apssQgicSPI[491]
qmp_usb3_lfps_rxterm_irq apps_pdc_irq_out[7] SYS_apssQgicSPI[487]
qmp_usb3_lfps_rxterm_irq apps_pdc_irq_out[6] SYS_apssQgicSPI[486]

--

SDX55:

interrupts = <0 157 0>, <0 130 0>, <0 158 0>, <0 198 0>; interrupt-names = "dp_hs_phy_irq", "pwr_event_irq",

		"dm_hs_phy_irq", "ss_phy_irq";

eud_p1_dpse_int_mx apps_pdc_irq_out[10] SYS_apcsQgicSPI[157]
eud_p1_dmse_int_mx apps_pdc_irq_out[11] SYS_apcsQgicSPI[158]
apps_pdc.gp_irq_mux[31] apps_pdc_irq_out[51] SYS_apcsQgicSPI[198]

--

SM6375, I think GIC_SPI is fine but I will try to get back on this.

Sorry for bad formatting.

Regards,
Krishna,

#20 lore raw
Quoted 19 lines · Krishna Kurapati PSSNV
Quoted 18 lines · Johan Hovold

On Mon, Nov 20, 2023 at 05:43:20PM +0100, Johan Hovold wrote:

Konrad reported off-list that the sc8180x patch in this series breaks probe of the dwc3 driver.

Turns out a number of these SoCs were using GIC interrupts for the DP/DM_HS_PHY interrupts despite the fact that the driver tries to reconfigure these as IRQ_TYPE_EDGE_FALLING (which the GIC does not support) to detect disconnect events during suspend.

This is obviously broken and the proper fix is to replace the GIC interrupts with the corresponding PDC interrupts. I believe Konrad is digging out the magic numbers at this moment.

The following patches will need a follow-up fix:

Quoted 1 line

ARM: dts: qcom: sdx55: fix USB wakeup interrupt types

Quoted 8 lines
Quoted 5 lines
Quoted 5 lines

arm64: dts: qcom: sc8180x: fix USB wakeup interrupt types
arm64: dts: qcom: sdm670: fix USB wakeup interrupt types
arm64: dts: qcom: sdm845: fix USB wakeup interrupt types
arm64: dts: qcom: sm6375: fix USB wakeup interrupt types
arm64: dts: qcom: sm8150: fix USB wakeup interrupt types

If it helps, I tried to dig up the PDC numbers for corresponding
GIC_SPI vectors:

Thanks, Krisha, that helps a lot.

I've sent two series (for arm and arm64) based on yours and Konrad's input:

	https://lore.kernel.org/lkml/[email protected]/
	https://lore.kernel.org/lkml/[email protected]/
Quoted 8 lines

SM8150:

eud_p0_dpse_int_mx apps_pdc_irq_out[9] SYS_apcsQgicSPI[489]
eud_p0_dmse_int_mx  apps_pdc_irq_out[8] SYS_apcsQgicSPI[488]
qmp_usb3_lfps_rxterm_irq apps_pdc_irq_out[6] SYS_apcsQgicSPI[486]
usb31_power_event_irq SYS_apcsQgicSPI[130]
usb31_hs_phy_irq SYS_apcsQgicSPI[131]

Quoted 7 lines

interrupts-extended = <&pdc 9 IRQ_TYPE_EDGE_RISING>,

			<&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
			<&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
			<&pdc 8 IRQ_TYPE_EDGE_RISING>;

interrupt-names = "dp_hs_phy_irq", "pwr_event_irq",

		"ss_phy_irq", "dm_hs_phy_irq";

Do you have the corresponding numbers also for the second controller on SM8150? I inferred them from SDM845, but it would good to verify that.

And can someone dig out the corresponding SS PHY interrupt for sc8180x?

Johan

#21 lore raw
In reply to Krishna Kurapati PSSNV

On 12/12/23 10:30, Krishna Kurapati PSSNV wrote:

[...]

Quoted 1 line

SM6375, I think GIC_SPI is fine but I will try to get back on this.

interrupts-extended = <&intc GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,

                                              <&mpm 12 IRQ_TYPE_LEVEL_HIGH>,
                                              <&mpm 93 IRQ_TYPE_EDGE_BOTH>,
                                              <&mpm 94 IRQ_TYPE_EDGE_BOTH>;
                        interrupt-names = "hs_phy_irq",
                                          "ss_phy_irq",
                                          "dm_hs_phy_irq",
                                          "dp_hs_phy_irq";

the mpm node is not yet upstream (I only managed to untangle the related mess recently), I'll submit this soon.

Thanks Krishna and Johan for looking into this!

Konrad

#22 lore raw
Quoted 14 lines · Konrad Dybcio

On 12/12/23 10:30, Krishna Kurapati PSSNV wrote:

[...]

Quoted 1 line

SM6375, I think GIC_SPI is fine but I will try to get back on this.

interrupts-extended = <&intc GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,

                                               <&mpm 12 IRQ_TYPE_LEVEL_HIGH>,
                                               <&mpm 93 IRQ_TYPE_EDGE_BOTH>,
                                               <&mpm 94 IRQ_TYPE_EDGE_BOTH>;
                         interrupt-names = "hs_phy_irq",
                                           "ss_phy_irq",
                                           "dm_hs_phy_irq",
                                           "dp_hs_phy_irq";
Quoted 2 lines

the mpm node is not yet upstream (I only managed to untangle the related mess recently), I'll submit this soon.

Perfect, thanks!

Johan