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dmaengine: fsl-qdma: fix SoC may hang on 16 byte unaligned read

PATCH Applied Frank Li 2 participants 2 messages Feb 1, 2024 – Feb 7, 2024

Subsystems (2)
Arm i.MX and Layerscape dmaengine
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Frank Li

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#0 lore raw

PATCH 1/1 dmaengine: fsl-qdma: fix SoC may hang on 16 byte unaligned read

From: Peng Ma <[email protected]>

There is chip (ls1028a) errata:

The SoC may hang on 16 byte unaligned read transactions by QDMA.

Unaligned read transactions initiated by QDMA may stall in the NOC (Network On-Chip), causing a deadlock condition. Stalled transactions will trigger completion timeouts in PCIe controller.

Workaround:
Enable prefetch by setting the source descriptor prefetchable bit ( SD[PF] = 1 ).

Implement this workaround.

Cc [email protected]
Fixes b092529e0aa0 ("dmaengine: fsl-qdma: Add qDMA controller driver for Layerscape SoCs")
Signed-off-by Peng Ma <[email protected]>
Signed-off-by Frank Li <[email protected]>
---
 drivers/dma/fsl-qdma.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
drivers/dma/fsl-qdma.c +3 -1
index 47cb284680494..11d10dcd8b45d 100644
@@ -109,6 +109,7 @@
 #define FSL_QDMA_CMD_WTHROTL_OFFSET	20
 #define FSL_QDMA_CMD_DSEN_OFFSET	19
 #define FSL_QDMA_CMD_LWC_OFFSET		16
+#define FSL_QDMA_CMD_PF			BIT(17)
 
 /* Field definition for Descriptor status */
 #define QDMA_CCDF_STATUS_RTE		BIT(5)

@@ -384,7 +385,8 @@ static void fsl_qdma_comp_fill_memcpy(struct fsl_qdma_comp *fsl_comp,
 	qdma_csgf_set_f(csgf_dest, len);
 	/* Descriptor Buffer */
 	cmd = cpu_to_le32(FSL_QDMA_CMD_RWTTYPE <<
-			  FSL_QDMA_CMD_RWTTYPE_OFFSET);
+			  FSL_QDMA_CMD_RWTTYPE_OFFSET) |
+			  FSL_QDMA_CMD_PF;
 	sdf->data = QDMA_SDDF_CMD(cmd);
 
 	cmd = cpu_to_le32(FSL_QDMA_CMD_RWTTYPE <<
Signature · 1 line
2.34.1
maintainer Applied
#1 lore raw
Quoted 9 lines · Frank Li

There is chip (ls1028a) errata:

The SoC may hang on 16 byte unaligned read transactions by QDMA.

Unaligned read transactions initiated by QDMA may stall in the NOC (Network On-Chip), causing a deadlock condition. Stalled transactions will trigger completion timeouts in PCIe controller.

[...]

Applied, thanks!

[1/1] dmaengine: fsl-qdma: fix SoC may hang on 16 byte unaligned read

      commit: 9d739bccf261dd93ec1babf82f5c5d71dd4caa3e

Best regards,

Signature · 1 line
~Vinod