spi: dt-bindings: add Siflower Quad SPI controller
Subsystems (2)
RFC PATCH 1/2 spi: dt-bindings: add Siflower Quad SPI controller
From: Qingfang Deng <[email protected]>
Add YAML devicetree bindings for Siflower Quad SPI controller.
--- .../bindings/spi/siflower,qspi.yaml | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/siflower,qspi.yaml
Documentation/devicetree/bindings/spi/siflower,qspi.yaml new file +54 -0
@@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/siflower,qspi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Siflower Quad Serial Peripheral Interface (QSPI) + +maintainers: + - Qingfang Deng <[email protected]> + +allOf: + - $ref: spi-controller.yaml# + +properties: + compatible: + const: siflower,qspi + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +required: + - compatible + - reg + - clocks + - '#address-cells' + - '#size-cells' + +unevaluatedProperties: false + +examples: + - | + spi@c200000 { + compatible = "siflower,qspi"; + reg = <0 0xc200000 0 0x1000>; + clocks = <&apb_clk>; + interrupts = <39>; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins>; + #address-cells = <1>; + #size-cells = <0>; + };
Signature · 1 line
2.34.1
RFC PATCH 2/2 spi: add Siflower Quad SPI controller
From: Qingfang Deng <[email protected]>
Add Quad SPI controller driver for Siflower SoCs. It is based on ARM PL022, with custom modifications to support Dual/Quad SPI modes.
--- drivers/spi/Kconfig | 6 + drivers/spi/Makefile | 1 + drivers/spi/spi-siflower-qspi.c | 414 ++++++++++++++++++++++++++++++++ 3 files changed, 421 insertions(+) create mode 100644 drivers/spi/spi-siflower-qspi.c
drivers/spi/Kconfig +6 -0
@@ -952,6 +952,12 @@ config SPI_SIFIVE help This exposes the SPI controller IP from SiFive. +config SPI_SIFLOWER_QSPI + tristate "Siflower Quad SPI Controller" + depends on OF && SPI_MEM + help + Quad SPI driver for Siflower SoCs. + config SPI_SLAVE_MT27XX tristate "MediaTek SPI slave device" depends on ARCH_MEDIATEK || COMPILE_TEST
drivers/spi/Makefile +1 -0
@@ -126,6 +126,7 @@ obj-$(CONFIG_SPI_SH_HSPI) += spi-sh-hspi.o obj-$(CONFIG_SPI_SH_MSIOF) += spi-sh-msiof.o obj-$(CONFIG_SPI_SH_SCI) += spi-sh-sci.o obj-$(CONFIG_SPI_SIFIVE) += spi-sifive.o +obj-$(CONFIG_SPI_SIFLOWER_QSPI) += spi-siflower-qspi.o obj-$(CONFIG_SPI_SLAVE_MT27XX) += spi-slave-mt27xx.o obj-$(CONFIG_SPI_SN_F_OSPI) += spi-sn-f-ospi.o obj-$(CONFIG_SPI_SPRD) += spi-sprd.o
drivers/spi/spi-siflower-qspi.c new file +414 -0
414 lines not on this page · raw message
Signature · 1 line
2.34.1
Rob Herring
maintainerQuoted 10 lines · Qingfang Deng
From: Qingfang Deng <[email protected]>
Add YAML devicetree bindings for Siflower Quad SPI controller.
Signed-off-by Qingfang Deng <[email protected]>--- .../bindings/spi/siflower,qspi.yaml | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/siflower,qspi.yaml
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/spi/siflower,qspi.example.dtb: spi@c200000: reg: [[0, 203423744], [0, 4096]] is too long
from schema $id: http://devicetree.org/schemas/spi/siflower,qspi.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/spi/siflower,qspi.example.dtb: spi@c200000: Unevaluated properties are not allowed ('reg' was unexpected)
from schema $id: http://devicetree.org/schemas/spi/siflower,qspi.yaml#
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/[email protected]
The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
RFC PATCH v2 1/2 spi: dt-bindings: add Siflower Quad SPI controller
In reply to Qingfang DengFrom: Qingfang Deng <[email protected]>
Add YAML devicetree bindings for Siflower Quad SPI controller.
---
v2: fix dt_binding_check reported errors
.../bindings/spi/siflower,qspi.yaml | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/siflower,qspi.yaml
Documentation/devicetree/bindings/spi/siflower,qspi.yaml new file +54 -0
@@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/siflower,qspi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Siflower Quad Serial Peripheral Interface (QSPI) + +maintainers: + - Qingfang Deng <[email protected]> + +allOf: + - $ref: spi-controller.yaml# + +properties: + compatible: + const: siflower,qspi + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +required: + - compatible + - reg + - clocks + - '#address-cells' + - '#size-cells' + +unevaluatedProperties: false + +examples: + - | + spi@c200000 { + compatible = "siflower,qspi"; + reg = <0xc200000 0x1000>; + clocks = <&apb_clk>; + interrupts = <39>; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins>; + #address-cells = <1>; + #size-cells = <0>; + };
Signature · 1 line
2.34.1
RFC PATCH v2 2/2 spi: add Siflower Quad SPI controller
From: Qingfang Deng <[email protected]>
Add Quad SPI controller driver for Siflower SoCs. It is based on ARM PL022, with custom modifications to support Dual/Quad SPI modes.
---
v2: fix some style problems reported by checkpatch.pl
drivers/spi/Kconfig | 6 + drivers/spi/Makefile | 1 + drivers/spi/spi-siflower-qspi.c | 423 ++++++++++++++++++++++++++++++++ 3 files changed, 430 insertions(+) create mode 100644 drivers/spi/spi-siflower-qspi.c
drivers/spi/Kconfig +6 -0
@@ -952,6 +952,12 @@ config SPI_SIFIVE help This exposes the SPI controller IP from SiFive. +config SPI_SIFLOWER_QSPI + tristate "Siflower Quad SPI Controller" + depends on OF && SPI_MEM + help + Quad SPI driver for Siflower SoCs. + config SPI_SLAVE_MT27XX tristate "MediaTek SPI slave device" depends on ARCH_MEDIATEK || COMPILE_TEST
drivers/spi/Makefile +1 -0
@@ -126,6 +126,7 @@ obj-$(CONFIG_SPI_SH_HSPI) += spi-sh-hspi.o obj-$(CONFIG_SPI_SH_MSIOF) += spi-sh-msiof.o obj-$(CONFIG_SPI_SH_SCI) += spi-sh-sci.o obj-$(CONFIG_SPI_SIFIVE) += spi-sifive.o +obj-$(CONFIG_SPI_SIFLOWER_QSPI) += spi-siflower-qspi.o obj-$(CONFIG_SPI_SLAVE_MT27XX) += spi-slave-mt27xx.o obj-$(CONFIG_SPI_SN_F_OSPI) += spi-sn-f-ospi.o obj-$(CONFIG_SPI_SPRD) += spi-sprd.o
drivers/spi/spi-siflower-qspi.c new file +423 -0
423 lines not on this page · raw message
Signature · 1 line
2.34.1
Quoted 3 lines · Qingfang Deng
From: Qingfang Deng <[email protected]>
Add YAML devicetree bindings for Siflower Quad SPI controller.
Not much improved.
Do not attach (thread) your patchsets to some other threads (unrelated or older versions). This buries them deep in the mailbox and might interfere with applying entire sets.
Allow people to actually review your code - give them some time, like 24h between postings.
Quoted 23 lines
Signed-off-by Qingfang Deng <[email protected]>---
v2: fixdt_binding_checkreported errors.../bindings/spi/siflower,qspi.yaml | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/siflower,qspi.yamlDocumentation/devicetree/bindings/spi/siflower,qspi.yaml new file +8
-0@@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/siflower,qspi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Siflower Quad Serial Peripheral Interface (QSPI) +
Documentation/devicetree/bindings/spi/siflower,qspi.yaml line 18
Quoted 10 lines
Documentation/devicetree/bindings/spi/siflower,qspi.yaml new file +10
-0+maintainers: + - Qingfang Deng <[email protected]> + +allOf: + - $ref: spi-controller.yaml# + +properties: + compatible: + const: siflower,qspi +
My previous comments stay valid. Respond to them.
Best regards,
Krzysztof
Quoted 3 lines · Qingfang Deng
From: Qingfang Deng <[email protected]>
Add YAML devicetree bindings for Siflower Quad SPI controller.
Describe the hardware. What is this Siflower?
Quoted 20 lines
Signed-off-by Qingfang Deng <[email protected]>--- .../bindings/spi/siflower,qspi.yaml | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/siflower,qspi.yamlDocumentation/devicetree/bindings/spi/siflower,qspi.yaml new file +7
-0@@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/siflower,qspi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Siflower Quad Serial Peripheral Interface (QSPI)
Documentation/devicetree/bindings/spi/siflower,qspi.yaml line 17
Quoted 10 lines
Documentation/devicetree/bindings/spi/siflower,qspi.yaml new file +10
-0+ +maintainers: + - Qingfang Deng <[email protected]> + +allOf: + - $ref: spi-controller.yaml# + +properties: + compatible: + const: siflower,qspi
Except that this was not tested, aren't you adding it for some SoC? If so, then you miss here SoC part.
Best regards,
Krzysztof
Hi Krzysztof,
Quoted 4 lines · Krzysztof Kozlowski
Quoted 1 line · Qingfang Deng
Add YAML devicetree bindings for Siflower Quad SPI controller.
Describe the hardware. What is this Siflower?
It's a new RISC-V SoC which hasn't been upstreamed yet.
Quoted 6 lines
Documentation/devicetree/bindings/spi/siflower,qspi.yaml line 17
Quoted 3 lines
Documentation/devicetree/bindings/spi/siflower,qspi.yaml new file +3
-0+properties: + compatible: + const: siflower,qspiExcept that this was not tested, aren't you adding it for some SoC? If so, then you miss here SoC part.
I should add the "siflower" prefix to Documentation/devicetree/bindings/vendor-prefixes.yaml, right?
Regards,
Qingfang
Quoted 15 lines · Qingfang Deng
Hi Krzysztof,
Quoted 4 lines · Krzysztof Kozlowski
Quoted 1 line · Qingfang Deng
Add YAML devicetree bindings for Siflower Quad SPI controller.
Describe the hardware. What is this Siflower?
It's a new RISC-V SoC which hasn't been upstreamed yet.
Quoted 4 lines
Quoted 3 lines
Documentation/devicetree/bindings/spi/siflower,qspi.yaml new file +3
-0+properties: + compatible: + const: siflower,qspi
Quoted 5 lines
Quoted 2 lines
Except that this was not tested, aren't you adding it for some SoC? If so, then you miss here SoC part.
I should add the "siflower" prefix to
Documentation/devicetree/bindings/vendor-prefixes.yaml, right?
Isn't it already there? Then obvious you must, but that was not the point. Please read writing-bindings document. Compatibles should be SoC specific, not generic. "qspi" is generic.
Best regards,
Krzysztof
Mark Brown
maintainerQuoted 5 lines · Krzysztof Kozlowski
Quoted 1 line · Qingfang Deng
Add YAML devicetree bindings for Siflower Quad SPI controller.
Describe the hardware. What is this Siflower?
That seems like a perfectly adequate description - ${VENDOR} ${FUNCTION} is normal enough and Quad SPI is a well known standard. We don't need a marketing spiel for whatever IP version is currently supported.
Quoted 10 lines · Mark Brown
Quoted 5 lines · Krzysztof Kozlowski
Quoted 1 line · Qingfang Deng
Add YAML devicetree bindings for Siflower Quad SPI controller.
Describe the hardware. What is this Siflower?
That seems like a perfectly adequate description - ${VENDOR} ${FUNCTION} is normal enough and Quad SPI is a well known standard. We don't need a marketing spiel for whatever IP version is currently supported.
What we are missing here is the final product, so for example the SoC. Is the company making exactly one and only one Quad SPI? I provided more explanation what is missing further in the quoted email and in follow up email/discussion.
Best regards,
Krzysztof