Allwinner H616 NMI Controller

PATCH Superseded Chris Morgan 3 participants 8 messages Apr 14, 2024 – Apr 18, 2024

Subsystems (3)

Device tree bindings Arm/Allwinner sunXi SoC support irqchip drivers

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Chris Morgan

author

2024-04-14 17:04 UTC #0 lore raw

cover Allwinner H616 NMI Controller

From: Chris Morgan <[email protected]>

Add support for the Allwinner H616 NMI controller, which appears to be common IP with previous generations of the NMI. The NMI is required to support interrupts from the PMIC among other functions.

Chris Morgan (2):
dt-bindings: irq: sun7i-nmi: Add binding for the H616 NMI controller
arm64: dts: allwinner: h616: Add NMI device node

 .../interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml | 3 +++
 arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi           | 9 +++++++++
 2 files changed, 12 insertions(+)

Signature · 1 line

2.34.1

Chris Morgan

author

2024-04-14 17:04 UTC #1 lore raw

PATCH 1/2 dt-bindings: irq: sun7i-nmi: Add binding for the H616 NMI controller

From: Chris Morgan <[email protected]>

Add binding for the H616 NMI controller. This is necessary to handle interrupts from devices such as the internal PMIC.

Signed-off-by Chris Morgan <[email protected]>

---
 .../interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml       | 3 +++
 1 file changed, 3 insertions(+)

Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml +3 -0

index 83603180d8d9..4fc8b0320a31 100644
@@ -32,6 +32,9 @@ properties:
       - items:
           - const: allwinner,sun50i-a100-nmi
           - const: allwinner,sun9i-a80-nmi
+      - items:
+          - const: allwinner,sun50i-h616-nmi
+          - const: allwinner,sun9i-a80-nmi
 
   reg:
     maxItems: 1

Signature · 1 line

2.34.1

Andre Przywara

2024-04-14 22:40 UTC #2 lore raw

Re: [PATCH 1/2] dt-bindings: irq: sun7i-nmi: Add binding for the H616 NMI controller

Quoted 4 lines · On Sun, 14 Apr 2024 12:04:23 -0500 Chris Morgan <[email protected]> wrote:

From: Chris Morgan <[email protected]>
Add binding for the H616 NMI controller. This is necessary to handle interrupts from devices such as the internal PMIC.

I think "internal PMIC" is confusing, and I guess it's not really relevant anyway and you can remove the whole sentence. Instead just mention that this controller turns out to be compatible to the one described in the A80 manual.

Quoted 11 lines

Signed-off-by Chris Morgan <[email protected]>
---
 .../interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml       | 3 +++
 1 file changed, 3 insertions(+)
Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml +0 -0
index 83603180d8d9..4fc8b0320a31 100644

Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml properties: · line 37

Quoted 6 lines

Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml +3 -0

@@ -32,6 +32,9 @@ properties:
       - items:
           - const: allwinner,sun50i-a100-nmi
           - const: allwinner,sun9i-a80-nmi
+      - items:
+          - const: allwinner,sun50i-h616-nmi
+          - const: allwinner,sun9i-a80-nmi

It looks like this is the third chip that uses an A80 compatible version. So I'd say it's time to use an enum to group the A100, H616 and V3s together. Check allwinner,sun6i-a31-r-intc.yaml for an example.

Otherwise looks good.

Cheers,
Andre

Quoted 3 lines

Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml +0 -0
   reg:
     maxItems: 1

Chris Morgan

author

2024-04-14 17:04 UTC #3 lore raw

PATCH 2/2 arm64: dts: allwinner: h616: Add NMI device node

In reply to Chris Morgan

From: Chris Morgan <[email protected]>

Add device node for the H616 Non Maskable Interrupt (NMI) controller.

Signed-off-by Chris Morgan <[email protected]>

---
 arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +9 -0

index b2e85e52d1a1..1e066f3057be 100644
@@ -775,6 +775,15 @@ r_ccu: clock@7010000 {
 			#reset-cells = <1>;
 		};
 
+		nmi_intc: interrupt-controller@7010320 {
+			compatible = "allwinner,sun50i-h616-nmi",
+				     "allwinner,sun9i-a80-nmi";
+			reg = <0x07010320 0xc>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		r_pio: pinctrl@7022000 {
 			compatible = "allwinner,sun50i-h616-r-pinctrl";
 			reg = <0x07022000 0x400>;

Signature · 1 line

2.34.1

Andre Przywara

Reviewed-by on v1 2/2

2024-04-14 23:37 UTC #4 lore raw

Re: [PATCH 2/2] arm64: dts: allwinner: h616: Add NMI device node

On Sun, 14 Apr 2024 12:04:24 -0500
Chris Morgan <[email protected]> wrote:

Hi Chris,

Quoted 3 lines

From: Chris Morgan <[email protected]>
Add device node for the H616 Non Maskable Interrupt (NMI) controller.

You might want to mention that the NMI pad is not exposed on the H616 variants, but on the T507 and H700 packages.

Quoted 13 lines

Signed-off-by Chris Morgan <[email protected]>

---
 arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +0 -0

index b2e85e52d1a1..1e066f3057be 100644
@@ -775,6 +775,15 @@ r_ccu: clock@7010000 {
 			#reset-cells = <1>;
 		};

arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi r_ccu: clock@7010000 { · line 786

Quoted 10 lines

arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +9 -0

 
+		nmi_intc: interrupt-controller@7010320 {
+			compatible = "allwinner,sun50i-h616-nmi",
+				     "allwinner,sun9i-a80-nmi";
+			reg = <0x07010320 0xc>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+		};
+

I can confirm that this matches the manual, and the registers behave as described in the A80 manual. I don't have access to a chip with the NMI pad exposed or used, so I cannot test this fully, but Chris' experiments with the AXP717 PMIC connected to that pin on on H700 board seem to confirm that it indeed works.

So with that small amendment to the commit message please take my:

Reviewed-by Andre Przywara <[email protected]>

Cheers,
Andre

Quoted 3 lines

arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +0 -0

 		r_pio: pinctrl@7022000 {
 			compatible = "allwinner,sun50i-h616-r-pinctrl";
 			reg = <0x07022000 0x400>;

Chris Morgan

2024-04-18 15:59 UTC #5 lore raw

Re: [PATCH 2/2] arm64: dts: allwinner: h616: Add NMI device node

Quoted 42 lines · Andre Przywara

On Sun, 14 Apr 2024 12:04:24 -0500
Chris Morgan <[email protected]> wrote:
Hi Chris,
Quoted 3 lines
From: Chris Morgan <[email protected]>
Add device node for the H616 Non Maskable Interrupt (NMI) controller.
You might want to mention that the NMI pad is not exposed on the H616 variants, but on the T507 and H700 packages.
Quoted 13 lines
Signed-off-by Chris Morgan <[email protected]>
---
 arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +0 -0
index b2e85e52d1a1..1e066f3057be 100644
@@ -775,6 +775,15 @@ r_ccu: clock@7010000 {
 			#reset-cells = <1>;
 		};
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi r_ccu: clock@7010000 { · line 786
Quoted 10 lines
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +9 -0
 
+		nmi_intc: interrupt-controller@7010320 {
+			compatible = "allwinner,sun50i-h616-nmi",
+				     "allwinner,sun9i-a80-nmi";
+			reg = <0x07010320 0xc>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
I can confirm that this matches the manual, and the registers behave as described in the A80 manual. I don't have access to a chip with the NMI pad exposed or used, so I cannot test this fully, but Chris' experiments with the AXP717 PMIC connected to that pin on on H700 board seem to confirm that it indeed works.

Quoted 11 lines

So with that small amendment to the commit message please take my:
Reviewed-by Andre Przywara <[email protected]>
Cheers,
Andre
Quoted 3 lines
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +0 -0
 		r_pio: pinctrl@7022000 {
 			compatible = "allwinner,sun50i-h616-r-pinctrl";
 			reg = <0x07022000 0x400>;

Since the H616 doesn't have this functionality but the T507 and H700 does, should I change the compatible string? It's all the same silicon die with just a different part number printed on it, but still...

Thank you.
Chris

Andre Przywara

2024-04-18 16:19 UTC #6 lore raw

Re: [PATCH 2/2] arm64: dts: allwinner: h616: Add NMI device node

On Thu, 18 Apr 2024 10:59:13 -0500
Chris Morgan <[email protected]> wrote:

Hi,

Quoted 55 lines · Andre Przywara

Quoted 42 lines
On Sun, 14 Apr 2024 12:04:24 -0500
Chris Morgan <[email protected]> wrote:
Hi Chris,
Quoted 3 lines
From: Chris Morgan <[email protected]>
Add device node for the H616 Non Maskable Interrupt (NMI) controller.
You might want to mention that the NMI pad is not exposed on the H616 variants, but on the T507 and H700 packages.
Quoted 13 lines
Signed-off-by Chris Morgan <[email protected]>
---
 arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +0 -0
index b2e85e52d1a1..1e066f3057be 100644
@@ -775,6 +775,15 @@ r_ccu: clock@7010000 {
 			#reset-cells = <1>;
 		};
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi r_ccu: clock@7010000 { · line 786
Quoted 10 lines
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +9 -0
 
+		nmi_intc: interrupt-controller@7010320 {
+			compatible = "allwinner,sun50i-h616-nmi",
+				     "allwinner,sun9i-a80-nmi";
+			reg = <0x07010320 0xc>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+		};
+  
I can confirm that this matches the manual, and the registers behave as described in the A80 manual. I don't have access to a chip with the NMI pad exposed or used, so I cannot test this fully, but Chris' experiments with the AXP717 PMIC connected to that pin on on H700 board seem to confirm that it indeed works.
Quoted 11 lines
So with that small amendment to the commit message please take my:
Reviewed-by Andre Przywara <[email protected]>
Cheers,
Andre
Quoted 3 lines
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +0 -0
 		r_pio: pinctrl@7022000 {
 			compatible = "allwinner,sun50i-h616-r-pinctrl";
 			reg = <0x07022000 0x400>;  

Quoted 4 lines

Since the H616 doesn't have this functionality but the T507 and H700 does, should I change the compatible string? It's all the same silicon die with just a different part number printed on it, but still...

I would stick to h616, since we use that for all the other devices. Also the H616 *has* that NMI controller: I can confirm that the registers exist, and I can trigger and acknowledge interrupts. So in the interest of
consistency: keep using "allwinner,sun50i-h616-nmi".

Cheers,
Andre

Chris Morgan

2024-04-18 17:52 UTC #7 lore raw

Re: [PATCH 2/2] arm64: dts: allwinner: h616: Add NMI device node

Quoted 65 lines · Andre Przywara

On Thu, 18 Apr 2024 10:59:13 -0500
Chris Morgan <[email protected]> wrote:
Hi,
Quoted 55 lines · Andre Przywara
Quoted 42 lines
On Sun, 14 Apr 2024 12:04:24 -0500
Chris Morgan <[email protected]> wrote:
Hi Chris,
Quoted 3 lines
From: Chris Morgan <[email protected]>
Add device node for the H616 Non Maskable Interrupt (NMI) controller.
You might want to mention that the NMI pad is not exposed on the H616 variants, but on the T507 and H700 packages.
Quoted 13 lines
Signed-off-by Chris Morgan <[email protected]>
---
 arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +0 -0
index b2e85e52d1a1..1e066f3057be 100644
@@ -775,6 +775,15 @@ r_ccu: clock@7010000 {
 			#reset-cells = <1>;
 		};
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi r_ccu: clock@7010000 { · line 786
Quoted 10 lines
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +9 -0
 
+		nmi_intc: interrupt-controller@7010320 {
+			compatible = "allwinner,sun50i-h616-nmi",
+				     "allwinner,sun9i-a80-nmi";
+			reg = <0x07010320 0xc>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+		};
+  
I can confirm that this matches the manual, and the registers behave as described in the A80 manual. I don't have access to a chip with the NMI pad exposed or used, so I cannot test this fully, but Chris' experiments with the AXP717 PMIC connected to that pin on on H700 board seem to confirm that it indeed works.
Quoted 11 lines
So with that small amendment to the commit message please take my:
Reviewed-by Andre Przywara <[email protected]>
Cheers,
Andre
Quoted 3 lines
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +0 -0
 		r_pio: pinctrl@7022000 {
 			compatible = "allwinner,sun50i-h616-r-pinctrl";
 			reg = <0x07022000 0x400>;  
Quoted 4 lines
Since the H616 doesn't have this functionality but the T507 and H700 does, should I change the compatible string? It's all the same silicon die with just a different part number printed on it, but still...

Quoted 7 lines

I would stick to h616, since we use that for all the other devices. Also the H616 *has* that NMI controller: I can confirm that the registers exist, and I can trigger and acknowledge interrupts. So in the interest of
consistency: keep using "allwinner,sun50i-h616-nmi".
Cheers,
Andre

Okay, and I'll just resubmit then with the notes you mentioned and your tags.

Thank you.