linux-next: build failure after merge of the gpio-brgl-fixes tree
Subsystems (3)
Hi all,
After merging the gpio-brgl-fixes tree, today's linux-next build (x86_64 allmodconfig) failed like this:
drivers/gpio/gpio-tegra186.c: In function 'tegra186_gpio_is_accessible':drivers/gpio/gpio-tegra186.c:189:14: error: 'or' of unmatched not-equal tests is always 1 [-Werror]
189 | (value & TEGRA186_GPIO_WRITE_ACCESS)))
| ^drivers/gpio/gpio-tegra186.c:189:14: error: 'or' of unmatched not-equal tests is always 1 [-Werror]
cc1: all warnings being treated as errors
Caused by commit
62326f7cefc2 ("gpio: tegra186: Fix tegra186_gpio_is_accessible() check")
I have used the gpio-brgl-fixes tree from next-20240422 for today.
Signature · 2 lines
Cheers, Stephen Rothwell
Quoted 15 lines · Stephen Rothwell
Hi all,
After merging the gpio-brgl-fixes tree, today's linux-next build (
x86_64allmodconfig) failed like this:
drivers/gpio/gpio-tegra186.c: In function 'tegra186_gpio_is_accessible':drivers/gpio/gpio-tegra186.c:189:14: error: 'or' of unmatched not-equal tests is always 1 [-Werror]189 | (value & TEGRA186_GPIO_WRITE_ACCESS))) | ^
drivers/gpio/gpio-tegra186.c:189:14: error: 'or' of unmatched not-equal tests is always 1 [-Werror]
cc1: all warnings being treated as errorsCaused by commit
Quoted 7 lines
62326f7cefc2("gpio: tegra186: Fixtegra186_gpio_is_accessible()check")I have used the gpio-brgl-fixes tree from next-20240422 for today.
--
Cheers,
Stephen Rothwell
I will back this out of my branch, please resend a fixed version.
Bart
PATCH v2 1/1 gpio: tegra186: Fix tegra186_gpio_is_accessible() check
The controller has several register bits describing access control information for a given GPIO pin. When SCR_SEC_[R|W]EN is unset, it means we have full read/write access to all the registers for given GPIO pin. When SCR_SEC[R|W]EN is set, it means we need to further check the accompanying SCR_SEC_G1[R|W] bit to determine read/write access to all the registers for given GPIO pin.
This check was previously declaring that a GPIO pin was accessible only if either of the following conditions were met:
- SCR_SEC_REN + SCR_SEC_WEN both set
or
- SCR_SEC_REN + SCR_SEC_WEN both set and
SCR_SEC_G1R + SCR_SEC_G1W both set
Update the check to properly handle cases where only one of SCR_SEC_REN or SCR_SEC_WEN is set.
--- drivers/gpio/gpio-tegra186.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-)
drivers/gpio/gpio-tegra186.c +11 -9
@@ -36,12 +36,6 @@#define TEGRA186_GPIO_SCR_SEC_REN BIT(27)#define TEGRA186_GPIO_SCR_SEC_G1W BIT(9)#define TEGRA186_GPIO_SCR_SEC_G1R BIT(1) -#define TEGRA186_GPIO_FULL_ACCESS (TEGRA186_GPIO_SCR_SEC_WEN | \ - TEGRA186_GPIO_SCR_SEC_REN | \ - TEGRA186_GPIO_SCR_SEC_G1R | \ - TEGRA186_GPIO_SCR_SEC_G1W) -#define TEGRA186_GPIO_SCR_SEC_ENABLE (TEGRA186_GPIO_SCR_SEC_WEN | \ - TEGRA186_GPIO_SCR_SEC_REN)/* control registers */ #define TEGRA186_GPIO_ENABLE_CONFIG 0x00
@@ -177,10 +171,18 @@ static inline bool tegra186_gpio_is_accessible(struct tegra_gpio *gpio, unsigned value =__raw_readl (secure +TEGRA186_GPIO_SCR ); -if ((value &TEGRA186_GPIO_SCR_SEC_ENABLE ) ==0 ) -return true; +/* +* When SCR_SEC_[R|W]EN is unset, then we have full read/write access to all the +* registers for given GPIO pin. +* When SCR_SEC[R|W]EN is set, then there is need to further check the accompanying +* SCR_SEC_G1[R|W] bit to determine read/write access to all the registers for given +* GPIO pin. +*/ -if ((value &TEGRA186_GPIO_FULL_ACCESS ) ==TEGRA186_GPIO_FULL_ACCESS ) +if (((value &TEGRA186_GPIO_SCR_SEC_REN ) ==0 || + ((value &TEGRA186_GPIO_SCR_SEC_REN ) && (value &TEGRA186_GPIO_SCR_SEC_G1R ))) && + ((value &TEGRA186_GPIO_SCR_SEC_WEN ) ==0 || + ((value &TEGRA186_GPIO_SCR_SEC_WEN ) && (value &TEGRA186_GPIO_SCR_SEC_G1W ))))return true;return false;
Signature · 1 line
2.17.1
Re: [PATCH v2] gpio: tegra186: Fix tegra186_gpio_is_accessible() check
Quoted 18 lines · Prathamesh Shete
The controller has several register bits describing access control information for a given GPIO pin. When SCR_SEC_[R|W]EN is unset, it means we have full read/write access to all the registers for given GPIO pin. When SCR_SEC[R|W]EN is set, it means we need to further check the accompanying SCR_SEC_G1[R|W] bit to determine read/write access to all the registers for given GPIO pin.
This check was previously declaring that a GPIO pin was accessible only if either of the following conditions were met:
-
SCR_SEC_REN+SCR_SEC_WENboth setor
-
SCR_SEC_REN+SCR_SEC_WENboth set and
SCR_SEC_G1R+SCR_SEC_G1Wboth set
Quoted 6 lines
Update the check to properly handle cases where only one of
SCR_SEC_RENorSCR_SEC_WENis set.Fixes b2b56a163230 ("gpio: tegra186: Check GPIO pin permission before access.")Signed-off-by Prathamesh Shete <[email protected]>---
No changelog since v1. No Thierry's tag. Please resend.
Bart
PATCH v3 1/1 gpio: tegra186: Fix tegra186_gpio_is_accessible() check
The controller has several register bits describing access control information for a given GPIO pin. When SCR_SEC_[R|W]EN is unset, it means we have full read/write access to all the registers for given GPIO pin. When SCR_SEC[R|W]EN is set, it means we need to further check the accompanying SCR_SEC_G1[R|W] bit to determine read/write access to all the registers for given GPIO pin.
This check was previously declaring that a GPIO pin was accessible only if either of the following conditions were met:
- SCR_SEC_REN + SCR_SEC_WEN both set
or
- SCR_SEC_REN + SCR_SEC_WEN both set and
SCR_SEC_G1R + SCR_SEC_G1W both set
Update the check to properly handle cases where only one of SCR_SEC_REN or SCR_SEC_WEN is set.
---
V2 -> V3: Retain Thierry's 'Acked-by' tag from V1 and add change log. V1 -> V2: Fix kernel test bot warning.
drivers/gpio/gpio-tegra186.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-)
drivers/gpio/gpio-tegra186.c +11 -9
@@ -36,12 +36,6 @@#define TEGRA186_GPIO_SCR_SEC_REN BIT(27)#define TEGRA186_GPIO_SCR_SEC_G1W BIT(9)#define TEGRA186_GPIO_SCR_SEC_G1R BIT(1) -#define TEGRA186_GPIO_FULL_ACCESS (TEGRA186_GPIO_SCR_SEC_WEN | \ - TEGRA186_GPIO_SCR_SEC_REN | \ - TEGRA186_GPIO_SCR_SEC_G1R | \ - TEGRA186_GPIO_SCR_SEC_G1W) -#define TEGRA186_GPIO_SCR_SEC_ENABLE (TEGRA186_GPIO_SCR_SEC_WEN | \ - TEGRA186_GPIO_SCR_SEC_REN)/* control registers */ #define TEGRA186_GPIO_ENABLE_CONFIG 0x00
@@ -177,10 +171,18 @@ static inline bool tegra186_gpio_is_accessible(struct tegra_gpio *gpio, unsigned value =__raw_readl (secure +TEGRA186_GPIO_SCR ); -if ((value &TEGRA186_GPIO_SCR_SEC_ENABLE ) ==0 ) -return true; +/* +* When SCR_SEC_[R|W]EN is unset, then we have full read/write access to all the +* registers for given GPIO pin. +* When SCR_SEC[R|W]EN is set, then there is need to further check the accompanying +* SCR_SEC_G1[R|W] bit to determine read/write access to all the registers for given +* GPIO pin. +*/ -if ((value &TEGRA186_GPIO_FULL_ACCESS ) ==TEGRA186_GPIO_FULL_ACCESS ) +if (((value &TEGRA186_GPIO_SCR_SEC_REN ) ==0 || + ((value &TEGRA186_GPIO_SCR_SEC_REN ) && (value &TEGRA186_GPIO_SCR_SEC_G1R ))) && + ((value &TEGRA186_GPIO_SCR_SEC_WEN ) ==0 || + ((value &TEGRA186_GPIO_SCR_SEC_WEN ) && (value &TEGRA186_GPIO_SCR_SEC_G1W ))))return true;return false;
Signature · 1 line
2.17.1
Bartosz Golaszewski
AppliedRe: [PATCH v3] gpio: tegra186: Fix tegra186_gpio_is_accessible() check
From: Bartosz Golaszewski <[email protected]>
Quoted 8 lines · Prathamesh Shete
The controller has several register bits describing access control information for a given GPIO pin. When SCR_SEC_[R|W]EN is unset, it means we have full read/write access to all the registers for given GPIO pin. When SCR_SEC[R|W]EN is set, it means we need to further check the accompanying SCR_SEC_G1[R|W] bit to determine read/write access to all the registers for given GPIO pin.
[...]
Applied, thanks!
[1/1] gpio: tegra186: Fix tegra186_gpio_is_accessible() check
commit: d806f474a9a7993648a2c70642ee129316d8deff
Best regards,
Signature · 1 line
Bartosz Golaszewski <[email protected]>