ARM: dts: aspeed: Add IBM P11 BMC Boards
Subsystems (7)
Eddie James
maintainerv3 cover ARM: dts: aspeed: Add IBM P11 BMC Boards
Add the Blueridge and Fuji BMC systems. Document many missing FSI related properties, and fix existing warnings.
Changes since v2:
- Split up the DTS patches
- Add documentation patches
Eddie James (14):
dt-bindings: spi: Document the IBM Power SPI controller
dt-bindings: fsi: fsi2spi: Document SPI controller child nodes
dt-bindings: fsi: Document the FSI2PIB engine
dt-bindings: fsi: p9-occ: Switch to yaml format
dt-bindings: fsi: Document the IBM SBEFIFO engine
dt-bindings: fsi: Document the FSI controller common properties
dt-bindings: fsi: ibm,i2cr-fsi-master: Reference common FSI controller
dt-bindings: fsi: ast2600-fsi-master: Switch to yaml format
dt-bindings: fsi: Document the FSI Hub Controller
dt-bindings: i2c: i2c-fsi: Switch to yaml format
dt-bindings: arm: aspeed: add IBM P11 BMC boards
ARM: dts: aspeed: Add IBM P11 FSI devices
ARM: dts: aspeed: Add IBM P11 Blueridge BMC system
ARM: dts: aspeed: Add IBM P11 Fuji BMC system
.../bindings/arm/aspeed/aspeed.yaml | 2 + .../fsi/aspeed,ast2600-fsi-master.yaml | 72 + .../bindings/fsi/fsi-controller.yaml | 65 + .../bindings/fsi/fsi-master-aspeed.txt | 36 - .../devicetree/bindings/fsi/ibm,fsi2pib.yaml | 38 + .../devicetree/bindings/fsi/ibm,fsi2spi.yaml | 11 + .../bindings/fsi/ibm,hub-fsi-controller.yaml | 44 + .../bindings/fsi/ibm,i2cr-fsi-master.yaml | 5 +- .../devicetree/bindings/fsi/ibm,p9-occ.txt | 16 - .../devicetree/bindings/fsi/ibm,p9-occ.yaml | 41 + .../bindings/fsi/ibm,p9-sbefifo.yaml | 50 + .../devicetree/bindings/i2c/i2c-fsi.txt | 40 - .../devicetree/bindings/i2c/ibm,i2c-fsi.yaml | 59 + .../devicetree/bindings/spi/ibm,p10-spi.yaml | 56 + arch/arm/boot/dts/aspeed/Makefile | 2 + .../dts/aspeed/aspeed-bmc-ibm-blueridge.dts | 1711 +++++++ .../boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts | 3984 +++++++++++++++++ .../arm/boot/dts/aspeed/ibm-power11-quad.dtsi | 1696 +++++++ 18 files changed, 7835 insertions(+), 93 deletions(-) create mode 100644 Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml create mode 100644 Documentation/devicetree/bindings/fsi/fsi-controller.yaml delete mode 100644 Documentation/devicetree/bindings/fsi/fsi-master-aspeed.txt create mode 100644 Documentation/devicetree/bindings/fsi/ibm,fsi2pib.yaml create mode 100644 Documentation/devicetree/bindings/fsi/ibm,hub-fsi-controller.yaml delete mode 100644 Documentation/devicetree/bindings/fsi/ibm,p9-occ.txt create mode 100644 Documentation/devicetree/bindings/fsi/ibm,p9-occ.yaml create mode 100644 Documentation/devicetree/bindings/fsi/ibm,p9-sbefifo.yaml delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-fsi.txt create mode 100644 Documentation/devicetree/bindings/i2c/ibm,i2c-fsi.yaml create mode 100644 Documentation/devicetree/bindings/spi/ibm,p10-spi.yaml create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts create mode 100644 arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi
Signature · 1 line
2.39.3
Eddie James
maintainerPATCH v3 1/14 dt-bindings: spi: Document the IBM Power SPI controller
The IBM Power chips have a basic SPI controller. Document it.
--- .../devicetree/bindings/spi/ibm,p10-spi.yaml | 56 +++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/ibm,p10-spi.yaml
Documentation/devicetree/bindings/spi/ibm,p10-spi.yaml new file +56 -0
@@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/ibm,p10-spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IBM SPI Controller + +maintainers: + - Eddie James <[email protected]> + +description: + A basic SPI controller found on IBM Power chips, accessed over FSI. This + node will always be a child node of an ibm,fsi2spi node. + +properties: + compatible: + enum: + - ibm,p10-spi + + reg: + maxItems: 1 + +required: + - compatible + - reg + +allOf: + - $ref: spi-controller.yaml# + +unevaluatedProperties: false + +examples: + - | + fsi2spi at 1c00 { + compatible = "ibm,fsi2spi"; + reg = <0x1c00 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + spi at 0 { + compatible = "ibm,p10-spi"; + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom at 0 { + compatible = "atmel,at25"; + reg = <0>; + size = <0x80000>; + address-width = <24>; + pagesize = <256>; + spi-max-frequency = <1000000>; + }; + }; + };
Signature · 1 line
2.39.3
Rob Herring
maintainerRe: [PATCH v3 01/14] dt-bindings: spi: Document the IBM Power SPI controller
Quoted 8 lines · Eddie James
The IBM Power chips have a basic SPI controller. Document it.
Signed-off-by Eddie James <[email protected]>--- .../devicetree/bindings/spi/ibm,p10-spi.yaml | 56 +++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/ibm,p10-spi.yaml
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/spi/ibm,p10-spi.example.dtb: fsi2spi at 1c00: '#address-cells', '#size-cells', 'spi at 0' do not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/fsi/ibm,fsi2spi.yaml#
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20240425213701.655540-2-eajames at linux.ibm.com
The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
Re: [PATCH v3 01/14] dt-bindings: spi: Document the IBM Power SPI controller
In reply to Eddie JamesQuoted 1 line · Eddie James
The IBM Power chips have a basic SPI controller. Document it.
Please use subject prefixes matching the subsystem. You can get them for example with git log --oneline -- DIRECTORY_OR_FILE on the directory your patch is touching.
Quoted 13 lines
Signed-off-by Eddie James <[email protected]>--- .../devicetree/bindings/spi/ibm,p10-spi.yaml | 56 +++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/ibm,p10-spi.yamlDocumentation/devicetree/bindings/spi/ibm,p10-spi.yaml new file +0
-0
Documentation/devicetree/bindings/spi/ibm,p10-spi.yaml line 7
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Documentation/devicetree/bindings/spi/ibm,p10-spi.yaml new file +7
-0@@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/ibm,p10-spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IBM SPI Controller
IBM P10 SPI Controller
Quoted 22 lines
Documentation/devicetree/bindings/spi/ibm,p10-spi.yaml new file +22
-0+ +maintainers: + - Eddie James <[email protected]> + +description: + A basic SPI controller found on IBM Power chips, accessed over FSI. This + node will always be a child node of an ibm,fsi2spi node. + +properties: + compatible: + enum: + - ibm,p10-spi + + reg: + maxItems: 1 + +required: + - compatible + - reg + +allOf: + - $ref: spi-controller.yaml#
Documentation/devicetree/bindings/spi/ibm,p10-spi.yaml line 39
Quoted 10 lines
Documentation/devicetree/bindings/spi/ibm,p10-spi.yaml new file +10
-0+ +unevaluatedProperties: false + +examples: + - | + fsi2spi at 1c00 { + compatible = "ibm,fsi2spi"; + reg = <0x1c00 0x400>; + #address-cells = <1>; + #size-cells = <0>;
Use rather some simple wrapper instead of node causing warnings, e.g. fsi {} with only address/size cells.
Best regards,
Krzysztof
Eddie James
maintainerRe: [PATCH v3 01/14] dt-bindings: spi: Document the IBM Power SPI controller
Quoted 5 lines · Krzysztof Kozlowski
Quoted 1 line · Eddie James
The IBM Power chips have a basic SPI controller. Document it.
Please use subject prefixes matching the subsystem. You can get them for example with
git log --oneline -- DIRECTORY_OR_FILEon the directory your patch is touching.
Isn't spi the right subsystem here?
Quoted 7 lines
Quoted 7 lines
Signed-off-by Eddie James <[email protected]>--- .../devicetree/bindings/spi/ibm,p10-spi.yaml | 56 +++++++++++++++++++ 1 file changed, 56 insertions(+)create mode 100644
Documentation/devicetree/bindings/spi/ibm,p10-spi.yaml
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Documentation/devicetree/bindings/spi/ibm,p10-spi.yaml line 7
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Documentation/devicetree/bindings/spi/ibm,p10-spi.yaml new file +7
-0@@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/ibm,p10-spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IBM SPI ControllerIBM P10 SPI Controller
Ack.
Quoted 27 lines
Quoted 27 lines
Documentation/devicetree/bindings/spi/ibm,p10-spi.yaml new file +26
-0+ +maintainers: + - Eddie James <[email protected]> + +description: + A basic SPI controller found on IBM Power chips, accessed over FSI. This + node will always be a child node of an ibm,fsi2spi node. + +properties: + compatible: + enum: + - ibm,p10-spi + + reg: + maxItems: 1 + +required: + - compatible + - reg + +allOf: + - $ref: spi-controller.yaml# + +unevaluatedProperties: false + +examples:
Quoted 8 lines
Documentation/devicetree/bindings/spi/ibm,p10-spi.yaml line 39
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Documentation/devicetree/bindings/spi/ibm,p10-spi.yaml new file +6
-0+ - | + fsi2spi at 1c00 { + compatible = "ibm,fsi2spi"; + reg = <0x1c00 0x400>; + #address-cells = <1>; + #size-cells = <0>;Use rather some simple wrapper instead of node causing warnings, e.g. fsi {} with only address/size cells.
Will do, thanks.
Quoted 6 lines
Best regards,
Krzysztof
Re: [PATCH v3 01/14] dt-bindings: spi: Document the IBM Power SPI controller
Quoted 10 lines · Eddie James
Quoted 5 lines · Krzysztof Kozlowski
Quoted 1 line · Eddie James
The IBM Power chips have a basic SPI controller. Document it.
Please use subject prefixes matching the subsystem. You can get them for example with
git log --oneline -- DIRECTORY_OR_FILEon the directory your patch is touching.Isn't spi the right subsystem here?
And what prefix shall be for SPI bindings? Did you run the command or just replying to disagree with me?
Best regards,
Krzysztof
Eddie James
maintainerRe: [PATCH v3 01/14] dt-bindings: spi: Document the IBM Power SPI controller
Quoted 11 lines · Krzysztof Kozlowski
Quoted 8 lines · Eddie James
Quoted 5 lines · Krzysztof Kozlowski
Quoted 1 line · Eddie James
The IBM Power chips have a basic SPI controller. Document it.
Please use subject prefixes matching the subsystem. You can get them for example with
git log --oneline -- DIRECTORY_OR_FILEon the directory your patch is touching.Isn't spi the right subsystem here?
And what prefix shall be for SPI bindings? Did you run the command or just replying to disagree with me?
The correct prefix is either dt-bindings: spi or spi: dt-bindings. I used the former. Would you prefer I use the latter? I followed your instructions but you see the results are mixed, which is why I asked for clarification, wondering if you meant something else, since I already used one of the two apparently correct options.
53df0409b59b Merge branch 'for-next' ofgit://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.gitf63175733f91 spi: dt-bindings: armada-3700: convert to dtschema 1f48cbd6f00f spi: renesas,sh-msiof: Add r8a779h0 support eb4fdb4bf46f spi: dt-bindings: cdns,qspi-nor: make cdns,fifo-depth optional 52826aee484b spi: dt-bindings: cdns,qspi-nor: add mobileye,eyeq5-ospi compatible002514d91fcc spi: dt-bindings: cdns,qspi-nor: sort compatibles alphabetically02ec75edaa94 dt-bindings: treewide: add access-controllers description 80a38bfbbd59 spi: dt-bindings: introduce FIFO depth properties ee09bb727bff spi: dt-bindings: samsung: make dma properties not required 666db8fd4265 spi: dt-bindings: atmel,at91rm9200-spi: remove 9x60 compatible from listff690e75d64b spi: dt-bindings: samsung: add google,gs101-spi compatible 737cf74b3800 spi: dt-bindings: samsung: Add Exynos850 SPI 18ab9e9e8889 dt-bindings: spi: nxp-fspi: support i.MX93 and i.MX95 6685d552a0cc dt-bindings: spi: fsl-lpspi: support i.MX95 LPSPI f034a151059a dt-bindings: spi: stm32: add st,stm32mp25-spi compatible e1fca6957f19 spi: dw: Remove Intel Thunder Bay SOC support 4c3ff31a85e3 spi: axi-spi-engine improvements252eafe11ffc dt-bindings: spi: axi-spi-engine: convert to yaml 54a1dc08e173 spi: dt-bindings: renesas,rspi: Document RZ/Five SoC 09388379b6d7 spi: add stm32f7-spi compatible1b2e883e1af8 spi: Merge up fix4056d88866e5 spi: renesas,rzv2m-csi: Add CSI (SPI) target related property 9f778f377cd3 spi: dt-bindings: Make "additionalProperties: true" explicit da6de6d3ecc1 spi: qup: Allow scaling power domains and 0fc57bf1b2ff spi: dt-bindings: st,stm32-spi: Move "st,spi-midi-ns" to spi-peripheral-props.yamld15befc0cef4 spi: dt-bindings: qup: Document interconnects e6419c35f0d9 spi: dt-bindings: qup: Document power-domains and OPP 3b4e5194138b dt-bindings: spi: fsl-imx-cspi: Document missing entries b0ef97ac89a7 spi: dt-bindings: arm,pl022: Move child node properties to separate schema8f447694c23a Merge tag 'devicetree-for-6.6' ofgit://git.kernel.org/pub/scm/linux/kernel/git/robh/linux47aab53331ef dt-bindings: Fix typos0e19118ab24b dt-bindings: spi: convert spi-brcm63xx.txt to YAML 0d2b6a1b8515 dt-bindings: qspi: cdns,qspi-nor: Add clocks for StarFive JH7110 SoCffae65fb1ae4 dt-bindings: spi: spi-cadence: Add label property 883622752403 dt-bindings: spi: spi-cadence: Describe power-domains property b350e6c6297a spi: dt-bindings: add loongson spi026badeb7055 spi: fspi: Add power-domains to the DT bindings 49aa77165c00 spi: lpspi: Add power-domains to the DT bindings 8858babff615 dt-bindings: spi: add reference file to YAML b8968c388b69 dt-bindings: spi: Convert Tegra114 SPI to json-schema 17a9ab02f72c dt-bindings: spi: tegra-sflash: Convert to json-schema 8c87a46e2ce3 dt-bindings: spi: tegra-slink: Convert to json-schema 6c1561fb9005 Merge tag 'soc-dt-6.5' ofgit://git.kernel.org/pub/scm/linux/kernel/git/soc/soce884a133340a spi: dt-bindings: atmel,at91rm9200-spi: fix broken sam9x7 compatiblea3eb95484f27 spi: dt-bindings: atmel,at91rm9200-spi: add sam9x7 compatible 14dde0746e67 spi: dt-bindings: Add bindings for RZ/V2M CSI 01fa9edd8bcf spi: dt-bindings: stm32: do not disable spi-slave property for stm32f4-f7e6afe03351ac spi: stm32: disable spi-slave property for stm32f4-f7 7bac98a338d6 spi: dt-bindings: snps,dw-apb-ssi: Add compatible for Intel Mount Evans SoCd5c421d24d7e dt-bindings: xilinx: Switch xilinx.com emails to amd.com 34fcc0f0a410 spi: dt-bindings: socionext,uniphier: drop address/size-cells bbd25f1ae8bf spi: dt-bindings: samsung: drop cs-gpios
Quoted 5 lines
Best regards,
Krzysztof
Re: [PATCH v3 01/14] dt-bindings: spi: Document the IBM Power SPI controller
Quoted 10 lines · Eddie James
Quoted 8 lines · Krzysztof Kozlowski
Quoted 7 lines · Eddie James
Quoted 5 lines · Krzysztof Kozlowski
Quoted 1 line · Eddie James
The IBM Power chips have a basic SPI controller. Document it.
Please use subject prefixes matching the subsystem. You can get them for example with
git log --oneline -- DIRECTORY_OR_FILEon the directory your patch is touching.
Quoted 7 lines
Quoted 3 lines
Quoted 1 line
Isn't spi the right subsystem here?
And what prefix shall be for SPI bindings? Did you run the command or just replying to disagree with me?
The correct prefix is either dt-bindings: spi or spi: dt-bindings. I used the former. Would you prefer I use the latter? I followed your
The correct is the latter, although I see now Mark stopped stripping dt-bindings in such case. Log is still suggesting that (git log --oneline -- Documentation/devicetree/bindings/spi/ | grep "^[0-9a-f]\+ spi:" | wc -l gives 370 vs 130), although I understand now different approach.
It's also mentioned here:
https://www.kernel.org/doc/html/latest/devicetree/bindings/submitting-patches.html
Best regards,
Krzysztof
Eddie James
maintainerPATCH v3 2/14 dt-bindings: fsi: fsi2spi: Document SPI controller child nodes
In reply to Eddie JamesThe FSI2SPI bridge has several SPI controllers behind it, which should be documented. Also, therefore the node needs to specify address and size cells.
--- .../devicetree/bindings/fsi/ibm,fsi2spi.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+)
Documentation/devicetree/bindings/fsi/ibm,fsi2spi.yaml +11 -0
@@ -24,6 +24,17 @@ properties: items: - description: FSI slave address + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^spi@[0-9a-f]+$": + $ref: /schemas/spi/ibm,p10-spi.yaml + description: Child node describing underlying SPI controller + required: - compatible - reg
Signature · 1 line
2.39.3
Eddie James
maintainerPATCH v3 3/14 dt-bindings: fsi: Document the FSI2PIB engine
In reply to Eddie JamesThe FSI2PIB or SCOM engine provides an interface to the POWER processor PIB (Pervasive Interconnect Bus).
--- .../devicetree/bindings/fsi/ibm,fsi2pib.yaml | 38 +++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 Documentation/devicetree/bindings/fsi/ibm,fsi2pib.yaml
Documentation/devicetree/bindings/fsi/ibm,fsi2pib.yaml new file +38 -0
@@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/ibm,fsi2pib.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IBM FSI-attached SCOM engine + +maintainers: + - Eddie James <[email protected]> + +description: + The SCOM engine is an interface to the POWER processor PIB (Pervasive + Interconnect Bus). This node will always be a child of an FSI CFAM node; + see fsi.txt for details on FSI slave and CFAM nodes. + +properties: + compatible: + enum: + - ibm,fsi2pib + - ibm,i2cr-scom + + reg: + items: + - description: FSI slave address + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + scom at 1000 { + compatible = "ibm,fsi2pib"; + reg = <0x1000 0x400>; + };
Signature · 1 line
2.39.3
Re: [PATCH v3 03/14] dt-bindings: fsi: Document the FSI2PIB engine
Quoted 5 lines · Eddie James
The FSI2PIB or SCOM engine provides an interface to the POWER processor PIB (Pervasive Interconnect Bus).
Signed-off-by Eddie James <[email protected]>---
---
This is an automated instruction, just in case, because many review tags are being ignored. If you know the process, you can skip it (please do not feel offended by me posting it here - no bad intentions intended). If you do not know the process, here is a short explanation:
Please add Acked-by/Reviewed-by/Tested-by tags when posting new versions, under or above your Signed-off-by tag. Tag is "received", when provided in a message replied to you on the mailing list. Tools like b4 can help here. However, there's no need to repost patches *only* to add the tags. The upstream maintainer will do that for tags received on the version they apply.
https://elixir.bootlin.com/linux/v6.5-rc3/source/Documentation/process/submitting-patches.rst#L577
Best regards,
Krzysztof
Re: [PATCH v3 03/14] dt-bindings: fsi: Document the FSI2PIB engine
In reply to Eddie JamesQuoted 26 lines · Eddie James
The FSI2PIB or SCOM engine provides an interface to the POWER processor PIB (Pervasive Interconnect Bus).
Signed-off-by Eddie James <[email protected]>--- .../devicetree/bindings/fsi/ibm,fsi2pib.yaml | 38 +++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 Documentation/devicetree/bindings/fsi/ibm,fsi2pib.yamlDocumentation/devicetree/bindings/fsi/ibm,fsi2pib.yaml new file +11
-0@@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/ibm,fsi2pib.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IBM FSI-attached SCOM engine + +maintainers: + - Eddie James <[email protected]> +
Documentation/devicetree/bindings/fsi/ibm,fsi2pib.yaml line 21
Quoted 10 lines
Documentation/devicetree/bindings/fsi/ibm,fsi2pib.yaml new file +10
-0+description: + The SCOM engine is an interface to the POWER processor PIB (Pervasive + Interconnect Bus). This node will always be a child of an FSI CFAM node; + see fsi.txt for details on FSI slave and CFAM nodes. + +properties: + compatible: + enum: + - ibm,fsi2pib + - ibm,i2cr-scom
Sometimes you call these p9, sometimes p10... what is the system or SoC here? Aren't you adding some generic compatibles? writing-bindings and numerous guides are clear on that.
Best regards,
Krzysztof
Eddie James
maintainerRe: [PATCH v3 03/14] dt-bindings: fsi: Document the FSI2PIB engine
Quoted 32 lines · Krzysztof Kozlowski
Quoted 31 lines · Eddie James
The FSI2PIB or SCOM engine provides an interface to the POWER processor PIB (Pervasive Interconnect Bus).
Signed-off-by Eddie James <[email protected]>--- .../devicetree/bindings/fsi/ibm,fsi2pib.yaml | 38 +++++++++++++++++++ 1 file changed, 38 insertions(+)create mode 100644
Documentation/devicetree/bindings/fsi/ibm,fsi2pib.yamlDocumentation/devicetree/bindings/fsi/ibm,fsi2pib.yaml new file +16
-0@@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/ibm,fsi2pib.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IBM FSI-attached SCOM engine + +maintainers: + - Eddie James <[email protected]> + +description: + The SCOM engine is an interface to the POWER processor PIB (Pervasive + Interconnect Bus). This node will always be a child of an FSI CFAM node; + see fsi.txt for details on FSI slave and CFAM nodes. +
Quoted 8 lines
Documentation/devicetree/bindings/fsi/ibm,fsi2pib.yaml line 21
Quoted 5 lines
Documentation/devicetree/bindings/fsi/ibm,fsi2pib.yaml new file +5
-0+properties: + compatible: + enum: + - ibm,fsi2pib + - ibm,i2cr-scomSometimes you call these p9, sometimes p10... what is the system or SoC here? Aren't you adding some generic compatibles? writing-bindings and numerous guides are clear on that.
Open source FSI support started with P9 chips so we initially added p9-sbefifo, p9-occ, etc. P10 has all of the same engines as P9 plus the SPI controller, so that's why SPI is p10-spi. P11 has the same engines as P10. For scom/fsi2pib we could call it p9-scom I suppose... This series isn't just documentation for a new system, I'm adding documentation that should have been added for P9. Anyway I'm not sure what you mean about generic compatibles? You mean just add a "scom" or "fsi2pib" compatible? writing-bindings says "DO make 'compatible' properties specific"
Thanks,
Eddie
Quoted 4 lines
Best regards,
Krzysztof
Re: [PATCH v3 03/14] dt-bindings: fsi: Document the FSI2PIB engine
Quoted 44 lines · Eddie James
Quoted 32 lines · Krzysztof Kozlowski
Quoted 31 lines · Eddie James
The FSI2PIB or SCOM engine provides an interface to the POWER processor PIB (Pervasive Interconnect Bus).
Signed-off-by Eddie James <[email protected]>--- .../devicetree/bindings/fsi/ibm,fsi2pib.yaml | 38 +++++++++++++++++++ 1 file changed, 38 insertions(+)create mode 100644
Documentation/devicetree/bindings/fsi/ibm,fsi2pib.yamlDocumentation/devicetree/bindings/fsi/ibm,fsi2pib.yaml new file +16
-0@@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/ibm,fsi2pib.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IBM FSI-attached SCOM engine + +maintainers: + - Eddie James <[email protected]> + +description: + The SCOM engine is an interface to the POWER processor PIB (Pervasive + Interconnect Bus). This node will always be a child of an FSI CFAM node; + see fsi.txt for details on FSI slave and CFAM nodes. +Quoted 8 lines
Documentation/devicetree/bindings/fsi/ibm,fsi2pib.yaml line 21
Quoted 5 lines
Documentation/devicetree/bindings/fsi/ibm,fsi2pib.yaml new file +5
-0+properties: + compatible: + enum: + - ibm,fsi2pib + - ibm,i2cr-scomSometimes you call these p9, sometimes p10... what is the system or SoC here? Aren't you adding some generic compatibles? writing-bindings and numerous guides are clear on that.
Quoted 9 lines
Open source FSI support started with P9 chips so we initially added p9-sbefifo, p9-occ, etc. P10 has all of the same engines as P9 plus the SPI controller, so that's why SPI is p10-spi. P11 has the same engines as P10. For scom/fsi2pib we could call it p9-scom I suppose... This series isn't just documentation for a new system, I'm adding documentation that should have been added for P9. Anyway I'm not sure what you mean about generic compatibles? You mean just add a "scom" or "fsi2pib" compatible? writing-bindings says "DO make 'compatible' properties specific"
Usually it means that parts of SoC must have the name of the SoC, as first component of the name. Your boards are a bit different here, because I suppose no one will ever make a product except you, but still code could follow same set of rules.
Best regards,
Krzysztof
Eddie James
maintainerRe: [PATCH v3 03/14] dt-bindings: fsi: Document the FSI2PIB engine
Quoted 52 lines · Krzysztof Kozlowski
Quoted 42 lines · Eddie James
Quoted 32 lines · Krzysztof Kozlowski
Quoted 31 lines · Eddie James
The FSI2PIB or SCOM engine provides an interface to the POWER processor PIB (Pervasive Interconnect Bus).
Signed-off-by Eddie James <[email protected]>--- .../devicetree/bindings/fsi/ibm,fsi2pib.yaml | 38 +++++++++++++++++++ 1 file changed, 38 insertions(+)create mode 100644
Documentation/devicetree/bindings/fsi/ibm,fsi2pib.yamlDocumentation/devicetree/bindings/fsi/ibm,fsi2pib.yaml new file +16
-0@@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/ibm,fsi2pib.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IBM FSI-attached SCOM engine + +maintainers: + - Eddie James <[email protected]> + +description: + The SCOM engine is an interface to the POWER processor PIB (Pervasive + Interconnect Bus). This node will always be a child of an FSI CFAM node; + see fsi.txt for details on FSI slave and CFAM nodes. +Quoted 8 lines
Documentation/devicetree/bindings/fsi/ibm,fsi2pib.yaml line 21
Quoted 5 lines
Documentation/devicetree/bindings/fsi/ibm,fsi2pib.yaml new file +5
-0+properties: + compatible: + enum: + - ibm,fsi2pib + - ibm,i2cr-scomSometimes you call these p9, sometimes p10... what is the system or SoC here? Aren't you adding some generic compatibles? writing-bindings and numerous guides are clear on that.
Quoted 9 lines
Open source FSI support started with P9 chips so we initially added p9-sbefifo, p9-occ, etc. P10 has all of the same engines as P9 plus the SPI controller, so that's why SPI is p10-spi. P11 has the same engines as P10. For scom/fsi2pib we could call it p9-scom I suppose... This series isn't just documentation for a new system, I'm adding documentation that should have been added for P9. Anyway I'm not sure what you mean about generic compatibles? You mean just add a "scom" or "fsi2pib" compatible? writing-bindings says "DO make 'compatible' properties specific"
Quoted 4 lines
Usually it means that parts of SoC must have the name of the SoC, as first component of the name. Your boards are a bit different here, because I suppose no one will ever make a product except you, but still code could follow same set of rules.
OK, this wasn't mentioned when fsi2spi binding was merged, and I thought to make fsi2pib the same. I can switch to p9-scom or something.
Thanks,
Eddie
Quoted 4 lines
Best regards,
Krzysztof
Eddie James
maintainerPATCH v3 4/14 dt-bindings: fsi: p9-occ: Switch to yaml format
In reply to Eddie JamesSwitch to yaml for the OCC documentation. Also document the fact that the OCC "bridge" device will often have the hwmon node as a child.
--- .../devicetree/bindings/fsi/ibm,p9-occ.txt | 16 -------- .../devicetree/bindings/fsi/ibm,p9-occ.yaml | 41 +++++++++++++++++++ 2 files changed, 41 insertions(+), 16 deletions(-) delete mode 100644 Documentation/devicetree/bindings/fsi/ibm,p9-occ.txt create mode 100644 Documentation/devicetree/bindings/fsi/ibm,p9-occ.yaml
Documentation/devicetree/bindings/fsi/ibm,p9-occ.txt deleted +0 -16
@@ -1,16 +0,0 @@ -Device-tree bindings for FSI-attached POWER9/POWER10 On-Chip Controller (OCC) ------------------------------------------------------------------------------ - -This is the binding for the P9 or P10 On-Chip Controller accessed over FSI from -a service processor. See fsi.txt for details on bindings for FSI slave and CFAM -nodes. The OCC is not an FSI slave device itself, rather it is accessed -through the SBE FIFO. - -Required properties: - - compatible = "ibm,p9-occ" or "ibm,p10-occ" - -Examples: - - occ { - compatible = "ibm,p9-occ"; - };
Documentation/devicetree/bindings/fsi/ibm,p9-occ.yaml new file +41 -0
41 lines not on this page · raw message
Signature · 1 line
2.39.3
Re: [PATCH v3 04/14] dt-bindings: fsi: p9-occ: Switch to yaml format
Quoted 58 lines · Eddie James
Switch to yaml for the OCC documentation. Also document the fact that the OCC "bridge" device will often have the hwmon node as a child.
Signed-off-by Eddie James <[email protected]>--- .../devicetree/bindings/fsi/ibm,p9-occ.txt | 16 -------- .../devicetree/bindings/fsi/ibm,p9-occ.yaml | 41 +++++++++++++++++++ 2 files changed, 41 insertions(+), 16 deletions(-) delete mode 100644 Documentation/devicetree/bindings/fsi/ibm,p9-occ.txt create mode 100644 Documentation/devicetree/bindings/fsi/ibm,p9-occ.yamlDocumentation/devicetree/bindings/fsi/ibm,p9-occ.txt deleted +0
-16@@ -1,16 +0,0 @@ -Device-tree bindings for FSI-attached POWER9/POWER10 On-Chip Controller (OCC) ------------------------------------------------------------------------------ - -This is the binding for the P9 or P10 On-Chip Controller accessed over FSI from -a service processor. See fsi.txt for details on bindings for FSI slave and CFAM -nodes. The OCC is not an FSI slave device itself, rather it is accessed -through the SBE FIFO. - -Required properties: - - compatible = "ibm,p9-occ" or "ibm,p10-occ" - -Examples: - - occ { - compatible = "ibm,p9-occ"; - };Documentation/devicetree/bindings/fsi/ibm,p9-occ.yaml new file +18
-0@@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/ibm,p9-occ.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IBM FSI-attached On-Chip Controller (OCC) + +maintainers: + - Eddie James <[email protected]> + +description: + The POWER processor On-Chip Controller (OCC) helps manage power and + thermals for the system, accessed through the FSI-attached SBEFIFO + from a service processor. + +properties: + compatible:
Documentation/devicetree/bindings/fsi/ibm,p9-occ.yaml line 28
Quoted 10 lines
Documentation/devicetree/bindings/fsi/ibm,p9-occ.yaml new file +10
-0+ enum: + - ibm,p9-occ + - ibm,p10-occ + + reg: + items: + - description: Processor index + +required: + - compatible
required goes after all properties, so below.
Documentation/devicetree/bindings/fsi/ibm,p9-occ.yaml line 33
Quoted 5 lines
Documentation/devicetree/bindings/fsi/ibm,p9-occ.yaml new file +5
-0+ +patternProperties: + "^occ-hwmon(@.*)?": + type: object + $ref: /schemas/hwmon/ibm,occ-hwmon.yaml
Drop occ, not relevant. Why unit address is optional? This is supposed to be specific. Use proper regex as well for hex numbers.
Documentation/devicetree/bindings/fsi/ibm,p9-occ.yaml line 40
Quoted 7 lines
Documentation/devicetree/bindings/fsi/ibm,p9-occ.yaml new file +7
-0+ +additionalProperties: false + +examples: + - | + occ { + compatible = "ibm,p9-occ";
Not complete.
Best regards,
Krzysztof
Eddie James
maintainerRe: [PATCH v3 04/14] dt-bindings: fsi: p9-occ: Switch to yaml format
Quoted 62 lines · Krzysztof Kozlowski
Quoted 61 lines · Eddie James
Switch to yaml for the OCC documentation. Also document the fact that the OCC "bridge" device will often have the hwmon node as a child.
Signed-off-by Eddie James <[email protected]>--- .../devicetree/bindings/fsi/ibm,p9-occ.txt | 16 -------- .../devicetree/bindings/fsi/ibm,p9-occ.yaml | 41 +++++++++++++++++++ 2 files changed, 41 insertions(+), 16 deletions(-)delete mode 100644
Documentation/devicetree/bindings/fsi/ibm,p9-occ.txtcreate mode 100644Documentation/devicetree/bindings/fsi/ibm,p9-occ.yamlDocumentation/devicetree/bindings/fsi/ibm,p9-occ.txt deleted +0
-16@@ -1,16 +0,0 @@ -Device-tree bindings for FSI-attached POWER9/POWER10 On-Chip Controller (OCC) ------------------------------------------------------------------------------ - -This is the binding for the P9 or P10 On-Chip Controller accessed over FSI from -a service processor. See fsi.txt for details on bindings for FSI slave and CFAM -nodes. The OCC is not an FSI slave device itself, rather it is accessed -through the SBE FIFO. - -Required properties: - - compatible = "ibm,p9-occ" or "ibm,p10-occ" - -Examples: - - occ { - compatible = "ibm,p9-occ"; - };Documentation/devicetree/bindings/fsi/ibm,p9-occ.yaml new file +21
-0@@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/ibm,p9-occ.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IBM FSI-attached On-Chip Controller (OCC) + +maintainers: + - Eddie James <[email protected]> + +description: + The POWER processor On-Chip Controller (OCC) helps manage power and + thermals for the system, accessed through the FSI-attached SBEFIFO + from a service processor. + +properties: + compatible: + enum: + - ibm,p9-occ + - ibm,p10-occ
Quoted 8 lines
Documentation/devicetree/bindings/fsi/ibm,p9-occ.yaml line 28
Quoted 7 lines
Documentation/devicetree/bindings/fsi/ibm,p9-occ.yaml new file +7
-0+ + reg: + items: + - description: Processor index + +required: + - compatiblerequired goes after all properties, so below.
Ack.
Quoted 8 lines
Documentation/devicetree/bindings/fsi/ibm,p9-occ.yaml line 33
Quoted 6 lines
Documentation/devicetree/bindings/fsi/ibm,p9-occ.yaml new file +5
-0+ +patternProperties: + "^occ-hwmon(@.*)?": + type: object + $ref: /schemas/hwmon/ibm,occ-hwmon.yamlDrop occ, not relevant. Why unit address is optional? This is supposed to be specific. Use proper regex as well for hex numbers.
Well, there isn't really any concept of address here, it's a 1-to-1 relationship. I should just drop the unit address.
Quoted 9 lines
Documentation/devicetree/bindings/fsi/ibm,p9-occ.yaml line 40
Quoted 8 lines
Documentation/devicetree/bindings/fsi/ibm,p9-occ.yaml new file +7
-0+ +additionalProperties: false + +examples: + - | + occ { + compatible = "ibm,p9-occ";Not complete.
Ack.
Quoted 5 lines
Best regards,
Krzysztof
Eddie James
maintainerPATCH v3 5/14 dt-bindings: fsi: Document the IBM SBEFIFO engine
In reply to Eddie JamesThe SBEFIFO engine provides an interface to the POWER processor Self Boot Engine (SBE).
---
Changes since v1:
- Chance "ody" to "odyssey"
- Fix typo in commit message
- Reword description to describe the hardware only
Changes since v2:
- Rename file
- Remove '|' after description
- Change generic node name to match fsi.txt
Changes since sending in the Odyssey SBEFIFO series:
- Add occ child node documentation
.../bindings/fsi/ibm,p9-sbefifo.yaml | 50 +++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/fsi/ibm,p9-sbefifo.yaml
Documentation/devicetree/bindings/fsi/ibm,p9-sbefifo.yaml new file +50 -0
@@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/ibm,p9-sbefifo.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IBM FSI-attached SBEFIFO engine + +maintainers: + - Eddie James <[email protected]> + +description: + The SBEFIFO is an FSI CFAM engine that provides an interface to the + POWER processor Self Boot Engine (SBE). This node will always be a child + of an FSI CFAM node; see fsi.txt for details on FSI slave and CFAM + nodes. + +properties: + compatible: + enum: + - ibm,p9-sbefifo + - ibm,odyssey-sbefifo + + reg: + items: + - description: FSI slave address + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^occ(@.*)?": + type: object + $ref: ibm,p9-occ.yaml# + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + fsi-slave-engine at 2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + };
Signature · 1 line
2.39.3
Re: [PATCH v3 05/14] dt-bindings: fsi: Document the IBM SBEFIFO engine
Quoted 23 lines · Eddie James
The SBEFIFO engine provides an interface to the POWER processor Self Boot Engine (SBE).
Signed-off-by Eddie James <[email protected]>Acked-by Conor Dooley <[email protected]>Reviewed-by Andrew Jeffery <[email protected]>---
Documentation/devicetree/bindings/fsi/ibm,p9-sbefifo.yaml new file +14
-0+description: + The SBEFIFO is an FSI CFAM engine that provides an interface to the + POWER processor Self Boot Engine (SBE). This node will always be a child + of an FSI CFAM node; see fsi.txt for details on FSI slave and CFAM + nodes. + +properties: + compatible: + enum: + - ibm,p9-sbefifo + - ibm,odyssey-sbefifo + + reg: + items:
Documentation/devicetree/bindings/fsi/ibm,p9-sbefifo.yaml line 35
Quoted 10 lines
Documentation/devicetree/bindings/fsi/ibm,p9-sbefifo.yaml new file +10
-0+ - description: FSI slave address + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^occ(@.*)?":
Why unit address is optional?
Best regards,
Krzysztof
Eddie James
maintainerRe: [PATCH v3 05/14] dt-bindings: fsi: Document the IBM SBEFIFO engine
Quoted 26 lines · Krzysztof Kozlowski
Quoted 25 lines · Eddie James
The SBEFIFO engine provides an interface to the POWER processor Self Boot Engine (SBE).
Signed-off-by Eddie James <[email protected]>Acked-by Conor Dooley <[email protected]>Reviewed-by Andrew Jeffery <[email protected]>---
Documentation/devicetree/bindings/fsi/ibm,p9-sbefifo.yaml new file +17
-0+description: + The SBEFIFO is an FSI CFAM engine that provides an interface to the + POWER processor Self Boot Engine (SBE). This node will always be a child + of an FSI CFAM node; see fsi.txt for details on FSI slave and CFAM + nodes. + +properties: + compatible: + enum: + - ibm,p9-sbefifo + - ibm,odyssey-sbefifo + + reg: + items: + - description: FSI slave address + + "#address-cells":
Quoted 8 lines
Documentation/devicetree/bindings/fsi/ibm,p9-sbefifo.yaml line 35
Quoted 7 lines
Documentation/devicetree/bindings/fsi/ibm,p9-sbefifo.yaml new file +7
-0+ const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^occ(@.*)?":Why unit address is optional?
In this case, it's because we use the reg property (reflecting the unit address) to indicate the processor index of the occ node. However I think I should drop the unit address here, it's meaningless, there is no addressing for the OCC from the SBEFIFO.
Quoted 6 lines
Best regards,
Krzysztof
Eddie James
maintainerPATCH v3 6/14 dt-bindings: fsi: Document the FSI controller common properties
In reply to Eddie JamesSince there are multiple FSI controllers documented, the common properties should be documented separately and then referenced from the specific controller documentation.
--- .../bindings/fsi/fsi-controller.yaml | 65 +++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/fsi/fsi-controller.yaml
Documentation/devicetree/bindings/fsi/fsi-controller.yaml new file +65 -0
@@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/fsi-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: FSI Controller Common Properties + +maintainers: + - Eddie James <[email protected]> + +description: + FSI (FRU (Field Replaceable Unit) Service Interface) is a two wire bus. The + FSI bus is connected to a CFAM (Common FRU Access Macro) which contains + various engines such as I2C controllers, SPI controllers, etc. + +properties: + "#address-cells": + const: 2 + + "#size-cells": + const: 0 + + no-scan-on-init: + $ref: /schemas/types.yaml#/definitions/flag + description: + The FSI controller cannot scan the bus during initialization. + +patternProperties: + "cfam@[0-9a-f],[0-9a-f]": + type: object + properties: + chip-id: + $ref: /schemas/types.yaml#/definitions/uint32 + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + required: + - reg + + additionalProperties: true + +additionalProperties: true + +examples: + - | + fsi at 3400 { + #address-cells = <2>; + #size-cells = <0>; + compatible = "fsi-controller"; + reg = <0x3400 0x400>; + + cfam at 0,0 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0 0>; + }; + };
Signature · 1 line
2.39.3
Rob Herring
maintainerRe: [PATCH v3 06/14] dt-bindings: fsi: Document the FSI controller common properties
Quoted 10 lines · Eddie James
Since there are multiple FSI controllers documented, the common properties should be documented separately and then referenced from the specific controller documentation.
Signed-off-by Eddie James <[email protected]>--- .../bindings/fsi/fsi-controller.yaml | 65 +++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/fsi/fsi-controller.yaml
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:Documentation/devicetree/bindings/fsi/fsi-controller.example.dtb: /example-0/fsi at 3400: failed to match any schema with compatible: ['fsi-controller']
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20240425213701.655540-7-eajames at linux.ibm.com
The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
Re: [PATCH v3 06/14] dt-bindings: fsi: Document the FSI controller common properties
In reply to Eddie JamesQuoted 10 lines · Eddie James
Since there are multiple FSI controllers documented, the common properties should be documented separately and then referenced from the specific controller documentation.
Signed-off-by Eddie James <[email protected]>---
Documentation/devicetree/bindings/fsi/fsi-controller.yaml new file +2
-0+ + no-scan-on-init:
Documentation/devicetree/bindings/fsi/fsi-controller.yaml line 34
Quoted 10 lines
Documentation/devicetree/bindings/fsi/fsi-controller.yaml new file +10
-0+ $ref: /schemas/types.yaml#/definitions/flag + description: + The FSI controller cannot scan the bus during initialization. + +patternProperties: + "cfam@[0-9a-f],[0-9a-f]": + type: object + properties: + chip-id: + $ref: /schemas/types.yaml#/definitions/uint32
Missing description
Quoted 12 lines
Documentation/devicetree/bindings/fsi/fsi-controller.yaml new file +12
-0+ + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + required: + - reg
Documentation/devicetree/bindings/fsi/fsi-controller.yaml line 57
Quoted 10 lines
Documentation/devicetree/bindings/fsi/fsi-controller.yaml new file +10
-0+ + additionalProperties: true> + +additionalProperties: true + +examples: + - | + fsi at 3400 { + #address-cells = <2>; + #size-cells = <0>; + compatible = "fsi-controller";
No, there is no such compatible here.
Quoted 1 line
+ reg = <
0x34000x400>;
Neither reg.
Also, keep order of properties matching DTS coding style.
Best regards,
Krzysztof
Eddie James
maintainerRe: [PATCH v3 06/14] dt-bindings: fsi: Document the FSI controller common properties
Quoted 8 lines · Krzysztof Kozlowski
Quoted 6 lines · Eddie James
Since there are multiple FSI controllers documented, the common properties should be documented separately and then referenced from the specific controller documentation.
Signed-off-by Eddie James <[email protected]>---
Quoted 13 lines
Documentation/devicetree/bindings/fsi/fsi-controller.yaml line 34
Quoted 12 lines
Documentation/devicetree/bindings/fsi/fsi-controller.yaml new file +12
-0+ + no-scan-on-init: + $ref: /schemas/types.yaml#/definitions/flag + description: + The FSI controller cannot scan the bus during initialization. + +patternProperties: + "cfam@[0-9a-f],[0-9a-f]": + type: object + properties: + chip-id: + $ref: /schemas/types.yaml#/definitions/uint32Missing description
Ack'd, and comments below
Quoted 34 lines
Quoted 13 lines
Documentation/devicetree/bindings/fsi/fsi-controller.yaml new file +12
-0+ + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + required: + - regDocumentation/devicetree/bindings/fsi/fsi-controller.yaml line 57
Quoted 10 lines
Documentation/devicetree/bindings/fsi/fsi-controller.yaml new file +10
-0+ + additionalProperties: true> + +additionalProperties: true + +examples: + - | + fsi at 3400 { + #address-cells = <2>; + #size-cells = <0>; + compatible = "fsi-controller";No, there is no such compatible here.
Quoted 1 line
+ reg = <
0x34000x400>;Neither reg.
Also, keep order of properties matching DTS coding style.
Best regards,
Krzysztof
Eddie James
maintainerPATCH v3 7/14 dt-bindings: fsi: ibm,i2cr-fsi-master: Reference common FSI controller
In reply to Eddie JamesRemove the common properties from the I2CR documentation and instead point to the common FSI controller documentation.
--- .../devicetree/bindings/fsi/ibm,i2cr-fsi-master.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/fsi/ibm,i2cr-fsi-master.yaml +4 -1
@@ -22,11 +22,14 @@ properties: reg: maxItems: 1 +allOf: + - $ref: fsi-controller.yaml# + required: - compatible - reg -additionalProperties: false +unevaluatedProperties: false examples: - |
Signature · 1 line
2.39.3
Eddie James
maintainerPATCH v3 8/14 dt-bindings: fsi: ast2600-fsi-master: Switch to yaml format
In reply to Eddie JamesSwitch to yaml for the AST2600 FSI master documentation.
--- .../fsi/aspeed,ast2600-fsi-master.yaml | 72 +++++++++++++++++++ .../bindings/fsi/fsi-master-aspeed.txt | 36 ---------- 2 files changed, 72 insertions(+), 36 deletions(-) create mode 100644 Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml delete mode 100644 Documentation/devicetree/bindings/fsi/fsi-master-aspeed.txt
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml new file +72 -0
@@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/aspeed,ast2600-fsi-master.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Aspeed FSI master + +maintainers: + - Eddie James <[email protected]> + +description: + The AST2600 and later contain two identical FSI masters. They share a + clock and have a separate interrupt line and output pins. + +properties: + compatible: + enum: + - "aspeed,ast2600-fsi-master" + - "aspeed,ast2700-fsi-master" + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + cfam-reset-gpios: + maxItems: 1 + description: + Output GPIO pin for CFAM reset + + fsi-routing-gpios: + maxItems: 1 + description: + Output GPIO pin for setting the FSI mux (internal or cabled) + + fsi-mux-gpios: + maxItems: 1 + description: + Input GPIO pin for detecting the desired FSI mux state + + interrupts: + maxItems: 1 + +allOf: + - $ref: fsi-controller.yaml# + +required: + - compatible + - reg + - clocks + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/ast2600-clock.h> + #include <dt-bindings/gpio/aspeed-gpio.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + fsi-master at 1e79b000 { + compatible = "aspeed,ast2600-fsi-master"; + reg = <0x1e79b000 0x94>; + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fsi1_default>; + clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; + fsi-routing-gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_HIGH>; + fsi-mux-gpios = <&gpio0 ASPEED_GPIO(B, 0) GPIO_ACTIVE_HIGH>; + cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_LOW>; + };
Documentation/devicetree/bindings/fsi/fsi-master-aspeed.txt deleted +0 -36
@@ -1,36 +0,0 @@ -Device-tree bindings for AST2600 FSI master -------------------------------------------- - -The AST2600 contains two identical FSI masters. They share a clock and have a -separate interrupt line and output pins. - -Required properties: - - compatible: "aspeed,ast2600-fsi-master" - - reg: base address and length - - clocks: phandle and clock number - - interrupts: platform dependent interrupt description - - pinctrl-0: phandle to pinctrl node - - pinctrl-names: pinctrl state - -Optional properties: - - cfam-reset-gpios: GPIO for CFAM reset - - - fsi-routing-gpios: GPIO for setting the FSI mux (internal or cabled) - - fsi-mux-gpios: GPIO for detecting the desired FSI mux state - - -Examples: - - fsi-master { - compatible = "aspeed,ast2600-fsi-master", "fsi-master"; - reg = <0x1e79b000 0x94>; - interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_fsi1_default>; - clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; - - fsi-routing-gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_HIGH>; - fsi-mux-gpios = <&gpio0 ASPEED_GPIO(B, 0) GPIO_ACTIVE_HIGH>; - - cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_LOW>; - };
Signature · 1 line
2.39.3
Re: [PATCH v3 08/14] dt-bindings: fsi: ast2600-fsi-master: Switch to yaml format
Quoted 26 lines · Eddie James
Switch to yaml for the AST2600 FSI master documentation.
Signed-off-by Eddie James <[email protected]>--- .../fsi/aspeed,ast2600-fsi-master.yaml | 72 +++++++++++++++++++ .../bindings/fsi/fsi-master-aspeed.txt | 36 ---------- 2 files changed, 72 insertions(+), 36 deletions(-) create mode 100644 Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml delete mode 100644 Documentation/devicetree/bindings/fsi/fsi-master-aspeed.txtDocumentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml new file +10
-0@@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/aspeed,ast2600-fsi-master.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Aspeed FSI master + +maintainers: + - Eddie James <[email protected]>
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml line 20
Quoted 10 lines
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml new file +10
-0+ +description: + The AST2600 and later contain two identical FSI masters. They share a + clock and have a separate interrupt line and output pins. + +properties: + compatible: + enum: + - "aspeed,ast2600-fsi-master" + - "aspeed,ast2700-fsi-master"
This wasn't tested. No quotes. Do you see any other example like this?
Quoted 17 lines
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml new file +17
-0+ + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + cfam-reset-gpios: + maxItems: 1 + description: + Output GPIO pin for CFAM reset + + fsi-routing-gpios: + maxItems: 1 + description: + Output GPIO pin for setting the FSI mux (internal or cabled) +
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml line 47
Quoted 10 lines
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml new file +10
-0+ fsi-mux-gpios: + maxItems: 1 + description: + Input GPIO pin for detecting the desired FSI mux state + + interrupts: + maxItems: 1 + +allOf: + - $ref: fsi-controller.yaml#
This goes after required:
Quoted 14 lines
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml new file +14
-0+ +required: + - compatible + - reg + - clocks + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/ast2600-clock.h> + #include <dt-bindings/gpio/aspeed-gpio.h> + #include <dt-bindings/interrupt-controller/arm-gic.h>
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml line 71
Quoted 10 lines
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml new file +10
-0+ fsi-master at 1e79b000 { + compatible = "aspeed,ast2600-fsi-master"; + reg = <0x1e79b000 0x94>; + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fsi1_default>; + clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; + fsi-routing-gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_HIGH>; + fsi-mux-gpios = <&gpio0 ASPEED_GPIO(B, 0) GPIO_ACTIVE_HIGH>; + cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
No children?
Best regards,
Krzysztof
Eddie James
maintainerRe: [PATCH v3 08/14] dt-bindings: fsi: ast2600-fsi-master: Switch to yaml format
Quoted 30 lines · Krzysztof Kozlowski
Quoted 29 lines · Eddie James
Switch to yaml for the AST2600 FSI master documentation.
Signed-off-by Eddie James <[email protected]>--- .../fsi/aspeed,ast2600-fsi-master.yaml | 72 +++++++++++++++++++ .../bindings/fsi/fsi-master-aspeed.txt | 36 ---------- 2 files changed, 72 insertions(+), 36 deletions(-)create mode 100644
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yamldelete mode 100644Documentation/devicetree/bindings/fsi/fsi-master-aspeed.txtDocumentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml new file +13
-0@@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/aspeed,ast2600-fsi-master.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Aspeed FSI master + +maintainers: + - Eddie James <[email protected]> + +description: + The AST2600 and later contain two identical FSI masters. They share a
Quoted 8 lines
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml line 20
Quoted 7 lines
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml new file +7
-0+ clock and have a separate interrupt line and output pins. + +properties: + compatible: + enum: + - "aspeed,ast2600-fsi-master" + - "aspeed,ast2700-fsi-master"This wasn't tested. No quotes. Do you see any other example like this?
Strangely this passes make dt_binding_check for me... And Rob's bot didn't seem to catch it either. Just an oversight, I'll fix it.
Quoted 21 lines
Quoted 21 lines
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml new file +20
-0+ + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + cfam-reset-gpios: + maxItems: 1 + description: + Output GPIO pin for CFAM reset + + fsi-routing-gpios: + maxItems: 1 + description: + Output GPIO pin for setting the FSI mux (internal or cabled) + + fsi-mux-gpios: + maxItems: 1 + description:
Quoted 8 lines
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml line 47
Quoted 7 lines
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml new file +7
-0+ Input GPIO pin for detecting the desired FSI mux state + + interrupts: + maxItems: 1 + +allOf: + - $ref: fsi-controller.yaml#This goes after required:
Ack.
Quoted 18 lines
Quoted 18 lines
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml new file +17
-0+ +required: + - compatible + - reg + - clocks + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/ast2600-clock.h> + #include <dt-bindings/gpio/aspeed-gpio.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + fsi-master at 1e79b000 { + compatible = "aspeed,ast2600-fsi-master"; + reg = <0x1e79b000 0x94>;
Quoted 8 lines
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml line 71
Quoted 7 lines
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml new file +7
-0+ interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fsi1_default>; + clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; + fsi-routing-gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_HIGH>; + fsi-mux-gpios = <&gpio0 ASPEED_GPIO(B, 0) GPIO_ACTIVE_HIGH>; + cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_LOW>;No children?
Ack, I'll add one.
Quoted 5 lines
Best regards,
Krzysztof
Rob Herring
maintainerRe: [PATCH v3 08/14] dt-bindings: fsi: ast2600-fsi-master: Switch to yaml format
Quoted 42 lines · Eddie James
Quoted 30 lines · Krzysztof Kozlowski
Quoted 29 lines · Eddie James
Switch to yaml for the AST2600 FSI master documentation.
Signed-off-by Eddie James <[email protected]>--- .../fsi/aspeed,ast2600-fsi-master.yaml | 72 +++++++++++++++++++ .../bindings/fsi/fsi-master-aspeed.txt | 36 ---------- 2 files changed, 72 insertions(+), 36 deletions(-)create mode 100644
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yamldelete mode 100644Documentation/devicetree/bindings/fsi/fsi-master-aspeed.txtDocumentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml new file +13
-0@@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/aspeed,ast2600-fsi-master.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Aspeed FSI master + +maintainers: + - Eddie James <[email protected]> + +description: + The AST2600 and later contain two identical FSI masters. They share aQuoted 8 lines
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml line 20
Quoted 7 lines
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml new file +7
-0+ clock and have a separate interrupt line and output pins. + +properties: + compatible: + enum: + - "aspeed,ast2600-fsi-master" + - "aspeed,ast2700-fsi-master"This wasn't tested. No quotes. Do you see any other example like this?
Quoted 2 lines
Strangely this passes make
dt_binding_checkfor me... And Rob's bot didn't seem to catch it either. Just an oversight, I'll fix it.
Disabled due to yamllint bug. The fix is now released, so that reminds me to go enable it.
Rob
Eddie James
maintainerPATCH v3 9/14 dt-bindings: fsi: Document the FSI Hub Controller
In reply to Eddie JamesDocument the FSI Hub Controller CFAM engine.
--- .../bindings/fsi/ibm,hub-fsi-controller.yaml | 44 +++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 Documentation/devicetree/bindings/fsi/ibm,hub-fsi-controller.yaml
Documentation/devicetree/bindings/fsi/ibm,hub-fsi-controller.yaml new file +44 -0
@@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/ibm,hub-fsi-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IBM FSI-attached FSI Hub Controller + +maintainers: + - Eddie James <[email protected]> + +description: | + The FSI Hub Controller is an FSI controller, providing a number of FSI links, + located on a CFAM. Therefore this node will always be a child of an FSI CFAM + node. + +properties: + compatible: + enum: + - ibm,hub-fsi-controller + + reg: + items: + - description: FSI slave address + +allOf: + - $ref: fsi-controller.yaml# + +unevaluatedProperties: false + +examples: + - | + fsi at 3400 { + #address-cells = <2>; + #size-cells = <0>; + compatible = "ibm,hub-fsi-controller"; + reg = <0x3400 0x400>; + + cfam at 0,0 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0 0>; + }; + };
Signature · 1 line
2.39.3
Re: [PATCH v3 09/14] dt-bindings: fsi: Document the FSI Hub Controller
Quoted 16 lines · Eddie James
Document the FSI Hub Controller CFAM engine.
Signed-off-by Eddie James <[email protected]>--- .../bindings/fsi/ibm,hub-fsi-controller.yaml | 44 +++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 Documentation/devicetree/bindings/fsi/ibm,hub-fsi-controller.yamlDocumentation/devicetree/bindings/fsi/ibm,hub-fsi-controller.yaml new file +2
-0@@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2
Documentation/devicetree/bindings/fsi/ibm,hub-fsi-controller.yaml line 12
Quoted 10 lines
Documentation/devicetree/bindings/fsi/ibm,hub-fsi-controller.yaml new file +10
-0+--- +$id: http://devicetree.org/schemas/fsi/ibm,hub-fsi-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IBM FSI-attached FSI Hub Controller + +maintainers: + - Eddie James <[email protected]> + +description: |
Do not need '|' unless you need to preserve formatting.
Documentation/devicetree/bindings/fsi/ibm,hub-fsi-controller.yaml line 20
Quoted 8 lines
Documentation/devicetree/bindings/fsi/ibm,hub-fsi-controller.yaml new file +8
-0+ The FSI Hub Controller is an FSI controller, providing a number of FSI links, + located on a CFAM. Therefore this node will always be a child of an FSI CFAM + node. + +properties: + compatible: + enum: + - ibm,hub-fsi-controller
Again, is it for specific chip? SoC? Aren't you using generic compatibles (not allowed)?
Best regards,
Krzysztof
Eddie James
maintainerRe: [PATCH v3 09/14] dt-bindings: fsi: Document the FSI Hub Controller
Quoted 20 lines · Krzysztof Kozlowski
Quoted 19 lines · Eddie James
Document the FSI Hub Controller CFAM engine.
Signed-off-by Eddie James <[email protected]>--- .../bindings/fsi/ibm,hub-fsi-controller.yaml | 44 +++++++++++++++++++ 1 file changed, 44 insertions(+)create mode 100644
Documentation/devicetree/bindings/fsi/ibm,hub-fsi-controller.yamlDocumentation/devicetree/bindings/fsi/ibm,hub-fsi-controller.yaml new file +5
-0@@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/ibm,hub-fsi-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#
Quoted 8 lines
Documentation/devicetree/bindings/fsi/ibm,hub-fsi-controller.yaml line 12
Quoted 7 lines
Documentation/devicetree/bindings/fsi/ibm,hub-fsi-controller.yaml new file +7
-0+ +title: IBM FSI-attached FSI Hub Controller + +maintainers: + - Eddie James <[email protected]> + +description: |Do not need '|' unless you need to preserve formatting.
Ack.
Quoted 11 lines
Documentation/devicetree/bindings/fsi/ibm,hub-fsi-controller.yaml line 20
Quoted 9 lines
Documentation/devicetree/bindings/fsi/ibm,hub-fsi-controller.yaml new file +8
-0+ The FSI Hub Controller is an FSI controller, providing a number of FSI links, + located on a CFAM. Therefore this node will always be a child of an FSI CFAM + node. + +properties: + compatible: + enum: + - ibm,hub-fsi-controllerAgain, is it for specific chip? SoC? Aren't you using generic compatibles (not allowed)?
This one is fairly universally supported on FSI (any POWER chip will have it) so I didn't add a specific chip... Should i? Do you mean generic compatibles are not allowed? How generic do you mean?
Quoted 6 lines
Best regards,
Krzysztof
Re: [PATCH v3 09/14] dt-bindings: fsi: Document the FSI Hub Controller
Quoted 13 lines · Eddie James
Quoted 11 lines
Documentation/devicetree/bindings/fsi/ibm,hub-fsi-controller.yaml line 20
Quoted 9 lines
Documentation/devicetree/bindings/fsi/ibm,hub-fsi-controller.yaml new file +8
-0+ The FSI Hub Controller is an FSI controller, providing a number of FSI links, + located on a CFAM. Therefore this node will always be a child of an FSI CFAM + node. + +properties: + compatible: + enum: + - ibm,hub-fsi-controllerAgain, is it for specific chip? SoC? Aren't you using generic compatibles (not allowed)?
Quoted 3 lines
This one is fairly universally supported on FSI (any POWER chip will have it) so I didn't add a specific chip... Should i? Do you mean generic compatibles are not allowed? How generic do you mean?
Maybe IBM is different here, but for every regular SoC the blocks of that SoC should carry SoC model name/number.
Best regards,
Krzysztof
Eddie James
maintainerPATCH v3 10/14 dt-bindings: i2c: i2c-fsi: Switch to yaml format
In reply to Eddie JamesSwitch to yaml for the FSI-attached I2C controller.
--- .../devicetree/bindings/i2c/i2c-fsi.txt | 40 ------------- .../devicetree/bindings/i2c/ibm,i2c-fsi.yaml | 59 +++++++++++++++++++ 2 files changed, 59 insertions(+), 40 deletions(-) delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-fsi.txt create mode 100644 Documentation/devicetree/bindings/i2c/ibm,i2c-fsi.yaml
Documentation/devicetree/bindings/i2c/i2c-fsi.txt deleted +0 -40
@@ -1,40 +0,0 @@ -Device-tree bindings for FSI-attached I2C master and busses ------------------------------------------------------------ - -Required properties: - - compatible = "ibm,i2c-fsi"; - - reg = < address size >; : The FSI CFAM address and address - space size. - - #address-cells = <1>; : Number of address cells in child - nodes. - - #size-cells = <0>; : Number of size cells in child nodes. - - child nodes : Nodes to describe busses off the I2C - master. - -Child node required properties: - - reg = < port number > : The port number on the I2C master. - -Child node optional properties: - - child nodes : Nodes to describe devices on the I2C - bus. - -Examples: - - i2c at 1800 { - compatible = "ibm,i2c-fsi"; - reg = < 0x1800 0x400 >; - #address-cells = <1>; - #size-cells = <0>; - - i2c-bus at 0 { - reg = <0>; - }; - - i2c-bus at 1 { - reg = <1>; - - eeprom at 50 { - compatible = "vendor,dev-name"; - }; - }; - };
Documentation/devicetree/bindings/i2c/ibm,i2c-fsi.yaml new file +59 -0
59 lines not on this page · raw message
Signature · 1 line
2.39.3
kernel test robot
build botRe: [PATCH v3 10/14] dt-bindings: i2c: i2c-fsi: Switch to yaml format
kernel test robot noticed the following build warnings:
Hi Eddie,
kernel test robot noticed the following build warnings:
[auto build test WARNING on next-20240424]
[also build test WARNING on linus/master v6.9-rc5]
[cannot apply to robh/for-next broonie-spi/for-next andi-shyti/i2c/i2c-host v6.9-rc5 v6.9-rc4 v6.9-rc3] [If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Eddie-James/dt-bindings-spi-Document-the-IBM-Power-SPI-controller/20240426-054336 base: next-20240424 patch link: https://lore.kernel.org/r/20240425213701.655540-11-eajames%40linux.ibm.com patch subject: [PATCH v3 10/14] dt-bindings: i2c: i2c-fsi: Switch to yaml format reproduce: (https://download.01.org/0day-ci/archive/20240426/202404260842.hNo9YEmT-lkp at intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]>
| Closes: https://lore.kernel.org/oe-kbuild-all/202404260842.hNo9YEmT-lkp at intel.com/
All warnings (new ones prefixed by >>):
Warning: Documentation/devicetree/bindings/power/wakeup-source.txt references a file that doesn't exist: Documentation/devicetree/bindings/input/qcom,pm8xxx-keypad.txt
Warning: Documentation/devicetree/bindings/regulator/siliconmitus,sm5703-regulator.yaml references a file that doesn't exist: Documentation/devicetree/bindings/mfd/siliconmitus,sm5703.yaml
Warning: MAINTAINERS references a file that doesn't exist: Documentation/devicetree/bindings/reserved-memory/qcom
Warning: MAINTAINERS references a file that doesn't exist: Documentation/devicetree/bindings/display/exynos/
>> Warning: MAINTAINERS references a file that doesn't exist: Documentation/devicetree/bindings/i2c/i2c-fsi.txt
Using alabaster theme
Signature · 2 lines
0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
Re: [PATCH v3 10/14] dt-bindings: i2c: i2c-fsi: Switch to yaml format
In reply to Eddie JamesQuoted 3 lines · Eddie James
Switch to yaml for the FSI-attached I2C controller.
Signed-off-by Eddie James <[email protected]>
Please use scripts/get_maintainers.pl to get a list of necessary people and lists to CC (and consider --no-git-fallback argument). It might happen, that command when run on an older kernel, gives you outdated entries. Therefore please be sure you base your patches on recent Linux kernel.
Tools like b4 or scripts/get_maintainer.pl provide you proper list of people, so fix your workflow. Tools might also fail if you work on some ancient tree (don't, instead use mainline), work on fork of kernel (don't, instead use mainline) or you ignore some maintainers (really don't). Just use b4 and everything should be fine, although remember about b4 prep --auto-to-cc if you added new patches to the patchset.
Quoted 21 lines
--- .../devicetree/bindings/i2c/i2c-fsi.txt | 40 ------------- .../devicetree/bindings/i2c/ibm,i2c-fsi.yaml | 59 +++++++++++++++++++ 2 files changed, 59 insertions(+), 40 deletions(-) delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-fsi.txt create mode 100644 Documentation/devicetree/bindings/i2c/ibm,i2c-fsi.yaml(quoted diff) +0
-1- };Documentation/devicetree/bindings/i2c/ibm,i2c-fsi.yaml new file +5
-0@@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/ibm,i2c-fsi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#
Documentation/devicetree/bindings/i2c/ibm,i2c-fsi.yaml line 15
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Documentation/devicetree/bindings/i2c/ibm,i2c-fsi.yaml new file +10
-0+ +title: IBM FSI-attached I2C controller + +maintainers: + - Eddie James <[email protected]> + +description: + This I2C controller is an FSI CFAM engine, providing access to a number of + I2C busses. Therefore this node will always be a child of an FSI CFAM node; + see fsi.txt for details on FSI slave and CFAM nodes.
Here and in all other schemas - remove reference to fsi.txt. You are going to drop this file once you convert everything, right?
Quoted 12 lines
Documentation/devicetree/bindings/i2c/ibm,i2c-fsi.yaml new file +12
-0+ +properties: + compatible: + enum: + - ibm,i2c-fsi + + reg: + items: + - description: FSI slave address + +required: + - compatible
Documentation/devicetree/bindings/i2c/ibm,i2c-fsi.yaml line 37
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Documentation/devicetree/bindings/i2c/ibm,i2c-fsi.yaml new file +10
-0+ - reg + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +unevaluatedProperties: false + +examples: + - | + i2c at 1800 {
So no wrapper node is needed. Drop the wrapper node in previous patchset where you introduced one with warning.
Best regards,
Krzysztof
Eddie James
maintainerRe: [PATCH v3 10/14] dt-bindings: i2c: i2c-fsi: Switch to yaml format
Quoted 41 lines · Krzysztof Kozlowski
Quoted 3 lines · Eddie James
Switch to yaml for the FSI-attached I2C controller.
Signed-off-by Eddie James <[email protected]>Please use
scripts/get_maintainers.plto get a list of necessary people and lists to CC (and consider --no-git-fallback argument). It might happen, that command when run on an older kernel, gives you outdated entries. Therefore please be sure you base your patches on recent Linux kernel.Tools like b4 or
scripts/get_maintainer.plprovide you proper list of people, so fix your workflow. Tools might also fail if you work on some ancient tree (don't, instead use mainline), work on fork of kernel (don't, instead use mainline) or you ignore some maintainers (really don't). Just use b4 and everything should be fine, although remember aboutb4 prep --auto-to-ccif you added new patches to the patchset.Quoted 24 lines
--- .../devicetree/bindings/i2c/i2c-fsi.txt | 40 ------------- .../devicetree/bindings/i2c/ibm,i2c-fsi.yaml | 59 +++++++++++++++++++ 2 files changed, 59 insertions(+), 40 deletions(-)delete mode 100644
Documentation/devicetree/bindings/i2c/i2c-fsi.txtcreate mode 100644Documentation/devicetree/bindings/i2c/ibm,i2c-fsi.yaml(quoted diff) +0
-1- };Documentation/devicetree/bindings/i2c/ibm,i2c-fsi.yaml new file +9
-0@@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/ibm,i2c-fsi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IBM FSI-attached I2C controller + +maintainers:
Quoted 8 lines
Documentation/devicetree/bindings/i2c/ibm,i2c-fsi.yaml line 15
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Documentation/devicetree/bindings/i2c/ibm,i2c-fsi.yaml new file +6
-0+ - Eddie James <[email protected]> + +description: + This I2C controller is an FSI CFAM engine, providing access to a number of + I2C busses. Therefore this node will always be a child of an FSI CFAM node; + see fsi.txt for details on FSI slave and CFAM nodes.Here and in all other schemas - remove reference to fsi.txt. You are going to drop this file once you convert everything, right?
Good point, yes.
Quoted 17 lines
Quoted 17 lines
Documentation/devicetree/bindings/i2c/ibm,i2c-fsi.yaml new file +16
-0+ +properties: + compatible: + enum: + - ibm,i2c-fsi + + reg: + items: + - description: FSI slave address + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml#
Quoted 8 lines
Documentation/devicetree/bindings/i2c/ibm,i2c-fsi.yaml line 37
Quoted 6 lines
Documentation/devicetree/bindings/i2c/ibm,i2c-fsi.yaml new file +6
-0+ +unevaluatedProperties: false + +examples: + - | + i2c at 1800 {So no wrapper node is needed. Drop the wrapper node in previous patchset where you introduced one with warning.
The other one is actually a child node of the equivalent spi controller, so it does need some sort of wrapper (address-cells and size-cells don't match).
Quoted 5 lines
Best regards,
Krzysztof
Eddie James
maintainerPATCH v3 11/14 dt-bindings: arm: aspeed: add IBM P11 BMC boards
In reply to Eddie JamesDocument two new AST2600 BMC boards for IBM P11 systems.
--- Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml | 2 ++ 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml +2 -0
@@ -86,7 +86,9 @@ properties: - facebook,harma-bmc - facebook,minerva-cmc - facebook,yosemite4-bmc + - ibm,blueridge-bmc - ibm,everest-bmc + - ibm,fuji-bmc - ibm,rainier-bmc - ibm,system1-bmc - ibm,tacoma-bmc
Signature · 1 line
2.39.3
Eddie James
maintainerPATCH v3 12/14 ARM: dts: aspeed: Add IBM P11 FSI devices
In reply to Eddie JamesAdd the P11 FSI device tree for use in upcoming BMC systems. Unlike P10, there is no system with only two processors, so only the quad processor FSI layout is necessary.
--- .../arm/boot/dts/aspeed/ibm-power11-quad.dtsi | 1696 +++++++++++++++++ 1 file changed, 1696 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi new file +1696 -0
@@ -0,0 +1,1696 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright 2024 IBM Corp. + +&fsim0 { + status = "okay"; + + #address-cells = <2>; + #size-cells = <0>; + + cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom at 1000 { + compatible = "ibm,fsi2pib"; + reg = <0x1000 0x400>; + }; + + i2c at 1800 { + compatible = "ibm,i2c-fsi"; + reg = <0x1800 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam0_i2c0: i2c-bus at 0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; /* OMI01 */ + }; + + cfam0_i2c1: i2c-bus at 1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; /* OMI23 */ + }; + + cfam0_i2c10: i2c-bus at a { + #address-cells = <1>; + #size-cells = <0>; + reg = <10>; /* OP3A */ + }; + + cfam0_i2c11: i2c-bus at b { + #address-cells = <1>; + #size-cells = <0>; + reg = <11>; /* OP3B */ + }; + + cfam0_i2c12: i2c-bus at c { + #address-cells = <1>; + #size-cells = <0>; + reg = <12>; /* OP4A */ + }; + + cfam0_i2c13: i2c-bus at d { + #address-cells = <1>; + #size-cells = <0>; + reg = <13>; /* OP4B */ + }; + + cfam0_i2c14: i2c-bus at e { + #address-cells = <1>; + #size-cells = <0>; + reg = <14>; /* OP5A */ + }; + + cfam0_i2c15: i2c-bus at f { + #address-cells = <1>; + #size-cells = <0>; + reg = <15>; /* OP5B */ + }; + }; + + fsi2spi at 1c00 { + compatible = "ibm,fsi2spi"; + reg = <0x1c00 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam0_spi0: spi at 0 { + compatible = "ibm,p10-spi"; + reg = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom at 0 { + compatible = "atmel,at25"; + reg = <0>; + size = <0x80000>; + address-width = <24>; + pagesize = <256>; + spi-max-frequency = <1000000>; + }; + }; + + cfam0_spi1: spi at 20 { + compatible = "ibm,p10-spi"; + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom at 0 { + compatible = "atmel,at25"; + reg = <0>; + size = <0x80000>; + address-width = <24>; + pagesize = <256>; + spi-max-frequency = <1000000>; + }; + }; + + cfam0_spi2: spi at 40 { + compatible = "ibm,p10-spi"; + reg = <0x40>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom at 0 { + compatible = "atmel,at25"; + reg = <0>; + size = <0x80000>; + address-width = <24>; + pagesize = <256>; + spi-max-frequency = <1000000>; + }; + }; + + cfam0_spi3: spi at 60 { + compatible = "ibm,p10-spi"; + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom at 0 { + compatible = "atmel,at25"; + reg = <0>; + size = <0x80000>; + address-width = <24>; + pagesize = <256>; + spi-max-frequency = <1000000>; + }; + }; + }; + + sbefifo at 2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + fsi_occ0: occ { + compatible = "ibm,p10-occ"; + + occ-hwmon { + compatible = "ibm,p10-occ-hwmon"; + ibm,no-poll-on-init; + }; + }; + }; + + fsi_hub0: hub at 3400 { + compatible = "ibm,hub-fsi-controller"; + reg = <0x3400 0x400>; + #address-cells = <2>; + #size-cells = <0>; + }; + }; +}; + +&fsi_hub0 { + cfam at 1,0 { + reg = <1 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <1>; + + scom at 1000 { + compatible = "ibm,fsi2pib"; + reg = <0x1000 0x400>; + }; + + i2c at 1800 { + compatible = "ibm,i2c-fsi"; + reg = <0x1800 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam1_i2c2: i2c-bus at 2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; /* OMI45 */ + }; + + cfam1_i2c3: i2c-bus at 3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; /* OMI67 */ + }; + + cfam1_i2c10: i2c-bus at a { + #address-cells = <1>; + #size-cells = <0>; + reg = <10>; /* OP3A */ + }; + + cfam1_i2c11: i2c-bus at b { + #address-cells = <1>; + #size-cells = <0>; + reg = <11>; /* OP3B */ + }; + + cfam1_i2c14: i2c-bus at e { + #address-cells = <1>; + #size-cells = <0>; + reg = <14>; /* OP5A */ + }; + + cfam1_i2c15: i2c-bus at f { + #address-cells = <1>; + #size-cells = <0>; + reg = <15>; /* OP5B */ + }; + + cfam1_i2c16: i2c-bus at 10 { + #address-cells = <1>; + #size-cells = <0>; + reg = <16>; /* OP6A */ + }; + + cfam1_i2c17: i2c-bus at 11 { + #address-cells = <1>; + #size-cells = <0>; + reg = <17>; /* OP6B */ + }; + }; + + fsi2spi at 1c00 { + compatible = "ibm,fsi2spi"; + reg = <0x1c00 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam1_spi0: spi at 0 { + compatible = "ibm,p10-spi"; + reg = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom at 0 { + compatible = "atmel,at25"; + reg = <0>; + size = <0x80000>; + address-width = <24>; + pagesize = <256>; + spi-max-frequency = <1000000>; + }; + }; + + cfam1_spi1: spi at 20 { + compatible = "ibm,p10-spi"; + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom at 0 { + compatible = "atmel,at25"; + reg = <0>; + size = <0x80000>; + address-width = <24>; + pagesize = <256>; + spi-max-frequency = <1000000>; + }; + }; + + cfam1_spi2: spi at 40 { + compatible = "ibm,p10-spi"; + reg = <0x40>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom at 0 { + compatible = "atmel,at25"; + reg = <0>; + size = <0x80000>; + address-width = <24>; + pagesize = <256>; + spi-max-frequency = <1000000>; + }; + }; + + cfam1_spi3: spi at 60 { + compatible = "ibm,p10-spi"; + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom at 0 { + compatible = "atmel,at25"; + reg = <0>; + size = <0x80000>; + address-width = <24>; + pagesize = <256>; + spi-max-frequency = <1000000>; + }; + }; + }; + + sbefifo at 2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + fsi_occ1: occ { + compatible = "ibm,p10-occ"; + + occ-hwmon { + compatible = "ibm,p10-occ-hwmon"; + ibm,no-poll-on-init; + }; + }; + }; + + fsi_hub1: hub at 3400 { + compatible = "ibm,hub-fsi-controller"; + reg = <0x3400 0x400>; + #address-cells = <2>; + #size-cells = <0>; + + no-scan-on-init; + }; + }; + + cfam at 2,0 { + reg = <2 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <2>; + + scom at 1000 { + compatible = "ibm,fsi2pib"; + reg = <0x1000 0x400>; + }; + + i2c at 1800 { + compatible = "ibm,i2c-fsi"; + reg = <0x1800 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam2_i2c0: i2c-bus at 0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; /* OM01 */ + }; + + cfam2_i2c1: i2c-bus at 1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; /* OM23 */ + }; + + cfam2_i2c10: i2c-bus at a { + #address-cells = <1>; + #size-cells = <0>; + reg = <10>; /* OP3A */ + }; + + cfam2_i2c11: i2c-bus at b { + #address-cells = <1>; + #size-cells = <0>; + reg = <11>; /* OP3B */ + }; + + cfam2_i2c12: i2c-bus at c { + #address-cells = <1>; + #size-cells = <0>; + reg = <12>; /* OP4A */ + }; + + cfam2_i2c13: i2c-bus at d { + #address-cells = <1>; + #size-cells = <0>; + reg = <13>; /* OP4B */ + }; + + cfam2_i2c14: i2c-bus at e { + #address-cells = <1>; + #size-cells = <0>; + reg = <14>; /* OP5A */ + }; + + cfam2_i2c15: i2c-bus at f { + #address-cells = <1>; + #size-cells = <0>; + reg = <15>; /* OP5B */ + }; + }; + + fsi2spi at 1c00 { + compatible = "ibm,fsi2spi"; + reg = <0x1c00 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam2_spi0: spi at 0 { + compatible = "ibm,p10-spi"; + reg = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom at 0 { + compatible = "atmel,at25"; + reg = <0>; + size = <0x80000>; + address-width = <24>; + pagesize = <256>; + spi-max-frequency = <1000000>; + }; + }; + + cfam2_spi1: spi at 20 { + compatible = "ibm,p10-spi"; + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom at 0 { + compatible = "atmel,at25"; + reg = <0>; + size = <0x80000>; + address-width = <24>; + pagesize = <256>; + spi-max-frequency = <1000000>; + }; + }; + + cfam2_spi2: spi at 40 { + compatible = "ibm,p10-spi"; + reg = <0x40>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom at 0 { + compatible = "atmel,at25"; + reg = <0>; + size = <0x80000>; + address-width = <24>; + pagesize = <256>; + spi-max-frequency = <1000000>; + }; + }; + + cfam2_spi3: spi at 60 { + compatible = "ibm,p10-spi"; + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom at 0 { + compatible = "atmel,at25"; + reg = <0>; + size = <0x80000>; + address-width = <24>; + pagesize = <256>; + spi-max-frequency = <1000000>; + }; + }; + }; + + sbefifo at 2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + fsi_occ2: occ { + compatible = "ibm,p10-occ"; + + occ-hwmon { + compatible = "ibm,p10-occ-hwmon"; + ibm,no-poll-on-init; + }; + }; + }; + + fsi_hub2: hub at 3400 { + compatible = "ibm,hub-fsi-controller"; + reg = <0x3400 0x400>; + #address-cells = <2>; + #size-cells = <0>; + + no-scan-on-init; + }; + }; + + cfam at 3,0 { + reg = <3 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <3>; + + scom at 1000 { + compatible = "ibm,fsi2pib"; + reg = <0x1000 0x400>; + }; + + i2c at 1800 { + compatible = "ibm,i2c-fsi"; + reg = <0x1800 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam3_i2c2: i2c-bus at 2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; /* OM45 */ + }; + + cfam3_i2c3: i2c-bus at 3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; /* OM67 */ + }; + + cfam3_i2c10: i2c-bus at a { + #address-cells = <1>; + #size-cells = <0>; + reg = <10>; /* OP3A */ + }; + + cfam3_i2c11: i2c-bus at b { + #address-cells = <1>; + #size-cells = <0>; + reg = <11>; /* OP3B */ + }; + + cfam3_i2c14: i2c-bus at e { + #address-cells = <1>; + #size-cells = <0>; + reg = <14>; /* OP5A */ + }; + + cfam3_i2c15: i2c-bus at f { + #address-cells = <1>; + #size-cells = <0>; + reg = <15>; /* OP5B */ + }; + + cfam3_i2c16: i2c-bus at 10 { + #address-cells = <1>; + #size-cells = <0>; + reg = <16>; /* OP6A */ + }; + + cfam3_i2c17: i2c-bus at 11 { + #address-cells = <1>; + #size-cells = <0>; + reg = <17>; /* OP6B */ + }; + }; + + fsi2spi at 1c00 { + compatible = "ibm,fsi2spi"; + reg = <0x1c00 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam3_spi0: spi at 0 { + compatible = "ibm,p10-spi"; + reg = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom at 0 { + compatible = "atmel,at25"; + reg = <0>; + size = <0x80000>; + address-width = <24>; + pagesize = <256>; + spi-max-frequency = <1000000>; + }; + }; + + cfam3_spi1: spi at 20 { + compatible = "ibm,p10-spi"; + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom at 0 { + compatible = "atmel,at25"; + reg = <0>; + size = <0x80000>; + address-width = <24>; + pagesize = <256>; + spi-max-frequency = <1000000>; + }; + }; + + cfam3_spi2: spi at 40 { + compatible = "ibm,p10-spi"; + reg = <0x40>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom at 0 { + compatible = "atmel,at25"; + reg = <0>; + size = <0x80000>; + address-width = <24>; + pagesize = <256>; + spi-max-frequency = <1000000>; + }; + }; + + cfam3_spi3: spi at 60 { + compatible = "ibm,p10-spi"; + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom at 0 { + compatible = "atmel,at25"; + reg = <0>; + size = <0x80000>; + address-width = <24>; + pagesize = <256>; + spi-max-frequency = <1000000>; + }; + }; + }; + + sbefifo at 2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + fsi_occ3: occ { + compatible = "ibm,p10-occ"; + + occ-hwmon { + compatible = "ibm,p10-occ-hwmon"; + ibm,no-poll-on-init; + }; + }; + }; + + fsi_hub3: hub at 3400 { + compatible = "ibm,hub-fsi-controller"; + reg = <0x3400 0x400>; + #address-cells = <2>; + #size-cells = <0>; + + no-scan-on-init; + }; + }; +}; + +&cfam0_i2c0 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom100: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo100: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam0_i2c1 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom101: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo101: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam0_i2c10 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom110: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo110: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam0_i2c11 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom111: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo111: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam0_i2c12 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom112: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo112: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam0_i2c13 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom113: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo113: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam0_i2c14 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom114: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo114: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam0_i2c15 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom115: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo115: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam1_i2c2 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom202: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo202: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam1_i2c3 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom203: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo203: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam1_i2c10 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom210: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo210: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam1_i2c11 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom211: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo211: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam1_i2c14 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom214: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo214: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam1_i2c15 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom215: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo215: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam1_i2c16 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom216: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo216: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam1_i2c17 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom217: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo217: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam2_i2c0 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom300: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo300: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam2_i2c1 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom301: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo301: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam2_i2c10 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom310: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo310: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam2_i2c11 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom311: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo311: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam2_i2c12 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom312: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo312: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam2_i2c13 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom313: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo313: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam2_i2c14 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom314: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo314: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam2_i2c15 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom315: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo315: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam3_i2c2 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom402: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo402: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam3_i2c3 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom403: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo403: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam3_i2c10 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom410: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo410: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam3_i2c11 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom411: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo411: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam3_i2c14 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom414: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo414: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam3_i2c15 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom415: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo415: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam3_i2c16 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom416: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo416: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam3_i2c17 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom417: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo417: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +/* Legacy OCC numbering (to get rid of when userspace is fixed) */ +&fsi_occ0 { + reg = <1>; +}; + +&fsi_occ1 { + reg = <2>; +}; + +&fsi_occ2 { + reg = <3>; +}; + +&fsi_occ3 { + reg = <4>; +}; + +/ { + aliases { + i2c100 = &cfam0_i2c0; + i2c101 = &cfam0_i2c1; + i2c110 = &cfam0_i2c10; + i2c111 = &cfam0_i2c11; + i2c112 = &cfam0_i2c12; + i2c113 = &cfam0_i2c13; + i2c114 = &cfam0_i2c14; + i2c115 = &cfam0_i2c15; + i2c202 = &cfam1_i2c2; + i2c203 = &cfam1_i2c3; + i2c210 = &cfam1_i2c10; + i2c211 = &cfam1_i2c11; + i2c214 = &cfam1_i2c14; + i2c215 = &cfam1_i2c15; + i2c216 = &cfam1_i2c16; + i2c217 = &cfam1_i2c17; + i2c300 = &cfam2_i2c0; + i2c301 = &cfam2_i2c1; + i2c310 = &cfam2_i2c10; + i2c311 = &cfam2_i2c11; + i2c312 = &cfam2_i2c12; + i2c313 = &cfam2_i2c13; + i2c314 = &cfam2_i2c14; + i2c315 = &cfam2_i2c15; + i2c402 = &cfam3_i2c2; + i2c403 = &cfam3_i2c3; + i2c410 = &cfam3_i2c10; + i2c411 = &cfam3_i2c11; + i2c414 = &cfam3_i2c14; + i2c415 = &cfam3_i2c15; + i2c416 = &cfam3_i2c16; + i2c417 = &cfam3_i2c17; + + sbefifo100 = &sbefifo100; + sbefifo101 = &sbefifo101; + sbefifo110 = &sbefifo110; + sbefifo111 = &sbefifo111; + sbefifo112 = &sbefifo112; + sbefifo113 = &sbefifo113; + sbefifo114 = &sbefifo114; + sbefifo115 = &sbefifo115; + sbefifo202 = &sbefifo202; + sbefifo203 = &sbefifo203; + sbefifo210 = &sbefifo210; + sbefifo211 = &sbefifo211; + sbefifo214 = &sbefifo214; + sbefifo215 = &sbefifo215; + sbefifo216 = &sbefifo216; + sbefifo217 = &sbefifo217; + sbefifo300 = &sbefifo300; + sbefifo301 = &sbefifo301; + sbefifo310 = &sbefifo310; + sbefifo311 = &sbefifo311; + sbefifo312 = &sbefifo312; + sbefifo313 = &sbefifo313; + sbefifo314 = &sbefifo314; + sbefifo315 = &sbefifo315; + sbefifo402 = &sbefifo402; + sbefifo403 = &sbefifo403; + sbefifo410 = &sbefifo410; + sbefifo411 = &sbefifo411; + sbefifo414 = &sbefifo414; + sbefifo415 = &sbefifo415; + sbefifo416 = &sbefifo416; + sbefifo417 = &sbefifo417; + + scom100 = &scom100; + scom101 = &scom101; + scom110 = &scom110; + scom111 = &scom111; + scom112 = &scom112; + scom113 = &scom113; + scom114 = &scom114; + scom115 = &scom115; + scom202 = &scom202; + scom203 = &scom203; + scom210 = &scom210; + scom211 = &scom211; + scom214 = &scom214; + scom215 = &scom215; + scom216 = &scom216; + scom217 = &scom217; + scom300 = &scom300; + scom301 = &scom301; + scom310 = &scom310; + scom311 = &scom311; + scom312 = &scom312; + scom313 = &scom313; + scom314 = &scom314; + scom315 = &scom315; + scom402 = &scom402; + scom403 = &scom403; + scom410 = &scom410; + scom411 = &scom411; + scom414 = &scom414; + scom415 = &scom415; + scom416 = &scom416; + scom417 = &scom417; + + spi10 = &cfam0_spi0; + spi11 = &cfam0_spi1; + spi12 = &cfam0_spi2; + spi13 = &cfam0_spi3; + spi20 = &cfam1_spi0; + spi21 = &cfam1_spi1; + spi22 = &cfam1_spi2; + spi23 = &cfam1_spi3; + spi30 = &cfam2_spi0; + spi31 = &cfam2_spi1; + spi32 = &cfam2_spi2; + spi33 = &cfam2_spi3; + spi40 = &cfam3_spi0; + spi41 = &cfam3_spi1; + spi42 = &cfam3_spi2; + spi43 = &cfam3_spi3; + }; +};
Signature · 1 line
2.39.3
Re: [PATCH v3 12/14] ARM: dts: aspeed: Add IBM P11 FSI devices
Quoted 16 lines · Eddie James
Add the P11 FSI device tree for use in upcoming BMC systems. Unlike P10, there is no system with only two processors, so only the quad processor FSI layout is necessary.
Signed-off-by Eddie James <[email protected]>--- .../arm/boot/dts/aspeed/ibm-power11-quad.dtsi | 1696 +++++++++++++++++ 1 file changed, 1696 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsiarch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi new file +0
-0
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi line 4
Quoted 4 lines
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi new file +4
-0@@ -0,0 +1,1696 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright 2024 IBM Corp. + +&fsim0 {
This does not make sense. You do not include any file here, so what do you want to override?
How can you even test this file?
Quoted 29 lines
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi new file +27
-0+ status = "okay"; + + #address-cells = <2>; + #size-cells = <0>; + + cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>; + + +&cfam3_i2c16 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom416: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo416: sbefifo at 2400 {
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi line 1533
Quoted 10 lines
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi new file +10
-0+ compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + +&cfam3_i2c17 {
This looks randomly ordered.
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi line 1578
Quoted 13 lines
+&fsi_occ1 {
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi new file +12
-0+ reg = <2>; +}; + +&fsi_occ2 { + reg = <3>; +}; + +&fsi_occ3 { + reg = <4>; +}; + +/ {
Nope. Root node never goes to end of file. Look at all modern DTS.
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi line 1590
Quoted 12 lines
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi new file +12
-0+ aliases { + i2c100 = &cfam0_i2c0; + i2c101 = &cfam0_i2c1; + i2c110 = &cfam0_i2c10; + i2c111 = &cfam0_i2c11; + i2c112 = &cfam0_i2c12; + i2c113 = &cfam0_i2c13; + i2c114 = &cfam0_i2c14; + i2c115 = &cfam0_i2c15; + i2c202 = &cfam1_i2c2; + i2c203 = &cfam1_i2c3; + i2c210 = &cfam1_i2c10;
Best regards,
Krzysztof
Eddie James
maintainerRe: [PATCH v3 12/14] ARM: dts: aspeed: Add IBM P11 FSI devices
Quoted 24 lines · Krzysztof Kozlowski
Quoted 16 lines · Eddie James
Add the P11 FSI device tree for use in upcoming BMC systems. Unlike P10, there is no system with only two processors, so only the quad processor FSI layout is necessary.
Signed-off-by Eddie James <[email protected]>--- .../arm/boot/dts/aspeed/ibm-power11-quad.dtsi | 1696 +++++++++++++++++ 1 file changed, 1696 insertions(+)create mode 100644
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsiarch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi new file +0
-0arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi line 4
Quoted 4 lines
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi new file +4
-0@@ -0,0 +1,1696 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright 2024 IBM Corp. + +&fsim0 {This does not make sense. You do not include any file here, so what do you want to override?
Quoted 1 line
How can you even test this file?
This is an include file, to be included in the new device tree files in the next two patches. It will be tested as part of those. Andrew requested I split this up, and I have to add this one first, even though nothing is referencing it yet. The same model is used for the P10 FSI devices.
Quoted 32 lines
Quoted 32 lines
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi new file +30
-0+ status = "okay"; + + #address-cells = <2>; + #size-cells = <0>; + + cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>; + + +&cfam3_i2c16 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom416: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo416: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>;
Quoted 8 lines
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi line 1533
Quoted 7 lines
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi new file +7
-0+ #size-cells = <0>; + }; + }; + }; +}; + +&cfam3_i2c17 {This looks randomly ordered.
Not sure what you mean. Everything is sequentially ordered?
Quoted 16 lines
Quoted 5 lines
+&fsi_occ1 {
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi new file +2
-0+ reg = <2>; +};arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi line 1578
Quoted 10 lines
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi new file +10
-0+ +&fsi_occ2 { + reg = <3>; +}; + +&fsi_occ3 { + reg = <4>; +}; + +/ {Nope. Root node never goes to end of file. Look at all modern DTS.
Ack.
Quoted 18 lines
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi line 1590
Quoted 13 lines
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi new file +12
-0+ aliases { + i2c100 = &cfam0_i2c0; + i2c101 = &cfam0_i2c1; + i2c110 = &cfam0_i2c10; + i2c111 = &cfam0_i2c11; + i2c112 = &cfam0_i2c12; + i2c113 = &cfam0_i2c13; + i2c114 = &cfam0_i2c14; + i2c115 = &cfam0_i2c15; + i2c202 = &cfam1_i2c2; + i2c203 = &cfam1_i2c3; + i2c210 = &cfam1_i2c10;Best regards,
Krzysztof
Re: [PATCH v3 12/14] ARM: dts: aspeed: Add IBM P11 FSI devices
Quoted 78 lines · Eddie James
Quoted 24 lines · Krzysztof Kozlowski
Quoted 16 lines · Eddie James
Add the P11 FSI device tree for use in upcoming BMC systems. Unlike P10, there is no system with only two processors, so only the quad processor FSI layout is necessary.
Signed-off-by Eddie James <[email protected]>--- .../arm/boot/dts/aspeed/ibm-power11-quad.dtsi | 1696 +++++++++++++++++ 1 file changed, 1696 insertions(+)create mode 100644
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsiarch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi new file +0
-0arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi line 4
Quoted 4 lines
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi new file +4
-0@@ -0,0 +1,1696 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright 2024 IBM Corp. + +&fsim0 {This does not make sense. You do not include any file here, so what do you want to override?
Quoted 1 line
How can you even test this file?
This is an include file, to be included in the new device tree files in the next two patches. It will be tested as part of those. Andrew requested I split this up, and I have to add this one first, even though nothing is referencing it yet. The same model is used for the P10 FSI devices.
Quoted 32 lines
Quoted 32 lines
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi new file +30
-0+ status = "okay"; + + #address-cells = <2>; + #size-cells = <0>; + + cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>; + + +&cfam3_i2c16 { + fsi-i2cr at 20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + #address-cells = <2>; + #size-cells = <0>; + + cfam at 0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom416: scom at 1000 { + compatible = "ibm,i2cr-scom"; + reg = <0x1000 0x400>; + }; + + sbefifo416: sbefifo at 2400 { + compatible = "ibm,odyssey-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>;Quoted 8 lines
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi line 1533
Quoted 7 lines
arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi new file +7
-0+ #size-cells = <0>; + }; + }; + }; +}; + +&cfam3_i2c17 {This looks randomly ordered.
Quoted 1 line
Not sure what you mean. Everything is sequentially ordered?
So what is the order for all Aspeed DTS? Is it sequential like in DTSI? What does it even mean sequential? There are two preferred orderings, as expressed in DTS coding style.
Best regards,
Krzysztof
Eddie James
maintainerPATCH v3 13/14 ARM: dts: aspeed: Add IBM P11 Blueridge BMC system
In reply to Eddie JamesAdd the device tree for the new BMC system. The Blueridge is a P11 system with four processors.
--- .../dts/aspeed/aspeed-bmc-ibm-blueridge.dts | 1711 +++++++++++++++++ 1 file changed, 1711 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +1711 -0
@@ -0,0 +1,1711 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright 2024 IBM Corp. +/dts-v1/; + +#include "aspeed-g6.dtsi" +#include <dt-bindings/gpio/aspeed-gpio.h> +#include <dt-bindings/i2c/i2c.h> +#include <dt-bindings/leds/leds-pca955x.h> + +/ { + model = "Blueridge"; + compatible = "ibm,blueridge-bmc", "aspeed,ast2600"; + + aliases { + serial4 = &uart5; + i2c16 = &i2c2mux0; + i2c17 = &i2c2mux1; + i2c18 = &i2c2mux2; + i2c19 = &i2c2mux3; + i2c20 = &i2c4mux0chn0; + i2c21 = &i2c4mux0chn1; + i2c22 = &i2c4mux0chn2; + i2c23 = &i2c5mux0chn0; + i2c24 = &i2c5mux0chn1; + i2c25 = &i2c6mux0chn0; + i2c26 = &i2c6mux0chn1; + i2c27 = &i2c6mux0chn2; + i2c28 = &i2c6mux0chn3; + i2c29 = &i2c11mux0chn0; + i2c30 = &i2c11mux0chn1; + }; + + chosen { + stdout-path = &uart5; + bootargs = "console=ttyS4,115200n8 earlycon"; + }; + + memory at 80000000 { + device_type = "memory"; + reg = <0x80000000 0x40000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + event_log: tcg_event_log at b3d00000 { + no-map; + reg = <0xb3d00000 0x100000>; + }; + + ramoops at b3e00000 { + compatible = "ramoops"; + reg = <0xb3e00000 0x200000>; /* 16 * (4 * 0x8000) */ + record-size = <0x8000>; + console-size = <0x8000>; + ftrace-size = <0x8000>; + pmsg-size = <0x8000>; + max-reason = <3>; /* KMSG_DUMP_EMERG */ + }; + + /* LPC FW cycle bridge region requires natural alignment */ + flash_memory: region at b4000000 { + no-map; + reg = <0xb4000000 0x04000000>; /* 64M */ + }; + + /* VGA region is dictated by hardware strapping */ + vga_memory: region at bf000000 { + no-map; + compatible = "shared-dma-pool"; + reg = <0xbf000000 0x01000000>; /* 16M */ + }; + }; + + i2c2mux: i2cmux { + compatible = "i2c-mux-gpio"; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + i2c-parent = <&i2c2>; + mux-gpios = <&gpio0 ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>, + <&gpio0 ASPEED_GPIO(G, 5) GPIO_ACTIVE_HIGH>; + idle-state = <0>; + + i2c2mux0: i2c at 0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c2mux1: i2c at 1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + i2c2mux2: i2c at 2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + i2c2mux3: i2c at 3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + }; + + leds { + compatible = "gpio-leds"; + + /* BMC Card fault LED at the back */ + led-bmc-ingraham0 { + gpios = <&gpio0 ASPEED_GPIO(H, 1) GPIO_ACTIVE_LOW>; + }; + + /* Enclosure ID LED at the back */ + led-rear-enc-id0 { + gpios = <&gpio0 ASPEED_GPIO(H, 2) GPIO_ACTIVE_LOW>; + }; + + /* Enclosure fault LED at the back */ + led-rear-enc-fault0 { + gpios = <&gpio0 ASPEED_GPIO(H, 3) GPIO_ACTIVE_LOW>; + }; + + /* PCIE slot power LED */ + led-pcieslot-power { + gpios = <&gpio0 ASPEED_GPIO(P, 4) GPIO_ACTIVE_LOW>; + }; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + poll-interval = <1000>; + + event-fan0-presence { + label = "fan0-presence"; + gpios = <&pca0 6 GPIO_ACTIVE_LOW>; + linux,code = <6>; + }; + + event-fan1-presence { + label = "fan1-presence"; + gpios = <&pca0 7 GPIO_ACTIVE_LOW>; + linux,code = <7>; + }; + + event-fan2-presence { + label = "fan2-presence"; + gpios = <&pca0 8 GPIO_ACTIVE_LOW>; + linux,code = <8>; + }; + + event-fan3-presence { + label = "fan3-presence"; + gpios = <&pca0 9 GPIO_ACTIVE_LOW>; + linux,code = <9>; + }; + + event-fan4-presence { + label = "fan4-presence"; + gpios = <&pca0 10 GPIO_ACTIVE_LOW>; + linux,code = <10>; + }; + + event-fan5-presence { + label = "fan5-presence"; + gpios = <&pca0 11 GPIO_ACTIVE_LOW>; + linux,code = <11>; + }; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc1 7>; + }; +}; + +&adc1 { + status = "okay"; + aspeed,int-vref-microvolt = <2500000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default + &pinctrl_adc10_default &pinctrl_adc11_default + &pinctrl_adc12_default &pinctrl_adc13_default + &pinctrl_adc14_default &pinctrl_adc15_default>; +}; + +&ehci1 { + status = "okay"; +}; + +&uhci { + status = "okay"; +}; + +&gpio0 { + gpio-line-names = + /*A0-A7*/ "","","","","","","","", + /*B0-B7*/ "","","","","","","checkstop","", + /*C0-C7*/ "","","","","","","","", + /*D0-D7*/ "","","","","","","","", + /*E0-E7*/ "","","","","","","","", + /*F0-F7*/ "","","rtc-battery-voltage-read-enable","reset-cause-pinhole","","","factory-reset-toggle","", + /*G0-G7*/ "","","","","","","","", + /*H0-H7*/ "","bmc-ingraham0","rear-enc-id0","rear-enc-fault0","","","","", + /*I0-I7*/ "","","","","","","bmc-secure-boot","", + /*J0-J7*/ "","","","","","","","", + /*K0-K7*/ "","","","","","","","", + /*L0-L7*/ "","","","","","","","", + /*M0-M7*/ "","","","","","","","", + /*N0-N7*/ "","","","","","","","", + /*O0-O7*/ "","","","usb-power","","","","", + /*P0-P7*/ "","","","","pcieslot-power","","","", + /*Q0-Q7*/ "cfam-reset","","regulator-standby-faulted","","","","","", + /*R0-R7*/ "bmc-tpm-reset","power-chassis-control","power-chassis-good","","","","","", + /*S0-S7*/ "presence-ps0","presence-ps1","presence-ps2","presence-ps3", + "power-ffs-sync-history","","","", + /*T0-T7*/ "","","","","","","","", + /*U0-U7*/ "","","","","","","","", + /*V0-V7*/ "","","","","","","","", + /*W0-W7*/ "","","","","","","","", + /*X0-X7*/ "","","","","","","","", + /*Y0-Y7*/ "","","","","","","","", + /*Z0-Z7*/ "","","","","","","",""; + + i2c3_mux_oe_n-hog { + gpio-hog; + gpios = <ASPEED_GPIO(G, 6) GPIO_ACTIVE_LOW>; + output-high; + line-name = "I2C3_MUX_OE_N"; + }; + + usb_power-hog { + gpio-hog; + gpios = <ASPEED_GPIO(O, 3) GPIO_ACTIVE_LOW>; + output-high; + }; +}; + +&emmc_controller { + status = "okay"; +}; + +&pinctrl_emmc_default { + bias-disable; +}; + +&emmc { + status = "okay"; + clk-phase-mmc-hs200 = <180>, <180>; +}; + +&ibt { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + eeprom at 51 { + compatible = "atmel,24c64"; + reg = <0x51>; + }; + + tca_pres1: tca9554 at 20{ + compatible = "ti,tca9554"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = "", + "RUSSEL_FW_I2C_ENABLE_N", + "RUSSEL_OPPANEL_PRESENCE_N", + "BLYTH_OPPANEL_PRESENCE_N", + "CPU_TPM_CARD_PRESENT_N", + "DASD_BP2_PRESENT_N", + "DASD_BP1_PRESENT_N", + "DASD_BP0_PRESENT_N"; + }; +}; + +&i2c1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; +}; + +&i2c3 { + status = "okay"; + + power-supply at 68 { + compatible = "ibm,cffps"; + reg = <0x68>; + }; + + power-supply at 69 { + compatible = "ibm,cffps"; + reg = <0x69>; + }; + + pca_pres1: pca9552 at 61 { + compatible = "nxp,pca9552"; + reg = <0x61>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = + "SLOT0_PRSNT_EN_RSVD", "SLOT1_PRSNT_EN_RSVD", + "SLOT2_PRSNT_EN_RSVD", "SLOT3_PRSNT_EN_RSVD", + "SLOT4_PRSNT_EN_RSVD", "SLOT0_EXPANDER_PRSNT_N", + "SLOT1_EXPANDER_PRSNT_N", "SLOT2_EXPANDER_PRSNT_N", + "SLOT3_EXPANDER_PRSNT_N", "SLOT4_EXPANDER_PRSNT_N", + "", "", "", "", "", ""; + }; +}; + +&i2c4 { + status = "okay"; + + tmp275 at 48 { + compatible = "ti,tmp275"; + reg = <0x48>; + }; + + tmp275 at 49 { + compatible = "ti,tmp275"; + reg = <0x49>; + }; + + tmp275 at 4a { + compatible = "ti,tmp275"; + reg = <0x4a>; + }; + + i2c-mux at 70 { + compatible = "nxp,pca9546"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + i2c-mux-idle-disconnect; + + i2c4mux0chn0: i2c at 0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + eeprom at 50 { + compatible = "atmel,24c64"; + reg = <0x50>; + }; + + pca9551 at 60 { + compatible = "nxp,pca9551"; + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + led at 0 { + label = "cablecard0-cxp-top"; + reg = <0>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 1 { + label = "cablecard0-cxp-bot"; + reg = <1>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + }; + }; + + i2c4mux0chn1: i2c at 1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + eeprom at 51 { + compatible = "atmel,24c64"; + reg = <0x51>; + }; + }; + + i2c4mux0chn2: i2c at 2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + + eeprom at 52 { + compatible = "atmel,24c64"; + reg = <0x52>; + }; + }; + }; +}; + +&i2c5 { + status = "okay"; + + tmp275 at 48 { + compatible = "ti,tmp275"; + reg = <0x48>; + }; + + tmp275 at 49 { + compatible = "ti,tmp275"; + reg = <0x49>; + }; + + i2c-mux at 70 { + compatible = "nxp,pca9546"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + i2c-mux-idle-disconnect; + + i2c5mux0chn0: i2c at 0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + eeprom at 50 { + compatible = "atmel,24c64"; + reg = <0x50>; + }; + + pca9551 at 60 { + compatible = "nxp,pca9551"; + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + led at 0 { + label = "cablecard3-cxp-top"; + reg = <0>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 1 { + label = "cablecard3-cxp-bot"; + reg = <1>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + }; + }; + + i2c5mux0chn1: i2c at 1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + eeprom at 51 { + compatible = "atmel,24c64"; + reg = <0x51>; + }; + + pca9551 at 61 { + compatible = "nxp,pca9551"; + reg = <0x61>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + led at 0 { + label = "cablecard4-cxp-top"; + reg = <0>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 1 { + label = "cablecard4-cxp-bot"; + reg = <1>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + }; + }; + }; +}; + +&i2c6 { + status = "okay"; + + tmp275 at 48 { + compatible = "ti,tmp275"; + reg = <0x48>; + }; + + tmp275 at 4a { + compatible = "ti,tmp275"; + reg = <0x4a>; + }; + + tmp275 at 4b { + compatible = "ti,tmp275"; + reg = <0x4b>; + }; + + i2c-mux at 70 { + compatible = "nxp,pca9546"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + i2c-mux-idle-disconnect; + + i2c6mux0chn0: i2c at 0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + eeprom at 53 { + compatible = "atmel,24c64"; + reg = <0x53>; + }; + }; + + i2c6mux0chn1: i2c at 1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + eeprom at 52 { + compatible = "atmel,24c64"; + reg = <0x52>; + }; + }; + + i2c6mux0chn2: i2c at 2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + + eeprom at 50 { + compatible = "atmel,24c64"; + reg = <0x50>; + }; + }; + + i2c6mux0chn3: i2c at 3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + + eeprom at 51 { + compatible = "atmel,24c64"; + reg = <0x51>; + }; + }; + }; +}; + +&i2c7 { + multi-master; + status = "okay"; + + pca9552 at 30 { + compatible = "ibm,pca9552"; + reg = <0x30>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + led at 0 { + label = "pcieslot0"; + reg = <0>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 1 { + label = "pcieslot1"; + reg = <1>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 2 { + label = "pcieslot2"; + reg = <2>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 3 { + label = "pcieslot3"; + reg = <3>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 4 { + label = "pcieslot4"; + reg = <4>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 5 { + label = "cpu1"; + reg = <5>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 6 { + label = "cpu-vrm1"; + reg = <6>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 8 { + label = "lcd-russel"; + reg = <8>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + }; + + pca9552 at 31 { + compatible = "ibm,pca9552"; + reg = <0x31>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + led at 0 { + label = "ddimm0"; + reg = <0>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 1 { + label = "ddimm1"; + reg = <1>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 2 { + label = "ddimm2"; + reg = <2>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 3 { + label = "ddimm3"; + reg = <3>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 4 { + label = "ddimm4"; + reg = <4>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 5 { + label = "ddimm5"; + reg = <5>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 6 { + label = "ddimm6"; + reg = <6>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 7 { + label = "ddimm7"; + reg = <7>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 8 { + label = "ddimm8"; + reg = <8>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 9 { + label = "ddimm9"; + reg = <9>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 10 { + label = "ddimm10"; + reg = <10>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 11 { + label = "ddimm11"; + reg = <11>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 12 { + label = "ddimm12"; + reg = <12>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 13 { + label = "ddimm13"; + reg = <13>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 14 { + label = "ddimm14"; + reg = <14>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 15 { + label = "ddimm15"; + reg = <15>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + }; + + pca9552 at 32 { + compatible = "ibm,pca9552"; + reg = <0x32>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + led at 0 { + label = "ddimm16"; + reg = <0>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 1 { + label = "ddimm17"; + reg = <1>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 2 { + label = "ddimm18"; + reg = <2>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 3 { + label = "ddimm19"; + reg = <3>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 4 { + label = "ddimm20"; + reg = <4>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 5 { + label = "ddimm21"; + reg = <5>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 6 { + label = "ddimm22"; + reg = <6>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 7 { + label = "ddimm23"; + reg = <7>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 8 { + label = "ddimm24"; + reg = <8>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 9 { + label = "ddimm25"; + reg = <9>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 10 { + label = "ddimm26"; + reg = <10>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 11 { + label = "ddimm27"; + reg = <11>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 12 { + label = "ddimm28"; + reg = <12>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 13 { + label = "ddimm29"; + reg = <13>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 14 { + label = "ddimm30"; + reg = <14>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 15 { + label = "ddimm31"; + reg = <15>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + }; + + pca9552 at 33 { + compatible = "ibm,pca9552"; + reg = <0x33>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + led at 0 { + label = "planar"; + reg = <0>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 1 { + label = "cpu0"; + reg = <1>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 3 { + label = "dasd-pyramid0"; + reg = <3>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 4 { + label = "dasd-pyramid1"; + reg = <4>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 5 { + label = "dasd-pyramid2"; + reg = <5>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 6 { + label = "cpu0-vrm0"; + reg = <6>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 7 { + label = "rtc-battery"; + reg = <7>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 8 { + label = "base-blyth"; + reg = <8>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 9 { + label = "pcieslot6"; + reg = <9>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 10 { + label = "pcieslot7"; + reg = <10>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 11 { + label = "pcieslot8"; + reg = <11>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 12 { + label = "pcieslot9"; + reg = <12>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 13 { + label = "pcieslot10"; + reg = <13>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 14 { + label = "pcieslot11"; + reg = <14>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 15 { + label = "tpm-wilson"; + reg = <15>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + }; + + si7021-a20 at 40 { + compatible = "silabs,si7020"; + reg = <0x40>; + }; + + tmp275 at 48 { + compatible = "ti,tmp275"; + reg = <0x48>; + }; + + max: max31785 at 52 { + compatible = "maxim,max31785a"; + reg = <0x52>; + }; + + pca9551 at 60 { + compatible = "nxp,pca9551"; + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + led at 0 { + label = "front-sys-id0"; + reg = <0>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 1 { + label = "front-check-log0"; + reg = <1>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 2 { + label = "front-enc-fault1"; + reg = <2>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 3 { + label = "front-sys-pwron0"; + reg = <3>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + }; + + pca0: pca9552 at 61 { + compatible = "nxp,pca9552"; + reg = <0x61>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + led at 0 { + label = "fan0"; + reg = <0>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 1 { + label = "fan1"; + reg = <1>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 2 { + label = "fan2"; + reg = <2>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 3 { + label = "fan3"; + reg = <3>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 4 { + label = "fan4"; + reg = <4>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 5 { + label = "fan5"; + reg = <5>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + }; + + ibm-panel at 62 { + compatible = "ibm,op-panel"; + reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>; + }; + + dps: dps310 at 76 { + compatible = "infineon,dps310"; + reg = <0x76>; + #io-channel-cells = <0>; + }; + + eeprom at 50 { + compatible = "atmel,24c64"; + reg = <0x50>; + }; + + eeprom at 51 { + compatible = "atmel,24c64"; + reg = <0x51>; + }; +}; + +&i2c8 { + status = "okay"; + + ucd90320 at 11 { + compatible = "ti,ucd90320"; + reg = <0x11>; + }; + + rtc at 32 { + compatible = "epson,rx8900"; + reg = <0x32>; + }; + + tmp275 at 48 { + compatible = "ti,tmp275"; + reg = <0x48>; + }; + + tmp275 at 4a { + compatible = "ti,tmp275"; + reg = <0x4a>; + }; + + eeprom at 50 { + compatible = "atmel,24c64"; + reg = <0x50>; + }; + + eeprom at 51 { + compatible = "atmel,24c64"; + reg = <0x51>; + }; + + pca_pres3: pca9552 at 60 { + compatible = "nxp,pca9552"; + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "power-config-full-load", ""; + }; + + pca_pres2: pca9552 at 61 { + compatible = "nxp,pca9552"; + reg = <0x61>; + #address-cells = <1>; + #size-cells = <0>; + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = + "SLOT6_PRSNT_EN_RSVD", "SLOT7_PRSNT_EN_RSVD", + "SLOT8_PRSNT_EN_RSVD", "SLOT9_PRSNT_EN_RSVD", + "SLOT10_PRSNT_EN_RSVD", "SLOT11_PRSNT_EN_RSVD", + "SLOT6_EXPANDER_PRSNT_N", "SLOT7_EXPANDER_PRSNT_N", + "SLOT8_EXPANDER_PRSNT_N", "SLOT9_EXPANDER_PRSNT_N", + "SLOT10_EXPANDER_PRSNT_N", "SLOT11_EXPANDER_PRSNT_N", + "", "", "", ""; + }; + +}; + +&i2c9 { + status = "okay"; + + tmp423a at 4c { + compatible = "ti,tmp423"; + reg = <0x4c>; + }; + + tmp423b at 4d { + compatible = "ti,tmp423"; + reg = <0x4d>; + }; + + eeprom at 50 { + compatible = "atmel,24c128"; + reg = <0x50>; + }; +}; + +&i2c10 { + status = "okay"; + + tmp423a at 4c { + compatible = "ti,tmp423"; + reg = <0x4c>; + }; + + tmp423b at 4d { + compatible = "ti,tmp423"; + reg = <0x4d>; + }; + + eeprom at 50 { + compatible = "atmel,24c128"; + reg = <0x50>; + }; +}; + +&i2c11 { + status = "okay"; + + tmp275 at 48 { + compatible = "ti,tmp275"; + reg = <0x48>; + }; + + tmp275 at 49 { + compatible = "ti,tmp275"; + reg = <0x49>; + }; + + i2c-mux at 70 { + compatible = "nxp,pca9546"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + i2c-mux-idle-disconnect; + + i2c11mux0chn0: i2c at 0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + eeprom at 50 { + compatible = "atmel,24c64"; + reg = <0x50>; + }; + + pca9551 at 60 { + compatible = "nxp,pca9551"; + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + led at 0 { + label = "cablecard10-cxp-top"; + reg = <0>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 1 { + label = "cablecard10-cxp-bot"; + reg = <1>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + }; + }; + + i2c11mux0chn1: i2c at 1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + eeprom at 51 { + compatible = "atmel,24c64"; + reg = <0x51>; + }; + }; + }; +}; + +&i2c12 { + status = "okay"; + + tpm at 2e { + compatible = "nuvoton,npct75x", "tcg,tpm-tis-i2c"; + reg = <0x2e>; + memory-region = <&event_log>; + }; + + eeprom at 50 { + compatible = "atmel,24c64"; + reg = <0x50>; + }; +}; + +&i2c13 { + status = "okay"; + + eeprom at 50 { + compatible = "atmel,24c64"; + reg = <0x50>; + }; + + pca9552 at 60 { + compatible = "nxp,pca9552"; + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + led at 0 { + label = "nvme0"; + reg = <0>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 1 { + label = "nvme1"; + reg = <1>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 2 { + label = "nvme2"; + reg = <2>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 3 { + label = "nvme3"; + reg = <3>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 4 { + label = "nvme4"; + reg = <4>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 5 { + label = "nvme5"; + reg = <5>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 6 { + label = "nvme6"; + reg = <6>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 7 { + label = "nvme7"; + reg = <7>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + }; +}; + +&i2c14 { + status = "okay"; + + eeprom at 50 { + compatible = "atmel,24c64"; + reg = <0x50>; + }; + + pca9552 at 60 { + compatible = "nxp,pca9552"; + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + led at 0 { + label = "nvme8"; + reg = <0>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 1 { + label = "nvme9"; + reg = <1>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 2 { + label = "nvme10"; + reg = <2>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 3 { + label = "nvme11"; + reg = <3>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 4 { + label = "nvme12"; + reg = <4>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 5 { + label = "nvme13"; + reg = <5>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 6 { + label = "nvme14"; + reg = <6>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 7 { + label = "nvme15"; + reg = <7>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + }; +}; + +&i2c15 { + status = "okay"; + + eeprom at 50 { + compatible = "atmel,24c64"; + reg = <0x50>; + }; + + pca9552 at 60 { + compatible = "nxp,pca9552"; + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + led at 0 { + label = "nvme16"; + reg = <0>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 1 { + label = "nvme17"; + reg = <1>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 2 { + label = "nvme18"; + reg = <2>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 3 { + label = "nvme19"; + reg = <3>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 4 { + label = "nvme20"; + reg = <4>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 5 { + label = "nvme21"; + reg = <5>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 6 { + label = "nvme22"; + reg = <6>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 7 { + label = "nvme23"; + reg = <7>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + }; +}; + +&uart2 { + status = "okay"; +}; + +&vuart1 { + status = "okay"; +}; + +&vuart2 { + status = "okay"; +}; + +&lpc_ctrl { + status = "okay"; + memory-region = <&flash_memory>; +}; + +&mac2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii3_default>; + clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>, + <&syscon ASPEED_CLK_MAC3RCLK>; + clock-names = "MACCLK", "RCLK"; + use-ncsi; +}; + +&mac3 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii4_default>; + clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>, + <&syscon ASPEED_CLK_MAC4RCLK>; + clock-names = "MACCLK", "RCLK"; + use-ncsi; +}; + +&wdt1 { + aspeed,reset-type = "none"; + aspeed,external-signal; + aspeed,ext-push-pull; + aspeed,ext-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdtrst1_default>; +}; + +&wdt2 { + status = "okay"; +}; + +&xdma { + status = "okay"; + memory-region = <&vga_memory>; +}; + +&kcs2 { + status = "okay"; + aspeed,lpc-io-reg = <0xca8 0xcac>; +}; + +&kcs3 { + status = "okay"; + aspeed,lpc-io-reg = <0xca2>; + aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>; +}; + +#include "ibm-power11-quad.dtsi"
Signature · 1 line
2.39.3
Re: [PATCH v3 13/14] ARM: dts: aspeed: Add IBM P11 Blueridge BMC system
Quoted 40 lines · Eddie James
Add the device tree for the new BMC system. The Blueridge is a P11 system with four processors.
Signed-off-by Eddie James <[email protected]>--- .../dts/aspeed/aspeed-bmc-ibm-blueridge.dts | 1711 +++++++++++++++++ 1 file changed, 1711 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtsarch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +25
-0@@ -0,0 +1,1711 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright 2024 IBM Corp. +/dts-v1/; + +#include "aspeed-g6.dtsi" +#include <dt-bindings/gpio/aspeed-gpio.h> +#include <dt-bindings/i2c/i2c.h> +#include <dt-bindings/leds/leds-pca955x.h> + +/ { + model = "Blueridge"; + compatible = "ibm,blueridge-bmc", "aspeed,ast2600"; + + aliases { + serial4 = &uart5; + i2c16 = &i2c2mux0; + i2c17 = &i2c2mux1; + i2c18 = &i2c2mux2; + i2c19 = &i2c2mux3; + i2c20 = &i2c4mux0chn0; + i2c21 = &i2c4mux0chn1; + i2c22 = &i2c4mux0chn2; + i2c23 = &i2c5mux0chn0; + i2c24 = &i2c5mux0chn1; + i2c25 = &i2c6mux0chn0;
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 35
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +10
-0+ i2c26 = &i2c6mux0chn1; + i2c27 = &i2c6mux0chn2; + i2c28 = &i2c6mux0chn3; + i2c29 = &i2c11mux0chn0; + i2c30 = &i2c11mux0chn1; + }; + + chosen { + stdout-path = &uart5; + bootargs = "console=ttyS4,115200n8 earlycon";
Drop bootargs. ALWAYS.
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 48
Quoted 13 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +13
-0+ }; + + memory at 80000000 { + device_type = "memory"; + reg = <0x80000000 0x40000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + event_log: tcg_event_log at b3d00000 {
No underscores.
Didn't you already received such basic review?
Quoted 23 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +23
-0+ no-map; + reg = <0xb3d00000 0x100000>; + }; + + ramoops at b3e00000 { + compatible = "ramoops"; + reg = <0xb3e00000 0x200000>; /* 16 * (4 * 0x8000) */ + record-size = <0x8000>; + console-size = <0x8000>; + ftrace-size = <0x8000>; + pmsg-size = <0x8000>; + max-reason = <3>; /* KMSG_DUMP_EMERG */ + }; + + /* LPC FW cycle bridge region requires natural alignment */ + flash_memory: region at b4000000 { + no-map; + reg = <0xb4000000 0x04000000>; /* 64M */ + }; + + /* VGA region is dictated by hardware strapping */ + vga_memory: region at bf000000 { + no-map;
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 81
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +10
-0+ compatible = "shared-dma-pool"; + reg = <0xbf000000 0x01000000>; /* 16M */ + }; + }; + + i2c2mux: i2cmux { + compatible = "i2c-mux-gpio"; + #address-cells = <1>; + #size-cells = <0>; + status = "okay";
??? Drop
Quoted 180 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +180
-0+ + i2c-parent = <&i2c2>; + mux-gpios = <&gpio0 ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>, + <&gpio0 ASPEED_GPIO(G, 5) GPIO_ACTIVE_HIGH>; + idle-state = <0>; + + i2c2mux0: i2c at 0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c2mux1: i2c at 1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + i2c2mux2: i2c at 2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + i2c2mux3: i2c at 3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + }; + + leds { + compatible = "gpio-leds"; + + /* BMC Card fault LED at the back */ + led-bmc-ingraham0 { + gpios = <&gpio0 ASPEED_GPIO(H, 1) GPIO_ACTIVE_LOW>; + }; + + /* Enclosure ID LED at the back */ + led-rear-enc-id0 { + gpios = <&gpio0 ASPEED_GPIO(H, 2) GPIO_ACTIVE_LOW>; + }; + + /* Enclosure fault LED at the back */ + led-rear-enc-fault0 { + gpios = <&gpio0 ASPEED_GPIO(H, 3) GPIO_ACTIVE_LOW>; + }; + + /* PCIE slot power LED */ + led-pcieslot-power { + gpios = <&gpio0 ASPEED_GPIO(P, 4) GPIO_ACTIVE_LOW>; + }; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + poll-interval = <1000>; + + event-fan0-presence { + label = "fan0-presence"; + gpios = <&pca0 6 GPIO_ACTIVE_LOW>; + linux,code = <6>; + }; + + event-fan1-presence { + label = "fan1-presence"; + gpios = <&pca0 7 GPIO_ACTIVE_LOW>; + linux,code = <7>; + }; + + event-fan2-presence { + label = "fan2-presence"; + gpios = <&pca0 8 GPIO_ACTIVE_LOW>; + linux,code = <8>; + }; + + event-fan3-presence { + label = "fan3-presence"; + gpios = <&pca0 9 GPIO_ACTIVE_LOW>; + linux,code = <9>; + }; + + event-fan4-presence { + label = "fan4-presence"; + gpios = <&pca0 10 GPIO_ACTIVE_LOW>; + linux,code = <10>; + }; + + event-fan5-presence { + label = "fan5-presence"; + gpios = <&pca0 11 GPIO_ACTIVE_LOW>; + linux,code = <11>; + }; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc1 7>; + }; +}; + +&adc1 { + status = "okay"; + aspeed,int-vref-microvolt = <2500000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default + &pinctrl_adc10_default &pinctrl_adc11_default + &pinctrl_adc12_default &pinctrl_adc13_default + &pinctrl_adc14_default &pinctrl_adc15_default>; +}; + +&ehci1 { + status = "okay"; +}; + +&uhci { + status = "okay"; +}; + +&gpio0 { + gpio-line-names = + /*A0-A7*/ "","","","","","","","", + /*B0-B7*/ "","","","","","","checkstop","", + /*C0-C7*/ "","","","","","","","", + /*D0-D7*/ "","","","","","","","", + /*E0-E7*/ "","","","","","","","", + /*F0-F7*/ "","","rtc-battery-voltage-read-enable","reset-cause-pinhole","","","factory-reset-toggle","", + /*G0-G7*/ "","","","","","","","", + /*H0-H7*/ "","bmc-ingraham0","rear-enc-id0","rear-enc-fault0","","","","", + /*I0-I7*/ "","","","","","","bmc-secure-boot","", + /*J0-J7*/ "","","","","","","","", + /*K0-K7*/ "","","","","","","","", + /*L0-L7*/ "","","","","","","","", + /*M0-M7*/ "","","","","","","","", + /*N0-N7*/ "","","","","","","","", + /*O0-O7*/ "","","","usb-power","","","","", + /*P0-P7*/ "","","","","pcieslot-power","","","", + /*Q0-Q7*/ "cfam-reset","","regulator-standby-faulted","","","","","", + /*R0-R7*/ "bmc-tpm-reset","power-chassis-control","power-chassis-good","","","","","", + /*S0-S7*/ "presence-ps0","presence-ps1","presence-ps2","presence-ps3", + "power-ffs-sync-history","","","", + /*T0-T7*/ "","","","","","","","", + /*U0-U7*/ "","","","","","","","", + /*V0-V7*/ "","","","","","","","", + /*W0-W7*/ "","","","","","","","", + /*X0-X7*/ "","","","","","","","", + /*Y0-Y7*/ "","","","","","","","", + /*Z0-Z7*/ "","","","","","","",""; + + i2c3_mux_oe_n-hog { + gpio-hog; + gpios = <ASPEED_GPIO(G, 6) GPIO_ACTIVE_LOW>; + output-high; + line-name = "I2C3_MUX_OE_N"; + }; + + usb_power-hog { + gpio-hog; + gpios = <ASPEED_GPIO(O, 3) GPIO_ACTIVE_LOW>; + output-high; + }; +}; + +&emmc_controller { + status = "okay"; +}; + +&pinctrl_emmc_default { + bias-disable; +}; + +&emmc { + status = "okay"; + clk-phase-mmc-hs200 = <180>, <180>; +}; + +&ibt { + status = "okay"; +};
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 271
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +10
-0+ +&i2c0 { + status = "okay"; + + eeprom at 51 { + compatible = "atmel,24c64"; + reg = <0x51>; + }; + + tca_pres1: tca9554 at 20{
Node names should be generic. See also an explanation and list of examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
Also missing space before {
Quoted 28 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +28
-0+ compatible = "ti,tca9554"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = "", + "RUSSEL_FW_I2C_ENABLE_N", + "RUSSEL_OPPANEL_PRESENCE_N", + "BLYTH_OPPANEL_PRESENCE_N", + "CPU_TPM_CARD_PRESENT_N", + "DASD_BP2_PRESENT_N", + "DASD_BP1_PRESENT_N", + "DASD_BP0_PRESENT_N"; + }; +}; + +&i2c1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; +}; + +&i2c3 { + status = "okay"; + + power-supply at 68 {
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 309
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +10
-0+ compatible = "ibm,cffps"; + reg = <0x68>; + }; + + power-supply at 69 { + compatible = "ibm,cffps"; + reg = <0x69>; + }; + + pca_pres1: pca9552 at 61 {
Node names should be generic. See also an explanation and list of examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
Quoted 12 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +12
-0+ compatible = "nxp,pca9552"; + reg = <0x61>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = + "SLOT0_PRSNT_EN_RSVD", "SLOT1_PRSNT_EN_RSVD", + "SLOT2_PRSNT_EN_RSVD", "SLOT3_PRSNT_EN_RSVD", + "SLOT4_PRSNT_EN_RSVD", "SLOT0_EXPANDER_PRSNT_N",
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 331
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +10
-0+ "SLOT1_EXPANDER_PRSNT_N", "SLOT2_EXPANDER_PRSNT_N", + "SLOT3_EXPANDER_PRSNT_N", "SLOT4_EXPANDER_PRSNT_N", + "", "", "", "", "", ""; + }; +}; + +&i2c4 { + status = "okay"; + + tmp275 at 48 {
Node names should be generic. See also an explanation and list of examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 336
Quoted 5 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +5
-0+ compatible = "ti,tmp275"; + reg = <0x48>; + }; + + tmp275 at 49 {
So it's everywhere...
Quoted 5 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +5
-0+ compatible = "ti,tmp275"; + reg = <0x49>; + }; + + tmp275 at 4a {
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 351
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +10
-0+ compatible = "ti,tmp275"; + reg = <0x4a>; + }; + + i2c-mux at 70 { + compatible = "nxp,pca9546"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay";
Why? Drop
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 364
Quoted 13 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +13
-0+ i2c-mux-idle-disconnect; + + i2c4mux0chn0: i2c at 0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + eeprom at 50 { + compatible = "atmel,24c64"; + reg = <0x50>; + }; + + pca9551 at 60 {
Node names should be generic. See also an explanation and list of examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
Quoted 20 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +20
-0+ compatible = "nxp,pca9551"; + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + led at 0 { + label = "cablecard0-cxp-top"; + reg = <0>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 1 { + label = "cablecard0-cxp-bot"; + reg = <1>; + retain-state-shutdown;
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 394
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +10
-0+ default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + }; + }; + + i2c4mux0chn1: i2c at 1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>;
reg is after compatible, which means if there is no compatible, reg is always first. This applies you all your DTS patches. This patchset and future.
Quoted 14 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +14
-0+ + eeprom at 51 { + compatible = "atmel,24c64"; + reg = <0x51>; + }; + }; + + i2c4mux0chn2: i2c at 2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + + eeprom at 52 { + compatible = "atmel,24c64";
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 418
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +10
-0+ reg = <0x52>; + }; + }; + }; +}; + +&i2c5 { + status = "okay"; + + tmp275 at 48 {
Node names should be generic. See also an explanation and list of examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
Quoted 5 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +5
-0+ compatible = "ti,tmp275"; + reg = <0x48>; + }; + + tmp275 at 49 {
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 351
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +10
-0+ compatible = "ti,tmp275"; + reg = <0x49>; + }; + + i2c-mux at 70 { + compatible = "nxp,pca9546"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay";
Drop
Quoted 44 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +44
-0+ i2c-mux-idle-disconnect; + + i2c5mux0chn0: i2c at 0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + eeprom at 50 { + compatible = "atmel,24c64"; + reg = <0x50>; + }; + + pca9551 at 60 { + compatible = "nxp,pca9551"; + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + led at 0 { + label = "cablecard3-cxp-top"; + reg = <0>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 1 { + label = "cablecard3-cxp-bot"; + reg = <1>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + }; + }; + + i2c5mux0chn1: i2c at 1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; +
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 487
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +10
-0+ eeprom at 51 { + compatible = "atmel,24c64"; + reg = <0x51>; + }; + + pca9551 at 61 { + compatible = "nxp,pca9551"; + reg = <0x61>; + #address-cells = <1>; + #size-cells = <0>;
And here you have correct order of properties...
Best regards,
Krzysztof
Eddie James
maintainerRe: [PATCH v3 13/14] ARM: dts: aspeed: Add IBM P11 Blueridge BMC system
Quoted 69 lines · Krzysztof Kozlowski
Quoted 40 lines · Eddie James
Add the device tree for the new BMC system. The Blueridge is a P11 system with four processors.
Signed-off-by Eddie James <[email protected]>--- .../dts/aspeed/aspeed-bmc-ibm-blueridge.dts | 1711 +++++++++++++++++ 1 file changed, 1711 insertions(+)create mode 100644
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtsarch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +25
-0@@ -0,0 +1,1711 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright 2024 IBM Corp. +/dts-v1/; + +#include "aspeed-g6.dtsi" +#include <dt-bindings/gpio/aspeed-gpio.h> +#include <dt-bindings/i2c/i2c.h> +#include <dt-bindings/leds/leds-pca955x.h> + +/ { + model = "Blueridge"; + compatible = "ibm,blueridge-bmc", "aspeed,ast2600"; + + aliases { + serial4 = &uart5; + i2c16 = &i2c2mux0; + i2c17 = &i2c2mux1; + i2c18 = &i2c2mux2; + i2c19 = &i2c2mux3; + i2c20 = &i2c4mux0chn0; + i2c21 = &i2c4mux0chn1; + i2c22 = &i2c4mux0chn2; + i2c23 = &i2c5mux0chn0; + i2c24 = &i2c5mux0chn1; + i2c25 = &i2c6mux0chn0;arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 35
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +10
-0+ i2c26 = &i2c6mux0chn1; + i2c27 = &i2c6mux0chn2; + i2c28 = &i2c6mux0chn3; + i2c29 = &i2c11mux0chn0; + i2c30 = &i2c11mux0chn1; + }; + + chosen { + stdout-path = &uart5; + bootargs = "console=ttyS4,115200n8 earlycon";Drop bootargs. ALWAYS.
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 48
Quoted 13 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +13
-0+ }; + + memory at 80000000 { + device_type = "memory"; + reg = <0x80000000 0x40000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + event_log: tcg_event_log at b3d00000 {No underscores.
Quoted 1 line
Didn't you already received such basic review?
Thanks for your detailed review Krzysztof. These device trees are based off 5 year old device trees that were merged when the rules were much less strict. I will attempt to address all of your comments for these new dts.
Thanks,
Eddie
Quoted 492 lines
Quoted 25 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +23
-0+ no-map; + reg = <0xb3d00000 0x100000>; + }; + + ramoops at b3e00000 { + compatible = "ramoops"; + reg = <0xb3e00000 0x200000>; /* 16 * (4 * 0x8000) */ + record-size = <0x8000>; + console-size = <0x8000>; + ftrace-size = <0x8000>; + pmsg-size = <0x8000>; + max-reason = <3>; /* KMSG_DUMP_EMERG */ + }; + + /* LPC FW cycle bridge region requires natural alignment */ + flash_memory: region at b4000000 { + no-map; + reg = <0xb4000000 0x04000000>; /* 64M */ + }; + + /* VGA region is dictated by hardware strapping */ + vga_memory: region at bf000000 { + no-map;arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 81
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +10
-0+ compatible = "shared-dma-pool"; + reg = <0xbf000000 0x01000000>; /* 16M */ + }; + }; + + i2c2mux: i2cmux { + compatible = "i2c-mux-gpio"; + #address-cells = <1>; + #size-cells = <0>; + status = "okay";??? Drop
Quoted 180 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +180
-0+ + i2c-parent = <&i2c2>; + mux-gpios = <&gpio0 ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>, + <&gpio0 ASPEED_GPIO(G, 5) GPIO_ACTIVE_HIGH>; + idle-state = <0>; + + i2c2mux0: i2c at 0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c2mux1: i2c at 1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + i2c2mux2: i2c at 2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + i2c2mux3: i2c at 3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + }; + + leds { + compatible = "gpio-leds"; + + /* BMC Card fault LED at the back */ + led-bmc-ingraham0 { + gpios = <&gpio0 ASPEED_GPIO(H, 1) GPIO_ACTIVE_LOW>; + }; + + /* Enclosure ID LED at the back */ + led-rear-enc-id0 { + gpios = <&gpio0 ASPEED_GPIO(H, 2) GPIO_ACTIVE_LOW>; + }; + + /* Enclosure fault LED at the back */ + led-rear-enc-fault0 { + gpios = <&gpio0 ASPEED_GPIO(H, 3) GPIO_ACTIVE_LOW>; + }; + + /* PCIE slot power LED */ + led-pcieslot-power { + gpios = <&gpio0 ASPEED_GPIO(P, 4) GPIO_ACTIVE_LOW>; + }; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + poll-interval = <1000>; + + event-fan0-presence { + label = "fan0-presence"; + gpios = <&pca0 6 GPIO_ACTIVE_LOW>; + linux,code = <6>; + }; + + event-fan1-presence { + label = "fan1-presence"; + gpios = <&pca0 7 GPIO_ACTIVE_LOW>; + linux,code = <7>; + }; + + event-fan2-presence { + label = "fan2-presence"; + gpios = <&pca0 8 GPIO_ACTIVE_LOW>; + linux,code = <8>; + }; + + event-fan3-presence { + label = "fan3-presence"; + gpios = <&pca0 9 GPIO_ACTIVE_LOW>; + linux,code = <9>; + }; + + event-fan4-presence { + label = "fan4-presence"; + gpios = <&pca0 10 GPIO_ACTIVE_LOW>; + linux,code = <10>; + }; + + event-fan5-presence { + label = "fan5-presence"; + gpios = <&pca0 11 GPIO_ACTIVE_LOW>; + linux,code = <11>; + }; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc1 7>; + }; +}; + +&adc1 { + status = "okay"; + aspeed,int-vref-microvolt = <2500000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default + &pinctrl_adc10_default &pinctrl_adc11_default + &pinctrl_adc12_default &pinctrl_adc13_default + &pinctrl_adc14_default &pinctrl_adc15_default>; +}; + +&ehci1 { + status = "okay"; +}; + +&uhci { + status = "okay"; +}; + +&gpio0 { + gpio-line-names = + /*A0-A7*/ "","","","","","","","", + /*B0-B7*/ "","","","","","","checkstop","", + /*C0-C7*/ "","","","","","","","", + /*D0-D7*/ "","","","","","","","", + /*E0-E7*/ "","","","","","","","", + /*F0-F7*/ "","","rtc-battery-voltage-read-enable","reset-cause-pinhole","","","factory-reset-toggle","", + /*G0-G7*/ "","","","","","","","", + /*H0-H7*/ "","bmc-ingraham0","rear-enc-id0","rear-enc-fault0","","","","", + /*I0-I7*/ "","","","","","","bmc-secure-boot","", + /*J0-J7*/ "","","","","","","","", + /*K0-K7*/ "","","","","","","","", + /*L0-L7*/ "","","","","","","","", + /*M0-M7*/ "","","","","","","","", + /*N0-N7*/ "","","","","","","","", + /*O0-O7*/ "","","","usb-power","","","","", + /*P0-P7*/ "","","","","pcieslot-power","","","", + /*Q0-Q7*/ "cfam-reset","","regulator-standby-faulted","","","","","", + /*R0-R7*/ "bmc-tpm-reset","power-chassis-control","power-chassis-good","","","","","", + /*S0-S7*/ "presence-ps0","presence-ps1","presence-ps2","presence-ps3", + "power-ffs-sync-history","","","", + /*T0-T7*/ "","","","","","","","", + /*U0-U7*/ "","","","","","","","", + /*V0-V7*/ "","","","","","","","", + /*W0-W7*/ "","","","","","","","", + /*X0-X7*/ "","","","","","","","", + /*Y0-Y7*/ "","","","","","","","", + /*Z0-Z7*/ "","","","","","","",""; + + i2c3_mux_oe_n-hog { + gpio-hog; + gpios = <ASPEED_GPIO(G, 6) GPIO_ACTIVE_LOW>; + output-high; + line-name = "I2C3_MUX_OE_N"; + }; + + usb_power-hog { + gpio-hog; + gpios = <ASPEED_GPIO(O, 3) GPIO_ACTIVE_LOW>; + output-high; + }; +}; + +&emmc_controller { + status = "okay"; +}; + +&pinctrl_emmc_default { + bias-disable; +}; + +&emmc { + status = "okay"; + clk-phase-mmc-hs200 = <180>, <180>; +}; + +&ibt { + status = "okay"; +};arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 271
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +10
-0+ +&i2c0 { + status = "okay"; + + eeprom at 51 { + compatible = "atmel,24c64"; + reg = <0x51>; + }; + + tca_pres1: tca9554 at 20{Node names should be generic. See also an explanation and list of examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendationAlso missing space before {
Quoted 28 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +28
-0+ compatible = "ti,tca9554"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = "", + "RUSSEL_FW_I2C_ENABLE_N", + "RUSSEL_OPPANEL_PRESENCE_N", + "BLYTH_OPPANEL_PRESENCE_N", + "CPU_TPM_CARD_PRESENT_N", + "DASD_BP2_PRESENT_N", + "DASD_BP1_PRESENT_N", + "DASD_BP0_PRESENT_N"; + }; +}; + +&i2c1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; +}; + +&i2c3 { + status = "okay"; + + power-supply at 68 {arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 309
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +10
-0+ compatible = "ibm,cffps"; + reg = <0x68>; + }; + + power-supply at 69 { + compatible = "ibm,cffps"; + reg = <0x69>; + }; + + pca_pres1: pca9552 at 61 {Node names should be generic. See also an explanation and list of examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendationQuoted 12 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +12
-0+ compatible = "nxp,pca9552"; + reg = <0x61>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = + "SLOT0_PRSNT_EN_RSVD", "SLOT1_PRSNT_EN_RSVD", + "SLOT2_PRSNT_EN_RSVD", "SLOT3_PRSNT_EN_RSVD", + "SLOT4_PRSNT_EN_RSVD", "SLOT0_EXPANDER_PRSNT_N",arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 331
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +10
-0+ "SLOT1_EXPANDER_PRSNT_N", "SLOT2_EXPANDER_PRSNT_N", + "SLOT3_EXPANDER_PRSNT_N", "SLOT4_EXPANDER_PRSNT_N", + "", "", "", "", "", ""; + }; +}; + +&i2c4 { + status = "okay"; + + tmp275 at 48 {Node names should be generic. See also an explanation and list of examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendationarch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 336
Quoted 5 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +5
-0+ compatible = "ti,tmp275"; + reg = <0x48>; + }; + + tmp275 at 49 {So it's everywhere...
Quoted 5 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +5
-0+ compatible = "ti,tmp275"; + reg = <0x49>; + }; + + tmp275 at 4a {arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 351
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +10
-0+ compatible = "ti,tmp275"; + reg = <0x4a>; + }; + + i2c-mux at 70 { + compatible = "nxp,pca9546"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay";Why? Drop
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 364
Quoted 13 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +13
-0+ i2c-mux-idle-disconnect; + + i2c4mux0chn0: i2c at 0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + eeprom at 50 { + compatible = "atmel,24c64"; + reg = <0x50>; + }; + + pca9551 at 60 {Node names should be generic. See also an explanation and list of examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendationQuoted 20 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +20
-0+ compatible = "nxp,pca9551"; + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + led at 0 { + label = "cablecard0-cxp-top"; + reg = <0>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 1 { + label = "cablecard0-cxp-bot"; + reg = <1>; + retain-state-shutdown;arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 394
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +10
-0+ default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + }; + }; + + i2c4mux0chn1: i2c at 1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>;reg is after compatible, which means if there is no compatible, reg is always first. This applies you all your DTS patches. This patchset and future.
Quoted 14 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +14
-0+ + eeprom at 51 { + compatible = "atmel,24c64"; + reg = <0x51>; + }; + }; + + i2c4mux0chn2: i2c at 2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + + eeprom at 52 { + compatible = "atmel,24c64";arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 418
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +10
-0+ reg = <0x52>; + }; + }; + }; +}; + +&i2c5 { + status = "okay"; + + tmp275 at 48 {Node names should be generic. See also an explanation and list of examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendationQuoted 5 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +5
-0+ compatible = "ti,tmp275"; + reg = <0x48>; + }; + + tmp275 at 49 {arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 351
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +10
-0+ compatible = "ti,tmp275"; + reg = <0x49>; + }; + + i2c-mux at 70 { + compatible = "nxp,pca9546"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay";Drop
Quoted 44 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +44
-0+ i2c-mux-idle-disconnect; + + i2c5mux0chn0: i2c at 0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + eeprom at 50 { + compatible = "atmel,24c64"; + reg = <0x50>; + }; + + pca9551 at 60 { + compatible = "nxp,pca9551"; + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + + gpio-controller; + #gpio-cells = <2>; + + led at 0 { + label = "cablecard3-cxp-top"; + reg = <0>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + + led at 1 { + label = "cablecard3-cxp-bot"; + reg = <1>; + retain-state-shutdown; + default-state = "keep"; + type = <PCA955X_TYPE_LED>; + }; + }; + }; + + i2c5mux0chn1: i2c at 1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; +arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts line 487
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts new file +10
-0+ eeprom at 51 { + compatible = "atmel,24c64"; + reg = <0x51>; + }; + + pca9551 at 61 { + compatible = "nxp,pca9551"; + reg = <0x61>; + #address-cells = <1>; + #size-cells = <0>;And here you have correct order of properties...
Best regards,
Krzysztof
Eddie James
maintainerPATCH v3 14/14 ARM: dts: aspeed: Add IBM P11 Fuji BMC system
In reply to Eddie JamesAdd the device tree for the new BMC system. The Fuji is a P11 system with eight processors.
--- arch/arm/boot/dts/aspeed/Makefile | 2 + .../boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts | 3984 +++++++++++++++++ 2 files changed, 3986 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts
arch/arm/boot/dts/aspeed/Makefile +2 -0
@@ -33,8 +33,10 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ aspeed-bmc-facebook-yamp.dtb \ aspeed-bmc-facebook-yosemitev2.dtb \ aspeed-bmc-facebook-yosemite4.dtb \ + aspeed-bmc-ibm-blueridge.dtb \ aspeed-bmc-ibm-bonnell.dtb \ aspeed-bmc-ibm-everest.dtb \ + aspeed-bmc-ibm-fuji.dtb \ aspeed-bmc-ibm-rainier.dtb \ aspeed-bmc-ibm-rainier-1s4u.dtb \ aspeed-bmc-ibm-rainier-4u.dtb \
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts new file +3984 -0
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2.39.3
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Re: [PATCH v3 14/14] ARM: dts: aspeed: Add IBM P11 Fuji BMC system
Quoted 191 lines · Eddie James
Add the device tree for the new BMC system. The Fuji is a P11 system with eight processors.
Signed-off-by Eddie James <[email protected]>--- arch/arm/boot/dts/aspeed/Makefile | 2 + .../boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts | 3984 +++++++++++++++++ 2 files changed, 3986 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtsarch/arm/boot/dts/aspeed/Makefile +2
-0@@ -33,8 +33,10 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ aspeed-bmc-facebook-yamp.dtb \ aspeed-bmc-facebook-yosemitev2.dtb \ aspeed-bmc-facebook-yosemite4.dtb \ + aspeed-bmc-ibm-blueridge.dtb \ aspeed-bmc-ibm-bonnell.dtb \ aspeed-bmc-ibm-everest.dtb \ + aspeed-bmc-ibm-fuji.dtb \ aspeed-bmc-ibm-rainier.dtb \ aspeed-bmc-ibm-rainier-1s4u.dtb \ aspeed-bmc-ibm-rainier-4u.dtb \arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts new file +160
-0@@ -0,0 +1,3984 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright 2024 IBM Corp. +/dts-v1/; + +#include "aspeed-g6.dtsi" +#include <dt-bindings/gpio/aspeed-gpio.h> +#include <dt-bindings/i2c/i2c.h> +#include <dt-bindings/leds/leds-pca955x.h> + +/ { + model = "Fuji"; + compatible = "ibm,fuji-bmc", "aspeed,ast2600"; + + aliases { + i2c500 = &cfam4_i2c0; + i2c501 = &cfam4_i2c1; + i2c510 = &cfam4_i2c10; + i2c511 = &cfam4_i2c11; + i2c512 = &cfam4_i2c12; + i2c513 = &cfam4_i2c13; + i2c514 = &cfam4_i2c14; + i2c515 = &cfam4_i2c15; + i2c602 = &cfam5_i2c2; + i2c603 = &cfam5_i2c3; + i2c610 = &cfam5_i2c10; + i2c611 = &cfam5_i2c11; + i2c614 = &cfam5_i2c14; + i2c615 = &cfam5_i2c15; + i2c616 = &cfam5_i2c16; + i2c617 = &cfam5_i2c17; + i2c700 = &cfam6_i2c0; + i2c701 = &cfam6_i2c1; + i2c710 = &cfam6_i2c10; + i2c711 = &cfam6_i2c11; + i2c712 = &cfam6_i2c12; + i2c713 = &cfam6_i2c13; + i2c714 = &cfam6_i2c14; + i2c715 = &cfam6_i2c15; + i2c802 = &cfam7_i2c2; + i2c803 = &cfam7_i2c3; + i2c810 = &cfam7_i2c10; + i2c811 = &cfam7_i2c11; + i2c814 = &cfam7_i2c14; + i2c815 = &cfam7_i2c15; + i2c816 = &cfam7_i2c16; + i2c817 = &cfam7_i2c17; + + i2c16 = &i2c4mux0chn0; + i2c17 = &i2c4mux0chn1; + i2c18 = &i2c4mux0chn2; + i2c19 = &i2c5mux0chn0; + i2c20 = &i2c5mux0chn1; + i2c21 = &i2c5mux0chn2; + i2c22 = &i2c5mux0chn3; + i2c23 = &i2c6mux0chn0; + i2c24 = &i2c6mux0chn1; + i2c25 = &i2c6mux0chn2; + i2c26 = &i2c6mux0chn3; + i2c27 = &i2c14mux0chn0; + i2c28 = &i2c14mux0chn1; + i2c29 = &i2c14mux0chn2; + i2c30 = &i2c14mux0chn3; + i2c31 = &i2c14mux1chn0; + i2c32 = &i2c14mux1chn1; + i2c33 = &i2c14mux1chn2; + i2c34 = &i2c14mux1chn3; + i2c35 = &i2c15mux0chn0; + i2c36 = &i2c15mux0chn1; + i2c37 = &i2c15mux0chn2; + i2c38 = &i2c15mux0chn3; + i2c39 = &i2c15mux1chn0; + i2c40 = &i2c15mux1chn1; + i2c41 = &i2c15mux1chn2; + i2c42 = &i2c15mux1chn3; + i2c43 = &i2c15mux2chn0; + i2c44 = &i2c15mux2chn1; + i2c45 = &i2c15mux2chn2; + i2c46 = &i2c15mux2chn3; + i2c47 = &i2c8mux0chn0; + i2c48 = &i2c8mux0chn1; + + serial4 = &uart5; + + sbefifo500 = &sbefifo500; + sbefifo501 = &sbefifo501; + sbefifo510 = &sbefifo510; + sbefifo511 = &sbefifo511; + sbefifo512 = &sbefifo512; + sbefifo513 = &sbefifo513; + sbefifo514 = &sbefifo514; + sbefifo515 = &sbefifo515; + sbefifo602 = &sbefifo602; + sbefifo603 = &sbefifo603; + sbefifo610 = &sbefifo610; + sbefifo611 = &sbefifo611; + sbefifo614 = &sbefifo614; + sbefifo615 = &sbefifo615; + sbefifo616 = &sbefifo616; + sbefifo617 = &sbefifo617; + sbefifo700 = &sbefifo700; + sbefifo701 = &sbefifo701; + sbefifo710 = &sbefifo710; + sbefifo711 = &sbefifo711; + sbefifo712 = &sbefifo712; + sbefifo713 = &sbefifo713; + sbefifo714 = &sbefifo714; + sbefifo715 = &sbefifo715; + sbefifo802 = &sbefifo802; + sbefifo803 = &sbefifo803; + sbefifo810 = &sbefifo810; + sbefifo811 = &sbefifo811; + sbefifo814 = &sbefifo814; + sbefifo815 = &sbefifo815; + sbefifo816 = &sbefifo816; + sbefifo817 = &sbefifo817; + + scom500 = &scom500; + scom501 = &scom501; + scom510 = &scom510; + scom511 = &scom511; + scom512 = &scom512; + scom513 = &scom513; + scom514 = &scom514; + scom515 = &scom515; + scom602 = &scom602; + scom603 = &scom603; + scom610 = &scom610; + scom611 = &scom611; + scom614 = &scom614; + scom615 = &scom615; + scom616 = &scom616; + scom617 = &scom617; + scom700 = &scom700; + scom701 = &scom701; + scom710 = &scom710; + scom711 = &scom711; + scom712 = &scom712; + scom713 = &scom713; + scom714 = &scom714; + scom715 = &scom715; + scom802 = &scom802; + scom803 = &scom803; + scom810 = &scom810; + scom811 = &scom811; + scom814 = &scom814; + scom815 = &scom815; + scom816 = &scom816; + scom817 = &scom817; + + spi50 = &cfam4_spi0; + spi51 = &cfam4_spi1; + spi52 = &cfam4_spi2; + spi53 = &cfam4_spi3; + spi60 = &cfam5_spi0; + spi61 = &cfam5_spi1; + spi62 = &cfam5_spi2; + spi63 = &cfam5_spi3; + spi70 = &cfam6_spi0; + spi71 = &cfam6_spi1; + spi72 = &cfam6_spi2;
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts line 170
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts new file +10
-0+ spi73 = &cfam6_spi3; + spi80 = &cfam7_spi0; + spi81 = &cfam7_spi1; + spi82 = &cfam7_spi2; + spi83 = &cfam7_spi3; + }; + + chosen { + stdout-path = &uart5; + bootargs = "console=ttyS4,115200n8";
Drop bootargs. Everywhere.
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts line 183
Quoted 13 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts new file +13
-0+ }; + + memory at 80000000 { + device_type = "memory"; + reg = <0x80000000 0x40000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + event_log: tcg_event_log at b3d00000 {
Same problem
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts line 185
Quoted 2 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts new file +2
-0+ + usb_power-hog {
No underscores.
Quoted 5 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts new file +5
-0+ gpio-hog; + gpios = <ASPEED_GPIO(O, 3) GPIO_ACTIVE_LOW>; + output-high; + }; +};
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts line 330
Quoted 10 lines
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts new file +10
-0+ +&i2c0 { + status = "okay"; + + eeprom at 51 { + compatible = "atmel,24c64"; + reg = <0x51>; + }; + + pca1: pca9552 at 62 {
All my previous comments apply.
Best regards,
Krzysztof
Rob Herring
maintainerQuoted 57 lines · Eddie James
Add the Blueridge and Fuji BMC systems. Document many missing FSI related properties, and fix existing warnings.
Changes since v2:
- Split up the DTS patches
- Add documentation patchesEddie James (14):
dt-bindings: spi: Document the IBM Power SPI controller
dt-bindings: fsi: fsi2spi: Document SPI controller child nodes
dt-bindings: fsi: Document the FSI2PIB engine
dt-bindings: fsi: p9-occ: Switch to yaml format
dt-bindings: fsi: Document the IBM SBEFIFO engine
dt-bindings: fsi: Document the FSI controller common properties
dt-bindings: fsi: ibm,i2cr-fsi-master: Reference common FSI controller
dt-bindings: fsi: ast2600-fsi-master: Switch to yaml format
dt-bindings: fsi: Document the FSI Hub Controller
dt-bindings: i2c: i2c-fsi: Switch to yaml format
dt-bindings: arm: aspeed: add IBM P11 BMC boards
ARM: dts: aspeed: Add IBM P11 FSI devices
ARM: dts: aspeed: Add IBM P11 Blueridge BMC system
ARM: dts: aspeed: Add IBM P11 Fuji BMC system.../bindings/arm/aspeed/aspeed.yaml | 2 + .../fsi/aspeed,ast2600-fsi-master.yaml | 72 + .../bindings/fsi/fsi-controller.yaml | 65 + .../bindings/fsi/fsi-master-aspeed.txt | 36 - .../devicetree/bindings/fsi/ibm,fsi2pib.yaml | 38 + .../devicetree/bindings/fsi/ibm,fsi2spi.yaml | 11 + .../bindings/fsi/ibm,hub-fsi-controller.yaml | 44 + .../bindings/fsi/ibm,i2cr-fsi-master.yaml | 5 +- .../devicetree/bindings/fsi/ibm,p9-occ.txt | 16 - .../devicetree/bindings/fsi/ibm,p9-occ.yaml | 41 + .../bindings/fsi/ibm,p9-sbefifo.yaml | 50 + .../devicetree/bindings/i2c/i2c-fsi.txt | 40 - .../devicetree/bindings/i2c/ibm,i2c-fsi.yaml | 59 + .../devicetree/bindings/spi/ibm,p10-spi.yaml | 56 + arch/arm/boot/dts/aspeed/Makefile | 2 + .../dts/aspeed/aspeed-bmc-ibm-blueridge.dts | 1711 +++++++ .../boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts | 3984 +++++++++++++++++ .../arm/boot/dts/aspeed/ibm-power11-quad.dtsi | 1696 +++++++ 18 files changed, 7835 insertions(+), 93 deletions(-) create mode 100644 Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml create mode 100644 Documentation/devicetree/bindings/fsi/fsi-controller.yaml delete mode 100644 Documentation/devicetree/bindings/fsi/fsi-master-aspeed.txt create mode 100644 Documentation/devicetree/bindings/fsi/ibm,fsi2pib.yaml create mode 100644 Documentation/devicetree/bindings/fsi/ibm,hub-fsi-controller.yaml delete mode 100644 Documentation/devicetree/bindings/fsi/ibm,p9-occ.txt create mode 100644 Documentation/devicetree/bindings/fsi/ibm,p9-occ.yaml create mode 100644 Documentation/devicetree/bindings/fsi/ibm,p9-sbefifo.yaml delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-fsi.txt create mode 100644 Documentation/devicetree/bindings/i2c/ibm,i2c-fsi.yaml create mode 100644 Documentation/devicetree/bindings/spi/ibm,p10-spi.yaml create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts create mode 100644 arch/arm/boot/dts/aspeed/ibm-power11-quad.dtsi
Quoted 5 lines
--
2.39.3
My bot found new DTB warnings on the .dts files added or changed in this series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings are fixed by another series. Ultimately, it is up to the platform maintainer whether these warnings are acceptable or not. No need to reply unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then make sure dt-schema is up to date:
pip3 install dtschema --upgrade
New warnings running 'make CHECK_DTBS=y aspeed/aspeed-bmc-ibm-blueridge.dtb aspeed/aspeed-bmc-ibm-fuji.dtb' for [email protected]:
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: timer: 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/timer/arm,arch_timer.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /sdram@1e6e0000: failed to match any schema with compatible: ['aspeed,ast2600-sdram-edac', 'syscon']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: timer: 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/timer/arm,arch_timer.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /sdram@1e6e0000: failed to match any schema with compatible: ['aspeed,ast2600-sdram-edac', 'syscon']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: bus@1e600000: compatible: ['aspeed,ast2600-ahbc', 'syscon'] is too long
from schema $id: http://devicetree.org/schemas/bus/aspeed,ast2600-ahbc.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: bus@1e600000: compatible: ['aspeed,ast2600-ahbc', 'syscon'] is too long
from schema $id: http://devicetree.org/schemas/bus/aspeed,ast2600-ahbc.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: ftgmac@1e660000: $nodename:0: 'ftgmac@1e660000' does not match '^ethernet(@.*)?$'
from schema $id: http://devicetree.org/schemas/net/faraday,ftgmac100.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: ftgmac@1e680000: $nodename:0: 'ftgmac@1e680000' does not match '^ethernet(@.*)?$'
from schema $id: http://devicetree.org/schemas/net/faraday,ftgmac100.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: ftgmac@1e670000: $nodename:0: 'ftgmac@1e670000' does not match '^ethernet(@.*)?$'
from schema $id: http://devicetree.org/schemas/net/faraday,ftgmac100.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: ftgmac@1e670000: Unevaluated properties are not allowed ('#address-cells', '#size-cells' were unexpected)
from schema $id: http://devicetree.org/schemas/net/faraday,ftgmac100.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: ftgmac@1e690000: $nodename:0: 'ftgmac@1e690000' does not match '^ethernet(@.*)?$'
from schema $id: http://devicetree.org/schemas/net/faraday,ftgmac100.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: ftgmac@1e690000: Unevaluated properties are not allowed ('#address-cells', '#size-cells' were unexpected)
from schema $id: http://devicetree.org/schemas/net/faraday,ftgmac100.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: ftgmac@1e660000: $nodename:0: 'ftgmac@1e660000' does not match '^ethernet(@.*)?$'
from schema $id: http://devicetree.org/schemas/net/faraday,ftgmac100.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: ftgmac@1e680000: $nodename:0: 'ftgmac@1e680000' does not match '^ethernet(@.*)?$'
from schema $id: http://devicetree.org/schemas/net/faraday,ftgmac100.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: ftgmac@1e670000: $nodename:0: 'ftgmac@1e670000' does not match '^ethernet(@.*)?$'
from schema $id: http://devicetree.org/schemas/net/faraday,ftgmac100.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: ftgmac@1e670000: Unevaluated properties are not allowed ('#address-cells', '#size-cells' were unexpected)
from schema $id: http://devicetree.org/schemas/net/faraday,ftgmac100.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: ftgmac@1e690000: $nodename:0: 'ftgmac@1e690000' does not match '^ethernet(@.*)?$'
from schema $id: http://devicetree.org/schemas/net/faraday,ftgmac100.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: ftgmac@1e690000: Unevaluated properties are not allowed ('#address-cells', '#size-cells' were unexpected)
from schema $id: http://devicetree.org/schemas/net/faraday,ftgmac100.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: syscon@1e6e2000: pinctrl:
'oneOf' conditional failed, one must be fixed:
'aspeed,external-nodes' is a required property
'aspeed,ast2400-pinctrl' was expected
'aspeed,ast2500-pinctrl' was expected
'EMMC' is not one of ['ACPI', 'ADC0', 'ADC1', 'ADC10', 'ADC11', 'ADC12', 'ADC13', 'ADC14', 'ADC15', 'ADC2', 'ADC3', 'ADC4', 'ADC5', 'ADC6', 'ADC7', 'ADC8', 'ADC9', 'BMCINT', 'DDCCLK', 'DDCDAT', 'EXTRST', 'FLACK', 'FLBUSY', 'FLWP', 'GPID', 'GPID0', 'GPID2', 'GPID4', 'GPID6', 'GPIE0', 'GPIE2', 'GPIE4', 'GPIE6', 'I2C10', 'I2C11', 'I2C12', 'I2C13', 'I2C14', 'I2C3', 'I2C4', 'I2C5', 'I2C6', 'I2C7', 'I2C8', 'I2C9', 'LPCPD', 'LPCPME', 'LPCRST', 'LPCSMI', 'MAC1LINK', 'MAC2LINK', 'MDIO1', 'MDIO2', 'NCTS1', 'NCTS2', 'NCTS3', 'NCTS4', 'NDCD1', 'NDCD2', 'NDCD3', 'NDCD4', 'NDSR1', 'NDSR2', 'NDSR3', 'NDSR4', 'NDTR1', 'NDTR2', 'NDTR3', 'NDTR4', 'NDTS4', 'NRI1', 'NRI2', 'NRI3', 'NRI4', 'NRTS1', 'NRTS2', 'NRTS3', 'OSCCLK', 'PWM0', 'PWM1', 'PWM2', 'PWM3', 'PWM4', 'PWM5', 'PWM6', 'PWM7', 'RGMII1', 'RGMII2', 'RMII1', 'RMII2', 'ROM16', 'ROM8', 'ROMCS1', 'ROMCS2', 'ROMCS3', 'ROMCS4', 'RXD1', 'RXD2', 'RXD3', 'RXD4', 'SALT1', 'SALT2', 'SALT3', 'SALT4', 'SD1', 'SD2', 'SGPMCK', 'SGPMI', 'SGPMLD', 'SGPMO', 'SGPSCK', 'SGPSI0', 'SGPSI1', 'SGPSLD', 'SIOONCTRL', 'SIOPBI', 'SIOPBO', 'SIOPWREQ', 'SIOPWRGD', 'SIOS3', 'SIOS5', 'SIOSCI', 'SPI1', 'SPI1DEBUG', 'SPI1PASSTHRU', 'SPICS1', 'TIMER3', 'TIMER4', 'TIMER5', 'TIMER6', 'TIMER7', 'TIMER8', 'TXD1', 'TXD2', 'TXD3', 'TXD4', 'UART6', 'USB11D1', 'USB11H2', 'USB2D1', 'USB2H1', 'USBCKI', 'VGABIOS_ROM', 'VGAHS', 'VGAVS', 'VPI18', 'VPI24', 'VPI30', 'VPO12', 'VPO24', 'WDTRST1', 'WDTRST2']
'EMMC' is not one of ['ACPI', 'ADC0', 'ADC1', 'ADC10', 'ADC11', 'ADC12', 'ADC13', 'ADC14', 'ADC15', 'ADC2', 'ADC3', 'ADC4', 'ADC5', 'ADC6', 'ADC7', 'ADC8', 'ADC9', 'BMCINT', 'DDCCLK', 'DDCDAT', 'ESPI', 'FWSPICS1', 'FWSPICS2', 'GPID0', 'GPID2', 'GPID4', 'GPID6', 'GPIE0', 'GPIE2', 'GPIE4', 'GPIE6', 'I2C10', 'I2C11', 'I2C12', 'I2C13', 'I2C14', 'I2C3', 'I2C4', 'I2C5', 'I2C6', 'I2C7', 'I2C8', 'I2C9', 'LAD0', 'LAD1', 'LAD2', 'LAD3', 'LCLK', 'LFRAME', 'LPCHC', 'LPCPD', 'LPCPLUS', 'LPCPME', 'LPCRST', 'LPCSMI', 'LSIRQ', 'MAC1LINK', 'MAC2LINK', 'MDIO1', 'MDIO2', 'NCTS1', 'NCTS2', 'NCTS3', 'NCTS4', 'NDCD1', 'NDCD2', 'NDCD3', 'NDCD4', 'NDSR1', 'NDSR2', 'NDSR3', 'NDSR4', 'NDTR1', 'NDTR2', 'NDTR3', 'NDTR4', 'NRI1', 'NRI2', 'NRI3', 'NRI4', 'NRTS1', 'NRTS2', 'NRTS3', 'NRTS4', 'OSCCLK', 'PEWAKE', 'PNOR', 'PWM0', 'PWM1', 'PWM2', 'PWM3', 'PWM4', 'PWM5', 'PWM6', 'PWM7', 'RGMII1', 'RGMII2', 'RMII1', 'RMII2', 'RXD1', 'RXD2', 'RXD3', 'RXD4', 'SALT1', 'SALT10', 'SALT11', 'SALT12', 'SALT13', 'SALT14', 'SALT2', 'SALT3', 'SALT4', 'SALT5', 'SALT6', 'SALT7', 'SALT8', 'SALT9', 'SCL1', 'SCL2', 'SD1', 'SD2', 'SDA1', 'SDA2', 'SGPS1', 'SGPS2', 'SIOONCTRL', 'SIOPBI', 'SIOPBO', 'SIOPWREQ', 'SIOPWRGD', 'SIOS3', 'SIOS5', 'SIOSCI', 'SPI1', 'SPI1CS1', 'SPI1DEBUG', 'SPI1PASSTHRU', 'SPI2CK', 'SPI2CS0', 'SPI2CS1', 'SPI2MISO', 'SPI2MOSI', 'TIMER3', 'TIMER4', 'TIMER5', 'TIMER6', 'TIMER7', 'TIMER8', 'TXD1', 'TXD2', 'TXD3', 'TXD4', 'UART6', 'USB11BHID', 'USB2AD', 'USB2AH', 'USB2BD', 'USB2BH', 'USBCKI', 'VGABIOSROM', 'VGAHS', 'VGAVS', 'VPI24', 'VPO', 'WDTRST1', 'WDTRST2']
...
from schema $id: http://devicetree.org/schemas/mfd/aspeed,ast2x00-scu.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: syscon@1e6e2000: 'smp-memram@180' does not match any of the regexes: '^interrupt-controller@[0-9a-f]+$', '^p2a-control@[0-9a-f]+$', '^pinctrl(@[0-9a-f]+)?$', '^silicon-id@[0-9a-f]+$', 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/mfd/aspeed,ast2x00-scu.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: syscon@1e6e2000: 'smp-memram@180' does not match any of the regexes: '^interrupt-controller@[0-9a-f]+$', '^p2a-control@[0-9a-f]+$', '^pinctrl(@[0-9a-f]+)?$', '^silicon-id@[0-9a-f]+$', 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/mfd/aspeed,ast2x00-scu.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: pinctrl: usb11bhid_default:function:0: 'USB11BHID' is not one of ['ADC0', 'ADC1', 'ADC10', 'ADC11', 'ADC12', 'ADC13', 'ADC14', 'ADC15', 'ADC2', 'ADC3', 'ADC4', 'ADC5', 'ADC6', 'ADC7', 'ADC8', 'ADC9', 'BMCINT', 'EMMC', 'ESPI', 'ESPIALT', 'FSI1', 'FSI2', 'FWQSPI', 'FWSPIABR', 'FWSPID', 'FWSPIWP', 'GPIT0', 'GPIT1', 'GPIT2', 'GPIT3', 'GPIT4', 'GPIT5', 'GPIT6', 'GPIT7', 'GPIU0', 'GPIU1', 'GPIU2', 'GPIU3', 'GPIU4', 'GPIU5', 'GPIU6', 'GPIU7', 'I2C1', 'I2C10', 'I2C11', 'I2C12', 'I2C13', 'I2C14', 'I2C15', 'I2C16', 'I2C2', 'I2C3', 'I2C4', 'I2C5', 'I2C6', 'I2C7', 'I2C8', 'I2C9', 'I3C3', 'I3C4', 'I3C5', 'I3C6', 'JTAGM', 'LHPD', 'LHSIRQ', 'LPC', 'LPCHC', 'LPCPD', 'LPCPME', 'LPCSMI', 'LSIRQ', 'MACLINK1', 'MACLINK2', 'MACLINK3', 'MACLINK4', 'MDIO1', 'MDIO2', 'MDIO3', 'MDIO4', 'NCTS1', 'NCTS2', 'NCTS3', 'NCTS4', 'NDCD1', 'NDCD2', 'NDCD3', 'NDCD4', 'NDSR1', 'NDSR2', 'NDSR3', 'NDSR4', 'NDTR1', 'NDTR2', 'NDTR3', 'NDTR4', 'NRI1', 'NRI2', 'NRI3', 'NRI4', 'NRTS1', 'NRTS2', 'NRTS3', 'NRTS4', 'OSCCLK', 'PEWAKE', 'PWM0', 'PWM1', 'PWM10', 'PWM11', 'PWM12', 'PWM13', 'PWM14', 'PWM15', 'PWM2', 'PWM3', 'PWM4', 'PWM5', 'PWM6', 'PWM7', 'PWM8', 'PWM9', 'RGMII1', 'RGMII2', 'RGMII3', 'RGMII4', 'RMII1', 'RMII2', 'RMII3', 'RMII4', 'RXD1', 'RXD2', 'RXD3', 'RXD4', 'SALT1', 'SALT10', 'SALT11', 'SALT12', 'SALT13', 'SALT14', 'SALT15', 'SALT16', 'SALT2', 'SALT3', 'SALT4', 'SALT5', 'SALT6', 'SALT7', 'SALT8', 'SALT9', 'SD1', 'SD2', 'SGPM1', 'SGPM2', 'SGPS1', 'SGPS2', 'SIOONCTRL', 'SIOPBI', 'SIOPBO', 'SIOPWREQ', 'SIOPWRGD', 'SIOS3', 'SIOS5', 'SIOSCI', 'SPI1', 'SPI1ABR', 'SPI1CS1', 'SPI1WP', 'SPI2', 'SPI2CS1', 'SPI2CS2', 'TACH0', 'TACH1', 'TACH10', 'TACH11', 'TACH12', 'TACH13', 'TACH14', 'TACH15', 'TACH2', 'TACH3', 'TACH4', 'TACH5', 'TACH6', 'TACH7', 'TACH8', 'TACH9', 'THRU0', 'THRU1', 'THRU2', 'THRU3', 'TXD1', 'TXD2', 'TXD3', 'TXD4', 'UART10', 'UART11', 'UART12', 'UART13', 'UART6', 'UART7', 'UART8', 'UART9', 'USBAD', 'USBADP', 'USB2AH', 'USB2AHP', 'USB2BD', 'USB2BH', 'VB', 'VGAHS', 'VGAVS', 'WDTRST1', 'WDTRST2', 'WDTRST3', 'WDTRST4']
from schema $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2600-pinctrl.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: pinctrl: i3c1_default:function:0: 'I3C1' is not one of ['ADC0', 'ADC1', 'ADC10', 'ADC11', 'ADC12', 'ADC13', 'ADC14', 'ADC15', 'ADC2', 'ADC3', 'ADC4', 'ADC5', 'ADC6', 'ADC7', 'ADC8', 'ADC9', 'BMCINT', 'EMMC', 'ESPI', 'ESPIALT', 'FSI1', 'FSI2', 'FWQSPI', 'FWSPIABR', 'FWSPID', 'FWSPIWP', 'GPIT0', 'GPIT1', 'GPIT2', 'GPIT3', 'GPIT4', 'GPIT5', 'GPIT6', 'GPIT7', 'GPIU0', 'GPIU1', 'GPIU2', 'GPIU3', 'GPIU4', 'GPIU5', 'GPIU6', 'GPIU7', 'I2C1', 'I2C10', 'I2C11', 'I2C12', 'I2C13', 'I2C14', 'I2C15', 'I2C16', 'I2C2', 'I2C3', 'I2C4', 'I2C5', 'I2C6', 'I2C7', 'I2C8', 'I2C9', 'I3C3', 'I3C4', 'I3C5', 'I3C6', 'JTAGM', 'LHPD', 'LHSIRQ', 'LPC', 'LPCHC', 'LPCPD', 'LPCPME', 'LPCSMI', 'LSIRQ', 'MACLINK1', 'MACLINK2', 'MACLINK3', 'MACLINK4', 'MDIO1', 'MDIO2', 'MDIO3', 'MDIO4', 'NCTS1', 'NCTS2', 'NCTS3', 'NCTS4', 'NDCD1', 'NDCD2', 'NDCD3', 'NDCD4', 'NDSR1', 'NDSR2', 'NDSR3', 'NDSR4', 'NDTR1', 'NDTR2', 'NDTR3', 'NDTR4', 'NRI1', 'NRI2', 'NRI3', 'NRI4', 'NRTS1', 'NRTS2', 'NRTS3', 'NRTS4', 'OSCCLK', 'PEWAKE', 'PWM0', 'PWM1', 'PWM10', 'PWM11', 'PWM12', 'PWM13', 'PWM14', 'PWM15', 'PWM2', 'PWM3', 'PWM4', 'PWM5', 'PWM6', 'PWM7', 'PWM8', 'PWM9', 'RGMII1', 'RGMII2', 'RGMII3', 'RGMII4', 'RMII1', 'RMII2', 'RMII3', 'RMII4', 'RXD1', 'RXD2', 'RXD3', 'RXD4', 'SALT1', 'SALT10', 'SALT11', 'SALT12', 'SALT13', 'SALT14', 'SALT15', 'SALT16', 'SALT2', 'SALT3', 'SALT4', 'SALT5', 'SALT6', 'SALT7', 'SALT8', 'SALT9', 'SD1', 'SD2', 'SGPM1', 'SGPM2', 'SGPS1', 'SGPS2', 'SIOONCTRL', 'SIOPBI', 'SIOPBO', 'SIOPWREQ', 'SIOPWRGD', 'SIOS3', 'SIOS5', 'SIOSCI', 'SPI1', 'SPI1ABR', 'SPI1CS1', 'SPI1WP', 'SPI2', 'SPI2CS1', 'SPI2CS2', 'TACH0', 'TACH1', 'TACH10', 'TACH11', 'TACH12', 'TACH13', 'TACH14', 'TACH15', 'TACH2', 'TACH3', 'TACH4', 'TACH5', 'TACH6', 'TACH7', 'TACH8', 'TACH9', 'THRU0', 'THRU1', 'THRU2', 'THRU3', 'TXD1', 'TXD2', 'TXD3', 'TXD4', 'UART10', 'UART11', 'UART12', 'UART13', 'UART6', 'UART7', 'UART8', 'UART9', 'USBAD', 'USBADP', 'USB2AH', 'USB2AHP', 'USB2BD', 'USB2BH', 'VB', 'VGAHS', 'VGAVS', 'WDTRST1', 'WDTRST2', 'WDTRST3', 'WDTRST4']
from schema $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2600-pinctrl.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: pinctrl: i3c1_default:groups:0: 'I3C1' is not one of ['ADC0', 'ADC1', 'ADC10', 'ADC11', 'ADC12', 'ADC13', 'ADC14', 'ADC15', 'ADC2', 'ADC3', 'ADC4', 'ADC5', 'ADC6', 'ADC7', 'ADC8', 'ADC9', 'BMCINT', 'EMMCG1', 'EMMCG4', 'EMMCG8', 'ESPI', 'ESPIALT', 'FSI1', 'FSI2', 'FWQSPI', 'FWSPIABR', 'FWSPID', 'FWSPIWP', 'GPIT0', 'GPIT1', 'GPIT2', 'GPIT3', 'GPIT4', 'GPIT5', 'GPIT6', 'GPIT7', 'GPIU0', 'GPIU1', 'GPIU2', 'GPIU3', 'GPIU4', 'GPIU5', 'GPIU6', 'GPIU7', 'HVI3C3', 'HVI3C4', 'I2C1', 'I2C10', 'I2C11', 'I2C12', 'I2C13', 'I2C14', 'I2C15', 'I2C16', 'I2C2', 'I2C3', 'I2C4', 'I2C5', 'I2C6', 'I2C7', 'I2C8', 'I2C9', 'I3C3', 'I3C4', 'I3C5', 'I3C6', 'JTAGM', 'LHPD', 'LHSIRQ', 'LPC', 'LPCHC', 'LPCPD', 'LPCPME', 'LPCSMI', 'LSIRQ', 'MACLINK1', 'MACLINK2', 'MACLINK3', 'MACLINK4', 'MDIO1', 'MDIO2', 'MDIO3', 'MDIO4', 'NCTS1', 'NCTS2', 'NCTS3', 'NCTS4', 'NDCD1', 'NDCD2', 'NDCD3', 'NDCD4', 'NDSR1', 'NDSR2', 'NDSR3', 'NDSR4', 'NDTR1', 'NDTR2', 'NDTR3', 'NDTR4', 'NRI1', 'NRI2', 'NRI3', 'NRI4', 'NRTS1', 'NRTS2', 'NRTS3', 'NRTS4', 'OSCCLK', 'PEWAKE', 'PWM0', 'PWM1', 'PWM10G0', 'PWM10G1', 'PWM11G0', 'PWM11G1', 'PWM12G0', 'PWM12G1', 'PWM13G0', 'PWM13G1', 'PWM14G0', 'PWM14G1', 'PWM15G0', 'PWM15G1', 'PWM2', 'PWM3', 'PWM4', 'PWM5', 'PWM6', 'PWM7', 'PWM8G0', 'PWM8G1', 'PWM9G0', 'PWM9G1', 'QSPI1', 'QSPI2', 'RGMII1', 'RGMII2', 'RGMII3', 'RGMII4', 'RMII1', 'RMII2', 'RMII3', 'RMII4', 'RXD1', 'RXD2', 'RXD3', 'RXD4', 'SALT1', 'SALT10G0', 'SALT10G1', 'SALT11G0', 'SALT11G1', 'SALT12G0', 'SALT12G1', 'SALT13G0', 'SALT13G1', 'SALT14G0', 'SALT14G1', 'SALT15G0', 'SALT15G1', 'SALT16G0', 'SALT16G1', 'SALT2', 'SALT3', 'SALT4', 'SALT5', 'SALT6', 'SALT7', 'SALT8', 'SALT9G0', 'SALT9G1', 'SD1', 'SD2', 'SD3', 'SGPM1', 'SGPM2', 'SGPS1', 'SGPS2', 'SIOONCTRL', 'SIOPBI', 'SIOPBO', 'SIOPWREQ', 'SIOPWRGD', 'SIOS3', 'SIOS5', 'SIOSCI', 'SPI1', 'SPI1ABR', 'SPI1CS1', 'SPI1WP', 'SPI2', 'SPI2CS1', 'SPI2CS2', 'TACH0', 'TACH1', 'TACH10', 'TACH11', 'TACH12', 'TACH13', 'TACH14', 'TACH15', 'TACH2', 'TACH3', 'TACH4', 'TACH5', 'TACH6', 'TACH7', 'TACH8', 'TACH9', 'THRU0', 'THRU1', 'THRU2', 'THRU3', 'TXD1', 'TXD2', 'TXD3', 'TXD4', 'UART10', 'UART11', 'UART12G0', 'UART12G1', 'UART13G0', 'UART13G1', 'UART6', 'UART7', 'UART8', 'UART9', 'USBA', 'USBB', 'VB', 'VGAHS', 'VGAVS', 'WDTRST1', 'WDTRST2', 'WDTRST3', 'WDTRST4']
from schema $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2600-pinctrl.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: pinctrl: i3c1_default:function:0: 'I3C1' is not one of ['ADC0', 'ADC1', 'ADC10', 'ADC11', 'ADC12', 'ADC13', 'ADC14', 'ADC15', 'ADC2', 'ADC3', 'ADC4', 'ADC5', 'ADC6', 'ADC7', 'ADC8', 'ADC9', 'BMCINT', 'EMMC', 'ESPI', 'ESPIALT', 'FSI1', 'FSI2', 'FWQSPI', 'FWSPIABR', 'FWSPID', 'FWSPIWP', 'GPIT0', 'GPIT1', 'GPIT2', 'GPIT3', 'GPIT4', 'GPIT5', 'GPIT6', 'GPIT7', 'GPIU0', 'GPIU1', 'GPIU2', 'GPIU3', 'GPIU4', 'GPIU5', 'GPIU6', 'GPIU7', 'I2C1', 'I2C10', 'I2C11', 'I2C12', 'I2C13', 'I2C14', 'I2C15', 'I2C16', 'I2C2', 'I2C3', 'I2C4', 'I2C5', 'I2C6', 'I2C7', 'I2C8', 'I2C9', 'I3C3', 'I3C4', 'I3C5', 'I3C6', 'JTAGM', 'LHPD', 'LHSIRQ', 'LPC', 'LPCHC', 'LPCPD', 'LPCPME', 'LPCSMI', 'LSIRQ', 'MACLINK1', 'MACLINK2', 'MACLINK3', 'MACLINK4', 'MDIO1', 'MDIO2', 'MDIO3', 'MDIO4', 'NCTS1', 'NCTS2', 'NCTS3', 'NCTS4', 'NDCD1', 'NDCD2', 'NDCD3', 'NDCD4', 'NDSR1', 'NDSR2', 'NDSR3', 'NDSR4', 'NDTR1', 'NDTR2', 'NDTR3', 'NDTR4', 'NRI1', 'NRI2', 'NRI3', 'NRI4', 'NRTS1', 'NRTS2', 'NRTS3', 'NRTS4', 'OSCCLK', 'PEWAKE', 'PWM0', 'PWM1', 'PWM10', 'PWM11', 'PWM12', 'PWM13', 'PWM14', 'PWM15', 'PWM2', 'PWM3', 'PWM4', 'PWM5', 'PWM6', 'PWM7', 'PWM8', 'PWM9', 'RGMII1', 'RGMII2', 'RGMII3', 'RGMII4', 'RMII1', 'RMII2', 'RMII3', 'RMII4', 'RXD1', 'RXD2', 'RXD3', 'RXD4', 'SALT1', 'SALT10', 'SALT11', 'SALT12', 'SALT13', 'SALT14', 'SALT15', 'SALT16', 'SALT2', 'SALT3', 'SALT4', 'SALT5', 'SALT6', 'SALT7', 'SALT8', 'SALT9', 'SD1', 'SD2', 'SGPM1', 'SGPM2', 'SGPS1', 'SGPS2', 'SIOONCTRL', 'SIOPBI', 'SIOPBO', 'SIOPWREQ', 'SIOPWRGD', 'SIOS3', 'SIOS5', 'SIOSCI', 'SPI1', 'SPI1ABR', 'SPI1CS1', 'SPI1WP', 'SPI2', 'SPI2CS1', 'SPI2CS2', 'TACH0', 'TACH1', 'TACH10', 'TACH11', 'TACH12', 'TACH13', 'TACH14', 'TACH15', 'TACH2', 'TACH3', 'TACH4', 'TACH5', 'TACH6', 'TACH7', 'TACH8', 'TACH9', 'THRU0', 'THRU1', 'THRU2', 'THRU3', 'TXD1', 'TXD2', 'TXD3', 'TXD4', 'UART10', 'UART11', 'UART12', 'UART13', 'UART6', 'UART7', 'UART8', 'UART9', 'USBAD', 'USBADP', 'USB2AH', 'USB2AHP', 'USB2BD', 'USB2BH', 'VB', 'VGAHS', 'VGAVS', 'WDTRST1', 'WDTRST2', 'WDTRST3', 'WDTRST4']
from schema $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2600-pinctrl.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: pinctrl: i3c1_default:groups:0: 'I3C1' is not one of ['ADC0', 'ADC1', 'ADC10', 'ADC11', 'ADC12', 'ADC13', 'ADC14', 'ADC15', 'ADC2', 'ADC3', 'ADC4', 'ADC5', 'ADC6', 'ADC7', 'ADC8', 'ADC9', 'BMCINT', 'EMMCG1', 'EMMCG4', 'EMMCG8', 'ESPI', 'ESPIALT', 'FSI1', 'FSI2', 'FWQSPI', 'FWSPIABR', 'FWSPID', 'FWSPIWP', 'GPIT0', 'GPIT1', 'GPIT2', 'GPIT3', 'GPIT4', 'GPIT5', 'GPIT6', 'GPIT7', 'GPIU0', 'GPIU1', 'GPIU2', 'GPIU3', 'GPIU4', 'GPIU5', 'GPIU6', 'GPIU7', 'HVI3C3', 'HVI3C4', 'I2C1', 'I2C10', 'I2C11', 'I2C12', 'I2C13', 'I2C14', 'I2C15', 'I2C16', 'I2C2', 'I2C3', 'I2C4', 'I2C5', 'I2C6', 'I2C7', 'I2C8', 'I2C9', 'I3C3', 'I3C4', 'I3C5', 'I3C6', 'JTAGM', 'LHPD', 'LHSIRQ', 'LPC', 'LPCHC', 'LPCPD', 'LPCPME', 'LPCSMI', 'LSIRQ', 'MACLINK1', 'MACLINK2', 'MACLINK3', 'MACLINK4', 'MDIO1', 'MDIO2', 'MDIO3', 'MDIO4', 'NCTS1', 'NCTS2', 'NCTS3', 'NCTS4', 'NDCD1', 'NDCD2', 'NDCD3', 'NDCD4', 'NDSR1', 'NDSR2', 'NDSR3', 'NDSR4', 'NDTR1', 'NDTR2', 'NDTR3', 'NDTR4', 'NRI1', 'NRI2', 'NRI3', 'NRI4', 'NRTS1', 'NRTS2', 'NRTS3', 'NRTS4', 'OSCCLK', 'PEWAKE', 'PWM0', 'PWM1', 'PWM10G0', 'PWM10G1', 'PWM11G0', 'PWM11G1', 'PWM12G0', 'PWM12G1', 'PWM13G0', 'PWM13G1', 'PWM14G0', 'PWM14G1', 'PWM15G0', 'PWM15G1', 'PWM2', 'PWM3', 'PWM4', 'PWM5', 'PWM6', 'PWM7', 'PWM8G0', 'PWM8G1', 'PWM9G0', 'PWM9G1', 'QSPI1', 'QSPI2', 'RGMII1', 'RGMII2', 'RGMII3', 'RGMII4', 'RMII1', 'RMII2', 'RMII3', 'RMII4', 'RXD1', 'RXD2', 'RXD3', 'RXD4', 'SALT1', 'SALT10G0', 'SALT10G1', 'SALT11G0', 'SALT11G1', 'SALT12G0', 'SALT12G1', 'SALT13G0', 'SALT13G1', 'SALT14G0', 'SALT14G1', 'SALT15G0', 'SALT15G1', 'SALT16G0', 'SALT16G1', 'SALT2', 'SALT3', 'SALT4', 'SALT5', 'SALT6', 'SALT7', 'SALT8', 'SALT9G0', 'SALT9G1', 'SD1', 'SD2', 'SD3', 'SGPM1', 'SGPM2', 'SGPS1', 'SGPS2', 'SIOONCTRL', 'SIOPBI', 'SIOPBO', 'SIOPWREQ', 'SIOPWRGD', 'SIOS3', 'SIOS5', 'SIOSCI', 'SPI1', 'SPI1ABR', 'SPI1CS1', 'SPI1WP', 'SPI2', 'SPI2CS1', 'SPI2CS2', 'TACH0', 'TACH1', 'TACH10', 'TACH11', 'TACH12', 'TACH13', 'TACH14', 'TACH15', 'TACH2', 'TACH3', 'TACH4', 'TACH5', 'TACH6', 'TACH7', 'TACH8', 'TACH9', 'THRU0', 'THRU1', 'THRU2', 'THRU3', 'TXD1', 'TXD2', 'TXD3', 'TXD4', 'UART10', 'UART11', 'UART12G0', 'UART12G1', 'UART13G0', 'UART13G1', 'UART6', 'UART7', 'UART8', 'UART9', 'USBA', 'USBB', 'VB', 'VGAHS', 'VGAVS', 'WDTRST1', 'WDTRST2', 'WDTRST3', 'WDTRST4']
from schema $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2600-pinctrl.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: pinctrl: i3c2_default:function:0: 'I3C2' is not one of ['ADC0', 'ADC1', 'ADC10', 'ADC11', 'ADC12', 'ADC13', 'ADC14', 'ADC15', 'ADC2', 'ADC3', 'ADC4', 'ADC5', 'ADC6', 'ADC7', 'ADC8', 'ADC9', 'BMCINT', 'EMMC', 'ESPI', 'ESPIALT', 'FSI1', 'FSI2', 'FWQSPI', 'FWSPIABR', 'FWSPID', 'FWSPIWP', 'GPIT0', 'GPIT1', 'GPIT2', 'GPIT3', 'GPIT4', 'GPIT5', 'GPIT6', 'GPIT7', 'GPIU0', 'GPIU1', 'GPIU2', 'GPIU3', 'GPIU4', 'GPIU5', 'GPIU6', 'GPIU7', 'I2C1', 'I2C10', 'I2C11', 'I2C12', 'I2C13', 'I2C14', 'I2C15', 'I2C16', 'I2C2', 'I2C3', 'I2C4', 'I2C5', 'I2C6', 'I2C7', 'I2C8', 'I2C9', 'I3C3', 'I3C4', 'I3C5', 'I3C6', 'JTAGM', 'LHPD', 'LHSIRQ', 'LPC', 'LPCHC', 'LPCPD', 'LPCPME', 'LPCSMI', 'LSIRQ', 'MACLINK1', 'MACLINK2', 'MACLINK3', 'MACLINK4', 'MDIO1', 'MDIO2', 'MDIO3', 'MDIO4', 'NCTS1', 'NCTS2', 'NCTS3', 'NCTS4', 'NDCD1', 'NDCD2', 'NDCD3', 'NDCD4', 'NDSR1', 'NDSR2', 'NDSR3', 'NDSR4', 'NDTR1', 'NDTR2', 'NDTR3', 'NDTR4', 'NRI1', 'NRI2', 'NRI3', 'NRI4', 'NRTS1', 'NRTS2', 'NRTS3', 'NRTS4', 'OSCCLK', 'PEWAKE', 'PWM0', 'PWM1', 'PWM10', 'PWM11', 'PWM12', 'PWM13', 'PWM14', 'PWM15', 'PWM2', 'PWM3', 'PWM4', 'PWM5', 'PWM6', 'PWM7', 'PWM8', 'PWM9', 'RGMII1', 'RGMII2', 'RGMII3', 'RGMII4', 'RMII1', 'RMII2', 'RMII3', 'RMII4', 'RXD1', 'RXD2', 'RXD3', 'RXD4', 'SALT1', 'SALT10', 'SALT11', 'SALT12', 'SALT13', 'SALT14', 'SALT15', 'SALT16', 'SALT2', 'SALT3', 'SALT4', 'SALT5', 'SALT6', 'SALT7', 'SALT8', 'SALT9', 'SD1', 'SD2', 'SGPM1', 'SGPM2', 'SGPS1', 'SGPS2', 'SIOONCTRL', 'SIOPBI', 'SIOPBO', 'SIOPWREQ', 'SIOPWRGD', 'SIOS3', 'SIOS5', 'SIOSCI', 'SPI1', 'SPI1ABR', 'SPI1CS1', 'SPI1WP', 'SPI2', 'SPI2CS1', 'SPI2CS2', 'TACH0', 'TACH1', 'TACH10', 'TACH11', 'TACH12', 'TACH13', 'TACH14', 'TACH15', 'TACH2', 'TACH3', 'TACH4', 'TACH5', 'TACH6', 'TACH7', 'TACH8', 'TACH9', 'THRU0', 'THRU1', 'THRU2', 'THRU3', 'TXD1', 'TXD2', 'TXD3', 'TXD4', 'UART10', 'UART11', 'UART12', 'UART13', 'UART6', 'UART7', 'UART8', 'UART9', 'USBAD', 'USBADP', 'USB2AH', 'USB2AHP', 'USB2BD', 'USB2BH', 'VB', 'VGAHS', 'VGAVS', 'WDTRST1', 'WDTRST2', 'WDTRST3', 'WDTRST4']
from schema $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2600-pinctrl.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: pinctrl: i3c2_default:groups:0: 'I3C2' is not one of ['ADC0', 'ADC1', 'ADC10', 'ADC11', 'ADC12', 'ADC13', 'ADC14', 'ADC15', 'ADC2', 'ADC3', 'ADC4', 'ADC5', 'ADC6', 'ADC7', 'ADC8', 'ADC9', 'BMCINT', 'EMMCG1', 'EMMCG4', 'EMMCG8', 'ESPI', 'ESPIALT', 'FSI1', 'FSI2', 'FWQSPI', 'FWSPIABR', 'FWSPID', 'FWSPIWP', 'GPIT0', 'GPIT1', 'GPIT2', 'GPIT3', 'GPIT4', 'GPIT5', 'GPIT6', 'GPIT7', 'GPIU0', 'GPIU1', 'GPIU2', 'GPIU3', 'GPIU4', 'GPIU5', 'GPIU6', 'GPIU7', 'HVI3C3', 'HVI3C4', 'I2C1', 'I2C10', 'I2C11', 'I2C12', 'I2C13', 'I2C14', 'I2C15', 'I2C16', 'I2C2', 'I2C3', 'I2C4', 'I2C5', 'I2C6', 'I2C7', 'I2C8', 'I2C9', 'I3C3', 'I3C4', 'I3C5', 'I3C6', 'JTAGM', 'LHPD', 'LHSIRQ', 'LPC', 'LPCHC', 'LPCPD', 'LPCPME', 'LPCSMI', 'LSIRQ', 'MACLINK1', 'MACLINK2', 'MACLINK3', 'MACLINK4', 'MDIO1', 'MDIO2', 'MDIO3', 'MDIO4', 'NCTS1', 'NCTS2', 'NCTS3', 'NCTS4', 'NDCD1', 'NDCD2', 'NDCD3', 'NDCD4', 'NDSR1', 'NDSR2', 'NDSR3', 'NDSR4', 'NDTR1', 'NDTR2', 'NDTR3', 'NDTR4', 'NRI1', 'NRI2', 'NRI3', 'NRI4', 'NRTS1', 'NRTS2', 'NRTS3', 'NRTS4', 'OSCCLK', 'PEWAKE', 'PWM0', 'PWM1', 'PWM10G0', 'PWM10G1', 'PWM11G0', 'PWM11G1', 'PWM12G0', 'PWM12G1', 'PWM13G0', 'PWM13G1', 'PWM14G0', 'PWM14G1', 'PWM15G0', 'PWM15G1', 'PWM2', 'PWM3', 'PWM4', 'PWM5', 'PWM6', 'PWM7', 'PWM8G0', 'PWM8G1', 'PWM9G0', 'PWM9G1', 'QSPI1', 'QSPI2', 'RGMII1', 'RGMII2', 'RGMII3', 'RGMII4', 'RMII1', 'RMII2', 'RMII3', 'RMII4', 'RXD1', 'RXD2', 'RXD3', 'RXD4', 'SALT1', 'SALT10G0', 'SALT10G1', 'SALT11G0', 'SALT11G1', 'SALT12G0', 'SALT12G1', 'SALT13G0', 'SALT13G1', 'SALT14G0', 'SALT14G1', 'SALT15G0', 'SALT15G1', 'SALT16G0', 'SALT16G1', 'SALT2', 'SALT3', 'SALT4', 'SALT5', 'SALT6', 'SALT7', 'SALT8', 'SALT9G0', 'SALT9G1', 'SD1', 'SD2', 'SD3', 'SGPM1', 'SGPM2', 'SGPS1', 'SGPS2', 'SIOONCTRL', 'SIOPBI', 'SIOPBO', 'SIOPWREQ', 'SIOPWRGD', 'SIOS3', 'SIOS5', 'SIOSCI', 'SPI1', 'SPI1ABR', 'SPI1CS1', 'SPI1WP', 'SPI2', 'SPI2CS1', 'SPI2CS2', 'TACH0', 'TACH1', 'TACH10', 'TACH11', 'TACH12', 'TACH13', 'TACH14', 'TACH15', 'TACH2', 'TACH3', 'TACH4', 'TACH5', 'TACH6', 'TACH7', 'TACH8', 'TACH9', 'THRU0', 'THRU1', 'THRU2', 'THRU3', 'TXD1', 'TXD2', 'TXD3', 'TXD4', 'UART10', 'UART11', 'UART12G0', 'UART12G1', 'UART13G0', 'UART13G1', 'UART6', 'UART7', 'UART8', 'UART9', 'USBA', 'USBB', 'VB', 'VGAHS', 'VGAVS', 'WDTRST1', 'WDTRST2', 'WDTRST3', 'WDTRST4']
from schema $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2600-pinctrl.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: pinctrl: usb2ad_default:function:0: 'USB2AD' is not one of ['ADC0', 'ADC1', 'ADC10', 'ADC11', 'ADC12', 'ADC13', 'ADC14', 'ADC15', 'ADC2', 'ADC3', 'ADC4', 'ADC5', 'ADC6', 'ADC7', 'ADC8', 'ADC9', 'BMCINT', 'EMMC', 'ESPI', 'ESPIALT', 'FSI1', 'FSI2', 'FWQSPI', 'FWSPIABR', 'FWSPID', 'FWSPIWP', 'GPIT0', 'GPIT1', 'GPIT2', 'GPIT3', 'GPIT4', 'GPIT5', 'GPIT6', 'GPIT7', 'GPIU0', 'GPIU1', 'GPIU2', 'GPIU3', 'GPIU4', 'GPIU5', 'GPIU6', 'GPIU7', 'I2C1', 'I2C10', 'I2C11', 'I2C12', 'I2C13', 'I2C14', 'I2C15', 'I2C16', 'I2C2', 'I2C3', 'I2C4', 'I2C5', 'I2C6', 'I2C7', 'I2C8', 'I2C9', 'I3C3', 'I3C4', 'I3C5', 'I3C6', 'JTAGM', 'LHPD', 'LHSIRQ', 'LPC', 'LPCHC', 'LPCPD', 'LPCPME', 'LPCSMI', 'LSIRQ', 'MACLINK1', 'MACLINK2', 'MACLINK3', 'MACLINK4', 'MDIO1', 'MDIO2', 'MDIO3', 'MDIO4', 'NCTS1', 'NCTS2', 'NCTS3', 'NCTS4', 'NDCD1', 'NDCD2', 'NDCD3', 'NDCD4', 'NDSR1', 'NDSR2', 'NDSR3', 'NDSR4', 'NDTR1', 'NDTR2', 'NDTR3', 'NDTR4', 'NRI1', 'NRI2', 'NRI3', 'NRI4', 'NRTS1', 'NRTS2', 'NRTS3', 'NRTS4', 'OSCCLK', 'PEWAKE', 'PWM0', 'PWM1', 'PWM10', 'PWM11', 'PWM12', 'PWM13', 'PWM14', 'PWM15', 'PWM2', 'PWM3', 'PWM4', 'PWM5', 'PWM6', 'PWM7', 'PWM8', 'PWM9', 'RGMII1', 'RGMII2', 'RGMII3', 'RGMII4', 'RMII1', 'RMII2', 'RMII3', 'RMII4', 'RXD1', 'RXD2', 'RXD3', 'RXD4', 'SALT1', 'SALT10', 'SALT11', 'SALT12', 'SALT13', 'SALT14', 'SALT15', 'SALT16', 'SALT2', 'SALT3', 'SALT4', 'SALT5', 'SALT6', 'SALT7', 'SALT8', 'SALT9', 'SD1', 'SD2', 'SGPM1', 'SGPM2', 'SGPS1', 'SGPS2', 'SIOONCTRL', 'SIOPBI', 'SIOPBO', 'SIOPWREQ', 'SIOPWRGD', 'SIOS3', 'SIOS5', 'SIOSCI', 'SPI1', 'SPI1ABR', 'SPI1CS1', 'SPI1WP', 'SPI2', 'SPI2CS1', 'SPI2CS2', 'TACH0', 'TACH1', 'TACH10', 'TACH11', 'TACH12', 'TACH13', 'TACH14', 'TACH15', 'TACH2', 'TACH3', 'TACH4', 'TACH5', 'TACH6', 'TACH7', 'TACH8', 'TACH9', 'THRU0', 'THRU1', 'THRU2', 'THRU3', 'TXD1', 'TXD2', 'TXD3', 'TXD4', 'UART10', 'UART11', 'UART12', 'UART13', 'UART6', 'UART7', 'UART8', 'UART9', 'USBAD', 'USBADP', 'USB2AH', 'USB2AHP', 'USB2BD', 'USB2BH', 'VB', 'VGAHS', 'VGAVS', 'WDTRST1', 'WDTRST2', 'WDTRST3', 'WDTRST4']
from schema $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2600-pinctrl.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: pinctrl: i3c2_default:function:0: 'I3C2' is not one of ['ADC0', 'ADC1', 'ADC10', 'ADC11', 'ADC12', 'ADC13', 'ADC14', 'ADC15', 'ADC2', 'ADC3', 'ADC4', 'ADC5', 'ADC6', 'ADC7', 'ADC8', 'ADC9', 'BMCINT', 'EMMC', 'ESPI', 'ESPIALT', 'FSI1', 'FSI2', 'FWQSPI', 'FWSPIABR', 'FWSPID', 'FWSPIWP', 'GPIT0', 'GPIT1', 'GPIT2', 'GPIT3', 'GPIT4', 'GPIT5', 'GPIT6', 'GPIT7', 'GPIU0', 'GPIU1', 'GPIU2', 'GPIU3', 'GPIU4', 'GPIU5', 'GPIU6', 'GPIU7', 'I2C1', 'I2C10', 'I2C11', 'I2C12', 'I2C13', 'I2C14', 'I2C15', 'I2C16', 'I2C2', 'I2C3', 'I2C4', 'I2C5', 'I2C6', 'I2C7', 'I2C8', 'I2C9', 'I3C3', 'I3C4', 'I3C5', 'I3C6', 'JTAGM', 'LHPD', 'LHSIRQ', 'LPC', 'LPCHC', 'LPCPD', 'LPCPME', 'LPCSMI', 'LSIRQ', 'MACLINK1', 'MACLINK2', 'MACLINK3', 'MACLINK4', 'MDIO1', 'MDIO2', 'MDIO3', 'MDIO4', 'NCTS1', 'NCTS2', 'NCTS3', 'NCTS4', 'NDCD1', 'NDCD2', 'NDCD3', 'NDCD4', 'NDSR1', 'NDSR2', 'NDSR3', 'NDSR4', 'NDTR1', 'NDTR2', 'NDTR3', 'NDTR4', 'NRI1', 'NRI2', 'NRI3', 'NRI4', 'NRTS1', 'NRTS2', 'NRTS3', 'NRTS4', 'OSCCLK', 'PEWAKE', 'PWM0', 'PWM1', 'PWM10', 'PWM11', 'PWM12', 'PWM13', 'PWM14', 'PWM15', 'PWM2', 'PWM3', 'PWM4', 'PWM5', 'PWM6', 'PWM7', 'PWM8', 'PWM9', 'RGMII1', 'RGMII2', 'RGMII3', 'RGMII4', 'RMII1', 'RMII2', 'RMII3', 'RMII4', 'RXD1', 'RXD2', 'RXD3', 'RXD4', 'SALT1', 'SALT10', 'SALT11', 'SALT12', 'SALT13', 'SALT14', 'SALT15', 'SALT16', 'SALT2', 'SALT3', 'SALT4', 'SALT5', 'SALT6', 'SALT7', 'SALT8', 'SALT9', 'SD1', 'SD2', 'SGPM1', 'SGPM2', 'SGPS1', 'SGPS2', 'SIOONCTRL', 'SIOPBI', 'SIOPBO', 'SIOPWREQ', 'SIOPWRGD', 'SIOS3', 'SIOS5', 'SIOSCI', 'SPI1', 'SPI1ABR', 'SPI1CS1', 'SPI1WP', 'SPI2', 'SPI2CS1', 'SPI2CS2', 'TACH0', 'TACH1', 'TACH10', 'TACH11', 'TACH12', 'TACH13', 'TACH14', 'TACH15', 'TACH2', 'TACH3', 'TACH4', 'TACH5', 'TACH6', 'TACH7', 'TACH8', 'TACH9', 'THRU0', 'THRU1', 'THRU2', 'THRU3', 'TXD1', 'TXD2', 'TXD3', 'TXD4', 'UART10', 'UART11', 'UART12', 'UART13', 'UART6', 'UART7', 'UART8', 'UART9', 'USBAD', 'USBADP', 'USB2AH', 'USB2AHP', 'USB2BD', 'USB2BH', 'VB', 'VGAHS', 'VGAVS', 'WDTRST1', 'WDTRST2', 'WDTRST3', 'WDTRST4']
from schema $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2600-pinctrl.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: pinctrl: i3c2_default:groups:0: 'I3C2' is not one of ['ADC0', 'ADC1', 'ADC10', 'ADC11', 'ADC12', 'ADC13', 'ADC14', 'ADC15', 'ADC2', 'ADC3', 'ADC4', 'ADC5', 'ADC6', 'ADC7', 'ADC8', 'ADC9', 'BMCINT', 'EMMCG1', 'EMMCG4', 'EMMCG8', 'ESPI', 'ESPIALT', 'FSI1', 'FSI2', 'FWQSPI', 'FWSPIABR', 'FWSPID', 'FWSPIWP', 'GPIT0', 'GPIT1', 'GPIT2', 'GPIT3', 'GPIT4', 'GPIT5', 'GPIT6', 'GPIT7', 'GPIU0', 'GPIU1', 'GPIU2', 'GPIU3', 'GPIU4', 'GPIU5', 'GPIU6', 'GPIU7', 'HVI3C3', 'HVI3C4', 'I2C1', 'I2C10', 'I2C11', 'I2C12', 'I2C13', 'I2C14', 'I2C15', 'I2C16', 'I2C2', 'I2C3', 'I2C4', 'I2C5', 'I2C6', 'I2C7', 'I2C8', 'I2C9', 'I3C3', 'I3C4', 'I3C5', 'I3C6', 'JTAGM', 'LHPD', 'LHSIRQ', 'LPC', 'LPCHC', 'LPCPD', 'LPCPME', 'LPCSMI', 'LSIRQ', 'MACLINK1', 'MACLINK2', 'MACLINK3', 'MACLINK4', 'MDIO1', 'MDIO2', 'MDIO3', 'MDIO4', 'NCTS1', 'NCTS2', 'NCTS3', 'NCTS4', 'NDCD1', 'NDCD2', 'NDCD3', 'NDCD4', 'NDSR1', 'NDSR2', 'NDSR3', 'NDSR4', 'NDTR1', 'NDTR2', 'NDTR3', 'NDTR4', 'NRI1', 'NRI2', 'NRI3', 'NRI4', 'NRTS1', 'NRTS2', 'NRTS3', 'NRTS4', 'OSCCLK', 'PEWAKE', 'PWM0', 'PWM1', 'PWM10G0', 'PWM10G1', 'PWM11G0', 'PWM11G1', 'PWM12G0', 'PWM12G1', 'PWM13G0', 'PWM13G1', 'PWM14G0', 'PWM14G1', 'PWM15G0', 'PWM15G1', 'PWM2', 'PWM3', 'PWM4', 'PWM5', 'PWM6', 'PWM7', 'PWM8G0', 'PWM8G1', 'PWM9G0', 'PWM9G1', 'QSPI1', 'QSPI2', 'RGMII1', 'RGMII2', 'RGMII3', 'RGMII4', 'RMII1', 'RMII2', 'RMII3', 'RMII4', 'RXD1', 'RXD2', 'RXD3', 'RXD4', 'SALT1', 'SALT10G0', 'SALT10G1', 'SALT11G0', 'SALT11G1', 'SALT12G0', 'SALT12G1', 'SALT13G0', 'SALT13G1', 'SALT14G0', 'SALT14G1', 'SALT15G0', 'SALT15G1', 'SALT16G0', 'SALT16G1', 'SALT2', 'SALT3', 'SALT4', 'SALT5', 'SALT6', 'SALT7', 'SALT8', 'SALT9G0', 'SALT9G1', 'SD1', 'SD2', 'SD3', 'SGPM1', 'SGPM2', 'SGPS1', 'SGPS2', 'SIOONCTRL', 'SIOPBI', 'SIOPBO', 'SIOPWREQ', 'SIOPWRGD', 'SIOS3', 'SIOS5', 'SIOSCI', 'SPI1', 'SPI1ABR', 'SPI1CS1', 'SPI1WP', 'SPI2', 'SPI2CS1', 'SPI2CS2', 'TACH0', 'TACH1', 'TACH10', 'TACH11', 'TACH12', 'TACH13', 'TACH14', 'TACH15', 'TACH2', 'TACH3', 'TACH4', 'TACH5', 'TACH6', 'TACH7', 'TACH8', 'TACH9', 'THRU0', 'THRU1', 'THRU2', 'THRU3', 'TXD1', 'TXD2', 'TXD3', 'TXD4', 'UART10', 'UART11', 'UART12G0', 'UART12G1', 'UART13G0', 'UART13G1', 'UART6', 'UART7', 'UART8', 'UART9', 'USBA', 'USBB', 'VB', 'VGAHS', 'VGAVS', 'WDTRST1', 'WDTRST2', 'WDTRST3', 'WDTRST4']
from schema $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2600-pinctrl.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: pinctrl: usb2ad_default:function:0: 'USB2AD' is not one of ['ADC0', 'ADC1', 'ADC10', 'ADC11', 'ADC12', 'ADC13', 'ADC14', 'ADC15', 'ADC2', 'ADC3', 'ADC4', 'ADC5', 'ADC6', 'ADC7', 'ADC8', 'ADC9', 'BMCINT', 'EMMC', 'ESPI', 'ESPIALT', 'FSI1', 'FSI2', 'FWQSPI', 'FWSPIABR', 'FWSPID', 'FWSPIWP', 'GPIT0', 'GPIT1', 'GPIT2', 'GPIT3', 'GPIT4', 'GPIT5', 'GPIT6', 'GPIT7', 'GPIU0', 'GPIU1', 'GPIU2', 'GPIU3', 'GPIU4', 'GPIU5', 'GPIU6', 'GPIU7', 'I2C1', 'I2C10', 'I2C11', 'I2C12', 'I2C13', 'I2C14', 'I2C15', 'I2C16', 'I2C2', 'I2C3', 'I2C4', 'I2C5', 'I2C6', 'I2C7', 'I2C8', 'I2C9', 'I3C3', 'I3C4', 'I3C5', 'I3C6', 'JTAGM', 'LHPD', 'LHSIRQ', 'LPC', 'LPCHC', 'LPCPD', 'LPCPME', 'LPCSMI', 'LSIRQ', 'MACLINK1', 'MACLINK2', 'MACLINK3', 'MACLINK4', 'MDIO1', 'MDIO2', 'MDIO3', 'MDIO4', 'NCTS1', 'NCTS2', 'NCTS3', 'NCTS4', 'NDCD1', 'NDCD2', 'NDCD3', 'NDCD4', 'NDSR1', 'NDSR2', 'NDSR3', 'NDSR4', 'NDTR1', 'NDTR2', 'NDTR3', 'NDTR4', 'NRI1', 'NRI2', 'NRI3', 'NRI4', 'NRTS1', 'NRTS2', 'NRTS3', 'NRTS4', 'OSCCLK', 'PEWAKE', 'PWM0', 'PWM1', 'PWM10', 'PWM11', 'PWM12', 'PWM13', 'PWM14', 'PWM15', 'PWM2', 'PWM3', 'PWM4', 'PWM5', 'PWM6', 'PWM7', 'PWM8', 'PWM9', 'RGMII1', 'RGMII2', 'RGMII3', 'RGMII4', 'RMII1', 'RMII2', 'RMII3', 'RMII4', 'RXD1', 'RXD2', 'RXD3', 'RXD4', 'SALT1', 'SALT10', 'SALT11', 'SALT12', 'SALT13', 'SALT14', 'SALT15', 'SALT16', 'SALT2', 'SALT3', 'SALT4', 'SALT5', 'SALT6', 'SALT7', 'SALT8', 'SALT9', 'SD1', 'SD2', 'SGPM1', 'SGPM2', 'SGPS1', 'SGPS2', 'SIOONCTRL', 'SIOPBI', 'SIOPBO', 'SIOPWREQ', 'SIOPWRGD', 'SIOS3', 'SIOS5', 'SIOSCI', 'SPI1', 'SPI1ABR', 'SPI1CS1', 'SPI1WP', 'SPI2', 'SPI2CS1', 'SPI2CS2', 'TACH0', 'TACH1', 'TACH10', 'TACH11', 'TACH12', 'TACH13', 'TACH14', 'TACH15', 'TACH2', 'TACH3', 'TACH4', 'TACH5', 'TACH6', 'TACH7', 'TACH8', 'TACH9', 'THRU0', 'THRU1', 'THRU2', 'THRU3', 'TXD1', 'TXD2', 'TXD3', 'TXD4', 'UART10', 'UART11', 'UART12', 'UART13', 'UART6', 'UART7', 'UART8', 'UART9', 'USBAD', 'USBADP', 'USB2AH', 'USB2AHP', 'USB2BD', 'USB2BH', 'VB', 'VGAHS', 'VGAVS', 'WDTRST1', 'WDTRST2', 'WDTRST3', 'WDTRST4']
from schema $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2600-pinctrl.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: pinctrl: usb11bhid_default:function:0: 'USB11BHID' is not one of ['ADC0', 'ADC1', 'ADC10', 'ADC11', 'ADC12', 'ADC13', 'ADC14', 'ADC15', 'ADC2', 'ADC3', 'ADC4', 'ADC5', 'ADC6', 'ADC7', 'ADC8', 'ADC9', 'BMCINT', 'EMMC', 'ESPI', 'ESPIALT', 'FSI1', 'FSI2', 'FWQSPI', 'FWSPIABR', 'FWSPID', 'FWSPIWP', 'GPIT0', 'GPIT1', 'GPIT2', 'GPIT3', 'GPIT4', 'GPIT5', 'GPIT6', 'GPIT7', 'GPIU0', 'GPIU1', 'GPIU2', 'GPIU3', 'GPIU4', 'GPIU5', 'GPIU6', 'GPIU7', 'I2C1', 'I2C10', 'I2C11', 'I2C12', 'I2C13', 'I2C14', 'I2C15', 'I2C16', 'I2C2', 'I2C3', 'I2C4', 'I2C5', 'I2C6', 'I2C7', 'I2C8', 'I2C9', 'I3C3', 'I3C4', 'I3C5', 'I3C6', 'JTAGM', 'LHPD', 'LHSIRQ', 'LPC', 'LPCHC', 'LPCPD', 'LPCPME', 'LPCSMI', 'LSIRQ', 'MACLINK1', 'MACLINK2', 'MACLINK3', 'MACLINK4', 'MDIO1', 'MDIO2', 'MDIO3', 'MDIO4', 'NCTS1', 'NCTS2', 'NCTS3', 'NCTS4', 'NDCD1', 'NDCD2', 'NDCD3', 'NDCD4', 'NDSR1', 'NDSR2', 'NDSR3', 'NDSR4', 'NDTR1', 'NDTR2', 'NDTR3', 'NDTR4', 'NRI1', 'NRI2', 'NRI3', 'NRI4', 'NRTS1', 'NRTS2', 'NRTS3', 'NRTS4', 'OSCCLK', 'PEWAKE', 'PWM0', 'PWM1', 'PWM10', 'PWM11', 'PWM12', 'PWM13', 'PWM14', 'PWM15', 'PWM2', 'PWM3', 'PWM4', 'PWM5', 'PWM6', 'PWM7', 'PWM8', 'PWM9', 'RGMII1', 'RGMII2', 'RGMII3', 'RGMII4', 'RMII1', 'RMII2', 'RMII3', 'RMII4', 'RXD1', 'RXD2', 'RXD3', 'RXD4', 'SALT1', 'SALT10', 'SALT11', 'SALT12', 'SALT13', 'SALT14', 'SALT15', 'SALT16', 'SALT2', 'SALT3', 'SALT4', 'SALT5', 'SALT6', 'SALT7', 'SALT8', 'SALT9', 'SD1', 'SD2', 'SGPM1', 'SGPM2', 'SGPS1', 'SGPS2', 'SIOONCTRL', 'SIOPBI', 'SIOPBO', 'SIOPWREQ', 'SIOPWRGD', 'SIOS3', 'SIOS5', 'SIOSCI', 'SPI1', 'SPI1ABR', 'SPI1CS1', 'SPI1WP', 'SPI2', 'SPI2CS1', 'SPI2CS2', 'TACH0', 'TACH1', 'TACH10', 'TACH11', 'TACH12', 'TACH13', 'TACH14', 'TACH15', 'TACH2', 'TACH3', 'TACH4', 'TACH5', 'TACH6', 'TACH7', 'TACH8', 'TACH9', 'THRU0', 'THRU1', 'THRU2', 'THRU3', 'TXD1', 'TXD2', 'TXD3', 'TXD4', 'UART10', 'UART11', 'UART12', 'UART13', 'UART6', 'UART7', 'UART8', 'UART9', 'USBAD', 'USBADP', 'USB2AH', 'USB2AHP', 'USB2BD', 'USB2BH', 'VB', 'VGAHS', 'VGAVS', 'WDTRST1', 'WDTRST2', 'WDTRST3', 'WDTRST4']
from schema $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2600-pinctrl.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/syscon@1e6e2000/smp-memram@180: failed to match any schema with compatible: ['aspeed,ast2600-smpmem']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/syscon@1e6e2000/interrupt-controller@560: failed to match any schema with compatible: ['aspeed,ast2600-scu-ic0']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/syscon@1e6e2000/interrupt-controller@570: failed to match any schema with compatible: ['aspeed,ast2600-scu-ic1']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/display@1e6e6000: failed to match any schema with compatible: ['aspeed,ast2600-gfx', 'syscon']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/xdma@1e6e7000: failed to match any schema with compatible: ['aspeed,ast2600-xdma']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: adc@1e6e9000: 'interrupts' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: adc@1e6e9100: 'interrupts' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/syscon@1e6e2000/smp-memram@180: failed to match any schema with compatible: ['aspeed,ast2600-smpmem']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: crypto@1e6fa000: 'aspeed,ahbc' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/crypto/aspeed,ast2600-acry.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/syscon@1e6e2000/interrupt-controller@560: failed to match any schema with compatible: ['aspeed,ast2600-scu-ic0']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/syscon@1e6e2000/interrupt-controller@570: failed to match any schema with compatible: ['aspeed,ast2600-scu-ic1']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/video@1e700000: failed to match any schema with compatible: ['aspeed,ast2600-video-engine']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: gpio@1e780000: 'i2c3_mux_oe_n-hog', 'usb_power-hog' do not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/gpio/aspeed,ast2400-gpio.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/display@1e6e6000: failed to match any schema with compatible: ['aspeed,ast2600-gfx', 'syscon']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: sgpiom@1e780500: '#interrupt-cells' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/gpio/aspeed,sgpio.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/xdma@1e6e7000: failed to match any schema with compatible: ['aspeed,ast2600-xdma']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: adc@1e6e9000: 'interrupts' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: sgpiom@1e780600: '#interrupt-cells' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/gpio/aspeed,sgpio.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: adc@1e6e9100: 'interrupts' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: crypto@1e6fa000: 'aspeed,ahbc' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/crypto/aspeed,ast2600-acry.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/timer@1e782000: failed to match any schema with compatible: ['aspeed,ast2600-timer']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/video@1e700000: failed to match any schema with compatible: ['aspeed,ast2600-video-engine']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: gpio@1e780000: 'usb_power-hog' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/gpio/aspeed,ast2400-gpio.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: sgpiom@1e780500: '#interrupt-cells' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/gpio/aspeed,sgpio.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: sgpiom@1e780600: '#interrupt-cells' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/gpio/aspeed,sgpio.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: lpc@1e789000: lpc-snoop@80: 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/mfd/aspeed-lpc.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: lpc@1e789000: reg-io-width: [[4]] is not of type 'object'
from schema $id: http://devicetree.org/schemas/mfd/aspeed-lpc.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/timer@1e782000: failed to match any schema with compatible: ['aspeed,ast2600-timer']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: kcs@24: 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: kcs@28: 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: kcs@2c: 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: kcs@114: 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/lpc@1e789000/lhc@a0: failed to match any schema with compatible: ['aspeed,ast2600-lhc']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: lpc@1e789000: lpc-snoop@80: 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/mfd/aspeed-lpc.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: lpc@1e789000: reg-io-width: [[4]] is not of type 'object'
from schema $id: http://devicetree.org/schemas/mfd/aspeed-lpc.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: kcs@24: 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/lpc@1e789000/ibt@140: failed to match any schema with compatible: ['aspeed,ast2600-ibt-bmc']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: sdc@1e740000: sdhci@1e740100:compatible: ['aspeed,ast2600-sdhci', 'sdhci'] is too long
from schema $id: http://devicetree.org/schemas/mmc/aspeed,sdhci.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: sdc@1e740000: sdhci@1e740200:compatible: ['aspeed,ast2600-sdhci', 'sdhci'] is too long
from schema $id: http://devicetree.org/schemas/mmc/aspeed,sdhci.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: kcs@28: 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: kcs@2c: 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: kcs@114: 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/sdc@1e740000/sdhci@1e740100: failed to match any schema with compatible: ['aspeed,ast2600-sdhci', 'sdhci']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/sdc@1e740000/sdhci@1e740200: failed to match any schema with compatible: ['aspeed,ast2600-sdhci', 'sdhci']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/lpc@1e789000/lhc@a0: failed to match any schema with compatible: ['aspeed,ast2600-lhc']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/lpc@1e789000/ibt@140: failed to match any schema with compatible: ['aspeed,ast2600-ibt-bmc']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: sdc@1e740000: sdhci@1e740100:compatible: ['aspeed,ast2600-sdhci', 'sdhci'] is too long
from schema $id: http://devicetree.org/schemas/mmc/aspeed,sdhci.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: sdc@1e740000: sdhci@1e740200:compatible: ['aspeed,ast2600-sdhci', 'sdhci'] is too long
from schema $id: http://devicetree.org/schemas/mmc/aspeed,sdhci.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/sdc@1e740000/sdhci@1e740100: failed to match any schema with compatible: ['aspeed,ast2600-sdhci', 'sdhci']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/sdc@1e740000/sdhci@1e740200: failed to match any schema with compatible: ['aspeed,ast2600-sdhci', 'sdhci']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/bus@1e78a000/i2c-bus@200/pca9552@61: failed to match any schema with compatible: ['nxp,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@80/pca9552@62: failed to match any schema with compatible: ['nxp,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/bus@1e78a000/i2c-bus@280/i2c-mux@70/i2c@0/pca9551@60: failed to match any schema with compatible: ['nxp,pca9551']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@280/pca9552@65: failed to match any schema with compatible: ['nxp,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@280/i2c-mux@70/i2c@0/pca9551@62: failed to match any schema with compatible: ['nxp,pca9551']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/bus@1e78a000/i2c-bus@300/i2c-mux@70/i2c@0/pca9551@60: failed to match any schema with compatible: ['nxp,pca9551']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@280/i2c-mux@70/i2c@1/pca9551@60: failed to match any schema with compatible: ['nxp,pca9551']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/bus@1e78a000/i2c-bus@300/i2c-mux@70/i2c@1/pca9551@61: failed to match any schema with compatible: ['nxp,pca9551']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@280/i2c-mux@70/i2c@2/pca9551@61: failed to match any schema with compatible: ['nxp,pca9551']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@300/pca9552@66: failed to match any schema with compatible: ['nxp,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@300/i2c-mux@70/i2c@0/pca9551@60: failed to match any schema with compatible: ['nxp,pca9551']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@300/i2c-mux@70/i2c@1/pca9551@61: failed to match any schema with compatible: ['nxp,pca9551']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/bus@1e78a000/i2c-bus@400/pca9552@30: failed to match any schema with compatible: ['ibm,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@300/i2c-mux@70/i2c@2/pca9551@62: failed to match any schema with compatible: ['nxp,pca9551']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@300/i2c-mux@70/i2c@3/pca9551@63: failed to match any schema with compatible: ['nxp,pca9551']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/bus@1e78a000/i2c-bus@400/pca9552@31: failed to match any schema with compatible: ['ibm,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@380/i2c-mux@70/i2c@0/pca9551@60: failed to match any schema with compatible: ['nxp,pca9551']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@380/i2c-mux@70/i2c@1/pca9551@62: failed to match any schema with compatible: ['nxp,pca9551']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/bus@1e78a000/i2c-bus@400/pca9552@32: failed to match any schema with compatible: ['ibm,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@380/i2c-mux@70/i2c@2/pca9551@63: failed to match any schema with compatible: ['nxp,pca9551']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@380/i2c-mux@70/i2c@3/pca9551@61: failed to match any schema with compatible: ['nxp,pca9551']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@380/pca9552@65: failed to match any schema with compatible: ['nxp,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/bus@1e78a000/i2c-bus@400/pca9552@33: failed to match any schema with compatible: ['ibm,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@400/pca9552@31: failed to match any schema with compatible: ['ibm,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/bus@1e78a000/i2c-bus@400/max31785@52: failed to match any schema with compatible: ['maxim,max31785a']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/bus@1e78a000/i2c-bus@400/pca9551@60: failed to match any schema with compatible: ['nxp,pca9551']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/bus@1e78a000/i2c-bus@400/pca9552@61: failed to match any schema with compatible: ['nxp,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@400/pca9552@32: failed to match any schema with compatible: ['ibm,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: dps310@76: '#io-channel-cells' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/trivial-devices.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@400/pca9552@33: failed to match any schema with compatible: ['ibm,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/bus@1e78a000/i2c-bus@480/pca9552@60: failed to match any schema with compatible: ['nxp,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/bus@1e78a000/i2c-bus@480/pca9552@61: failed to match any schema with compatible: ['nxp,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@400/pca9552@30: failed to match any schema with compatible: ['ibm,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/bus@1e78a000/i2c-bus@600/i2c-mux@70/i2c@0/pca9551@60: failed to match any schema with compatible: ['nxp,pca9551']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@400/pca9552@34: failed to match any schema with compatible: ['ibm,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/bus@1e78a000/i2c-bus@700/pca9552@60: failed to match any schema with compatible: ['nxp,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@400/pca9552@35: failed to match any schema with compatible: ['ibm,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/bus@1e78a000/i2c-bus@780/pca9552@60: failed to match any schema with compatible: ['nxp,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/bus@1e78a000/i2c-bus@800/pca9552@60: failed to match any schema with compatible: ['nxp,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: fsi@1e79b000: compatible: ['aspeed,ast2600-fsi-master', 'fsi-master'] is too long
from schema $id: http://devicetree.org/schemas/fsi/aspeed,ast2600-fsi-master.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: fsi@1e79b000: Unevaluated properties are not allowed ('#interrupt-cells', 'compatible', 'interrupt-controller' were unexpected)
from schema $id: http://devicetree.org/schemas/fsi/aspeed,ast2600-fsi-master.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/fsi@1e79b000: failed to match any schema with compatible: ['aspeed,ast2600-fsi-master', 'fsi-master']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@780/i2c-mux@70/i2c@2/pca9551@60: failed to match any schema with compatible: ['nxp,pca9551']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@780/i2c-mux@70/i2c@3/max31785@52: failed to match any schema with compatible: ['maxim,max31785a']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@780/i2c-mux@70/i2c@3/pca9552@60: failed to match any schema with compatible: ['nxp,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/bus@1e78a000/i2c-bus@780/i2c-mux@70/i2c@3/pca9552@61: failed to match any schema with compatible: ['nxp,pca9552']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: fsi@1e79b000: compatible: ['aspeed,ast2600-fsi-master', 'fsi-master'] is too long
from schema $id: http://devicetree.org/schemas/fsi/aspeed,ast2600-fsi-master.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: fsi@1e79b000: Unevaluated properties are not allowed ('#interrupt-cells', 'compatible', 'interrupt-controller' were unexpected)
from schema $id: http://devicetree.org/schemas/fsi/aspeed,ast2600-fsi-master.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/fsi@1e79b000: failed to match any schema with compatible: ['aspeed,ast2600-fsi-master', 'fsi-master']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: fsi@1e79b100: compatible: ['aspeed,ast2600-fsi-master', 'fsi-master'] is too long
from schema $id: http://devicetree.org/schemas/fsi/aspeed,ast2600-fsi-master.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/fsi@1e79b100: failed to match any schema with compatible: ['aspeed,ast2600-fsi-master', 'fsi-master']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dtb: /ahb/apb/dma-controller@1e79e000: failed to match any schema with compatible: ['aspeed,ast2600-udma']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: fsi@1e79b100: compatible: ['aspeed,ast2600-fsi-master', 'fsi-master'] is too long
from schema $id: http://devicetree.org/schemas/fsi/aspeed,ast2600-fsi-master.yaml#arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/fsi@1e79b100: failed to match any schema with compatible: ['aspeed,ast2600-fsi-master', 'fsi-master']arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dtb: /ahb/apb/dma-controller@1e79e000: failed to match any schema with compatible: ['aspeed,ast2600-udma']