virtio: features,fixes
Subsystems (3)
The following changes since commit 60b54b67c63d8f076152e0f7dccf39854dfc6a77:
Merge tag 'pull-lu-20240526' of https://gitlab.com/rth7680/qemu into staging (2024-05-26 17:51:00 -0700)
are available in the Git repository at:
https://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_upstream
for you to fetch changes up to bfcacf81d63a3d95f128bce3faf3564e7f98ea8b:
hw/cxl: Fix read from bogus memory (2024-06-04 15:05:03 -0400)
----------------------------------------------------------------
virtio: features,fixes
A bunch of improvements:
- vhost dirty log is now only scanned once, not once per device
- virtio and vhost now support VIRTIO_F_NOTIFICATION_DATA
- cxl gained DCD emulation support
- pvpanic gained shutdown support
- acpi now supports Generic Port Affinity Structure
- new tests
- bugfixes
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Alejandro Jimenez (1):
pvpanic: Emit GUEST_PVSHUTDOWN QMP event on pvpanic shutdown signal
Christian Pötzsch (1):
Fix vhost user assertion when sending more than one fd
Cindy Lu (2):
virtio-pci: Fix the use of an uninitialized irqfd.
virtio-pci: Fix the failure process in kvm_virtio_pci_vector_use_one()
Fan Ni (12):
hw/cxl/cxl-mailbox-utils: Add dc_event_log_size field to output payload of identify memory device command hw/cxl/cxl-mailbox-utils: Add dynamic capacity region representative and mailbox command support include/hw/cxl/cxl_device: Rename mem_size as static_mem_size for type3 memory devices hw/mem/cxl_type3: Add support to create DC regions to type3 memory devices hw/mem/cxl-type3: Refactor ct3_build_cdat_entries_for_mr to take mr size instead of mr as argument hw/mem/cxl_type3: Add host backend and address space handling for DC regions hw/mem/cxl_type3: Add DC extent list representative and get DC extent list mailbox support hw/cxl/cxl-mailbox-utils: Add mailbox commands to support add/release dynamic capacity response hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents hw/mem/cxl_type3: Add DPA range validation for accesses to DC regions hw/cxl/cxl-mailbox-utils: Add superset extent release mailbox support
hw/mem/cxl_type3: Allow to release extent superset in QMP interface
Gregory Price (2):
hw/cxl/mailbox: change CCI cmd set structure to be a member, not a reference hw/cxl/mailbox: interface to add CCI commands to an existing CCI
Halil Pasic (1):
vhost-vsock: add VIRTIO_F_RING_PACKED to feature_bits
Ira Weiny (1):
hw/cxl: Fix read from bogus memory
Jiqian Chen (1):
virtio-pci: only reset pm state during resetting
Jonah Palmer (5):
virtio/virtio-pci: Handle extra notification data
virtio: Prevent creation of device using notification-data with ioeventfd
virtio-mmio: Handle extra notification data
virtio-ccw: Handle extra notification data
vhost/vhost-user: Add VIRTIO_F_NOTIFICATION_DATA to vhost feature bits
Jonathan Cameron (6):
hw/acpi/GI: Fix trivial parameter alignment issue. hw/acpi: Insert an acpi-generic-node base under acpi-generic-initiator hw/acpi: Generic Port Affinity Structure support
bios-tables-test: Allow for new acpihmat-generic-x test data.
bios-tables-test: Add complex SRAT / HMAT test for GI GP
bios-tables-test: Add data for complex numa test (GI, GP etc)
Li Feng (2):
Revert "vhost-user: fix lost reconnect"
vhost-user: fix lost reconnect again
Marc-André Lureau (1):
vhost-user-gpu: fix import of DMABUF
Si-Wei Liu (2):
vhost: dirty log should be per backend type
vhost: Perform memory section dirty scans once per iteration
Stefano Garzarella (1):
vhost-vdpa: check vhost_vdpa_set_vring_ready() return value
Thomas Weißschuh (7):
scripts/update-linux-headers: Copy setup_data.h to correct directory
linux-headers: update to 6.10-rc1
hw/misc/pvpanic: centralize definition of supported events tests/qtest/pvpanic: use centralized definition of supported events hw/misc/pvpanic: add support for normal shutdowns tests/qtest/pvpanic: add tests for pvshutdown event Revert "docs/specs/pvpanic: mark shutdown event as not implemented"
Wafer (1):
hw/virtio: Fix obtain the buffer id from the last descriptor
qapi/cxl.json | 143 ++++++ qapi/qom.json | 35 ++ qapi/run-state.json | 14 + include/hw/acpi/acpi_generic_initiator.h | 33 +- include/hw/cxl/cxl_device.h | 85 +++- include/hw/cxl/cxl_events.h | 18 + include/hw/misc/pvpanic.h | 6 + include/hw/pci/pci_bridge.h | 1 + include/hw/virtio/vhost-user.h | 3 +- include/hw/virtio/vhost.h | 1 + include/hw/virtio/virtio.h | 2 + include/standard-headers/linux/ethtool.h | 55 +++ include/standard-headers/linux/pci_regs.h | 6 + include/standard-headers/linux/pvpanic.h | 7 +- include/standard-headers/linux/virtio_bt.h | 1 - include/standard-headers/linux/virtio_mem.h | 2 + include/standard-headers/linux/virtio_net.h | 143 ++++++ include/sysemu/runstate.h | 1 + linux-headers/asm-generic/unistd.h | 5 +- linux-headers/asm-loongarch/kvm.h | 4 + linux-headers/asm-mips/unistd_n32.h | 1 + linux-headers/asm-mips/unistd_n64.h | 1 + linux-headers/asm-mips/unistd_o32.h | 1 + linux-headers/asm-powerpc/unistd_32.h | 1 + linux-headers/asm-powerpc/unistd_64.h | 1 + linux-headers/asm-riscv/kvm.h | 1 + linux-headers/asm-s390/unistd_32.h | 1 + linux-headers/asm-s390/unistd_64.h | 1 + linux-headers/asm-x86/kvm.h | 4 +- linux-headers/asm-x86/unistd_32.h | 1 + linux-headers/asm-x86/unistd_64.h | 1 + linux-headers/asm-x86/unistd_x32.h | 2 + linux-headers/linux/kvm.h | 4 +- linux-headers/linux/stddef.h | 8 + linux-headers/linux/vhost.h | 15 +- hw/acpi/acpi_generic_initiator.c | 209 ++++++--- hw/block/vhost-user-blk.c | 6 +- hw/cxl/cxl-mailbox-utils.c | 658 +++++++++++++++++++++++++++- hw/display/vhost-user-gpu.c | 5 +- hw/mem/cxl_type3.c | 637 +++++++++++++++++++++++++-- hw/mem/cxl_type3_stubs.c | 25 ++ hw/misc/pvpanic-isa.c | 3 +- hw/misc/pvpanic-pci.c | 3 +- hw/misc/pvpanic.c | 8 +- hw/net/vhost_net.c | 2 + hw/pci-bridge/pci_expander_bridge.c | 1 - hw/s390x/s390-virtio-ccw.c | 17 +- hw/scsi/vhost-scsi.c | 1 + hw/scsi/vhost-user-scsi.c | 7 +- hw/virtio/vhost-user-base.c | 5 +- hw/virtio/vhost-user-fs.c | 2 +- hw/virtio/vhost-user-vsock.c | 1 + hw/virtio/vhost-user.c | 18 +- hw/virtio/vhost-vsock-common.c | 1 + hw/virtio/vhost.c | 112 ++++- hw/virtio/virtio-mmio.c | 11 +- hw/virtio/virtio-pci.c | 45 +- hw/virtio/virtio.c | 45 ++ net/vhost-vdpa.c | 16 +- subprojects/libvhost-user/libvhost-user.c | 2 +- system/runstate.c | 6 + tests/qtest/bios-tables-test.c | 92 ++++ tests/qtest/pvpanic-pci-test.c | 44 +- tests/qtest/pvpanic-test.c | 34 +- docs/specs/pvpanic.rst | 2 +- scripts/update-linux-headers.sh | 2 +- tests/data/acpi/q35/APIC.acpihmat-generic-x | Bin 0 -> 136 bytes tests/data/acpi/q35/CEDT.acpihmat-generic-x | Bin 0 -> 68 bytes tests/data/acpi/q35/DSDT.acpihmat-generic-x | Bin 0 -> 10400 bytes tests/data/acpi/q35/HMAT.acpihmat-generic-x | Bin 0 -> 360 bytes tests/data/acpi/q35/SRAT.acpihmat-generic-x | Bin 0 -> 520 bytes 71 files changed, 2407 insertions(+), 221 deletions(-) create mode 100644 tests/data/acpi/q35/APIC.acpihmat-generic-x create mode 100644 tests/data/acpi/q35/CEDT.acpihmat-generic-x create mode 100644 tests/data/acpi/q35/DSDT.acpihmat-generic-x create mode 100644 tests/data/acpi/q35/HMAT.acpihmat-generic-x create mode 100644 tests/data/acpi/q35/SRAT.acpihmat-generic-x
[PULL 09/46] vhost/vhost-user: Add VIRTIO_F_NOTIFICATION_DATA to vhost feature bits
From: Jonah Palmer <[email protected]>
Add support for the VIRTIO_F_NOTIFICATION_DATA feature across a variety of vhost devices.
The inclusion of VIRTIO_F_NOTIFICATION_DATA in the feature bits arrays for these devices ensures that the backend is capable of offering and providing support for this feature, and that it can be disabled if the backend does not support it.
Message-Id: <[email protected]>
--- hw/block/vhost-user-blk.c | 1 + hw/net/vhost_net.c | 2 ++ hw/scsi/vhost-scsi.c | 1 + hw/scsi/vhost-user-scsi.c | 1 + hw/virtio/vhost-user-fs.c | 2 +- hw/virtio/vhost-user-vsock.c | 1 + net/vhost-vdpa.c | 1 + 7 files changed, 8 insertions(+), 1 deletion(-)
hw/block/vhost-user-blk.c +1 -0
@@ -51,6 +51,7 @@ static const int user_feature_bits[] = {VIRTIO_F_RING_PACKED ,VIRTIO_F_IOMMU_PLATFORM ,VIRTIO_F_RING_RESET , +VIRTIO_F_NOTIFICATION_DATA , VHOST_INVALID_FEATURE_BIT };
hw/net/vhost_net.c +2 -0
@@ -48,6 +48,7 @@ static const int kernel_feature_bits[] = {VIRTIO_F_IOMMU_PLATFORM ,VIRTIO_F_RING_PACKED ,VIRTIO_F_RING_RESET , +VIRTIO_F_NOTIFICATION_DATA ,VIRTIO_NET_F_HASH_REPORT , VHOST_INVALID_FEATURE_BIT };
@@ -55,6 +56,7 @@ static const int kernel_feature_bits[] = {/* Features supported by others. */ static const int user_feature_bits[] = {VIRTIO_F_NOTIFY_ON_EMPTY , +VIRTIO_F_NOTIFICATION_DATA ,VIRTIO_RING_F_INDIRECT_DESC ,VIRTIO_RING_F_EVENT_IDX ,
hw/scsi/vhost-scsi.c +1 -0
@@ -38,6 +38,7 @@ static const int kernel_feature_bits[] = {VIRTIO_RING_F_EVENT_IDX ,VIRTIO_SCSI_F_HOTPLUG ,VIRTIO_F_RING_RESET , +VIRTIO_F_NOTIFICATION_DATA , VHOST_INVALID_FEATURE_BIT };
hw/scsi/vhost-user-scsi.c +1 -0
@@ -36,6 +36,7 @@ static const int user_feature_bits[] = {VIRTIO_RING_F_EVENT_IDX ,VIRTIO_SCSI_F_HOTPLUG ,VIRTIO_F_RING_RESET , +VIRTIO_F_NOTIFICATION_DATA , VHOST_INVALID_FEATURE_BIT };
hw/virtio/vhost-user-fs.c +1 -1
@@ -33,7 +33,7 @@ static const int user_feature_bits[] = {VIRTIO_F_RING_PACKED ,VIRTIO_F_IOMMU_PLATFORM ,VIRTIO_F_RING_RESET , - +VIRTIO_F_NOTIFICATION_DATA , VHOST_INVALID_FEATURE_BIT };
hw/virtio/vhost-user-vsock.c +1 -0
@@ -21,6 +21,7 @@ static const int user_feature_bits[] = {VIRTIO_RING_F_INDIRECT_DESC ,VIRTIO_RING_F_EVENT_IDX ,VIRTIO_F_NOTIFY_ON_EMPTY , +VIRTIO_F_NOTIFICATION_DATA , VHOST_INVALID_FEATURE_BIT };
net/vhost-vdpa.c +1 -0
@@ -62,6 +62,7 @@ const int vdpa_feature_bits[] = {VIRTIO_F_RING_PACKED ,VIRTIO_F_RING_RESET ,VIRTIO_F_VERSION_1 , +VIRTIO_F_NOTIFICATION_DATA ,VIRTIO_NET_F_CSUM ,VIRTIO_NET_F_CTRL_GUEST_OFFLOADS , VIRTIO_NET_F_CTRL_MAC_ADDR,
Signature · 1 line
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[PULL 01/46] vhost: dirty log should be per backend type
In reply to Michael S. TsirkinFrom: Si-Wei Liu <[email protected]>
There could be a mix of both vhost-user and vhost-kernel clients in the same QEMU process, where separate vhost loggers for the specific vhost type have to be used. Make the vhost logger per backend type, and have them properly reference counted.
Message-Id: <[email protected]>
--- hw/virtio/vhost.c | 45 +++++++++++++++++++++++++++++++++------------ 1 file changed, 33 insertions(+), 12 deletions(-)
hw/virtio/vhost.c +33 -12
@@ -43,8 +43,8 @@ do { } while (0)#endif -static struct vhost_log *vhost_log; -static struct vhost_log *vhost_log_shm; +static struct vhost_log *vhost_log[VHOST_BACKEND_TYPE_MAX ]; +static struct vhost_log *vhost_log_shm[VHOST_BACKEND_TYPE_MAX ];/* Memslots used by backends that support private memslots (without an fd). */ static unsigned int used_memslots;
@@ -287,6 +287,10 @@ static int vhost_set_backend_type(struct vhost_dev *dev, r =-1 ; } +if (r ==0 ) { +assert (dev->vhost_ops->backend_type == backend_type); + } +return r; }
@@ -319,16 +323,22 @@ static struct vhost_log *vhost_log_alloc(uint64_t size, bool share)return log; } -static struct vhost_log *vhost_log_get (uint64_t size,bool share) +static struct vhost_log *vhost_log_get (VhostBackendType backend_type, +uint64_t size,bool share) { -struct vhost_log *log = share ? vhost_log_shm : vhost_log; +struct vhost_log *log; + +assert (backend_type >VHOST_BACKEND_TYPE_NONE ); +assert (backend_type <VHOST_BACKEND_TYPE_MAX ); + + log = share ? vhost_log_shm[backend_type] : vhost_log[backend_type];if (!log || log->size != size) { log =vhost_log_alloc (size, share);if (share) { - vhost_log_shm = log; + vhost_log_shm[backend_type] = log; }else { - vhost_log = log; + vhost_log[backend_type] = log; } }else { ++log->refcnt;
@@ -340,11 +350,20 @@ static struct vhost_log *vhost_log_get(uint64_t size, bool share)static void vhost_log_put (struct vhost_dev *dev,bool sync) {struct vhost_log *log = dev->log; +VhostBackendType backend_type;if (!log) {return ; } +assert (dev->vhost_ops); + backend_type = dev->vhost_ops->backend_type; + +if (backend_type ==VHOST_BACKEND_TYPE_NONE || + backend_type >=VHOST_BACKEND_TYPE_MAX ) { +return ; + } + --log->refcnt;if (log->refcnt ==0 ) {/* Sync only the range covered by the old log */
@@ -352,13 +371,13 @@ static void vhost_log_put(struct vhost_dev *dev, bool sync)vhost_log_sync_range (dev,0 , dev->log_size *VHOST_LOG_CHUNK -1 ); } -if (vhost_log == log) { +if (vhost_log[backend_type] == log) {g_free (log->log); - vhost_log =NULL ; - }else if (vhost_log_shm == log) { + vhost_log[backend_type] =NULL ; + }else if (vhost_log_shm[backend_type] == log) {qemu_memfd_free (log->log, log->size *sizeof (*(log->log)), log->fd); - vhost_log_shm =NULL ; + vhost_log_shm[backend_type] =NULL ; }g_free (log);
@@ -376,7 +395,8 @@ static bool vhost_dev_log_is_shared(struct vhost_dev *dev)static inline void vhost_dev_log_resize (struct vhost_dev *dev,uint64_t size) { -struct vhost_log *log =vhost_log_get (size,vhost_dev_log_is_shared (dev)); +struct vhost_log *log =vhost_log_get (dev->vhost_ops->backend_type, + size,vhost_dev_log_is_shared (dev));uint64_t log_base = (uintptr_t )log->log;int r;
@@ -2044,7 +2064,8 @@ int vhost_dev_start(struct vhost_dev *hdev, VirtIODevice *vdev, bool vrings)uint64_t log_base; hdev->log_size =vhost_get_log_size (hdev); - hdev->log =vhost_log_get (hdev->log_size, + hdev->log =vhost_log_get (hdev->vhost_ops->backend_type, + hdev->log_size,vhost_dev_log_is_shared (hdev)); log_base = (uintptr_t )hdev->log->log; r = hdev->vhost_ops->vhost_set_log_base(hdev,
Signature · 1 line
MST
[PULL 05/46] virtio/virtio-pci: Handle extra notification data
In reply to Michael S. TsirkinFrom: Jonah Palmer <[email protected]>
Add support to virtio-pci devices for handling the extra data sent from the driver to the device when the VIRTIO_F_NOTIFICATION_DATA transport feature has been negotiated.
The extra data that's passed to the virtio-pci device when this feature is enabled varies depending on the device's virtqueue layout.
In a split virtqueue layout, this data includes:
- upper 16 bits: shadow_avail_idx
- lower 16 bits: virtqueue index
In a packed virtqueue layout, this data includes:
- upper 16 bits: 1-bit wrap counter & 15-bit shadow_avail_idx
- lower 16 bits: virtqueue index
Message-Id: <[email protected]>
--- include/hw/virtio/virtio.h | 2 ++ hw/virtio/virtio-pci.c | 12 +++++++++--- hw/virtio/virtio.c | 18 ++++++++++++++++++ 3 files changed, 29 insertions(+), 3 deletions(-)
include/hw/virtio/virtio.h +2 -0
@@ -307,6 +307,8 @@ int virtio_queue_ready(VirtQueue *vq);int virtio_queue_empty (VirtQueue *vq); +void virtio_queue_set_shadow_avail_idx (VirtQueue *vq,uint16_t idx); +/* Host binding interface. */ uint32_t virtio_config_readb (VirtIODevice *vdev,uint32_t addr);
hw/virtio/virtio-pci.c +9 -3
@@ -384,7 +384,7 @@ static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val) {VirtIOPCIProxy *proxy = opaque;VirtIODevice *vdev =virtio_bus_get_device (&proxy->bus); -uint16_t vector; +uint16_t vector, vq_idx;hwaddr pa;switch (addr) {
@@ -408,8 +408,14 @@ static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val) vdev->queue_sel = val;break ;case VIRTIO_PCI_QUEUE_NOTIFY : -if (val <VIRTIO_QUEUE_MAX ) { -virtio_queue_notify (vdev, val); + vq_idx = val; +if (vq_idx <VIRTIO_QUEUE_MAX &&virtio_queue_get_num (vdev, vq_idx)) { +if (virtio_vdev_has_feature (vdev,VIRTIO_F_NOTIFICATION_DATA )) { +VirtQueue *vq =virtio_get_queue (vdev, vq_idx); + +virtio_queue_set_shadow_avail_idx (vq, val >>16 ); + } +virtio_queue_notify (vdev, vq_idx); }break ;case VIRTIO_PCI_STATUS :
hw/virtio/virtio.c +18 -0
@@ -2264,6 +2264,24 @@ void virtio_queue_set_align(VirtIODevice *vdev, int n, int align) } } +void virtio_queue_set_shadow_avail_idx (VirtQueue *vq,uint16_t shadow_avail_idx) +{ +if (!vq->vring.desc) { +return ; + } + +/* +* 16-bit data for packed VQs include 1-bit wrap counter and +* 15-bit shadow_avail_idx. +*/ +if (virtio_vdev_has_feature (vq->vdev,VIRTIO_F_RING_PACKED )) { + vq->shadow_avail_wrap_counter = (shadow_avail_idx >>15 ) &0x1 ; + vq->shadow_avail_idx = shadow_avail_idx &0x7FFF ; + }else { + vq->shadow_avail_idx = shadow_avail_idx; + } +} +static void virtio_queue_notify_vq (VirtQueue *vq) {if (vq->vring.desc && vq->handle_output) {
Signature · 1 line
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[PULL 13/46] virtio-pci: only reset pm state during resetting
In reply to Michael S. TsirkinFrom: Jiqian Chen <[email protected]>
Fix bug imported by 27ce0f3afc9dd ("fix Power Management Control Register for PCI Express virtio devices" After this change, observe that QEMU may erroneously clear the power status of the device, or may erroneously clear non writable registers, such as NO_SOFT_RESET, etc.
Only state of PM_CTRL is writable.
Only when flag VIRTIO_PCI_FLAG_INIT_PM is set, need to reset state.
Message-Id: <[email protected]>
--- hw/virtio/virtio-pci.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)
hw/virtio/virtio-pci.c +7 -1
@@ -2309,10 +2309,16 @@ static void virtio_pci_bus_reset_hold(Object *obj, ResetType type)virtio_pci_reset (qdev);if (pci_is_express (dev)) { +VirtIOPCIProxy *proxy =VIRTIO_PCI (dev); +pcie_cap_deverr_reset (dev);pcie_cap_lnkctl_reset (dev); -pci_set_word (dev->config + dev->exp.pm_cap +PCI_PM_CTRL ,0 ); +if (proxy->flags &VIRTIO_PCI_FLAG_INIT_PM ) { +pci_word_test_and_clear_mask ( + dev->config + dev->exp.pm_cap +PCI_PM_CTRL , +PCI_PM_CTRL_STATE_MASK ); + } } }
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[PULL 10/46] Fix vhost user assertion when sending more than one fd
In reply to Michael S. TsirkinFrom: Christian Pötzsch <[email protected]>
If the client sends more than one region this assert triggers. The reason is that two fd's are 8 bytes and VHOST_MEMORY_BASELINE_NREGIONS is exactly 8.
The assert is wrong because it should not test for the size of the fd array, but for the numbers of regions.
Message-Id: <[email protected]>
--- subprojects/libvhost-user/libvhost-user.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
subprojects/libvhost-user/libvhost-user.c +1 -1
@@ -568,7 +568,7 @@ vu_message_read_default(VuDev *dev, int conn_fd, VhostUserMsg *vmsg)if (cmsg->cmsg_level ==SOL_SOCKET && cmsg->cmsg_type ==SCM_RIGHTS ) { fd_size = cmsg->cmsg_len -CMSG_LEN (0 ); vmsg->fd_num = fd_size /sizeof (int ); -assert (fd_size <VHOST_MEMORY_BASELINE_NREGIONS ); +assert (vmsg->fd_num <=VHOST_MEMORY_BASELINE_NREGIONS );memcpy (vmsg->fds,CMSG_DATA (cmsg), fd_size);break ; }
Signature · 1 line
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[PULL 11/46] vhost-vsock: add VIRTIO_F_RING_PACKED to feature_bits
In reply to Michael S. TsirkinFrom: Halil Pasic <[email protected]>
Not having VIRTIO_F_RING_PACKED in feature_bits[] is a problem when the vhost-vsock device does not offer the feature bit VIRTIO_F_RING_PACKED but the in QEMU device is configured to try to use the packed layout (the virtio property "packed" is on).
As of today, the Linux kernel vhost-vsock device does not support the packed queue layout (as vhost does not support packed), and does not offer VIRTIO_F_RING_PACKED. Thus when for example a vhost-vsock-ccw is used with packed=on, VIRTIO_F_RING_PACKED ends up being negotiated, despite the fact that the device does not actually support it, and one gets to keep the pieces.
Message-Id: <[email protected]>
--- hw/virtio/vhost-vsock-common.c | 1 + 1 file changed, 1 insertion(+)
hw/virtio/vhost-vsock-common.c +1 -0
@@ -22,6 +22,7 @@const int feature_bits[] = {VIRTIO_VSOCK_F_SEQPACKET ,VIRTIO_F_RING_RESET , +VIRTIO_F_RING_PACKED ,VHOST_INVALID_FEATURE_BIT };
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[PULL 02/46] vhost: Perform memory section dirty scans once per iteration
In reply to Michael S. TsirkinFrom: Si-Wei Liu <[email protected]>
On setups with one or more virtio-net devices with vhost on, dirty tracking iteration increases cost the bigger the number amount of queues are set up e.g. on idle guests migration the following is observed with virtio-net with vhost=on:
48 queues -> 78.11% [.] vhost_dev_sync_region.isra.13 8 queues -> 40.50% [.] vhost_dev_sync_region.isra.13 1 queue -> 6.89% [.] vhost_dev_sync_region.isra.13
2 devices, 1 queue -> 18.60% [.] vhost_dev_sync_region.isra.14
With high memory rates the symptom is lack of convergence as soon as it has a vhost device with a sufficiently high number of queues, the sufficient number of vhost devices.
On every migration iteration (every 100msecs) it will redundantly query the *shared log* the number of queues configured with vhost that exist in the guest. For the virtqueue data, this is necessary, but not for the memory sections which are the same. So essentially we end up scanning the dirty log too often.
To fix that, select a vhost device responsible for scanning the log with regards to memory sections dirty tracking. It is selected when we enable the logger (during migration) and cleared when we disable the logger. If the vhost logger device goes away for some reason, the logger will be re-selected from the rest of vhost devices.
After making mem-section logger a singleton instance, constant cost of 7%-9% (like the 1 queue report) will be seen, no matter how many queues or how many vhost devices are configured:
48 queues -> 8.71% [.] vhost_dev_sync_region.isra.13
2 devices, 8 queues -> 7.97% [.] vhost_dev_sync_region.isra.14
Message-Id: <[email protected]>
--- include/hw/virtio/vhost.h | 1 + hw/virtio/vhost.c | 67 +++++++++++++++++++++++++++++++++++---- 2 files changed, 62 insertions(+), 6 deletions(-)
include/hw/virtio/vhost.h +1 -0
@@ -129,6 +129,7 @@ struct vhost_dev {void *opaque;struct vhost_log *log;QLIST_ENTRY (vhost_dev) entry; +QLIST_ENTRY (vhost_dev) logdev_entry; QLIST_HEAD(, vhost_iommu) iommu_list;IOMMUNotifier n;const VhostDevConfigOps *config_ops;
hw/virtio/vhost.c +61 -6
103 lines not on this page · raw message
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[PULL 08/46] virtio-ccw: Handle extra notification data
In reply to Michael S. TsirkinFrom: Jonah Palmer <[email protected]>
Add support to virtio-ccw devices for handling the extra data sent from the driver to the device when the VIRTIO_F_NOTIFICATION_DATA transport feature has been negotiated.
The extra data that's passed to the virtio-ccw device when this feature is enabled varies depending on the device's virtqueue layout.
That data passed to the virtio-ccw device is in the same format as the data passed to virtio-pci devices.
Message-Id: <[email protected]>
--- hw/s390x/s390-virtio-ccw.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-)
hw/s390x/s390-virtio-ccw.c +13 -4
@@ -125,9 +125,11 @@ static void subsystem_reset(void)static int virtio_ccw_hcall_notify (const uint64_t *args) {uint64_t subch_id = args[0 ]; -uint64_t queue = args[1 ]; +uint64_t data = args[1 ];SubchDev *sch; +VirtIODevice *vdev;int cssid, ssid, schid, m; +uint16_t vq_idx = data;if (ioinst_disassemble_sch_ident (subch_id, &m, &cssid, &ssid, &schid)) {return -EINVAL ;
@@ -136,12 +138,19 @@ static int virtio_ccw_hcall_notify(const uint64_t *args)if (!sch || !css_subch_visible (sch)) {return -EINVAL ; } -if (queue >=VIRTIO_QUEUE_MAX ) { + + vdev =virtio_ccw_get_vdev (sch); +if (vq_idx >=VIRTIO_QUEUE_MAX || !virtio_queue_get_num (vdev, vq_idx)) {return -EINVAL ; } -virtio_queue_notify (virtio_ccw_get_vdev (sch), queue); -return 0 ; +if (virtio_vdev_has_feature (vdev,VIRTIO_F_NOTIFICATION_DATA )) { +virtio_queue_set_shadow_avail_idx (virtio_get_queue (vdev, vq_idx), + (data >>16 ) &0xFFFF ); + } + +virtio_queue_notify (vdev, vq_idx); +return 0 ; }static int virtio_ccw_hcall_early_printk (const uint64_t *args)
Signature · 1 line
MST
[PULL 15/46] Revert "vhost-user: fix lost reconnect"
In reply to Michael S. TsirkinFrom: Li Feng <[email protected]>
This reverts commit f02a4b8e6431598612466f76aac64ab492849abf.
Since the current patch cannot completely fix the lost reconnect problem, there is a scenario that is not considered:
- When the virtio-blk driver is removed from the guest os, s->connected has no chance to be set to false, resulting in subsequent reconnection not being executed.
The next patch will completely fix this issue with a better approach.
Message-Id: <[email protected]>
--- include/hw/virtio/vhost-user.h | 3 +-- hw/block/vhost-user-blk.c | 2 +- hw/scsi/vhost-user-scsi.c | 3 +-- hw/virtio/vhost-user-base.c | 2 +- hw/virtio/vhost-user.c | 10 ++-------- 5 files changed, 6 insertions(+), 14 deletions(-)
include/hw/virtio/vhost-user.h +1 -2
@@ -108,7 +108,6 @@ typedef void (*vu_async_close_fn)(DeviceState *cb);void vhost_user_async_close (DeviceState *d,CharBackend *chardev,struct vhost_dev *vhost, -vu_async_close_fn cb, -IOEventHandler *event_cb); +vu_async_close_fn cb);#endif
hw/block/vhost-user-blk.c +1 -1
@@ -385,7 +385,7 @@ static void vhost_user_blk_event(void *opaque, QEMUChrEvent event)case CHR_EVENT_CLOSED :/* defer close until later to avoid circular close */ vhost_user_async_close (dev, &s->chardev, &s->dev, - vhost_user_blk_disconnect, vhost_user_blk_event); + vhost_user_blk_disconnect);break ;case CHR_EVENT_BREAK :case CHR_EVENT_MUX_IN :
hw/scsi/vhost-user-scsi.c +1 -2
@@ -215,8 +215,7 @@ static void vhost_user_scsi_event(void *opaque, QEMUChrEvent event)case CHR_EVENT_CLOSED :/* defer close until later to avoid circular close */ vhost_user_async_close (dev, &vs->conf.chardev, &vsc->dev, - vhost_user_scsi_disconnect, - vhost_user_scsi_event); + vhost_user_scsi_disconnect);break ;case CHR_EVENT_BREAK :case CHR_EVENT_MUX_IN :
hw/virtio/vhost-user-base.c +1 -1
@@ -254,7 +254,7 @@ static void vub_event(void *opaque, QEMUChrEvent event)case CHR_EVENT_CLOSED :/* defer close until later to avoid circular close */ vhost_user_async_close (dev, &vub->chardev, &vub->vhost_dev, - vub_disconnect, vub_event); + vub_disconnect);break ;case CHR_EVENT_BREAK :case CHR_EVENT_MUX_IN :
hw/virtio/vhost-user.c +2 -8
@@ -2776,7 +2776,6 @@ typedef struct {DeviceState *dev;CharBackend *cd;struct vhost_dev *vhost; -IOEventHandler *event_cb; } VhostAsyncCallback;static void vhost_user_async_close_bh (void *opaque)
@@ -2791,10 +2790,7 @@ static void vhost_user_async_close_bh(void *opaque)*/ if (vhost->vdev) { data->cb (data->dev); - }else if (data->event_cb) { -qemu_chr_fe_set_handlers (data->cd,NULL ,NULL , data->event_cb, -NULL , data->dev,NULL , true); - } + }g_free (data); }
@@ -2806,8 +2802,7 @@ static void vhost_user_async_close_bh(void *opaque)*/ void vhost_user_async_close (DeviceState *d,CharBackend *chardev,struct vhost_dev *vhost, -vu_async_close_fn cb, -IOEventHandler *event_cb) +vu_async_close_fn cb) {if (!runstate_check (RUN_STATE_SHUTDOWN )) {/*
@@ -2823,7 +2818,6 @@ void vhost_user_async_close(DeviceState *d, data->dev = d; data->cd = chardev; data->vhost = vhost; - data->event_cb = event_cb;/* Disable any further notifications on the chardev */ qemu_chr_fe_set_handlers(chardev,
Signature · 1 line
MST
[PULL 16/46] vhost-user: fix lost reconnect again
In reply to Michael S. TsirkinFrom: Li Feng <[email protected]>
When the vhost-user is reconnecting to the backend, and if the vhost-user fails at the get_features in vhost_dev_init(), then the reconnect will fail and it will not be retriggered forever.
The reason is:
When the vhost-user fail at get_features, the vhost_dev_cleanup will be called immediately.
vhost_dev_cleanup calls 'memset(hdev, 0, sizeof(struct vhost_dev))'.
The reconnect path is:vhost_user_blk_event
vhost_user_async_close(.. vhost_user_blk_disconnect ..)
qemu_chr_fe_set_handlers <----- clear the notifier callback
schedule vhost_user_async_close_bh
The vhost->vdev is null, so the vhost_user_blk_disconnect will not be called, then the event fd callback will not be reinstalled.
We need to ensure that even if vhost_dev_init initialization fails, the event handler still needs to be reinstalled when s->connected is false.
All vhost-user devices have this issue, including vhost-user-blk/scsi.
Message-Id: <[email protected]>
--- hw/block/vhost-user-blk.c | 3 ++- hw/scsi/vhost-user-scsi.c | 3 ++- hw/virtio/vhost-user-base.c | 3 ++- hw/virtio/vhost-user.c | 10 +--------- 4 files changed, 7 insertions(+), 12 deletions(-)
hw/block/vhost-user-blk.c +2 -1
@@ -354,7 +354,7 @@ static void vhost_user_blk_disconnect(DeviceState *dev)VHostUserBlk *s =VHOST_USER_BLK (vdev);if (!s->connected) { -return ; + goto done; } s->connected = false;
@@ -362,6 +362,7 @@ static void vhost_user_blk_disconnect(DeviceState *dev)vhost_dev_cleanup (&s->dev); +done:/* Re-instate the event handler for new connections */ qemu_chr_fe_set_handlers (&s->chardev,NULL ,NULL , vhost_user_blk_event,NULL , dev,NULL , true);
hw/scsi/vhost-user-scsi.c +2 -1
@@ -182,7 +182,7 @@ static void vhost_user_scsi_disconnect(DeviceState *dev)VirtIOSCSICommon *vs =VIRTIO_SCSI_COMMON (dev);if (!s->connected) { -return ; + goto done; } s->connected = false;
@@ -190,6 +190,7 @@ static void vhost_user_scsi_disconnect(DeviceState *dev)vhost_dev_cleanup (&vsc->dev); +done:/* Re-instate the event handler for new connections */ qemu_chr_fe_set_handlers (&vs->conf.chardev,NULL ,NULL , vhost_user_scsi_event,NULL , dev,NULL , true);
hw/virtio/vhost-user-base.c +2 -1
@@ -225,13 +225,14 @@ static void vub_disconnect(DeviceState *dev)VHostUserBase *vub =VHOST_USER_BASE (vdev);if (!vub->connected) { -return ; + goto done; } vub->connected = false;vub_stop (vdev);vhost_dev_cleanup (&vub->vhost_dev); +done:/* Re-instate the event handler for new connections */ qemu_chr_fe_set_handlers(&vub->chardev, NULL, NULL, vub_event,
hw/virtio/vhost-user.c +1 -9
@@ -2781,16 +2781,8 @@ typedef struct {static void vhost_user_async_close_bh (void *opaque) {VhostAsyncCallback *data = opaque; -struct vhost_dev *vhost = data->vhost; -/* -* If the vhost_dev has been cleared in the meantime there is -* nothing left to do as some other path has completed the -* cleanup. -*/ -if (vhost->vdev) { - data->cb (data->dev); - } + data->cb (data->dev);g_free (data); }
Signature · 1 line
MST
[PULL 20/46] hw/cxl/cxl-mailbox-utils: Add dynamic capacity region representative and mailbox command support
In reply to Michael S. TsirkinFrom: Fan Ni <[email protected]>
Per cxl spec r3.1, add dynamic capacity (DC) region representative based on Table 8-165 and extend the cxl type3 device definition to include DC region information. Also, based on info in 8.2.9.9.9.1, add 'Get Dynamic Capacity Configuration' mailbox support.
Note: we store region decode length as byte-wise length on the device, which should be divided by 256 * MiB before being returned to the host for "Get Dynamic Capacity Configuration" mailbox command per specification.
Message-Id: <[email protected]>
--- include/hw/cxl/cxl_device.h | 16 +++++++ hw/cxl/cxl-mailbox-utils.c | 96 +++++++++++++++++++++++++++++++++++++ 2 files changed, 112 insertions(+)
include/hw/cxl/cxl_device.h +16 -0
@@ -422,6 +422,17 @@ typedef struct CXLPoison { typedef QLIST_HEAD(, CXLPoison) CXLPoisonList;#define CXL_POISON_LIST_LIMIT 256 +#define DCD_MAX_NUM_REGION 8 + +typedef struct CXLDCRegion { +uint64_t base;/* aligned to 256*MiB */ +uint64_t decode_len;/* aligned to 256*MiB */ +uint64_t len; +uint64_t block_size; +uint32_t dsmadhandle; +uint8_t flags; +}CXLDCRegion ; +struct CXLType3Dev {/* Private */ PCIDevice parent_obj;
@@ -454,6 +465,11 @@ struct CXLType3Dev {unsigned int poison_list_cnt;bool poison_list_overflowed;uint64_t poison_list_overflow_ts; + +struct dynamic_capacity { +uint8_t num_regions;/* 0-8 regions */ +CXLDCRegion regions[DCD_MAX_NUM_REGION ]; + } dc; };#define TYPE_CXL_TYPE3 "cxl-type3"
hw/cxl/cxl-mailbox-utils.c +96 -0
127 lines not on this page · raw message
Signature · 1 line
MST
[PULL 04/46] virtio-pci: Fix the use of an uninitialized irqfd.
In reply to Michael S. TsirkinFrom: Cindy Lu <[email protected]>
The crash was reported in MAC OS and NixOS, here is the link for this bug
https://gitlab.com/qemu-project/qemu/-/issues/2334
https://gitlab.com/qemu-project/qemu/-/issues/2321
The root cause is that the function virtio_pci_set_guest_notifiers() only initializes the irqfd when the use_guest_notifier_mask and guest_notifier_mask are set.
However, this check is missing in virtio_pci_set_vector().
So the fix is to add this check.
This fix is verified in vyatta,MacOS,NixOS,fedora system.
The bt tree for this bug is:
Thread 6 "CPU 0/KVM" received signal SIGSEGV, Segmentation fault. [Switching to Thread 0x7c817be006c0 (LWP 1269146)] kvm_virtio_pci_vq_vector_use () at ../qemu-9.0.0/hw/virtio/virtio-pci.c:817
817 if (irqfd->users == 0) {
(gdb) thread apply all bt
...
Thread 6 (Thread 0x7c817be006c0 (LWP 1269146) "CPU 0/KVM"):
0 kvm_virtio_pci_vq_vector_use () at ../qemu-9.0.0/hw/virtio/virtio-pci.c:817 1 kvm_virtio_pci_vector_use_one () at ../qemu-9.0.0/hw/virtio/virtio-pci.c:893 2 0x00005983657045e2 in memory_region_write_accessor () at ../qemu-9.0.0/system/memory.c:497 3 0x0000598365704ba6 in access_with_adjusted_size () at ../qemu-9.0.0/system/memory.c:573 4 0x0000598365705059 in memory_region_dispatch_write () at ../qemu-9.0.0/system/memory.c:1528 5 0x00005983659b8e1f in flatview_write_continue_step.isra.0 () at ../qemu-9.0.0/system/physmem.c:2713 6 0x000059836570ba7d in flatview_write_continue () at ../qemu-9.0.0/system/physmem.c:2743 7 flatview_write () at ../qemu-9.0.0/system/physmem.c:2774 8 0x000059836570bb76 in address_space_write () at ../qemu-9.0.0/system/physmem.c:2894 9 0x0000598365763afe in address_space_rw () at ../qemu-9.0.0/system/physmem.c:2904
10 kvm_cpu_exec () at ../qemu-9.0.0/accel/kvm/kvm-all.c:2917
11 0x000059836576656e in kvm_vcpu_thread_fn () at ../qemu-9.0.0/accel/kvm/kvm-accel-ops.c:50 12 0x0000598365926ca8 in qemu_thread_start () at ../qemu-9.0.0/util/qemu-thread-posix.c:541 13 0x00007c8185bcd1cf in ??? () at /usr/lib/libc.so.6
14 0x00007c8185c4e504 in clone () at /usr/lib/libc.so.6
Message-Id: <[email protected]>
--- hw/virtio/virtio-pci.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)
hw/virtio/virtio-pci.c +5 -2
@@ -1431,6 +1431,7 @@ static void virtio_pci_set_vector(VirtIODevice *vdev, {bool kvm_irqfd = (vdev->status &VIRTIO_CONFIG_S_DRIVER_OK ) &&msix_enabled (&proxy->pci_dev) &&kvm_msi_via_irqfd_enabled (); +VirtioDeviceClass *k =VIRTIO_DEVICE_GET_CLASS (vdev);if (new_vector == old_vector) {return ;
@@ -1441,7 +1442,8 @@ static void virtio_pci_set_vector(VirtIODevice *vdev,* set, we need to release the old vector and set up the new one. * Otherwise just need to set the new vector on the device. */ -if (kvm_irqfd && old_vector !=VIRTIO_NO_VECTOR ) { +if (kvm_irqfd && old_vector !=VIRTIO_NO_VECTOR && + vdev->use_guest_notifier_mask && k->guest_notifier_mask) {kvm_virtio_pci_vector_release_one (proxy, queue_no); }/* Set the new vector on the device. */
@@ -1451,7 +1453,8 @@ static void virtio_pci_set_vector(VirtIODevice *vdev,virtio_queue_set_vector (vdev, queue_no, new_vector); }/* If the new vector changed need to set it up. */ -if (kvm_irqfd && new_vector !=VIRTIO_NO_VECTOR ) { +if (kvm_irqfd && new_vector !=VIRTIO_NO_VECTOR && + vdev->use_guest_notifier_mask && k->guest_notifier_mask) {kvm_virtio_pci_vector_use_one (proxy, queue_no); } }
Signature · 1 line
MST
Re: [PULL 04/46] virtio-pci: Fix the use of an uninitialized irqfd.
Quoted 38 lines · Michael S. Tsirkin
From: Cindy Lu <[email protected]>
The crash was reported in MAC OS and NixOS, here is the link for this bug
https://gitlab.com/qemu-project/qemu/-/issues/2334
https://gitlab.com/qemu-project/qemu/-/issues/2321The root cause is that the function
virtio_pci_set_guest_notifiers()only initializes the irqfd when theuse_guest_notifier_maskandguest_notifier_maskare set.
However, this check is missing invirtio_pci_set_vector().
So the fix is to add this check.This fix is verified in vyatta,MacOS,NixOS,fedora system.
The bt tree for this bug is:
Thread 6 "CPU 0/KVM" received signal SIGSEGV, Segmentation fault. [Switching to Thread0x7c817be006c0(LWP 1269146)]kvm_virtio_pci_vq_vector_use() at../qemu-9.0.0/hw/virtio/virtio-pci.c:817
817 if (irqfd->users== 0) {
(gdb) thread apply all bt
...
Thread 6 (Thread0x7c817be006c0(LWP 1269146) "CPU 0/KVM"):0 kvm_virtio_pci_vq_vector_use () at ../qemu-9.0.0/hw/virtio/virtio-pci.c:817 1 kvm_virtio_pci_vector_use_one () at ../qemu-9.0.0/hw/virtio/virtio-pci.c:893 2 0x00005983657045e2 in memory_region_write_accessor () at ../qemu-9.0.0/system/memory.c:497 3 0x0000598365704ba6 in access_with_adjusted_size () at ../qemu-9.0.0/system/memory.c:573 4 0x0000598365705059 in memory_region_dispatch_write () at ../qemu-9.0.0/system/memory.c:1528 5 0x00005983659b8e1f in flatview_write_continue_step.isra.0 () at ../qemu-9.0.0/system/physmem.c:2713 6 0x000059836570ba7d in flatview_write_continue () at ../qemu-9.0.0/system/physmem.c:2743 7 flatview_write () at ../qemu-9.0.0/system/physmem.c:2774 8 0x000059836570bb76 in address_space_write () at ../qemu-9.0.0/system/physmem.c:2894 9 0x0000598365763afe in address_space_rw () at ../qemu-9.0.0/system/physmem.c:290410
kvm_cpu_exec() at../qemu-9.0.0/accel/kvm/kvm-all.c:2917
110x000059836576656einkvm_vcpu_thread_fn() at../qemu-9.0.0/accel/kvm/kvm-accel-ops.c:50120x0000598365926ca8inqemu_thread_start() at../qemu-9.0.0/util/qemu-thread-posix.c:541130x00007c8185bcd1cfin ??? () at/usr/lib/libc.so.6
140x00007c8185c4e504in clone () at/usr/lib/libc.so.6
Quoted 7 lines
Fixes 2ce6cff94d ("virtio-pci: fix use of a released vector")Signed-off-by Cindy Lu <[email protected]>Message-Id: <[email protected]>
Acked-by Jason Wang <[email protected]>Reviewed-by Michael S. Tsirkin <[email protected]>Signed-off-by Michael S. Tsirkin <[email protected]>
Dropped now at author's request.
Quoted 39 lines
--- hw/virtio/virtio-pci.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)hw/virtio/virtio-pci.c +5
-2@@ -1431,6 +1431,7 @@ static void virtio_pci_set_vector(VirtIODevice *vdev, {bool kvm_irqfd = (vdev->status &VIRTIO_CONFIG_S_DRIVER_OK ) &&msix_enabled (&proxy->pci_dev) &&kvm_msi_via_irqfd_enabled (); +VirtioDeviceClass *k =VIRTIO_DEVICE_GET_CLASS (vdev);if (new_vector == old_vector) {return ;@@ -1441,7 +1442,8 @@ static void virtio_pci_set_vector(VirtIODevice *vdev,* set, we need to release the old vector and set up the new one. * Otherwise just need to set the new vector on the device. */ -if (kvm_irqfd && old_vector !=VIRTIO_NO_VECTOR ) { +if (kvm_irqfd && old_vector !=VIRTIO_NO_VECTOR && + vdev->use_guest_notifier_mask && k->guest_notifier_mask) {kvm_virtio_pci_vector_release_one (proxy, queue_no); }/* Set the new vector on the device. */ @@ -1451,7 +1453,8 @@ static void virtio_pci_set_vector(VirtIODevice *vdev,virtio_queue_set_vector (vdev, queue_no, new_vector); }/* If the new vector changed need to set it up. */ -if (kvm_irqfd && new_vector !=VIRTIO_NO_VECTOR ) { +if (kvm_irqfd && new_vector !=VIRTIO_NO_VECTOR && + vdev->use_guest_notifier_mask && k->guest_notifier_mask) {kvm_virtio_pci_vector_use_one (proxy, queue_no); } }Signature · 1 line
MST
[PULL 26/46] hw/cxl/cxl-mailbox-utils: Add mailbox commands to support add/release dynamic capacity response
In reply to Michael S. TsirkinFrom: Fan Ni <[email protected]>
Per CXL spec 3.1, two mailbox commands are implemented:
Add Dynamic Capacity Response (Opcode 4802h) 8.2.9.9.9.3, and Release Dynamic Capacity (Opcode 4803h) 8.2.9.9.9.4.
For the process of the above two commands, we use two-pass approach. Pass 1: Check whether the input payload is valid or not; if not, skip
Pass 2 and return mailbox process error.
Pass 2: Do the real work--add or release extents, respectively.
Message-Id: <[email protected]>
--- include/hw/cxl/cxl_device.h | 4 + hw/cxl/cxl-mailbox-utils.c | 394 ++++++++++++++++++++++++++++++++++++ hw/mem/cxl_type3.c | 11 + 3 files changed, 409 insertions(+)
include/hw/cxl/cxl_device.h +4 -0
@@ -551,4 +551,8 @@ void cxl_event_irq_assert(CXLType3Dev *ct3d);void cxl_set_poison_list_overflowed (CXLType3Dev *ct3d); +CXLDCRegion *cxl_find_dc_region (CXLType3Dev *ct3d,uint64_t dpa,uint64_t len); + +void cxl_remove_extent_from_extent_list (CXLDCExtentList *list, +CXLDCExtent *extent);#endif
hw/cxl/cxl-mailbox-utils.c +394 -0
418 lines not on this page · raw message
hw/mem/cxl_type3.c +11 -0
@@ -678,6 +678,15 @@ static bool cxl_create_dc_regions(CXLType3Dev *ct3d, Error **errp)return true; } +static void cxl_destroy_dc_regions (CXLType3Dev *ct3d) +{ +CXLDCExtent *ent, *ent_next; + + QTAILQ_FOREACH_SAFE(ent, &ct3d->dc.extents, node, ent_next) { +cxl_remove_extent_from_extent_list (&ct3d->dc.extents, ent); + } +} +static bool cxl_setup_memory (CXLType3Dev *ct3d,Error **errp) {DeviceState *ds =DEVICE (ct3d);
@@ -874,6 +883,7 @@ err_free_special_ops:g_free (regs->special_ops); err_address_space_free:if (ct3d->dc.host_dc) { +cxl_destroy_dc_regions (ct3d);address_space_destroy (&ct3d->dc.host_dc_as); }if (ct3d->hostpmem) {
@@ -895,6 +905,7 @@ static void ct3_exit(PCIDevice *pci_dev)cxl_doe_cdat_release (cxl_cstate);g_free (regs->special_ops);if (ct3d->dc.host_dc) { +cxl_destroy_dc_regions (ct3d);address_space_destroy (&ct3d->dc.host_dc_as); }if (ct3d->hostpmem) {
Signature · 1 line
MST
[PULL 31/46] hw/acpi/GI: Fix trivial parameter alignment issue.
In reply to Michael S. TsirkinFrom: Jonathan Cameron <[email protected]>
Before making additional modification, tidy up this misleading indentation.
Message-Id: <[email protected]>
--- hw/acpi/acpi_generic_initiator.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
hw/acpi/acpi_generic_initiator.c +1 -1
@@ -132,7 +132,7 @@ static int build_all_acpi_generic_initiators(Object *obj, void *opaque) dev_handle.segment =0 ; dev_handle.bdf =PCI_BUILD_BDF (pci_bus_num (pci_get_bus (pci_dev)), - pci_dev->devfn); + pci_dev->devfn);build_srat_generic_pci_initiator_affinity (table_data, gi->node, &dev_handle);
Signature · 1 line
MST
[PULL 23/46] hw/mem/cxl-type3: Refactor ct3_build_cdat_entries_for_mr to take mr size instead of mr as argument
In reply to Michael S. TsirkinFrom: Fan Ni <[email protected]>
The function ct3_build_cdat_entries_for_mr only uses size of the passed memory region argument, refactor the function definition to make the passed arguments more specific.
Message-Id: <[email protected]>
--- hw/mem/cxl_type3.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-)
hw/mem/cxl_type3.c +9 -6
@@ -44,7 +44,7 @@ enum { };static void ct3_build_cdat_entries_for_mr (CDATSubHeader **cdat_table, -int dsmad_handle,MemoryRegion *mr, +int dsmad_handle,uint64_t size,bool is_pmem,uint64_t dpa_base) {CDATDsmas *dsmas;
@@ -63,7 +63,7 @@ static void ct3_build_cdat_entries_for_mr(CDATSubHeader **cdat_table, .DSMADhandle = dsmad_handle, .flags = is_pmem ? CDAT_DSMAS_FLAG_NV : 0, .DPA_base = dpa_base, - .DPA_length = memory_region_size(mr), + .DPA_length = size, };/* For now, no memory side cache, plausiblish numbers */
@@ -132,7 +132,7 @@ static void ct3_build_cdat_entries_for_mr(CDATSubHeader **cdat_table,*/ .EFI_memory_type_attr = is_pmem ? 2 : 1, .DPA_offset = 0, - .DPA_length = memory_region_size(mr), + .DPA_length = size, };/* Header always at start of structure */
@@ -149,6 +149,7 @@ static int ct3_build_cdat_table(CDATSubHeader ***cdat_table, void *priv) g_autofree CDATSubHeader **table = NULL;CXLType3Dev *ct3d = priv;MemoryRegion *volatile_mr =NULL , *nonvolatile_mr =NULL ; +uint64_t vmr_size =0 , pmr_size =0 ;int dsmad_handle =0 ;int cur_ent =0 ;int len =0 ;
@@ -163,6 +164,7 @@ static int ct3_build_cdat_table(CDATSubHeader ***cdat_table, void *priv)return -EINVAL ; } len +=CT3_CDAT_NUM_ENTRIES ; + vmr_size =memory_region_size (volatile_mr); }if (ct3d->hostpmem) {
@@ -171,21 +173,22 @@ static int ct3_build_cdat_table(CDATSubHeader ***cdat_table, void *priv)return -EINVAL ; } len +=CT3_CDAT_NUM_ENTRIES ; + pmr_size =memory_region_size (nonvolatile_mr); } table =g_malloc0 (len *sizeof (*table));/* Now fill them in */ if (volatile_mr) { -ct3_build_cdat_entries_for_mr (table, dsmad_handle++, volatile_mr, +ct3_build_cdat_entries_for_mr (table, dsmad_handle++, vmr_size, false,0 ); cur_ent =CT3_CDAT_NUM_ENTRIES ; }if (nonvolatile_mr) { -uint64_t base = volatile_mr ?memory_region_size (volatile_mr) :0 ; +uint64_t base = vmr_size;ct3_build_cdat_entries_for_mr (&(table[cur_ent]), dsmad_handle++, - nonvolatile_mr, true, base); + pmr_size, true, base); cur_ent +=CT3_CDAT_NUM_ENTRIES ; }assert (len == cur_ent);
Signature · 1 line
MST
[PULL 38/46] linux-headers: update to 6.10-rc1
In reply to Michael S. TsirkinFrom: Thomas Weißschuh <[email protected]>
Message-Id: <[email protected]>
--- include/standard-headers/linux/ethtool.h | 55 ++++++++ include/standard-headers/linux/pci_regs.h | 6 + include/standard-headers/linux/pvpanic.h | 7 +- include/standard-headers/linux/virtio_bt.h | 1 - include/standard-headers/linux/virtio_mem.h | 2 + include/standard-headers/linux/virtio_net.h | 143 ++++++++++++++++++++ linux-headers/asm-generic/unistd.h | 5 +- linux-headers/asm-loongarch/kvm.h | 4 + linux-headers/asm-mips/unistd_n32.h | 1 + linux-headers/asm-mips/unistd_n64.h | 1 + linux-headers/asm-mips/unistd_o32.h | 1 + linux-headers/asm-powerpc/unistd_32.h | 1 + linux-headers/asm-powerpc/unistd_64.h | 1 + linux-headers/asm-riscv/kvm.h | 1 + linux-headers/asm-s390/unistd_32.h | 1 + linux-headers/asm-s390/unistd_64.h | 1 + linux-headers/asm-x86/kvm.h | 4 +- linux-headers/asm-x86/unistd_32.h | 1 + linux-headers/asm-x86/unistd_64.h | 1 + linux-headers/asm-x86/unistd_x32.h | 2 + linux-headers/linux/kvm.h | 4 +- linux-headers/linux/stddef.h | 8 ++ linux-headers/linux/vhost.h | 15 +- 23 files changed, 252 insertions(+), 14 deletions(-)
include/standard-headers/linux/ethtool.h +55 -0
@@ -752,6 +752,61 @@ enum ethtool_module_power_mode { ETHTOOL_MODULE_POWER_MODE_HIGH, }; +/** +* enum ethtool_pse_types - Types of PSE controller. +* @ETHTOOL_PSE_UNKNOWN: Type of PSE controller is unknown +* @ETHTOOL_PSE_PODL: PSE controller which support PoDL +* @ETHTOOL_PSE_C33: PSE controller which support Clause 33 (PoE) +*/ +enum ethtool_pse_types { +ETHTOOL_PSE_UNKNOWN =1 <<0 , +ETHTOOL_PSE_PODL =1 <<1 , +ETHTOOL_PSE_C33 =1 <<2 , +}; + +/** +* enum ethtool_c33_pse_admin_state - operational state of the PoDL PSE +* functions. IEEE 802.3-2022 30.9.1.1.2 aPSEAdminState +* @ETHTOOL_C33_PSE_ADMIN_STATE_UNKNOWN: state of PSE functions is unknown +* @ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED: PSE functions are disabled +* @ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED: PSE functions are enabled +*/ +enum ethtool_c33_pse_admin_state { +ETHTOOL_C33_PSE_ADMIN_STATE_UNKNOWN =1 , +ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED , +ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED , +}; + +/** +* enum ethtool_c33_pse_pw_d_status - power detection status of the PSE. +* IEEE 802.3-2022 30.9.1.1.3 aPoDLPSEPowerDetectionStatus: +* @ETHTOOL_C33_PSE_PW_D_STATUS_UNKNOWN: PSE status is unknown +* @ETHTOOL_C33_PSE_PW_D_STATUS_DISABLED: The enumeration "disabled" +* indicates that the PSE State diagram is in the state DISABLED. +* @ETHTOOL_C33_PSE_PW_D_STATUS_SEARCHING: The enumeration "searching" +* indicates the PSE State diagram is in a state other than those +* listed. +* @ETHTOOL_C33_PSE_PW_D_STATUS_DELIVERING: The enumeration +* "deliveringPower" indicates that the PSE State diagram is in the +* state POWER_ON. +* @ETHTOOL_C33_PSE_PW_D_STATUS_TEST: The enumeration "test" indicates that +* the PSE State diagram is in the state TEST_MODE. +* @ETHTOOL_C33_PSE_PW_D_STATUS_FAULT: The enumeration "fault" indicates that +* the PSE State diagram is in the state TEST_ERROR. +* @ETHTOOL_C33_PSE_PW_D_STATUS_OTHERFAULT: The enumeration "otherFault" +* indicates that the PSE State diagram is in the state IDLE due to +* the variable error_condition = true. +*/ +enum ethtool_c33_pse_pw_d_status { +ETHTOOL_C33_PSE_PW_D_STATUS_UNKNOWN =1 , +ETHTOOL_C33_PSE_PW_D_STATUS_DISABLED , +ETHTOOL_C33_PSE_PW_D_STATUS_SEARCHING , +ETHTOOL_C33_PSE_PW_D_STATUS_DELIVERING , +ETHTOOL_C33_PSE_PW_D_STATUS_TEST , +ETHTOOL_C33_PSE_PW_D_STATUS_FAULT , +ETHTOOL_C33_PSE_PW_D_STATUS_OTHERFAULT , +}; +/** * enum ethtool_podl_pse_admin_state - operational state of the PoDL PSE * functions. IEEE 802.3-2018 30.15.1.1.2 aPoDLPSEAdminState
include/standard-headers/linux/pci_regs.h +6 -0
@@ -1144,8 +1144,14 @@#define PCI_DOE_DATA_OBJECT_HEADER_2_LENGTH 0x0003ffff#define PCI_DOE_DATA_OBJECT_DISC_REQ_3_INDEX 0x000000ff +#define PCI_DOE_DATA_OBJECT_DISC_REQ_3_VER 0x0000ff00#define PCI_DOE_DATA_OBJECT_DISC_RSP_3_VID 0x0000ffff#define PCI_DOE_DATA_OBJECT_DISC_RSP_3_PROTOCOL 0x00ff0000#define PCI_DOE_DATA_OBJECT_DISC_RSP_3_NEXT_INDEX 0xff000000 +/* Compute Express Link (CXL r3.1, sec 8.1.5) */ +#define PCI_DVSEC_CXL_PORT 3 +#define PCI_DVSEC_CXL_PORT_CTL 0x0c +#define PCI_DVSEC_CXL_PORT_CTL_UNMASK_SBR 0x00000001 +#endif /* LINUX_PCI_REGS_H */
include/standard-headers/linux/pvpanic.h +5 -2
@@ -3,7 +3,10 @@#ifndef __PVPANIC_H__#define __PVPANIC_H__ -#define PVPANIC_PANICKED (1 << 0) -#define PVPANIC_CRASH_LOADED (1 << 1) +#include "standard-headers/linux/const.h" + +#define PVPANIC_PANICKED _BITUL(0) +#define PVPANIC_CRASH_LOADED _BITUL(1) +#define PVPANIC_SHUTDOWN _BITUL(2)#endif /* __PVPANIC_H__ */
include/standard-headers/linux/virtio_bt.h +0 -1
@@ -13,7 +13,6 @@enum virtio_bt_config_type {VIRTIO_BT_CONFIG_TYPE_PRIMARY =0 , -VIRTIO_BT_CONFIG_TYPE_AMP =1 , };enum virtio_bt_config_vendor {
include/standard-headers/linux/virtio_mem.h +2 -0
@@ -90,6 +90,8 @@#define VIRTIO_MEM_F_ACPI_PXM 0/* unplugged memory must not be accessed */ #define VIRTIO_MEM_F_UNPLUGGED_INACCESSIBLE 1 +/* plugged memory will remain plugged when suspending+resuming */ +#define VIRTIO_MEM_F_PERSISTENT_SUSPEND 2/* --- virtio-mem: guest -> host requests --- */
include/standard-headers/linux/virtio_net.h +143 -0
153 lines not on this page · raw message
linux-headers/asm-generic/unistd.h +4 -1
@@ -842,8 +842,11 @@ __SYSCALL(__NR_lsm_set_self_attr, sys_lsm_set_self_attr)#define __NR_lsm_list_modules 461 __SYSCALL(__NR_lsm_list_modules, sys_lsm_list_modules) +#define __NR_mseal 462 +__SYSCALL(__NR_mseal, sys_mseal) +#undef __NR_syscalls -#define __NR_syscalls 462 +#define __NR_syscalls 463/* * 32 bit systems traditionally used different
linux-headers/asm-loongarch/kvm.h +4 -0
@@ -17,6 +17,8 @@#define KVM_COALESCED_MMIO_PAGE_OFFSET 1#define KVM_DIRTY_LOG_PAGE_OFFSET 64 +#define KVM_GUESTDBG_USE_SW_BP 0x00010000 +/* * for KVM_GET_REGS and KVM_SET_REGS */
@@ -72,6 +74,8 @@ struct kvm_fpu {#define KVM_REG_LOONGARCH_COUNTER (KVM_REG_LOONGARCH_KVM | KVM_REG_SIZE_U64 | 1)#define KVM_REG_LOONGARCH_VCPU_RESET (KVM_REG_LOONGARCH_KVM | KVM_REG_SIZE_U64 | 2) +/* Debugging: Special instruction for software breakpoint */ +#define KVM_REG_LOONGARCH_DEBUG_INST (KVM_REG_LOONGARCH_KVM | KVM_REG_SIZE_U64 | 3)#define LOONGARCH_REG_SHIFT 3#define LOONGARCH_REG_64 (TYPE ,REG ) (TYPE | KVM_REG_SIZE_U64 | (REG << LOONGARCH_REG_SHIFT))
linux-headers/asm-mips/unistd_n32.h +1 -0
@@ -390,5 +390,6 @@#define __NR_lsm_get_self_attr (__NR_Linux + 459)#define __NR_lsm_set_self_attr (__NR_Linux + 460)#define __NR_lsm_list_modules (__NR_Linux + 461) +#define __NR_mseal (__NR_Linux + 462)#endif /* _ASM_UNISTD_N32_H */
linux-headers/asm-mips/unistd_n64.h +1 -0
@@ -366,5 +366,6 @@#define __NR_lsm_get_self_attr (__NR_Linux + 459)#define __NR_lsm_set_self_attr (__NR_Linux + 460)#define __NR_lsm_list_modules (__NR_Linux + 461) +#define __NR_mseal (__NR_Linux + 462)#endif /* _ASM_UNISTD_N64_H */
linux-headers/asm-mips/unistd_o32.h +1 -0
@@ -436,5 +436,6 @@#define __NR_lsm_get_self_attr (__NR_Linux + 459)#define __NR_lsm_set_self_attr (__NR_Linux + 460)#define __NR_lsm_list_modules (__NR_Linux + 461) +#define __NR_mseal (__NR_Linux + 462)#endif /* _ASM_UNISTD_O32_H */
linux-headers/asm-powerpc/unistd_32.h +1 -0
@@ -443,6 +443,7 @@#define __NR_lsm_get_self_attr 459#define __NR_lsm_set_self_attr 460#define __NR_lsm_list_modules 461 +#define __NR_mseal 462#endif /* _ASM_UNISTD_32_H */
linux-headers/asm-powerpc/unistd_64.h +1 -0
@@ -415,6 +415,7 @@#define __NR_lsm_get_self_attr 459#define __NR_lsm_set_self_attr 460#define __NR_lsm_list_modules 461 +#define __NR_mseal 462#endif /* _ASM_UNISTD_64_H */
linux-headers/asm-riscv/kvm.h +1 -0
@@ -167,6 +167,7 @@ enum KVM_RISCV_ISA_EXT_ID {KVM_RISCV_ISA_EXT_ZFA ,KVM_RISCV_ISA_EXT_ZTSO ,KVM_RISCV_ISA_EXT_ZACAS , +KVM_RISCV_ISA_EXT_SSCOFPMF , KVM_RISCV_ISA_EXT_MAX, };
linux-headers/asm-s390/unistd_32.h +1 -0
@@ -434,5 +434,6 @@#define __NR_lsm_get_self_attr 459#define __NR_lsm_set_self_attr 460#define __NR_lsm_list_modules 461 +#define __NR_mseal 462#endif /* _ASM_S390_UNISTD_32_H */
linux-headers/asm-s390/unistd_64.h +1 -0
@@ -382,5 +382,6 @@#define __NR_lsm_get_self_attr 459#define __NR_lsm_set_self_attr 460#define __NR_lsm_list_modules 461 +#define __NR_mseal 462#endif /* _ASM_S390_UNISTD_64_H */
linux-headers/asm-x86/kvm.h +3 -1
@@ -709,7 +709,9 @@ struct kvm_sev_cmd {struct kvm_sev_init {__u64 vmsa_features;__u32 flags; -__u32 pad[9 ]; +__u16 ghcb_version; +__u16 pad1; +__u32 pad2[8 ]; };struct kvm_sev_launch_start {
linux-headers/asm-x86/unistd_32.h +1 -0
@@ -452,6 +452,7 @@#define __NR_lsm_get_self_attr 459#define __NR_lsm_set_self_attr 460#define __NR_lsm_list_modules 461 +#define __NR_mseal 462#endif /* _ASM_UNISTD_32_H */
linux-headers/asm-x86/unistd_64.h +1 -0
@@ -374,6 +374,7 @@#define __NR_lsm_get_self_attr 459#define __NR_lsm_set_self_attr 460#define __NR_lsm_list_modules 461 +#define __NR_mseal 462#endif /* _ASM_UNISTD_64_H */
linux-headers/asm-x86/unistd_x32.h +2 -0
@@ -318,6 +318,7 @@#define __NR_set_mempolicy_home_node (__X32_SYSCALL_BIT + 450)#define __NR_cachestat (__X32_SYSCALL_BIT + 451)#define __NR_fchmodat2 (__X32_SYSCALL_BIT + 452) +#define __NR_map_shadow_stack (__X32_SYSCALL_BIT + 453)#define __NR_futex_wake (__X32_SYSCALL_BIT + 454)#define __NR_futex_wait (__X32_SYSCALL_BIT + 455)#define __NR_futex_requeue (__X32_SYSCALL_BIT + 456)
@@ -326,6 +327,7 @@#define __NR_lsm_get_self_attr (__X32_SYSCALL_BIT + 459)#define __NR_lsm_set_self_attr (__X32_SYSCALL_BIT + 460)#define __NR_lsm_list_modules (__X32_SYSCALL_BIT + 461) +#define __NR_mseal (__X32_SYSCALL_BIT + 462)#define __NR_rt_sigaction (__X32_SYSCALL_BIT + 512)#define __NR_rt_sigreturn (__X32_SYSCALL_BIT + 513)#define __NR_ioctl (__X32_SYSCALL_BIT + 514)
linux-headers/linux/kvm.h +2 -2
@@ -1217,9 +1217,9 @@ struct kvm_vfio_spapr_tce {/* Available with KVM_CAP_SPAPR_RESIZE_HPT */ #define KVM_PPC_RESIZE_HPT_PREPARE _IOR(KVMIO, 0xad, struct kvm_ppc_resize_hpt)#define KVM_PPC_RESIZE_HPT_COMMIT _IOR(KVMIO, 0xae, struct kvm_ppc_resize_hpt) -/* Available with KVM_CAP_PPC_RADIX_MMU or KVM_CAP_PPC_HASH_MMU_V3 */ +/* Available with KVM_CAP_PPC_MMU_RADIX or KVM_CAP_PPC_MMU_HASH_V3 */ #define KVM_PPC_CONFIGURE_V3_MMU _IOW(KVMIO, 0xaf, struct kvm_ppc_mmuv3_cfg) -/* Available with KVM_CAP_PPC_RADIX_MMU */ +/* Available with KVM_CAP_PPC_MMU_RADIX */ #define KVM_PPC_GET_RMMU_INFO _IOW(KVMIO, 0xb0, struct kvm_ppc_rmmu_info)/* Available with KVM_CAP_PPC_GET_CPU_CHAR */ #define KVM_PPC_GET_CPU_CHAR _IOR(KVMIO, 0xb1, struct kvm_ppc_cpu_char)
linux-headers/linux/stddef.h +8 -0
@@ -55,4 +55,12 @@#define __counted_by (m)#endif +#ifndef __counted_by_le +#define __counted_by_le (m) +#endif + +#ifndef __counted_by_be +#define __counted_by_be (m) +#endif +#endif /* _LINUX_STDDEF_H */
linux-headers/linux/vhost.h +8 -7
@@ -179,12 +179,6 @@/* Get the config size */ #define VHOST_VDPA_GET_CONFIG_SIZE _IOR(VHOST_VIRTIO, 0x79, __u32) -/* Get the count of all virtqueues */ -#define VHOST_VDPA_GET_VQS_COUNT _IOR(VHOST_VIRTIO, 0x80, __u32) - -/* Get the number of virtqueue groups. */ -#define VHOST_VDPA_GET_GROUP_NUM _IOR(VHOST_VIRTIO, 0x81, __u32) -/* Get the number of address spaces. */ #define VHOST_VDPA_GET_AS_NUM _IOR(VHOST_VIRTIO, 0x7A, unsigned int)
@@ -228,10 +222,17 @@#define VHOST_VDPA_GET_VRING_DESC_GROUP _IOWR(VHOST_VIRTIO, 0x7F, \ struct vhost_vring_state) + +/* Get the count of all virtqueues */ +#define VHOST_VDPA_GET_VQS_COUNT _IOR(VHOST_VIRTIO, 0x80, __u32) + +/* Get the number of virtqueue groups. */ +#define VHOST_VDPA_GET_GROUP_NUM _IOR(VHOST_VIRTIO, 0x81, __u32) +/* Get the queue size of a specific virtqueue. * userspace set the vring index in vhost_vring_state.index * kernel set the queue size in vhost_vring_state.num */ -#define VHOST_VDPA_GET_VRING_SIZE _IOWR(VHOST_VIRTIO, 0x80, \ +#define VHOST_VDPA_GET_VRING_SIZE _IOWR(VHOST_VIRTIO, 0x82, \ struct vhost_vring_state)#endif
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[PULL 03/46] vhost-vdpa: check vhost_vdpa_set_vring_ready() return value
In reply to Michael S. TsirkinFrom: Stefano Garzarella <[email protected]>
vhost_vdpa_set_vring_ready() could already fail, but if Linux's patch [1] will be merged, it may fail with more chance if userspace does not activate virtqueues before DRIVER_OK when VHOST_BACKEND_F_ENABLE_AFTER_DRIVER_OK is not negotiated.
So better check its return value anyway.
[1] https://lore.kernel.org/virtualization/[email protected]/T/#u
Message-Id: <[email protected]>
--- net/vhost-vdpa.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-)
net/vhost-vdpa.c +12 -3
@@ -399,7 +399,10 @@ static int vhost_vdpa_net_data_load(NetClientState *nc) }for (int i =0 ; i < v->dev->nvqs; ++i) { -vhost_vdpa_set_vring_ready (v, i + v->dev->vq_index); +int ret =vhost_vdpa_set_vring_ready (v, i + v->dev->vq_index); +if (ret <0 ) { +return ret; + } }return 0 ; }
@@ -1238,7 +1241,10 @@ static int vhost_vdpa_net_cvq_load(NetClientState *nc)assert (nc->info->type ==NET_CLIENT_DRIVER_VHOST_VDPA ); -vhost_vdpa_set_vring_ready (v, v->dev->vq_index); + r =vhost_vdpa_set_vring_ready (v, v->dev->vq_index); +if (unlikely (r <0 )) { +return r; + }if (v->shadow_vqs_enabled) { n =VIRTIO_NET (v->dev->vdev);
@@ -1277,7 +1283,10 @@ static int vhost_vdpa_net_cvq_load(NetClientState *nc) }for (int i =0 ; i < v->dev->vq_index; ++i) { -vhost_vdpa_set_vring_ready (v, i); + r =vhost_vdpa_set_vring_ready (v, i); +if (unlikely (r <0 )) { +return r; + } }return 0 ;
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[PULL 19/46] hw/cxl/cxl-mailbox-utils: Add dc_event_log_size field to output payload of identify memory device command
In reply to Michael S. TsirkinFrom: Fan Ni <[email protected]>
Based on CXL spec r3.1 Table 8-127 (Identify Memory Device Output Payload), dynamic capacity event log size should be part of output of the Identify command.
Add dc_event_log_size to the output payload for the host to get the info.
Message-Id: <[email protected]>
--- hw/cxl/cxl-mailbox-utils.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
hw/cxl/cxl-mailbox-utils.c +4 -1
@@ -21,6 +21,7 @@#include "sysemu/hostmem.h" #define CXL_CAPACITY_MULTIPLIER (256 * MiB) +#define CXL_DC_EVENT_LOG_SIZE 8/* * How to add a new command, example. The command set FOO, with cmd BAR.
@@ -780,8 +781,9 @@ static CXLRetCode cmd_identify_memory_device(const struct cxl_cmd *cmd,uint16_t inject_poison_limit;uint8_t poison_caps;uint8_t qos_telemetry_caps; +uint16_t dc_event_log_size; }QEMU_PACKED *id; -QEMU_BUILD_BUG_ON (sizeof (*id) !=0x43 ); +QEMU_BUILD_BUG_ON (sizeof (*id) !=0x45 );CXLType3Dev *ct3d =CXL_TYPE3 (cci->d);CXLType3Class *cvc =CXL_TYPE3_GET_CLASS (ct3d);CXLDeviceState *cxl_dstate = &ct3d->cxl_dstate;
@@ -807,6 +809,7 @@ static CXLRetCode cmd_identify_memory_device(const struct cxl_cmd *cmd,st24_le_p (id->poison_list_max_mer,256 );/* No limit - so limited by main poison record limit */ stw_le_p (&id->inject_poison_limit,0 ); +stw_le_p (&id->dc_event_log_size,CXL_DC_EVENT_LOG_SIZE ); *len_out =sizeof (*id);return CXL_MBOX_SUCCESS ;
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[PULL 33/46] hw/acpi: Generic Port Affinity Structure support
In reply to Michael S. TsirkinFrom: Jonathan Cameron <[email protected]>
These are very similar to the recently added Generic Initiators but instead of representing an initiator of memory traffic they represent an edge point beyond which may lie either targets or initiators. Here we add these ports such that they may be targets of hmat_lb records to describe the latency and bandwidth from host side initiators to the port. A descoverable mechanism such as UEFI CDAT read from CXL devices and switches is used to discover the remainder fo the path and the OS can build up full latency and bandwidth numbers as need for work and data placement decisions.
Message-Id: <[email protected]>
--- qapi/qom.json | 35 ++++++ include/hw/acpi/acpi_generic_initiator.h | 18 ++- include/hw/pci/pci_bridge.h | 1 + hw/acpi/acpi_generic_initiator.c | 145 +++++++++++++++++------ hw/pci-bridge/pci_expander_bridge.c | 1 - 5 files changed, 160 insertions(+), 40 deletions(-)
qapi/qom.json +35 -0
@@ -826,6 +826,39 @@ 'data': { 'pci-dev': 'str', 'node': 'uint32' } } + +## +# @AcpiGenericPortProperties: +# +# Properties for acpi-generic-port objects. +# +# @pci-bus: QOM path of the PCI bus of the hostbridge associated with +# this SRAT Generic Port Affinity Structure. This is the same as +# the bus parameter for the root ports attached to this host bridge. +# The resulting SRAT Generic Port Affinity Structure will refer to +# the ACPI object in DSDT that represents the host bridge (e.g. +# ACPI0016 for CXL host bridges.) See ACPI 6.5 Section 5.2.16.7 for +# more information. +# +# @node: Similar to a NUMA node ID, but instead of providing a reference +# point used for defining NUMA distances and access characteristics +# to memory or from an initiator (e.g. CPU), this node defines the +# boundary point between non-discoverable system buses which must be +# described by firmware, and a discoverable bus. NUMA distances +# and access characteristics are defined to and from that point. +# For system software to establish full initiator to target +# characteristics this information must be combined with information +# retrieved from the discoverable part of the path. An example would +# use CDAT (see UEFI.org) information read from devices and switches +# in conjunction with link characteristics read from PCIe +# Configuration space. +# +# Since: 9.1 +## +{ 'struct': 'AcpiGenericPortProperties', + 'data': { 'pci-bus': 'str', + 'node': 'uint32' } } + ## # @RngProperties: #
@@ -953,6 +986,7 @@ { 'enum': 'ObjectType', 'data': [ 'acpi-generic-initiator', + 'acpi-generic-port', 'authz-list', 'authz-listfile', 'authz-pam',
@@ -1025,6 +1059,7 @@ 'discriminator': 'qom-type', 'data': { 'acpi-generic-initiator': 'AcpiGenericInitiatorProperties', + 'acpi-generic-port': 'AcpiGenericPortProperties', 'authz-list': 'AuthZListProperties', 'authz-listfile': 'AuthZListFileProperties', 'authz-pam': 'AuthZPAMProperties',
include/hw/acpi/acpi_generic_initiator.h +16 -2
@@ -30,6 +30,12 @@ typedef struct AcpiGenericInitiator {AcpiGenericNode parent; } AcpiGenericInitiator; +#define TYPE_ACPI_GENERIC_PORT "acpi-generic-port" + +typedef struct AcpiGenericPort { +AcpiGenericInitiator parent; +}AcpiGenericPort ; +/* * ACPI 6.3: * Table 5-81 Flags – Generic Initiator Affinity Structure
@@ -49,8 +55,16 @@ typedef enum {* Table 5-80 Device Handle - PCI */ typedef struct PCIDeviceHandle { -uint16_t segment; -uint16_t bdf; +union { +struct { +uint16_t segment; +uint16_t bdf; + }; +struct { +uint64_t hid; +uint32_t uid; + }; + }; }PCIDeviceHandle ;void build_srat_generic_pci_initiator (GArray *table_data);
include/hw/pci/pci_bridge.h +1 -0
@@ -102,6 +102,7 @@ typedef struct PXBPCIEDev {PXBDev parent_obj; } PXBPCIEDev; +#define TYPE_PXB_CXL_BUS "pxb-cxl-bus"#define TYPE_PXB_DEV "pxb"OBJECT_DECLARE_SIMPLE_TYPE (PXBDev,PXB_DEV )
hw/acpi/acpi_generic_initiator.c +108 -37
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hw/pci-bridge/pci_expander_bridge.c +0 -1
@@ -38,7 +38,6 @@ DECLARE_INSTANCE_CHECKER(PXBBus, PXB_BUS,DECLARE_INSTANCE_CHECKER (PXBBus,PXB_PCIE_BUS , TYPE_PXB_PCIE_BUS) -#define TYPE_PXB_CXL_BUS "pxb-cxl-bus"DECLARE_INSTANCE_CHECKER (PXBBus,PXB_CXL_BUS ,TYPE_PXB_CXL_BUS )
Signature · 1 line
MST
[PULL 24/46] hw/mem/cxl_type3: Add host backend and address space handling for DC regions
In reply to Michael S. TsirkinFrom: Fan Ni <[email protected]>
Add (file/memory backed) host backend for DCD. All the dynamic capacity regions will share a single, large enough host backend. Set up address space for DC regions to support read/write operations to dynamic capacity for DCD.
With the change, the following support is added:
1. Add a new property to type3 device "volatile-dc-memdev" to point to host memory backend for dynamic capacity. Currently, all DC regions share one host backend;
2. Add namespace for dynamic capacity for read/write support;
3. Create cdat entries for each dynamic capacity region.
Message-Id: <[email protected]>
--- include/hw/cxl/cxl_device.h | 8 ++ hw/cxl/cxl-mailbox-utils.c | 16 +++- hw/mem/cxl_type3.c | 177 +++++++++++++++++++++++++++++------- 3 files changed, 164 insertions(+), 37 deletions(-)
include/hw/cxl/cxl_device.h +8 -0
@@ -467,6 +467,14 @@ struct CXLType3Dev {uint64_t poison_list_overflow_ts;struct dynamic_capacity { +HostMemoryBackend *host_dc; +AddressSpace host_dc_as; +/* +* total_capacity is equivalent to the dynamic capability +* memory region size. +*/ +uint64_t total_capacity;/* 256M aligned */ +uint8_t num_regions;/* 0-8 regions */ CXLDCRegion regions[DCD_MAX_NUM_REGION ]; } dc;
hw/cxl/cxl-mailbox-utils.c +11 -5
@@ -622,7 +622,8 @@ static CXLRetCode cmd_firmware_update_get_info(const struct cxl_cmd *cmd,size_t *len_out, CXLCCI *cci) { - CXLDeviceState *cxl_dstate = &CXL_TYPE3(cci->d)->cxl_dstate; + CXLType3Dev *ct3d = CXL_TYPE3(cci->d); +CXLDeviceState *cxl_dstate = &ct3d->cxl_dstate; struct { uint8_t slots_supported; uint8_t slot_info;
@@ -636,7 +637,8 @@ static CXLRetCode cmd_firmware_update_get_info(const struct cxl_cmd *cmd,QEMU_BUILD_BUG_ON (sizeof (*fw_info) !=0x50 );if ((cxl_dstate->vmem_size <CXL_CAPACITY_MULTIPLIER ) || - (cxl_dstate->pmem_size <CXL_CAPACITY_MULTIPLIER )) { + (cxl_dstate->pmem_size <CXL_CAPACITY_MULTIPLIER ) || + (ct3d->dc.total_capacity <CXL_CAPACITY_MULTIPLIER )) {return CXL_MBOX_INTERNAL_ERROR ; }
@@ -793,7 +795,8 @@ static CXLRetCode cmd_identify_memory_device(const struct cxl_cmd *cmd,CXLDeviceState *cxl_dstate = &ct3d->cxl_dstate;if ((!QEMU_IS_ALIGNED (cxl_dstate->vmem_size,CXL_CAPACITY_MULTIPLIER )) || - (!QEMU_IS_ALIGNED (cxl_dstate->pmem_size,CXL_CAPACITY_MULTIPLIER ))) { + (!QEMU_IS_ALIGNED (cxl_dstate->pmem_size,CXL_CAPACITY_MULTIPLIER )) || + (!QEMU_IS_ALIGNED (ct3d->dc.total_capacity,CXL_CAPACITY_MULTIPLIER ))) {return CXL_MBOX_INTERNAL_ERROR ; }
@@ -835,9 +838,11 @@ static CXLRetCode cmd_ccls_get_partition_info(const struct cxl_cmd *cmd,uint64_t next_pmem; }QEMU_PACKED *part_info = (void *)payload_out;QEMU_BUILD_BUG_ON (sizeof (*part_info) !=0x20 ); +CXLType3Dev *ct3d =container_of (cxl_dstate, CXLType3Dev, cxl_dstate);if ((!QEMU_IS_ALIGNED (cxl_dstate->vmem_size,CXL_CAPACITY_MULTIPLIER )) || - (!QEMU_IS_ALIGNED (cxl_dstate->pmem_size,CXL_CAPACITY_MULTIPLIER ))) { + (!QEMU_IS_ALIGNED (cxl_dstate->pmem_size,CXL_CAPACITY_MULTIPLIER )) || + (!QEMU_IS_ALIGNED (ct3d->dc.total_capacity,CXL_CAPACITY_MULTIPLIER ))) {return CXL_MBOX_INTERNAL_ERROR ; }
@@ -1179,7 +1184,8 @@ static CXLRetCode cmd_media_clear_poison(const struct cxl_cmd *cmd,struct clear_poison_pl *in = (void *)payload_in; dpa =ldq_le_p (&in->dpa); -if (dpa +CXL_CACHE_LINE_SIZE > cxl_dstate->static_mem_size) { +if (dpa +CXL_CACHE_LINE_SIZE > cxl_dstate->static_mem_size + + ct3d->dc.total_capacity) {return CXL_MBOX_INVALID_PA ; }
hw/mem/cxl_type3.c +145 -32
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[PULL 27/46] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents
In reply to Michael S. TsirkinFrom: Fan Ni <[email protected]>
To simulate FM functionalities for initiating Dynamic Capacity Add (Opcode 5604h) and Dynamic Capacity Release (Opcode 5605h) as in CXL spec r3.1 7.6.7.6.5 and 7.6.7.6.6, we implemented two QMP interfaces to issue add/release dynamic capacity extents requests.
With the change, we allow to release an extent only when its DPA range is contained by a single accepted extent in the device. That is to say, extent superset release is not supported yet.
1. Add dynamic capacity extents:
For example, the command to add two continuous extents (each 128MiB long) to region 0 (starting at DPA offset 0) looks like below:
{ "execute": "qmp_capabilities" }
{ "execute": "cxl-add-dynamic-capacity",
"arguments": {
"path": "/machine/peripheral/cxl-dcd0",
"host-id": 0,
"selection-policy": "prescriptive",
"region": 0,
"extents": [
{
"offset": 0,
"len": 134217728
},
{
"offset": 134217728,
"len": 134217728
}
] }
}
2. Release dynamic capacity extents:
For example, the command to release an extent of size 128MiB from region 0 (DPA offset 128MiB) looks like below:
{ "execute": "cxl-release-dynamic-capacity",
"arguments": {
"path": "/machine/peripheral/cxl-dcd0",
"host-id": 0,
"removal-policy":"prescriptive",
"region": 0,
"extents": [
{
"offset": 134217728,
"len": 134217728
}
] }
}
Message-Id: <[email protected]>
--- qapi/cxl.json | 143 +++++++++++++++++ include/hw/cxl/cxl_device.h | 22 +++ include/hw/cxl/cxl_events.h | 18 +++ hw/cxl/cxl-mailbox-utils.c | 62 ++++++-- hw/mem/cxl_type3.c | 306 +++++++++++++++++++++++++++++++++++- hw/mem/cxl_type3_stubs.c | 25 +++ 6 files changed, 563 insertions(+), 13 deletions(-)
qapi/cxl.json +143 -0
@@ -361,3 +361,146 @@ ## {'command': 'cxl-inject-correctable-error', 'data': {'path': 'str', 'type': 'CxlCorErrorType'}} + +## +# @CXLDynamicCapacityExtent: +# +# A single dynamic capacity extent +# +# @offset: The offset (in bytes) to the start of the region +# where the extent belongs to. +# +# @len: The length of the extent in bytes. +# +# Since: 9.1 +## +{ 'struct': 'CXLDynamicCapacityExtent', + 'data': { + 'offset':'uint64', + 'len': 'uint64' + } +} + +## +# @CXLExtSelPolicy: +# +# The policy to use for selecting which extents comprise the added +# capacity, as defined in cxl spec r3.1 Table 7-70. +# +# @free: 0h = Free +# +# @contiguous: 1h = Continuous +# +# @prescriptive: 2h = Prescriptive +# +# @enable-shared-access: 3h = Enable Shared Access +# +# Since: 9.1 +## +{ 'enum': 'CXLExtSelPolicy', + 'data': ['free', + 'contiguous', + 'prescriptive', + 'enable-shared-access'] +} + +## +# @cxl-add-dynamic-capacity: +# +# Command to initiate to add dynamic capacity extents to a host. It +# simulates operations defined in cxl spec r3.1 7.6.7.6.5. +# +# @path: CXL DCD canonical QOM path. +# +# @host-id: The "Host ID" field as defined in cxl spec r3.1 +# Table 7-70. +# +# @selection-policy: The "Selection Policy" bits as defined in +# cxl spec r3.1 Table 7-70. It specifies the policy to use for +# selecting which extents comprise the added capacity. +# +# @region: The "Region Number" field as defined in cxl spec r3.1 +# Table 7-70. The dynamic capacity region where the capacity +# is being added. Valid range is from 0-7. +# +# @tag: The "Tag" field as defined in cxl spec r3.1 Table 7-70. +# +# @extents: The "Extent List" field as defined in cxl spec r3.1 +# Table 7-70. +# +# Since : 9.1 +## +{ 'command': 'cxl-add-dynamic-capacity', + 'data': { 'path': 'str', + 'host-id': 'uint16', + 'selection-policy': 'CXLExtSelPolicy', + 'region': 'uint8', + '*tag': 'str', + 'extents': [ 'CXLDynamicCapacityExtent' ] + } +} + +## +# @CXLExtRemovalPolicy: +# +# The policy to use for selecting which extents comprise the released +# capacity, defined in the "Flags" field in cxl spec r3.1 Table 7-71. +# +# @tag-based: value = 0h. Extents are selected by the device based +# on tag, with no requirement for contiguous extents. +# +# @prescriptive: value = 1h. Extent list of capacity to release is +# included in the request payload. +# +# Since: 9.1 +## +{ 'enum': 'CXLExtRemovalPolicy', + 'data': ['tag-based', + 'prescriptive'] +} + +## +# @cxl-release-dynamic-capacity: +# +# Command to initiate to release dynamic capacity extents from a +# host. It simulates operations defined in cxl spec r3.1 7.6.7.6.6. +# +# @path: CXL DCD canonical QOM path. +# +# @host-id: The "Host ID" field as defined in cxl spec r3.1 +# Table 7-71. +# +# @removal-policy: Bit[3:0] of the "Flags" field as defined in cxl +# spec r3.1 Table 7-71. +# +# @forced-removal: Bit[4] of the "Flags" field in cxl spec r3.1 +# Table 7-71. When set, device does not wait for a Release +# Dynamic Capacity command from the host. Host immediately +# loses access to released capacity. +# +# @sanitize-on-release: Bit[5] of the "Flags" field in cxl spec r3.1 +# Table 7-71. When set, device should sanitize all released +# capacity as a result of this request. +# +# @region: The "Region Number" field as defined in cxl spec r3.1 +# Table 7-71. The dynamic capacity region where the capacity +# is being added. Valid range is from 0-7. +# +# @tag: The "Tag" field as defined in cxl spec r3.1 Table 7-71. +# +# @extents: The "Extent List" field as defined in cxl spec r3.1 +# Table 7-71. +# +# Since : 9.1 +## +{ 'command': 'cxl-release-dynamic-capacity', + 'data': { 'path': 'str', + 'host-id': 'uint16', + 'removal-policy': 'CXLExtRemovalPolicy', + '*forced-removal': 'bool', + '*sanitize-on-release': 'bool', + 'region': 'uint8', + '*tag': 'str', + 'extents': [ 'CXLDynamicCapacityExtent' ] + } +}
include/hw/cxl/cxl_device.h +22 -0
@@ -443,6 +443,12 @@ typedef struct CXLDCExtent { } CXLDCExtent; typedef QTAILQ_HEAD(, CXLDCExtent) CXLDCExtentList; +typedef struct CXLDCExtentGroup { +CXLDCExtentList list; +QTAILQ_ENTRY (CXLDCExtentGroup) node; +}CXLDCExtentGroup ; +typedef QTAILQ_HEAD(, CXLDCExtentGroup) CXLDCExtentGroupList; + typedef struct CXLDCRegion { uint64_t base; /* aligned to 256*MiB */ uint64_t decode_len; /* aligned to 256*MiB */
@@ -494,6 +500,7 @@ struct CXLType3Dev {*/ uint64_t total_capacity;/* 256M aligned */ CXLDCExtentList extents; +CXLDCExtentGroupList extents_pending;uint32_t total_extent_count;uint32_t ext_list_gen_seq;
@@ -555,4 +562,19 @@ CXLDCRegion *cxl_find_dc_region(CXLType3Dev *ct3d, uint64_t dpa, uint64_t len);void cxl_remove_extent_from_extent_list (CXLDCExtentList *list,CXLDCExtent *extent); +void cxl_insert_extent_to_extent_list (CXLDCExtentList *list,uint64_t dpa, +uint64_t len,uint8_t *tag, +uint16_t shared_seq); +bool test_any_bits_set (const unsigned long *addr,unsigned long nr, +unsigned long size); +bool cxl_extents_contains_dpa_range (CXLDCExtentList *list, +uint64_t dpa,uint64_t len); +CXLDCExtentGroup *cxl_insert_extent_to_extent_group (CXLDCExtentGroup *group, +uint64_t dpa, +uint64_t len, +uint8_t *tag, +uint16_t shared_seq); +void cxl_extent_group_list_insert_tail (CXLDCExtentGroupList *list, +CXLDCExtentGroup *group); +void cxl_extent_group_list_delete_front (CXLDCExtentGroupList *list);#endif
include/hw/cxl/cxl_events.h +18 -0
@@ -166,4 +166,22 @@ typedef struct CXLEventMemoryModule {uint8_t reserved[0x3d ]; } QEMU_PACKED CXLEventMemoryModule; +/* +* CXL r3.1 section Table 8-50: Dynamic Capacity Event Record +* All fields little endian. +*/ +typedef struct CXLEventDynamicCapacity { +CXLEventRecordHdr hdr; +uint8_t type; +uint8_t validity_flags; +uint16_t host_id; +uint8_t updated_region_id; +uint8_t flags; +uint8_t reserved2[2 ]; +uint8_t dynamic_capacity_extent[0x28 ];/* defined in cxl_device.h */ +uint8_t reserved[0x18 ]; +uint32_t extents_avail; +uint32_t tags_avail; +} QEMU_PACKED CXLEventDynamicCapacity; +#endif /* CXL_EVENTS_H */
hw/cxl/cxl-mailbox-utils.c +50 -12
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hw/mem/cxl_type3.c +305 -1
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hw/mem/cxl_type3_stubs.c +25 -0
@@ -67,3 +67,28 @@ void qmp_cxl_inject_correctable_error(const char *path, CxlCorErrorType type, {error_setg (errp,"CXL Type 3 support is not compiled in" ); } + +void qmp_cxl_add_dynamic_capacity (const char *path, +uint16_t host_id, +CXLExtSelPolicy sel_policy, +uint8_t region, +const char *tag, +CXLDynamicCapacityExtentList *extents, +Error **errp) +{ +error_setg (errp,"CXL Type 3 support is not compiled in" ); +} + +void qmp_cxl_release_dynamic_capacity (const char *path,uint16_t host_id, +CXLExtRemovalPolicy removal_policy, +bool has_forced_removal, +bool forced_removal, +bool has_sanitize_on_release, +bool sanitize_on_release, +uint8_t region, +const char *tag, +CXLDynamicCapacityExtentList *extents, +Error **errp) +{ +error_setg (errp,"CXL Type 3 support is not compiled in" ); +}
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[PULL 28/46] hw/mem/cxl_type3: Add DPA range validation for accesses to DC regions
In reply to Michael S. TsirkinFrom: Fan Ni <[email protected]>
All DPA ranges in the DC regions are invalid to access until an extent covering the range has been successfully accepted by the host. A bitmap is added to each region to record whether a DC block in the region has been backed by a DC extent. Each bit in the bitmap represents a DC block. When a DC extent is accepted, all the bits representing the blocks in the extent are set, which will be cleared when the extent is released.
Message-Id: <[email protected]>
--- include/hw/cxl/cxl_device.h | 7 ++++ hw/cxl/cxl-mailbox-utils.c | 3 ++ hw/mem/cxl_type3.c | 76 +++++++++++++++++++++++++++++++++++++ 3 files changed, 86 insertions(+)
include/hw/cxl/cxl_device.h +7 -0
@@ -456,6 +456,7 @@ typedef struct CXLDCRegion {uint64_t block_size;uint32_t dsmadhandle;uint8_t flags; +unsigned long *blk_bitmap; } CXLDCRegion;struct CXLType3Dev {
@@ -577,4 +578,10 @@ CXLDCExtentGroup *cxl_insert_extent_to_extent_group(CXLDCExtentGroup *group,void cxl_extent_group_list_insert_tail (CXLDCExtentGroupList *list,CXLDCExtentGroup *group);void cxl_extent_group_list_delete_front (CXLDCExtentGroupList *list); +void ct3_set_region_block_backed (CXLType3Dev *ct3d,uint64_t dpa, +uint64_t len); +void ct3_clear_region_block_backed (CXLType3Dev *ct3d,uint64_t dpa, +uint64_t len); +bool ct3_test_region_block_backed (CXLType3Dev *ct3d,uint64_t dpa, +uint64_t len);#endif
hw/cxl/cxl-mailbox-utils.c +3 -0
@@ -1655,6 +1655,7 @@ static CXLRetCode cmd_dcd_add_dyn_cap_rsp(const struct cxl_cmd *cmd,cxl_insert_extent_to_extent_list (extent_list, dpa, len,NULL ,0 ); ct3d->dc.total_extent_count +=1 ; +ct3_set_region_block_backed (ct3d, dpa, len); }/* Remove the first extent group in the pending list */ cxl_extent_group_list_delete_front (&ct3d->dc.extents_pending);
@@ -1813,10 +1814,12 @@ static CXLRetCode cmd_dcd_release_dyn_cap(const struct cxl_cmd *cmd,* list and update the extent count; */ QTAILQ_FOREACH_SAFE(ent, &ct3d->dc.extents, node, ent_next) { +ct3_clear_region_block_backed (ct3d, ent->start_dpa, ent->len);cxl_remove_extent_from_extent_list (&ct3d->dc.extents, ent); }copy_extent_list (&ct3d->dc.extents, &updated_list); QTAILQ_FOREACH_SAFE(ent, &updated_list, node, ent_next) { +ct3_set_region_block_backed (ct3d, ent->start_dpa, ent->len);cxl_remove_extent_from_extent_list (&updated_list, ent); } ct3d->dc.total_extent_count = updated_list_size;
hw/mem/cxl_type3.c +76 -0
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[PULL 14/46] vhost-user-gpu: fix import of DMABUF
In reply to Michael S. TsirkinFrom: Marc-André Lureau <[email protected]>
When using vhost-user-gpu with GL, qemu -display gtk doesn't show output and prints: qemu: eglCreateImageKHR failed
Since commit 9ac06df8b ("virtio-gpu-udmabuf: correct naming of QemuDmaBuf size properties"), egl_dmabuf_import_texture() uses backing_{width,height} for the texture dimension.
Message-Id: <[email protected]>
--- hw/display/vhost-user-gpu.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
hw/display/vhost-user-gpu.c +3 -2
@@ -281,8 +281,9 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) modifier = m2->modifier; } - dmabuf =qemu_dmabuf_new (m->fd_width, m->fd_height, - m->fd_stride,0 ,0 ,0 ,0 , + dmabuf =qemu_dmabuf_new (m->width, m->height, + m->fd_stride,0 ,0 , + m->fd_width, m->fd_height, m->fd_drm_fourcc, modifier, fd, false, m->fd_flags &VIRTIO_GPU_RESOURCE_FLAG_Y_0_TOP );
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[PULL 17/46] hw/cxl/mailbox: change CCI cmd set structure to be a member, not a reference
In reply to Michael S. TsirkinFrom: Gregory Price <[email protected]>
This allows devices to have fully customized CCIs, along with complex devices where wrapper devices can override or add additional CCI commands without having to replicate full command structures or pollute a base device with every command that might ever be used.
Message-Id: <[email protected]>
--- include/hw/cxl/cxl_device.h | 2 +- hw/cxl/cxl-mailbox-utils.c | 19 +++++++++++++++---- 2 files changed, 16 insertions(+), 5 deletions(-)
include/hw/cxl/cxl_device.h +1 -1
@@ -164,7 +164,7 @@ typedef struct CXLEventLog { } CXLEventLog; typedef struct CXLCCI { - const struct cxl_cmd (*cxl_cmd_set)[256]; + struct cxl_cmd cxl_cmd_set[256][256]; struct cel_log { uint16_t opcode; uint16_t effect;
hw/cxl/cxl-mailbox-utils.c +15 -4
@@ -1447,10 +1447,21 @@ void cxl_init_cci(CXLCCI *cci, size_t payload_max) bg_timercb, cci); } +static void cxl_copy_cci_commands (CXLCCI *cci,const struct cxl_cmd (*cxl_cmds)[256 ]) +{ +for (int set =0 ; set <256 ; set++) { +for (int cmd =0 ; cmd <256 ; cmd++) { +if (cxl_cmds[set][cmd].handler) { + cci->cxl_cmd_set[set][cmd] = cxl_cmds[set][cmd]; + } + } + } +} +void cxl_initialize_mailbox_swcci (CXLCCI *cci,DeviceState *intf,DeviceState *d,size_t payload_max) { - cci->cxl_cmd_set = cxl_cmd_set_sw; +cxl_copy_cci_commands (cci, cxl_cmd_set_sw); cci->d = d; cci->intf = intf;cxl_init_cci (cci, payload_max);
@@ -1458,7 +1469,7 @@ void cxl_initialize_mailbox_swcci(CXLCCI *cci, DeviceState *intf,void cxl_initialize_mailbox_t3 (CXLCCI *cci,DeviceState *d,size_t payload_max) { - cci->cxl_cmd_set = cxl_cmd_set; +cxl_copy_cci_commands (cci, cxl_cmd_set); cci->d = d;/* No separation for PCI MB as protocol handled in PCI device */
@@ -1476,7 +1487,7 @@ static const struct cxl_cmd cxl_cmd_set_t3_ld[256][256] = {void cxl_initialize_t3_ld_cci (CXLCCI *cci,DeviceState *d,DeviceState *intf,size_t payload_max) { - cci->cxl_cmd_set = cxl_cmd_set_t3_ld; +cxl_copy_cci_commands (cci, cxl_cmd_set_t3_ld); cci->d = d; cci->intf = intf;cxl_init_cci (cci, payload_max);
@@ -1496,7 +1507,7 @@ void cxl_initialize_t3_fm_owned_ld_mctpcci(CXLCCI *cci, DeviceState *d,DeviceState *intf, size_t payload_max) { - cci->cxl_cmd_set = cxl_cmd_set_t3_fm_owned_ld_mctp; +cxl_copy_cci_commands (cci ,cxl_cmd_set_t3_fm_owned_ld_mctp ); cci->d = d; cci->intf = intf;cxl_init_cci (cci, payload_max);
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[PULL 35/46] bios-tables-test: Add complex SRAT / HMAT test for GI GP
In reply to Michael S. TsirkinFrom: Jonathan Cameron <[email protected]>
Add a test with 6 nodes to exercise most interesting corner cases of SRAT and HMAT generation including the new Generic Initiator and Generic Port Affinity structures. More details of the set up in the following patch adding the table data.
Message-Id: <[email protected]>
--- tests/qtest/bios-tables-test.c | 92 ++++++++++++++++++++++++++++++++++ 1 file changed, 92 insertions(+)
tests/qtest/bios-tables-test.c +92 -0
@@ -1862,6 +1862,96 @@ static void test_acpi_q35_tcg_acpi_hmat_noinitiator(void)free_test_data (&data); } +/* Test intended to hit corner cases of SRAT and HMAT */ +static void test_acpi_q35_tcg_acpi_hmat_generic_x (void ) +{ +test_data data = {}; + + data.machine =MACHINE_Q35 ; + data.variant =".acpihmat-generic-x" ; +test_acpi_one (" -machine hmat=on,cxl=on" +" -smp 3,sockets=3" +" -m 128M,maxmem=384M,slots=2" +" -device virtio-rng-pci,id=gidev" +" -device pxb-cxl,bus_nr=64,bus=pcie.0,id=cxl.1" +" -object memory-backend-ram,size=64M,id=ram0" +" -object memory-backend-ram,size=64M,id=ram1" +" -numa node,nodeid=0,cpus=0,memdev=ram0" +" -numa node,nodeid=1" +" -object acpi-generic-initiator,id=gi0,pci-dev=gidev,node=1" +" -numa node,nodeid=2" +" -object acpi-generic-port,id=gp0,pci-bus=cxl.1,node=2" +" -numa node,nodeid=3,cpus=1" +" -numa node,nodeid=4,memdev=ram1" +" -numa node,nodeid=5,cpus=2" +" -numa hmat-lb,initiator=0,target=0,hierarchy=memory," +"data-type=access-latency,latency=10" +" -numa hmat-lb,initiator=0,target=0,hierarchy=memory," +"data-type=access-bandwidth,bandwidth=800M" +" -numa hmat-lb,initiator=0,target=2,hierarchy=memory," +"data-type=access-latency,latency=100" +" -numa hmat-lb,initiator=0,target=2,hierarchy=memory," +"data-type=access-bandwidth,bandwidth=200M" +" -numa hmat-lb,initiator=0,target=4,hierarchy=memory," +"data-type=access-latency,latency=100" +" -numa hmat-lb,initiator=0,target=4,hierarchy=memory," +"data-type=access-bandwidth,bandwidth=200M" +" -numa hmat-lb,initiator=0,target=5,hierarchy=memory," +"data-type=access-latency,latency=200" +" -numa hmat-lb,initiator=0,target=5,hierarchy=memory," +"data-type=access-bandwidth,bandwidth=400M" +" -numa hmat-lb,initiator=1,target=0,hierarchy=memory," +"data-type=access-latency,latency=500" +" -numa hmat-lb,initiator=1,target=0,hierarchy=memory," +"data-type=access-bandwidth,bandwidth=100M" +" -numa hmat-lb,initiator=1,target=2,hierarchy=memory," +"data-type=access-latency,latency=50" +" -numa hmat-lb,initiator=1,target=2,hierarchy=memory," +"data-type=access-bandwidth,bandwidth=400M" +" -numa hmat-lb,initiator=1,target=4,hierarchy=memory," +"data-type=access-latency,latency=50" +" -numa hmat-lb,initiator=1,target=4,hierarchy=memory," +"data-type=access-bandwidth,bandwidth=800M" +" -numa hmat-lb,initiator=1,target=5,hierarchy=memory," +"data-type=access-latency,latency=500" +" -numa hmat-lb,initiator=1,target=5,hierarchy=memory," +"data-type=access-bandwidth,bandwidth=100M" +" -numa hmat-lb,initiator=3,target=0,hierarchy=memory," +"data-type=access-latency,latency=20" +" -numa hmat-lb,initiator=3,target=0,hierarchy=memory," +"data-type=access-bandwidth,bandwidth=400M" +" -numa hmat-lb,initiator=3,target=2,hierarchy=memory," +"data-type=access-latency,latency=80" +" -numa hmat-lb,initiator=3,target=2,hierarchy=memory," +"data-type=access-bandwidth,bandwidth=200M" +" -numa hmat-lb,initiator=3,target=4,hierarchy=memory," +"data-type=access-latency,latency=80" +" -numa hmat-lb,initiator=3,target=4,hierarchy=memory," +"data-type=access-bandwidth,bandwidth=200M" +" -numa hmat-lb,initiator=3,target=5,hierarchy=memory," +"data-type=access-latency,latency=20" +" -numa hmat-lb,initiator=3,target=5,hierarchy=memory," +"data-type=access-bandwidth,bandwidth=400M" +" -numa hmat-lb,initiator=5,target=0,hierarchy=memory," +"data-type=access-latency,latency=20" +" -numa hmat-lb,initiator=5,target=0,hierarchy=memory," +"data-type=access-bandwidth,bandwidth=400M" +" -numa hmat-lb,initiator=5,target=2,hierarchy=memory," +"data-type=access-latency,latency=80" +" -numa hmat-lb,initiator=5,target=4,hierarchy=memory," +"data-type=access-bandwidth,bandwidth=200M" +" -numa hmat-lb,initiator=5,target=4,hierarchy=memory," +"data-type=access-latency,latency=80" +" -numa hmat-lb,initiator=5,target=2,hierarchy=memory," +"data-type=access-bandwidth,bandwidth=200M" +" -numa hmat-lb,initiator=5,target=5,hierarchy=memory," +"data-type=access-latency,latency=10" +" -numa hmat-lb,initiator=5,target=5,hierarchy=memory," +"data-type=access-bandwidth,bandwidth=800M" , + &data); +free_test_data (&data); +} +#ifdef CONFIG_POSIX static void test_acpi_erst (const char *machine) {
@@ -2304,6 +2394,8 @@ int main(int argc, char *argv[])qtest_add_func ("acpi/q35/nohpet" , test_acpi_q35_tcg_nohpet);qtest_add_func ("acpi/q35/acpihmat-noinitiator" , test_acpi_q35_tcg_acpi_hmat_noinitiator); +qtest_add_func ("acpi/q35/acpihmat-genericx" , + test_acpi_q35_tcg_acpi_hmat_generic_x);/* i386 does not support memory hotplug */ if (strcmp (arch,"i386" )) {
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[PULL 43/46] tests/qtest/pvpanic: add tests for pvshutdown event
In reply to Michael S. TsirkinFrom: Thomas Weißschuh <[email protected]>
Validate that a shutdown via the pvpanic device emits the correct QMP events.
Message-Id: <[email protected]>
--- tests/qtest/pvpanic-pci-test.c | 39 ++++++++++++++++++++++++++++++++++ tests/qtest/pvpanic-test.c | 29 +++++++++++++++++++++++++ 2 files changed, 68 insertions(+)
tests/qtest/pvpanic-pci-test.c +39 -0
@@ -85,11 +85,50 @@ static void test_panic(void)qtest_quit (qts); } +static void test_pvshutdown (void ) +{ +uint8_t val; +QDict *response, *data; +QTestState *qts; +QPCIBus *pcibus; +QPCIDevice *dev; +QPCIBar bar; + + qts =qtest_init ("-device pvpanic-pci,addr=04.0" ); + pcibus =qpci_new_pc (qts,NULL ); + dev =qpci_device_find (pcibus,QPCI_DEVFN (0x4 ,0x0 )); +qpci_device_enable (dev); + bar =qpci_iomap (dev,0 ,NULL ); + +qpci_memread (dev, bar,0 , &val,sizeof (val)); + g_assert_cmpuint(val, ==, PVPANIC_EVENTS); + + val =PVPANIC_SHUTDOWN ; +qpci_memwrite (dev, bar,0 , &val,sizeof (val)); + + response =qtest_qmp_eventwait_ref (qts,"GUEST_PVSHUTDOWN" ); +qobject_unref (response); + + response =qtest_qmp_eventwait_ref (qts,"SHUTDOWN" ); +g_assert (qdict_haskey (response,"data" )); + data =qdict_get_qdict (response,"data" ); +g_assert (qdict_haskey (data,"guest" )); +g_assert (qdict_get_bool (data,"guest" )); +g_assert (qdict_haskey (data,"reason" )); + g_assert_cmpstr(qdict_get_str(data, "reason"), ==, "guest-shutdown"); +qobject_unref (response); + +g_free (dev); +qpci_free_pc (pcibus); +qtest_quit (qts); +} +int main (int argc,char **argv) {g_test_init (&argc, &argv,NULL );qtest_add_func ("/pvpanic-pci/panic" , test_panic);qtest_add_func ("/pvpanic-pci/panic-nopause" , test_panic_nopause); +qtest_add_func ("/pvpanic-pci/pvshutdown" , test_pvshutdown);return g_test_run (); }
tests/qtest/pvpanic-test.c +29 -0
@@ -58,11 +58,40 @@ static void test_panic(void)qtest_quit (qts); } +static void test_pvshutdown (void ) +{ +uint8_t val; +QDict *response, *data; +QTestState *qts; + + qts =qtest_init ("-device pvpanic" ); + + val =qtest_inb (qts,0x505 ); + g_assert_cmpuint(val, ==, PVPANIC_EVENTS); + +qtest_outb (qts,0x505 ,PVPANIC_SHUTDOWN ); + + response =qtest_qmp_eventwait_ref (qts,"GUEST_PVSHUTDOWN" ); +qobject_unref (response); + + response =qtest_qmp_eventwait_ref (qts,"SHUTDOWN" ); +g_assert (qdict_haskey (response,"data" )); + data =qdict_get_qdict (response,"data" ); +g_assert (qdict_haskey (data,"guest" )); +g_assert (qdict_get_bool (data,"guest" )); +g_assert (qdict_haskey (data,"reason" )); + g_assert_cmpstr(qdict_get_str(data, "reason"), ==, "guest-shutdown"); +qobject_unref (response); + +qtest_quit (qts); +} +int main (int argc,char **argv) {g_test_init (&argc, &argv,NULL );qtest_add_func ("/pvpanic/panic" , test_panic);qtest_add_func ("/pvpanic/panic-nopause" , test_panic_nopause); +qtest_add_func ("/pvpanic/pvshutdown" , test_pvshutdown);return g_test_run (); }
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[PULL 21/46] include/hw/cxl/cxl_device: Rename mem_size as static_mem_size for type3 memory devices
In reply to Michael S. TsirkinFrom: Fan Ni <[email protected]>
Rename mem_size as static_mem_size for type3 memdev to cover static RAM and pmem capacity, preparing for the introduction of dynamic capacity to support dynamic capacity devices.
Message-Id: <[email protected]>
--- include/hw/cxl/cxl_device.h | 2 +- hw/cxl/cxl-mailbox-utils.c | 4 ++-- hw/mem/cxl_type3.c | 8 ++++---- 3 files changed, 7 insertions(+), 7 deletions(-)
include/hw/cxl/cxl_device.h +1 -1
@@ -234,7 +234,7 @@ typedef struct cxl_device_state { } timestamp;/* memory region size, HDM */ -uint64_t mem_size; +uint64_t static_mem_size;uint64_t pmem_size;uint64_t vmem_size;
hw/cxl/cxl-mailbox-utils.c +2 -2
@@ -803,7 +803,7 @@ static CXLRetCode cmd_identify_memory_device(const struct cxl_cmd *cmd,snprintf (id->fw_revision,0x10 ,"BWFW VERSION %02d" ,0 );stq_le_p (&id->total_capacity, - cxl_dstate->mem_size /CXL_CAPACITY_MULTIPLIER ); + cxl_dstate->static_mem_size /CXL_CAPACITY_MULTIPLIER );stq_le_p (&id->persistent_capacity, cxl_dstate->pmem_size /CXL_CAPACITY_MULTIPLIER ); stq_le_p(&id->volatile_capacity,
@@ -1179,7 +1179,7 @@ static CXLRetCode cmd_media_clear_poison(const struct cxl_cmd *cmd,struct clear_poison_pl *in = (void *)payload_in; dpa =ldq_le_p (&in->dpa); -if (dpa +CXL_CACHE_LINE_SIZE > cxl_dstate->mem_size) { +if (dpa +CXL_CACHE_LINE_SIZE > cxl_dstate->static_mem_size) {return CXL_MBOX_INVALID_PA ; }
hw/mem/cxl_type3.c +4 -4
@@ -608,7 +608,7 @@ static bool cxl_setup_memory(CXLType3Dev *ct3d, Error **errp) }address_space_init (&ct3d->hostvmem_as, vmr, v_name); ct3d->cxl_dstate.vmem_size =memory_region_size (vmr); - ct3d->cxl_dstate.mem_size +=memory_region_size (vmr); + ct3d->cxl_dstate.static_mem_size +=memory_region_size (vmr);g_free (v_name); }
@@ -631,7 +631,7 @@ static bool cxl_setup_memory(CXLType3Dev *ct3d, Error **errp) }address_space_init (&ct3d->hostpmem_as, pmr, p_name); ct3d->cxl_dstate.pmem_size =memory_region_size (pmr); - ct3d->cxl_dstate.mem_size +=memory_region_size (pmr); + ct3d->cxl_dstate.static_mem_size +=memory_region_size (pmr);g_free (p_name); }
@@ -837,7 +837,7 @@ static int cxl_type3_hpa_to_as_and_dpa(CXLType3Dev *ct3d,return -EINVAL ; } -if (*dpa_offset > ct3d->cxl_dstate.mem_size) { +if (*dpa_offset > ct3d->cxl_dstate.static_mem_size) {return -EINVAL ; }
@@ -1010,7 +1010,7 @@ static bool set_cacheline(CXLType3Dev *ct3d, uint64_t dpa_offset, uint8_t *data)return false; } -if (dpa_offset +CXL_CACHE_LINE_SIZE > ct3d->cxl_dstate.mem_size) { +if (dpa_offset +CXL_CACHE_LINE_SIZE > ct3d->cxl_dstate.static_mem_size) {return false; }
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[PULL 25/46] hw/mem/cxl_type3: Add DC extent list representative and get DC extent list mailbox support
In reply to Michael S. TsirkinFrom: Fan Ni <[email protected]>
Add dynamic capacity extent list representative to the definition of CXLType3Dev and implement get DC extent list mailbox command per CXL.spec.3.1:.8.2.9.9.9.2.
Message-Id: <[email protected]>
--- include/hw/cxl/cxl_device.h | 22 +++++++++++ hw/cxl/cxl-mailbox-utils.c | 73 ++++++++++++++++++++++++++++++++++++- hw/mem/cxl_type3.c | 1 + 3 files changed, 95 insertions(+), 1 deletion(-)
include/hw/cxl/cxl_device.h +22 -0
@@ -424,6 +424,25 @@ typedef QLIST_HEAD(, CXLPoison) CXLPoisonList;#define DCD_MAX_NUM_REGION 8 +typedef struct CXLDCExtentRaw { +uint64_t start_dpa; +uint64_t len; +uint8_t tag[0x10 ]; +uint16_t shared_seq; +uint8_t rsvd[0x6 ]; +} QEMU_PACKED CXLDCExtentRaw; + +typedef struct CXLDCExtent { +uint64_t start_dpa; +uint64_t len; +uint8_t tag[0x10 ]; +uint16_t shared_seq; +uint8_t rsvd[0x6 ]; + +QTAILQ_ENTRY (CXLDCExtent) node; +}CXLDCExtent ; +typedef QTAILQ_HEAD(, CXLDCExtent) CXLDCExtentList; + typedef struct CXLDCRegion { uint64_t base; /* aligned to 256*MiB */ uint64_t decode_len; /* aligned to 256*MiB */
@@ -474,6 +493,9 @@ struct CXLType3Dev {* memory region size. */ uint64_t total_capacity;/* 256M aligned */ +CXLDCExtentList extents; +uint32_t total_extent_count; +uint32_t ext_list_gen_seq;uint8_t num_regions;/* 0-8 regions */ CXLDCRegion regions[DCD_MAX_NUM_REGION ];
hw/cxl/cxl-mailbox-utils.c +72 -1
97 lines not on this page · raw message
hw/mem/cxl_type3.c +1 -0
@@ -673,6 +673,7 @@ static bool cxl_create_dc_regions(CXLType3Dev *ct3d, Error **errp) }; ct3d->dc.total_capacity += region->len; } +QTAILQ_INIT (&ct3d->dc.extents);return true; }
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[PULL 41/46] hw/misc/pvpanic: add support for normal shutdowns
In reply to Michael S. TsirkinFrom: Thomas Weißschuh <[email protected]>
Shutdown requests are normally hardware dependent.
By extending pvpanic to also handle shutdown requests, guests can submit such requests with an easily implementable and cross-platform mechanism.
Message-Id: <[email protected]>
--- include/hw/misc/pvpanic.h | 4 +++- include/sysemu/runstate.h | 1 + hw/misc/pvpanic.c | 5 +++++ system/runstate.c | 5 +++++ 4 files changed, 14 insertions(+), 1 deletion(-)
include/hw/misc/pvpanic.h +3 -1
@@ -20,7 +20,9 @@#include "standard-headers/linux/pvpanic.h" -#define PVPANIC_EVENTS (PVPANIC_PANICKED | PVPANIC_CRASH_LOADED) +#define PVPANIC_EVENTS (PVPANIC_PANICKED | \ + PVPANIC_CRASH_LOADED | \ + PVPANIC_SHUTDOWN)#define TYPE_PVPANIC_ISA_DEVICE "pvpanic"#define TYPE_PVPANIC_PCI_DEVICE "pvpanic-pci"
include/sysemu/runstate.h +1 -0
@@ -104,6 +104,7 @@ void qemu_system_killed(int signal, pid_t pid);void qemu_system_reset (ShutdownCause reason);void qemu_system_guest_panicked (GuestPanicInformation *info);void qemu_system_guest_crashloaded (GuestPanicInformation *info); +void qemu_system_guest_pvshutdown (void );bool qemu_system_dump_in_progress (void );#endif
hw/misc/pvpanic.c +5 -0
@@ -40,6 +40,11 @@ static void handle_event(int event)qemu_system_guest_crashloaded (NULL );return ; } + +if (event &PVPANIC_SHUTDOWN ) { +qemu_system_guest_pvshutdown (); +return ; + } }/* return supported events on read */
system/runstate.c +5 -0
@@ -585,6 +585,11 @@ void qemu_system_guest_crashloaded(GuestPanicInformation *info)qapi_free_GuestPanicInformation (info); } +void qemu_system_guest_pvshutdown (void ) +{ +qemu_system_shutdown_request (SHUTDOWN_CAUSE_GUEST_SHUTDOWN ); +} +void qemu_system_reset_request (ShutdownCause reason) { if (reboot_action == REBOOT_ACTION_SHUTDOWN &&
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[PULL 46/46] hw/cxl: Fix read from bogus memory
In reply to Michael S. TsirkinFrom: Ira Weiny <[email protected]>
Peter and coverity report:
We've passed '&data' to address_space_write(), which means "read from the address on the stack where the function argument 'data' lives", so instead of writing 64 bytes of data to the guest , we'll write 64 bytes which start with a host pointer value and then continue with whatever happens to be on the host stack after that.
Indeed the intention was to write 64 bytes of data at the address given.
Fix the parameter to address_space_write().
Message-Id: <[email protected]>
--- hw/mem/cxl_type3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
hw/mem/cxl_type3.c +1 -1
@@ -1292,7 +1292,7 @@ static bool set_cacheline(CXLType3Dev *ct3d, uint64_t dpa_offset, uint8_t *data) dpa_offset -= (vmr_size + pmr_size); } -address_space_write (as, dpa_offset,MEMTXATTRS_UNSPECIFIED , &data, +address_space_write (as, dpa_offset,MEMTXATTRS_UNSPECIFIED , data,CXL_CACHE_LINE_SIZE );return true; }
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[PULL 45/46] virtio-pci: Fix the failure process in kvm_virtio_pci_vector_use_one()
In reply to Michael S. TsirkinFrom: Cindy Lu <[email protected]>
In function kvm_virtio_pci_vector_use_one(), the function will only use the irqfd/vector for itself. Therefore, in the undo label, the failing process is incorrect.
To fix this, we can just remove this label.
Message-Id: <[email protected]>
--- hw/virtio/virtio-pci.c | 18 ++---------------- 1 file changed, 2 insertions(+), 16 deletions(-)
hw/virtio/virtio-pci.c +2 -16
@@ -898,7 +898,7 @@ static int kvm_virtio_pci_vector_use_one(VirtIOPCIProxy *proxy, int queue_no) } ret =kvm_virtio_pci_vq_vector_use (proxy, vector);if (ret <0 ) { - goto undo; +return ret; }/* * If guest supports masking, set up irqfd now.
@@ -908,25 +908,11 @@ static int kvm_virtio_pci_vector_use_one(VirtIOPCIProxy *proxy, int queue_no) ret =kvm_virtio_pci_irqfd_use (proxy, n, vector);if (ret <0 ) {kvm_virtio_pci_vq_vector_release (proxy, vector); - goto undo; +return ret; } }return 0 ; -undo: - - vector =virtio_queue_vector (vdev, queue_no); -if (vector >=msix_nr_vectors_allocated (dev)) { -return ret; - } -if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { - ret =virtio_pci_get_notifier (proxy, queue_no, &n, &vector); -if (ret <0 ) { -return ret; - } -kvm_virtio_pci_irqfd_release (proxy, n, vector); - } -return ret; }static int kvm_virtio_pci_vector_vq_use (VirtIOPCIProxy *proxy,int nvqs) {
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[PULL 34/46] bios-tables-test: Allow for new acpihmat-generic-x test data.
In reply to Michael S. TsirkinFrom: Jonathan Cameron <[email protected]>
The test to be added exercises many corners of the SRAT and HMAT table generation.
Message-Id: <[email protected]>
--- tests/qtest/bios-tables-test-allowed-diff.h | 5 +++++ tests/data/acpi/q35/APIC.acpihmat-generic-x | 0 tests/data/acpi/q35/CEDT.acpihmat-generic-x | 0 tests/data/acpi/q35/DSDT.acpihmat-generic-x | 0 tests/data/acpi/q35/HMAT.acpihmat-generic-x | 0 tests/data/acpi/q35/SRAT.acpihmat-generic-x | 0 6 files changed, 5 insertions(+) create mode 100644 tests/data/acpi/q35/APIC.acpihmat-generic-x create mode 100644 tests/data/acpi/q35/CEDT.acpihmat-generic-x create mode 100644 tests/data/acpi/q35/DSDT.acpihmat-generic-x create mode 100644 tests/data/acpi/q35/HMAT.acpihmat-generic-x create mode 100644 tests/data/acpi/q35/SRAT.acpihmat-generic-x
tests/qtest/bios-tables-test-allowed-diff.h +5 -0
@@ -1 +1,6 @@/* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/q35/APIC.acpihmat-generic-x" , +"tests/data/acpi/q35/CEDT.acpihmat-generic-x" , +"tests/data/acpi/q35/DSDT.acpihmat-generic-x" , +"tests/data/acpi/q35/HMAT.acpihmat-generic-x" , +"tests/data/acpi/q35/SRAT.acpihmat-generic-x",
tests/data/acpi/q35/APIC.acpihmat-generic-x new file +0 -0
tests/data/acpi/q35/CEDT.acpihmat-generic-x new file +0 -0
tests/data/acpi/q35/DSDT.acpihmat-generic-x new file +0 -0
tests/data/acpi/q35/HMAT.acpihmat-generic-x new file +0 -0
tests/data/acpi/q35/SRAT.acpihmat-generic-x new file +0 -0
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[PULL 07/46] virtio-mmio: Handle extra notification data
In reply to Michael S. TsirkinFrom: Jonah Palmer <[email protected]>
Add support to virtio-mmio devices for handling the extra data sent from the driver to the device when the VIRTIO_F_NOTIFICATION_DATA transport feature has been negotiated.
The extra data that's passed to the virtio-mmio device when this feature is enabled varies depending on the device's virtqueue layout.
The data passed to the virtio-mmio device is in the same format as the data passed to virtio-pci devices.
Message-Id: <[email protected]>
--- hw/virtio/virtio-mmio.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-)
hw/virtio/virtio-mmio.c +9 -2
@@ -248,6 +248,7 @@ static void virtio_mmio_write(void *opaque, hwaddr offset, uint64_t value, {VirtIOMMIOProxy *proxy = (VirtIOMMIOProxy *)opaque;VirtIODevice *vdev =virtio_bus_get_device (&proxy->bus); +uint16_t vq_idx;trace_virtio_mmio_write_offset (offset, value);
@@ -407,8 +408,14 @@ static void virtio_mmio_write(void *opaque, hwaddr offset, uint64_t value, }break ;case VIRTIO_MMIO_QUEUE_NOTIFY : -if (value <VIRTIO_QUEUE_MAX ) { -virtio_queue_notify (vdev, value); + vq_idx = value; +if (vq_idx <VIRTIO_QUEUE_MAX &&virtio_queue_get_num (vdev, vq_idx)) { +if (virtio_vdev_has_feature (vdev,VIRTIO_F_NOTIFICATION_DATA )) { +VirtQueue *vq =virtio_get_queue (vdev, vq_idx); + +virtio_queue_set_shadow_avail_idx (vq, (value >>16 ) &0xFFFF ); + } +virtio_queue_notify (vdev, vq_idx); }break ;case VIRTIO_MMIO_INTERRUPT_ACK :
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[PULL 06/46] virtio: Prevent creation of device using notification-data with ioeventfd
In reply to Michael S. TsirkinFrom: Jonah Palmer <[email protected]>
Prevent the realization of a virtio device that attempts to use the VIRTIO_F_NOTIFICATION_DATA transport feature without disabling ioeventfd.
Due to ioeventfd not being able to carry the extra data associated with this feature, having both enabled is a functional mismatch and therefore Qemu should not continue the device's realization process.
Although the device does not yet know if the feature will be successfully negotiated, many devices using this feature wont actually work without this extra data and would fail FEATURES_OK anyway.
If ioeventfd is able to work with the extra notification data in the future, this compatibility check can be removed.
Message-Id: <[email protected]>
--- hw/virtio/virtio.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)
hw/virtio/virtio.c +22 -0
@@ -2980,6 +2980,20 @@ int virtio_set_features(VirtIODevice *vdev, uint64_t val)return ret; } +static void virtio_device_check_notification_compatibility (VirtIODevice *vdev, +Error **errp) +{ +VirtioBusState *bus =VIRTIO_BUS (qdev_get_parent_bus (DEVICE (vdev))); +VirtioBusClass *k =VIRTIO_BUS_GET_CLASS (bus); +DeviceState *proxy =DEVICE (BUS (bus)->parent); + +if (virtio_host_has_feature (vdev,VIRTIO_F_NOTIFICATION_DATA ) && + k->ioeventfd_enabled (proxy)) { +error_setg (errp, +"notification_data=on without ioeventfd=off is not supported" ); + } +} +size_t virtio_get_config_size (const VirtIOConfigSizeParams *params,uint64_t host_features) {
@@ -3740,6 +3754,14 @@ static void virtio_device_realize(DeviceState *dev, Error **errp) } } +/* Devices should not use both ioeventfd and notification data feature */ +virtio_device_check_notification_compatibility (vdev, &err); +if (err !=NULL ) { +error_propagate (errp, err); + vdc->unrealize (dev); +return ; + } +virtio_bus_device_plugged (vdev, &err);if (err !=NULL ) {error_propagate (errp, err);
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[PULL 32/46] hw/acpi: Insert an acpi-generic-node base under acpi-generic-initiator
In reply to Michael S. TsirkinFrom: Jonathan Cameron <[email protected]>
This will simplify reuse when adding acpi-generic-port.
Note that some error_printf() messages will now print acpi-generic-node whereas others will move to type specific cases in next patch so are left alone for now.
Message-Id: <[email protected]>
--- include/hw/acpi/acpi_generic_initiator.h | 15 ++++- hw/acpi/acpi_generic_initiator.c | 80 +++++++++++++++--------- 2 files changed, 63 insertions(+), 32 deletions(-)
include/hw/acpi/acpi_generic_initiator.h +13 -2
@@ -8,15 +8,26 @@#include "qom/object_interfaces.h" -#define TYPE_ACPI_GENERIC_INITIATOR "acpi-generic-initiator" +/* +* Abstract type to be used as base for +* - acpi-generic-initiator +* - acpi-generic-port +*/ +#define TYPE_ACPI_GENERIC_NODE "acpi-generic-node" -typedef struct AcpiGenericInitiator { +typedef struct AcpiGenericNode {/* private */ Object parent;/* public */ char *pci_dev;uint16_t node; +}AcpiGenericNode ; + +#define TYPE_ACPI_GENERIC_INITIATOR "acpi-generic-initiator" + +typedef struct AcpiGenericInitiator { +AcpiGenericNode parent; }AcpiGenericInitiator ;/*
hw/acpi/acpi_generic_initiator.c +50 -30
145 lines not on this page · raw message
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[PULL 37/46] scripts/update-linux-headers: Copy setup_data.h to correct directory
In reply to Michael S. TsirkinFrom: Thomas Weißschuh <[email protected]>
Add the missing "include/" path component, so the files ends up in the correct place like the other headers.
Message-Id: <[email protected]>
--- scripts/update-linux-headers.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
scripts/update-linux-headers.sh +1 -1
@@ -158,7 +158,7 @@ for arch in $ARCHLIST; do cp_portable "$hdrdir/bootparam.h" \ "$output/include/standard-headers/asm-$arch" cp_portable "$hdrdir/include/asm/setup_data.h" \ - "$output/standard-headers/asm-x86" + "$output/include/standard-headers/asm-x86" fi if [ $arch = riscv ]; then cp "$hdrdir/include/asm/ptrace.h" "$output/linux-headers/asm-riscv/"
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[PULL 39/46] hw/misc/pvpanic: centralize definition of supported events
In reply to Michael S. TsirkinFrom: Thomas Weißschuh <[email protected]>
The different components of pvpanic duplicate the list of supported events. Move it to the shared header file to minimize changes when new events are added.
Message-Id: <[email protected]>
--- include/hw/misc/pvpanic.h | 4 ++++ hw/misc/pvpanic-isa.c | 3 +-- hw/misc/pvpanic-pci.c | 3 +-- hw/misc/pvpanic.c | 3 +-- 4 files changed, 7 insertions(+), 6 deletions(-)
include/hw/misc/pvpanic.h +4 -0
@@ -18,6 +18,10 @@#include "exec/memory.h" #include "qom/object.h" +#include "standard-headers/linux/pvpanic.h" + +#define PVPANIC_EVENTS (PVPANIC_PANICKED | PVPANIC_CRASH_LOADED) +#define TYPE_PVPANIC_ISA_DEVICE "pvpanic"#define TYPE_PVPANIC_PCI_DEVICE "pvpanic-pci"
hw/misc/pvpanic-isa.c +1 -2
@@ -21,7 +21,6 @@#include "hw/misc/pvpanic.h" #include "qom/object.h" #include "hw/isa/isa.h" -#include "standard-headers/linux/pvpanic.h" #include "hw/acpi/acpi_aml_interface.h" OBJECT_DECLARE_SIMPLE_TYPE (PVPanicISAState,PVPANIC_ISA_DEVICE )
@@ -102,7 +101,7 @@ static void build_pvpanic_isa_aml(AcpiDevAmlIf *adev, Aml *scope)static Property pvpanic_isa_properties[] = {DEFINE_PROP_UINT16 (PVPANIC_IOPORT_PROP , PVPanicISAState, ioport,0x505 ),DEFINE_PROP_UINT8 ("events" , PVPanicISAState, pvpanic.events, -PVPANIC_PANICKED |PVPANIC_CRASH_LOADED ), +PVPANIC_EVENTS ),DEFINE_PROP_END_OF_LIST (), };
hw/misc/pvpanic-pci.c +1 -2
@@ -21,7 +21,6 @@#include "hw/misc/pvpanic.h" #include "qom/object.h" #include "hw/pci/pci_device.h" -#include "standard-headers/linux/pvpanic.h" OBJECT_DECLARE_SIMPLE_TYPE (PVPanicPCIState,PVPANIC_PCI_DEVICE )
@@ -55,7 +54,7 @@ static void pvpanic_pci_realizefn(PCIDevice *dev, Error **errp)static Property pvpanic_pci_properties[] = {DEFINE_PROP_UINT8 ("events" , PVPanicPCIState, pvpanic.events, -PVPANIC_PANICKED |PVPANIC_CRASH_LOADED ), +PVPANIC_EVENTS ),DEFINE_PROP_END_OF_LIST (), };
hw/misc/pvpanic.c +1 -2
@@ -21,13 +21,12 @@#include "hw/qdev-properties.h" #include "hw/misc/pvpanic.h" #include "qom/object.h" -#include "standard-headers/linux/pvpanic.h" static void handle_event (int event) {static bool logged; -if (event & ~(PVPANIC_PANICKED |PVPANIC_CRASH_LOADED ) && !logged) { +if (event & ~PVPANIC_EVENTS && !logged) {qemu_log_mask (LOG_GUEST_ERROR ,"pvpanic: unknown event %#x.\n" , event); logged = true; }
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[PULL 22/46] hw/mem/cxl_type3: Add support to create DC regions to type3 memory devices
In reply to Michael S. TsirkinFrom: Fan Ni <[email protected]>
With the change, when setting up memory for type3 memory device, we can create DC regions.
A property 'num-dc-regions' is added to ct3_props to allow users to pass the number of DC regions to create. To make it easier, other region parameters like region base, length, and block size are hard coded. If needed, these parameters can be added easily.
With the change, we can create DC regions with proper kernel side support like below:
region=$(cat /sys/bus/cxl/devices/decoder0.0/create_dc_region) echo $region > /sys/bus/cxl/devices/decoder0.0/create_dc_region echo 256 > /sys/bus/cxl/devices/$region/interleave_granularity echo 1 > /sys/bus/cxl/devices/$region/interleave_ways
echo "dc0" >/sys/bus/cxl/devices/decoder2.0/mode echo 0x40000000 >/sys/bus/cxl/devices/decoder2.0/dpa_size
echo 0x40000000 > /sys/bus/cxl/devices/$region/size echo "decoder2.0" > /sys/bus/cxl/devices/$region/target0 echo 1 > /sys/bus/cxl/devices/$region/commit echo $region > /sys/bus/cxl/drivers/cxl_region/bind
Message-Id: <[email protected]>
--- hw/mem/cxl_type3.c | 53 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+)
hw/mem/cxl_type3.c +53 -0
@@ -30,6 +30,7 @@#include "hw/pci/msix.h" #define DWORD_BYTE 4 +#define CXL_CAPACITY_MULTIPLIER (256 * MiB)/* Default CDAT entries for a memory region */ enum {
@@ -567,6 +568,50 @@ static void ct3d_reg_write(void *opaque, hwaddr offset, uint64_t value, } } +/* +* TODO: dc region configuration will be updated once host backend and address +* space support is added for DCD. +*/ +static bool cxl_create_dc_regions (CXLType3Dev *ct3d,Error **errp) +{ +int i; +uint64_t region_base =0 ; +uint64_t region_len =2 * GiB; +uint64_t decode_len =2 * GiB; +uint64_t blk_size =2 * MiB; +CXLDCRegion *region; +MemoryRegion *mr; + +if (ct3d->hostvmem) { + mr =host_memory_backend_get_memory (ct3d->hostvmem); + region_base +=memory_region_size (mr); + } +if (ct3d->hostpmem) { + mr =host_memory_backend_get_memory (ct3d->hostpmem); + region_base +=memory_region_size (mr); + } +if (region_base %CXL_CAPACITY_MULTIPLIER !=0 ) { +error_setg (errp,"DC region base not aligned to 0x%lx" , +CXL_CAPACITY_MULTIPLIER ); +return false; + } + +for (i =0 , region = &ct3d->dc.regions[0 ]; + i < ct3d->dc.num_regions; + i++, region++, region_base += region_len) { + *region = (CXLDCRegion ) { + .base = region_base, + .decode_len = decode_len, + .len = region_len, + .block_size = blk_size, +/* dsmad_handle set when creating CDAT table entries */ + .flags =0 , + }; + } + +return true; +} +static bool cxl_setup_memory (CXLType3Dev *ct3d,Error **errp) {DeviceState *ds =DEVICE (ct3d);
@@ -635,6 +680,13 @@ static bool cxl_setup_memory(CXLType3Dev *ct3d, Error **errp)g_free (p_name); } +if (ct3d->dc.num_regions >0 ) { +if (!cxl_create_dc_regions (ct3d, errp)) { +error_append_hint (errp,"setup DC regions failed" ); +return false; + } + } +return true; }
@@ -930,6 +982,7 @@ static Property ct3_props[] = { HostMemoryBackend *),DEFINE_PROP_UINT64 ("sn" , CXLType3Dev, sn,UI64_NULL ),DEFINE_PROP_STRING ("cdat" , CXLType3Dev, cxl_cstate.cdat.filename), +DEFINE_PROP_UINT8 ("num-dc-regions" , CXLType3Dev, dc.num_regions,0 ), DEFINE_PROP_END_OF_LIST(), };
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[PULL 18/46] hw/cxl/mailbox: interface to add CCI commands to an existing CCI
In reply to Michael S. TsirkinFrom: Gregory Price <[email protected]>
This enables wrapper devices to customize the base device's CCI (for example, with custom commands outside the specification) without the need to change the base device.
The also enabled the base device to dispatch those commands without requiring additional driver support.
Heavily edited by Jonathan Cameron to increase code reuse
Message-Id: <[email protected]>
--- include/hw/cxl/cxl_device.h | 2 ++ hw/cxl/cxl-mailbox-utils.c | 19 +++++++++++++++++-- 2 files changed, 19 insertions(+), 2 deletions(-)
include/hw/cxl/cxl_device.h +2 -0
@@ -301,6 +301,8 @@ void cxl_initialize_mailbox_t3(CXLCCI *cci, DeviceState *d, size_t payload_max);void cxl_initialize_mailbox_swcci (CXLCCI *cci,DeviceState *intf,DeviceState *d,size_t payload_max);void cxl_init_cci (CXLCCI *cci,size_t payload_max); +void cxl_add_cci_commands (CXLCCI *cci,const struct cxl_cmd (*cxl_cmd_set)[256 ], +size_t payload_max); int cxl_process_cci_message(CXLCCI *cci, uint8_t set, uint8_t cmd, size_t len_in, uint8_t *pl_in, size_t *len_out, uint8_t *pl_out,
hw/cxl/cxl-mailbox-utils.c +17 -2
@@ -1424,9 +1424,9 @@ static void bg_timercb(void *opaque) } } -void cxl_init_cci (CXLCCI *cci,size_t payload_max) +static void cxl_rebuild_cel (CXLCCI *cci) { - cci->payload_max = payload_max; + cci->cel_size =0 ;/* Reset for a fresh build */ for (int set =0 ; set <256 ; set++) {for (int cmd =0 ; cmd <256 ; cmd++) {if (cci->cxl_cmd_set[set][cmd].handler) {
@@ -1440,6 +1440,13 @@ void cxl_init_cci(CXLCCI *cci, size_t payload_max) } } } +} + +void cxl_init_cci (CXLCCI *cci,size_t payload_max) +{ + cci->payload_max = payload_max; +cxl_rebuild_cel (cci); + cci->bg.complete_pct =0 ; cci->bg.starttime =0 ; cci->bg.runtime =0 ;
@@ -1458,6 +1465,14 @@ static void cxl_copy_cci_commands(CXLCCI *cci, const struct cxl_cmd (*cxl_cmds)[ } } +void cxl_add_cci_commands (CXLCCI *cci,const struct cxl_cmd (*cxl_cmd_set)[256 ], +size_t payload_max) +{ + cci->payload_max =MAX (payload_max, cci->payload_max); +cxl_copy_cci_commands (cci, cxl_cmd_set); +cxl_rebuild_cel (cci); +} +void cxl_initialize_mailbox_swcci (CXLCCI *cci,DeviceState *intf,DeviceState *d,size_t payload_max) {
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[PULL 29/46] hw/cxl/cxl-mailbox-utils: Add superset extent release mailbox support
In reply to Michael S. TsirkinFrom: Fan Ni <[email protected]>
With the change, we extend the extent release mailbox command processing to allow more flexible release. As long as the DPA range of the extent to release is covered by accepted extent(s) in the device, the release can be performed.
Message-Id: <[email protected]>
--- hw/cxl/cxl-mailbox-utils.c | 21 ++++++++------------- 1 file changed, 8 insertions(+), 13 deletions(-)
hw/cxl/cxl-mailbox-utils.c +8 -13
@@ -1704,6 +1704,13 @@ static CXLRetCode cxl_dc_extent_release_dry_run(CXLType3Dev *ct3d, dpa = in->updated_entries[i].start_dpa; len = in->updated_entries[i].len; +/* Check if the DPA range is not fully backed with valid extents */ +if (!ct3_test_region_block_backed (ct3d, dpa, len)) { + ret =CXL_MBOX_INVALID_PA ; + goto free_and_exit; + } + +/* After this point, extent overflow is the only error can happen */ while (len >0 ) { QTAILQ_FOREACH(ent, updated_list, node) {range_init_nofail (&range, ent->start_dpa, ent->len);
@@ -1718,14 +1725,7 @@ static CXLRetCode cxl_dc_extent_release_dry_run(CXLType3Dev *ct3d,if (range_contains (&range, dpa + len -1 )) { len2 = ent_start_dpa + ent_len - dpa - len; }else { -/* -* TODO: we reject the attempt to remove an extent -* that overlaps with multiple extents in the device -* for now. We will allow it once superset release -* support is added. -*/ - ret =CXL_MBOX_INVALID_PA ; - goto free_and_exit; + dpa = ent_start_dpa + ent_len; } len_done = ent_len - len1 - len2;
@@ -1752,14 +1752,9 @@ static CXLRetCode cxl_dc_extent_release_dry_run(CXLType3Dev *ct3d, } len -= len_done; -/* len == 0 here until superset release is added */ break ; } } -if (len) { - ret =CXL_MBOX_INVALID_PA ; - goto free_and_exit; - } } } free_and_exit:
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[PULL 42/46] pvpanic: Emit GUEST_PVSHUTDOWN QMP event on pvpanic shutdown signal
In reply to Michael S. TsirkinFrom: Alejandro Jimenez <[email protected]>
Emit a QMP event on receiving a PVPANIC_SHUTDOWN event. Even though a typical SHUTDOWN event will be sent, it will be indistinguishable from a shutdown originating from other cases (e.g. KVM exit due to KVM_SYSTEM_EVENT_SHUTDOWN) that also issue the guest-shutdown cause.
A management layer application can detect the new GUEST_PVSHUTDOWN event to determine if the guest is using the pvpanic interface to request shutdowns.
Message-Id: <[email protected]>
--- qapi/run-state.json | 14 ++++++++++++++ system/runstate.c | 1 + 2 files changed, 15 insertions(+)
qapi/run-state.json +14 -0
@@ -462,6 +462,20 @@ { 'event': 'GUEST_CRASHLOADED', 'data': { 'action': 'GuestPanicAction', '*info': 'GuestPanicInformation' } } +## +# @GUEST_PVSHUTDOWN: +# +# Emitted when guest submits a shutdown request via pvpanic interface +# +# Since: 9.1 +# +# Example: +# +# <- { "event": "GUEST_PVSHUTDOWN", +# "timestamp": { "seconds": 1648245259, "microseconds": 893771 } } +## +{ 'event': 'GUEST_PVSHUTDOWN' } + ## # @GuestPanicAction: #
system/runstate.c +1 -0
@@ -587,6 +587,7 @@ void qemu_system_guest_crashloaded(GuestPanicInformation *info)void qemu_system_guest_pvshutdown (void ) { +qapi_event_send_guest_pvshutdown ();qemu_system_shutdown_request (SHUTDOWN_CAUSE_GUEST_SHUTDOWN ); }
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[PULL 44/46] Revert "docs/specs/pvpanic: mark shutdown event as not implemented"
In reply to Michael S. TsirkinFrom: Thomas Weißschuh <[email protected]>
The missing functionality has been implemented now.
This reverts commit e739d1935c461d0668057e9dbba9d06f728d29ec.
Message-Id: <[email protected]>
--- docs/specs/pvpanic.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
docs/specs/pvpanic.rst +1 -1
@@ -29,7 +29,7 @@ bit 1 a guest panic has happened and will be handled by the guest; the host should record it or report it, but should not affect the execution of the guest. -bit 2 (to be implemented) +bit 2 a regular guest shutdown has happened and should be processed by the host PCI Interface
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[PULL 30/46] hw/mem/cxl_type3: Allow to release extent superset in QMP interface
In reply to Michael S. TsirkinFrom: Fan Ni <[email protected]>
Before the change, the QMP interface used for add/release DC extents only allows to release an extent whose DPA range is contained by a single accepted extent in the device.
With the change, we relax the constraints. As long as the DPA range of the extent is covered by accepted extents, we allow the release.
Message-Id: <[email protected]>
--- hw/mem/cxl_type3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
hw/mem/cxl_type3.c +1 -1
@@ -1947,7 +1947,7 @@ static void qmp_cxl_process_dynamic_capacity_prescriptive(const char *path, "cannot release extent with pending DPA range");return ; } -if (!cxl_extents_contains_dpa_range (&dcd->dc.extents, dpa, len)) { +if (!ct3_test_region_block_backed (dcd, dpa, len)) {error_setg (errp,"cannot release extent with non-existing DPA range" );return ;
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[PULL 40/46] tests/qtest/pvpanic: use centralized definition of supported events
In reply to Michael S. TsirkinFrom: Thomas Weißschuh <[email protected]>
Avoid the necessity to update all tests when new events are added to the device.
Message-Id: <[email protected]>
--- tests/qtest/pvpanic-pci-test.c | 5 +++-- tests/qtest/pvpanic-test.c | 5 +++-- 2 files changed, 6 insertions(+), 4 deletions(-)
tests/qtest/pvpanic-pci-test.c +3 -2
@@ -16,6 +16,7 @@#include "qapi/qmp/qdict.h" #include "libqos/pci.h" #include "libqos/pci-pc.h" +#include "hw/misc/pvpanic.h" #include "hw/pci/pci_regs.h" static void test_panic_nopause (void )
@@ -34,7 +35,7 @@ static void test_panic_nopause(void) bar =qpci_iomap (dev,0 ,NULL );qpci_memread (dev, bar,0 , &val,sizeof (val)); - g_assert_cmpuint(val, ==, 3); + g_assert_cmpuint(val, ==, PVPANIC_EVENTS); val =1 ;qpci_memwrite (dev, bar,0 , &val,sizeof (val));
@@ -67,7 +68,7 @@ static void test_panic(void) bar =qpci_iomap (dev,0 ,NULL );qpci_memread (dev, bar,0 , &val,sizeof (val)); - g_assert_cmpuint(val, ==, 3); + g_assert_cmpuint(val, ==, PVPANIC_EVENTS); val =1 ;qpci_memwrite (dev, bar,0 , &val,sizeof (val));
tests/qtest/pvpanic-test.c +3 -2
@@ -10,6 +10,7 @@#include "qemu/osdep.h" #include "libqtest.h" #include "qapi/qmp/qdict.h" +#include "hw/misc/pvpanic.h" static void test_panic_nopause (void ) {
@@ -20,7 +21,7 @@ static void test_panic_nopause(void) qts =qtest_init ("-device pvpanic -action panic=none" ); val =qtest_inb (qts,0x505 ); - g_assert_cmpuint(val, ==, 3); + g_assert_cmpuint(val, ==, PVPANIC_EVENTS);qtest_outb (qts,0x505 ,0x1 );
@@ -43,7 +44,7 @@ static void test_panic(void) qts =qtest_init ("-device pvpanic -action panic=pause" ); val =qtest_inb (qts,0x505 ); - g_assert_cmpuint(val, ==, 3); + g_assert_cmpuint(val, ==, PVPANIC_EVENTS);qtest_outb (qts,0x505 ,0x1 );
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[PULL 12/46] hw/virtio: Fix obtain the buffer id from the last descriptor
In reply to Michael S. TsirkinFrom: Wafer <[email protected]>
The virtio-1.3 specification
<https://docs.oasis-open.org/virtio/virtio/v1.3/virtio-v1.3.html> writes:
2.8.6 Next Flag: Descriptor Chaining
Buffer ID is included in the last descriptor in the list.
If the feature (_F_INDIRECT_DESC) has been negotiated, install only one descriptor in the virtqueue.
Therefor the buffer id should be obtained from the first descriptor.
In descriptor chaining scenarios, the buffer id should be obtained from the last descriptor.
Message-Id: <[email protected]>
--- hw/virtio/virtio.c | 5 +++++ 1 file changed, 5 insertions(+)
hw/virtio/virtio.c +5 -0
@@ -1745,6 +1745,11 @@ static void *virtqueue_packed_pop(VirtQueue *vq, size_t sz) &indirect_desc_cache); }while (rc ==VIRTQUEUE_READ_DESC_MORE ); +if (desc_cache != &indirect_desc_cache) { +/* Buffer ID is included in the last descriptor in the list. */ + id = desc.id; + } +/* Now copy what we have collected and mapped */ elem =virtqueue_alloc_element (sz, out_num, in_num);for (i =0 ; i < out_num; i++) {
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[PULL 36/46] bios-tables-test: Add data for complex numa test (GI, GP etc)
In reply to Michael S. TsirkinFrom: Jonathan Cameron <[email protected]>
Given this is a new configuration, there are affects on APIC, CEDT and DSDT, but the key elements are in SRAT (plus related data in HMAT). The configuration has node to exercise many different combinations.
0) CPUs + Memory
1) GI only
2) GP only
3) CPUS only
4) Memory only
5) CPUs + HP memory
GI node, GP Node, Memory only node, hotplug memory
only node, latency and bandwidth such that in Linux Access0 (any initiator) and Access1 (CPU initiators only) given different answers. Following cropped to remove details of each entry.
[000h 0000 004h] Signature : "SRAT" [System Resource Affinity Table]
[030h 0048 001h] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity]
[032h 0050 001h] Proximity Domain Low(8) : 00
[033h 0051 001h] Apic ID : 00
[040h 0064 001h] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity]
[042h 0066 001h] Proximity Domain Low(8) : 03 [043h 0067 001h] Apic ID : 01
[050h 0080 001h] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity]
[052h 0082 001h] Proximity Domain Low(8) : 05
[053h 0083 001h] Apic ID : 02
[060h 0096 001h] Subtable Type : 01 [Memory Affinity]
[062h 0098 004h] Proximity Domain : 00000000
[068h 0104 008h] Base Address : 0000000000000000
[070h 0112 008h] Address Length : 00000000000A0000
[088h 0136 001h] Subtable Type : 01 [Memory Affinity]
[08Ah 0138 004h] Proximity Domain : 00000000
[090h 0144 008h] Base Address : 0000000000100000
[098h 0152 008h] Address Length : 0000000003F00000
[0A8h 0168 008h] Reserved3 : 0000000000000000
[0B0h 0176 001h] Subtable Type : 01 [Memory Affinity]
[0B2h 0178 004h] Proximity Domain : 00000004
[0B8h 0184 008h] Base Address : 0000000004000000
[0C0h 0192 008h] Address Length : 0000000004000000
//Comment in hw/i386/aml-build.c on why these exist - not part of //ACPI requirements.
[0D8h 0216 001h] Subtable Type : 01 [Memory Affinity]
[0DAh 0218 004h] Proximity Domain : 00000000
[0E0h 0224 008h] Base Address : 0000000000000000
[0E8h 0232 008h] Address Length : 0000000000000000
[100h 0256 001h] Subtable Type : 01 [Memory Affinity]
[102h 0258 004h] Proximity Domain : 00000000
[108h 0264 008h] Base Address : 0000000000000000
[110h 0272 008h] Address Length : 0000000000000000
[128h 0296 001h] Subtable Type : 01 [Memory Affinity]
[12Ah 0298 004h] Proximity Domain : 00000000
[130h 0304 008h] Base Address : 0000000000000000
[138h 0312 008h] Address Length : 0000000000000000
[150h 0336 001h] Subtable Type : 01 [Memory Affinity]
[152h 0338 004h] Proximity Domain : 00000000
[158h 0344 008h] Base Address : 0000000000000000
[160h 0352 008h] Address Length : 0000000000000000
[178h 0376 001h] Subtable Type : 01 [Memory Affinity]
[17Ah 0378 004h] Proximity Domain : 00000000
[180h 0384 008h] Base Address : 0000000000000000
[188h 0392 008h] Address Length : 0000000000000000
// End of strange empty Memory Affinity structures.
[1A0h 0416 001h] Subtable Type : 05 [Generic Initiator Affinity]
[1A3h 0419 001h] Device Handle Type : 01
[1A4h 0420 004h] Proximity Domain : 00000001
[1A8h 0424 010h] Device Handle : 00 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00
[1C0h 0448 001h] Subtable Type : 06 [Generic Port Affinity]
[1C3h 0451 001h] Device Handle Type : 00
[1C4h 0452 004h] Proximity Domain : 00000002
[1C8h 0456 010h] Device Handle : 41 43 50 49 30 30 31 36 40 00 00 00 00 00 00 00
[1E0h 0480 001h] Subtable Type : 01 [Memory Affinity]
[1E2h 0482 004h] Proximity Domain : 00000005
[1E8h 0488 008h] Base Address : 0000000100000000
[1F0h 0496 008h] Address Length : 0000000090000000
[1FCh 0508 004h] Flags (decoded below) : 00000003
Enabled : 1
Hot Pluggable : 1
Non-Volatile : 0
Example block from HMAT:
[0F0h 0240 002h] Structure Type : 0001 [System Locality Latency and Bandwidth Information] [0F2h 0242 002h] Reserved : 0000 [0F4h 0244 004h] Length : 00000078 [0F8h 0248 001h] Flags (decoded below) : 00 Memory Hierarchy : 0 Use Minimum Transfer Size : 0 Non-sequential Transfers : 0
[0F9h 0249 001h] Data Type : 03
[0FAh 0250 001h] Minimum Transfer Size : 00
[0FBh 0251 001h] Reserved1 : 00
[0FCh 0252 004h] Initiator Proximity Domains # : 00000004 [100h 0256 004h] Target Proximity Domains # : 00000006
[104h 0260 004h] Reserved2 : 00000000
[108h 0264 008h] Entry Base Unit : 0000000000000004
[110h 0272 004h] Initiator Proximity Domain List : 00000000 [114h 0276 004h] Initiator Proximity Domain List : 00000001 [118h 0280 004h] Initiator Proximity Domain List : 00000003 [11Ch 0284 004h] Initiator Proximity Domain List : 00000005 [120h 0288 004h] Target Proximity Domain List : 00000000 [124h 0292 004h] Target Proximity Domain List : 00000001 [128h 0296 004h] Target Proximity Domain List : 00000002 [12Ch 0300 004h] Target Proximity Domain List : 00000003 [130h 0304 004h] Target Proximity Domain List : 00000004 [134h 0308 004h] Target Proximity Domain List : 00000005
[138h 0312 002h] Entry : 00C8 [13Ah 0314 002h] Entry : 0000 [13Ch 0316 002h] Entry : 0032 [13Eh 0318 002h] Entry : 0000 [140h 0320 002h] Entry : 0032 [142h 0322 002h] Entry : 0064 [144h 0324 002h] Entry : 0019 [146h 0326 002h] Entry : 0000 [148h 0328 002h] Entry : 0064 [14Ah 0330 002h] Entry : 0000 [14Ch 0332 002h] Entry : 00C8 [14Eh 0334 002h] Entry : 0019 [150h 0336 002h] Entry : 0064 [152h 0338 002h] Entry : 0000 [154h 0340 002h] Entry : 0032 [156h 0342 002h] Entry : 0000 [158h 0344 002h] Entry : 0032 [15Ah 0346 002h] Entry : 0064 [15Ch 0348 002h] Entry : 0064 [15Eh 0350 002h] Entry : 0000 [160h 0352 002h] Entry : 0032 [162h 0354 002h] Entry : 0000 [164h 0356 002h] Entry : 0032 [166h 0358 002h] Entry : 00C8
Note the zeros represent entries where the target node has no memory. These could be surpressed but it isn't 'wrong' to provide them and it is (probably) permissible under ACPI to hotplug memory into these nodes later.
Message-Id: <[email protected]>
--- tests/qtest/bios-tables-test-allowed-diff.h | 5 ----- tests/data/acpi/q35/APIC.acpihmat-generic-x | Bin 0 -> 136 bytes tests/data/acpi/q35/CEDT.acpihmat-generic-x | Bin 0 -> 68 bytes tests/data/acpi/q35/DSDT.acpihmat-generic-x | Bin 0 -> 10400 bytes tests/data/acpi/q35/HMAT.acpihmat-generic-x | Bin 0 -> 360 bytes tests/data/acpi/q35/SRAT.acpihmat-generic-x | Bin 0 -> 520 bytes 6 files changed, 5 deletions(-)
tests/qtest/bios-tables-test-allowed-diff.h +0 -5
@@ -1,6 +1 @@/* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/q35/APIC.acpihmat-generic-x" , -"tests/data/acpi/q35/CEDT.acpihmat-generic-x" , -"tests/data/acpi/q35/DSDT.acpihmat-generic-x" , -"tests/data/acpi/q35/HMAT.acpihmat-generic-x" , -"tests/data/acpi/q35/SRAT.acpihmat-generic-x",
tests/data/acpi/q35/APIC.acpihmat-generic-x binary +0 -0
tests/data/acpi/q35/CEDT.acpihmat-generic-x binary +0 -0
tests/data/acpi/q35/DSDT.acpihmat-generic-x binary +0 -0
tests/data/acpi/q35/HMAT.acpihmat-generic-x binary +0 -0
tests/data/acpi/q35/SRAT.acpihmat-generic-x binary +0 -0
Signature · 1 line
MST
Re: [PULL 36/46] bios-tables-test: Add data for complex numa test (GI, GP etc)
Quoted 13 lines · Michael S. Tsirkin
From: Jonathan Cameron <[email protected]>
Given this is a new configuration, there are affects on APIC, CEDT and DSDT, but the key elements are in SRAT (plus related data in HMAT). The configuration has node to exercise many different combinations.
0) CPUs + Memory
1) GI only
2) GP only
3) CPUS only
4) Memory only
5) CPUs + HP memory
Quoted 4 lines
GI node, GP Node, Memory only node, hotplug memory
only node, latency and bandwidth such that in Linux Access0 (any initiator) and Access1 (CPU initiators only) given different answers. Following cropped to remove details of each entry.
This fails testing:
https://gitlab.com/qemu-project/qemu/-/jobs/7021105504
acpi-test: Warning! SRAT binary file mismatch. Actual [aml:/tmp/aml-GHR6O2], Expected [aml:tests/data/acpi/q35/SRAT.acpihmat-generic-x]. See source file tests/qtest/bios-tables-test.c for instructions on how to update expected files.
to see ASL diff between mismatched files install IASL, rebuild QEMU from scratch and re-run tests with V=1 environment variable set** ERROR:../alt/tests/qtest/bios-tables-test.c:550:test_acpi_asl: assertion failed: (all_tables_match)
Bail out! ERROR:../alt/tests/qtest/bios-tables-test.c:550:test_acpi_asl: assertion failed: (all_tables_match) Aborted (core dumped)
r~
Re: [PULL 36/46] bios-tables-test: Add data for complex numa test (GI, GP etc)
Quoted 24 lines · On Wed, 5 Jun 2024 07:39:53 -0700 Richard Henderson…
Quoted 13 lines · Michael S. Tsirkin
From: Jonathan Cameron <[email protected]>
Given this is a new configuration, there are affects on APIC, CEDT and DSDT, but the key elements are in SRAT (plus related data in HMAT). The configuration has node to exercise many different combinations.
0) CPUs + Memory
1) GI only
2) GP only
3) CPUS only
4) Memory only
5) CPUs + HP memoryQuoted 4 lines
GI node, GP Node, Memory only node, hotplug memory
only node, latency and bandwidth such that in Linux Access0 (any initiator) and Access1 (CPU initiators only) given different answers. Following cropped to remove details of each entry.This fails testing:
Quoted 12 lines
acpi-test: Warning! SRAT binary file mismatch. Actual [aml:/tmp/aml-GHR6O2], Expected [aml:tests/data/acpi/q35/SRAT.acpihmat-generic-x].
See source filetests/qtest/bios-tables-test.cfor instructions on how to update expected files.
to see ASL diff between mismatched files install IASL, rebuild QEMU from scratch and re-run tests with V=1 environment variable set** ERROR:../alt/tests/qtest/bios-tables-test.c:550:test_acpi_asl: assertion failed:
(all_tables_match)
Bail out! ERROR:../alt/tests/qtest/bios-tables-test.c:550:test_acpi_asl: assertion failed:
(all_tables_match)
Aborted (core dumped)
s390 and passes on an x86 host, so I guess an endian bug - any chance of a table dump from someone with access to an s390 host?
This test covers some stuff that was previously missing tests so may be non trivial to spot.
I'll play guess in the meantime. So far I'm not seeing anything that differs from existing ACPI table building code.
Jonathan
Quoted 2 lines
r~
Re: [PULL 36/46] bios-tables-test: Add data for complex numa test (GI, GP etc)
Quoted 40 lines · On Wed, 5 Jun 2024 16:27:33 +0100 Jonathan Cameron via <[email protected]>…
Quoted 24 lines · On Wed, 5 Jun 2024 07:39:53 -0700 Richard Henderson…
Quoted 13 lines · Michael S. Tsirkin
From: Jonathan Cameron <[email protected]>
Given this is a new configuration, there are affects on APIC, CEDT and DSDT, but the key elements are in SRAT (plus related data in HMAT). The configuration has node to exercise many different combinations.
0) CPUs + Memory
1) GI only
2) GP only
3) CPUS only
4) Memory only
5) CPUs + HP memoryQuoted 4 lines
GI node, GP Node, Memory only node, hotplug memory
only node, latency and bandwidth such that in Linux Access0 (any initiator) and Access1 (CPU initiators only) given different answers. Following cropped to remove details of each entry.This fails testing:
Quoted 12 lines
acpi-test: Warning! SRAT binary file mismatch. Actual [aml:/tmp/aml-GHR6O2], Expected [aml:tests/data/acpi/q35/SRAT.acpihmat-generic-x].
See source filetests/qtest/bios-tables-test.cfor instructions on how to update expected files.
to see ASL diff between mismatched files install IASL, rebuild QEMU from scratch and re-run tests with V=1 environment variable set** ERROR:../alt/tests/qtest/bios-tables-test.c:550:test_acpi_asl: assertion failed:
(all_tables_match)
Bail out! ERROR:../alt/tests/qtest/bios-tables-test.c:550:test_acpi_asl: assertion failed:
(all_tables_match)
Aborted (core dumped)
Quoted 8 lines
s390 and passes on an x86 host, so I guess an endian bug - any chance of a table dump from someone with access to an s390 host?
This test covers some stuff that was previously missing tests so may be non trivial to spot.
I'll play guess in the meantime. So far I'm not seeing anything that differs from existing ACPI table building code.
Ok. I think it a bug earlier in this patch set. A table dump would confirm.
One item that looks dodgy is the filling in of the ACPI HID.
It's messy in the ACPI spec as it's defined as both an integer and a string.
Need to take a 4 character string and get it into hid of
struct {
uint64_t hid;
uint32_t uid;
}
which id done with an 8 byte memcpy.
that is then written to SRAT wtih build_append_int_noprefix(table_data, handle->hid, 8);
So I need to byte swap it if host doesn't match guest endian.
I'll put together a patch, but perhaps best plan is if Michael drops generic ports and we go around again :(
At least I don't have much backed up behind this one.
Jonathan
Quoted 8 lines
Jonathan
Quoted 2 lines
r~
Re: [PULL 36/46] bios-tables-test: Add data for complex numa test (GI, GP etc)
In reply to Jonathan Cameron viaQuoted 17 lines · Jonathan Cameron
Quoted 4 lines
This fails testing:
Quoted 12 lines
acpi-test: Warning! SRAT binary file mismatch. Actual [aml:/tmp/aml-GHR6O2], Expected [aml:tests/data/acpi/q35/SRAT.acpihmat-generic-x].
See source filetests/qtest/bios-tables-test.cfor instructions on how to update expected files.
to see ASL diff between mismatched files install IASL, rebuild QEMU from scratch and re-run tests with V=1 environment variable set** ERROR:../alt/tests/qtest/bios-tables-test.c:550:test_acpi_asl: assertion failed:
(all_tables_match)
Bail out! ERROR:../alt/tests/qtest/bios-tables-test.c:550:test_acpi_asl: assertion failed:
(all_tables_match)
Aborted (core dumped)
Quoted 2 lines
s390 and passes on an x86 host, so I guess an endian bug - any chance of a table dump from someone with access to an s390 host?
Sure. By what incantation do I produce a dump?
r~
Re: [PULL 36/46] bios-tables-test: Add data for complex numa test (GI, GP etc)
Quoted 18 lines · On Wed, 5 Jun 2024 09:01:37 -0700 Richard Henderson…
Quoted 17 lines · Jonathan Cameron
Quoted 16 lines
This fails testing:
https://gitlab.com/qemu-project/qemu/-/jobs/7021105504
acpi-test: Warning! SRAT binary file mismatch. Actual [aml:/tmp/aml-GHR6O2], Expected [aml:tests/data/acpi/q35/SRAT.acpihmat-generic-x].
See source filetests/qtest/bios-tables-test.cfor instructions on how to update expected files.
to see ASL diff between mismatched files install IASL, rebuild QEMU from scratch and re-run tests with V=1 environment variable set** ERROR:../alt/tests/qtest/bios-tables-test.c:550:test_acpi_asl: assertion failed:
(all_tables_match)
Bail out! ERROR:../alt/tests/qtest/bios-tables-test.c:550:test_acpi_asl: assertion failed:
(all_tables_match)
Aborted (core dumped)
Quoted 4 lines
Quoted 2 lines
s390 and passes on an x86 host, so I guess an endian bug - any chance of a table dump from someone with access to an s390 host?
Sure. By what incantation do I produce a dump?
If you still have the /mnt/aml-GHR602 above then either upload that somewhere or iasl -d /mnt/aml-GHR602
should generate you a suitable text file. However generic ports are fairly recent so you may need a newer iasl from acpica-tools to decode.
It will moan if it doesn't understand the content.
Jonathan
Quoted 3 lines
r~
Re: [PULL 36/46] bios-tables-test: Add data for complex numa test (GI, GP etc)
Quoted 24 lines · On Wed, 5 Jun 2024 17:08:45 +0100 Jonathan Cameron…
Quoted 21 lines · On Wed, 5 Jun 2024 09:01:37 -0700 Richard Henderson…
Quoted 19 lines · Jonathan Cameron
Quoted 4 lines
This fails testing:
Quoted 12 lines
acpi-test: Warning! SRAT binary file mismatch. Actual [aml:/tmp/aml-GHR6O2], Expected [aml:tests/data/acpi/q35/SRAT.acpihmat-generic-x].
See source filetests/qtest/bios-tables-test.cfor instructions on how to update expected files.
to see ASL diff between mismatched files install IASL, rebuild QEMU from scratch and re-run tests with V=1 environment variable set** ERROR:../alt/tests/qtest/bios-tables-test.c:550:test_acpi_asl: assertion failed:
(all_tables_match)
Bail out! ERROR:../alt/tests/qtest/bios-tables-test.c:550:test_acpi_asl: assertion failed:
(all_tables_match)
Aborted (core dumped)s390 and passes on an x86 host, so I guess an endian bug - any chance of a table dump from someone with access to an s390 host?
Quoted 8 lines
Quoted 1 line
Sure. By what incantation do I produce a dump?
If you still have the
/mnt/aml-GHR602above then either upload that somewhere or iasl -d/mnt/aml-GHR602
should generate you a suitable text file. However generic ports are fairly recent so you may need a newer iasl from acpica-tools to decode.
It will moan if it doesn't understand the content.
make check-qtest-x86_64 is how I get the test to run in the first place.
Alternatively, this 'might' be sufficient if my guess for the problem is correct. Thanks!
From 956df037f024783f19b6b00e5e280484380227a0 Mon Sep 17 00:00:00 2001
From: Jonathan Cameron <[email protected]>
Date: Wed, 5 Jun 2024 17:01:36 +0100
Subject: [PATCH] hw/acpi: Fix big endian host creation of Generic Port
Affinity Structures
Treating the HID as an integer caused it to get bit reversed on big endian hosts running little endian guests. Treat it as a character array instead.
Fixes hw/acpi: Generic Port Affinity Structure Support
---
Maybe this is the only problem? I don't have a setup to test so any help would be appreciated.
--- include/hw/acpi/acpi_generic_initiator.h | 2 +- hw/acpi/acpi_generic_initiator.c | 6 +++++- 2 files changed, 6 insertions(+), 2 deletions(-)
include/hw/acpi/acpi_generic_initiator.h +1 -1
@@ -61,7 +61,7 @@ typedef struct PCIDeviceHandle {uint16_t bdf; };struct { -uint64_t hid; +char hid[8 ];uint32_t uid; }; };
hw/acpi/acpi_generic_initiator.c +5 -1
@@ -150,8 +150,12 @@ build_srat_generic_node_affinity(GArray *table_data, int node,build_append_int_noprefix (table_data, handle->bdf,2 );build_append_int_noprefix (table_data,0 ,12 ); }else { +int i; +/* Device Handle - ACPI */ -build_append_int_noprefix (table_data, handle->hid,8 ); +for (i =0 ; i <sizeof (handle->hid); i++) { +build_append_int_noprefix (table_data, handle->hid[i],1 ); + }build_append_int_noprefix (table_data, handle->uid,4 );build_append_int_noprefix (table_data,0 ,4 ); }
Signature · 1 line
2.39.2
Quoted 6 lines
Jonathan
Quoted 3 lines
r~
Re: [PULL 36/46] bios-tables-test: Add data for complex numa test (GI, GP etc)
Quoted 9 lines · Jonathan Cameron
Quoted 8 lines
Quoted 1 line
Sure. By what incantation do I produce a dump?
If you still have the
/mnt/aml-GHR602above then either upload that somewhere or iasl -d/mnt/aml-GHR602
should generate you a suitable text file. However generic ports are fairly recent so you may need a newer iasl from acpica-tools to decode.
It will moan if it doesn't understand the content.make check-qtest-x86_64 is how I get the test to run in the first place.
Ah, I see, the file is not cleaned up on abort.
For the record, I attach the dump.
Quoted 45 lines
Alternatively, this 'might' be sufficient if my guess for the problem is correct. Thanks!
From
956df037f024783f19b6b00e5e280484380227a0Mon Sep 17 00:00:00 2001
From: Jonathan Cameron <[email protected]>
Date: Wed, 5 Jun 2024 17:01:36 +0100
Subject: [PATCH] hw/acpi: Fix big endian host creation of Generic Port
Affinity StructuresTreating the HID as an integer caused it to get bit reversed on big endian hosts running little endian guests. Treat it as a character array instead.
Fixes hw/acpi: Generic Port Affinity Structure Support
Signed-off-by Jonathan Cameron <[email protected]>---
Maybe this is the only problem? I don't have a setup to test so any help would be appreciated.--- include/hw/acpi/acpi_generic_initiator.h | 2 +- hw/acpi/acpi_generic_initiator.c | 6 +++++- 2 files changed, 6 insertions(+), 2 deletions(-)include/hw/acpi/acpi_generic_initiator.h +1
-1@@ -61,7 +61,7 @@ typedef struct PCIDeviceHandle {uint16_t bdf; };struct { -uint64_t hid; +char hid[8 ];uint32_t uid; }; };hw/acpi/acpi_generic_initiator.c +0
-0@@ -150,8 +150,12 @@ build_srat_generic_node_affinity(GArray *table_data, int node,build_append_int_noprefix (table_data, handle->bdf,2 );build_append_int_noprefix (table_data,0 ,12 ); }else {
hw/acpi/acpi_generic_initiator.c build_srat_generic_node_affinity(GArray *table_data, int node, · line 161
Quoted 10 lines
hw/acpi/acpi_generic_initiator.c +5
-1+int i; +/* Device Handle - ACPI */ -build_append_int_noprefix (table_data, handle->hid,8 ); +for (i =0 ; i <sizeof (handle->hid); i++) { +build_append_int_noprefix (table_data, handle->hid[i],1 ); + }build_append_int_noprefix (table_data, handle->uid,4 );build_append_int_noprefix (table_data,0 ,4 ); }
Yes, this fixes the abort.
Merge the declaration of i into the for loop?
r~
Re: [PULL 36/46] bios-tables-test: Add data for complex numa test (GI, GP etc)
Quoted 9 lines · On Wed, 5 Jun 2024 09:54:16 -0700 Richard Henderson…
Quoted 8 lines · Jonathan Cameron
Quoted 8 lines
Quoted 1 line
Sure. By what incantation do I produce a dump?
If you still have the
/mnt/aml-GHR602above then either upload that somewhere or iasl -d/mnt/aml-GHR602
should generate you a suitable text file. However generic ports are fairly recent so you may need a newer iasl from acpica-tools to decode.
It will moan if it doesn't understand the content.
Quoted 3 lines
Quoted 1 line
make check-qtest-x86_64 is how I get the test to run in the first place.
Ah, I see, the file is not cleaned up on abort.
Yes. End up with a lot of those after a while!
Quoted 1 line
For the record, I attach the dump.
Thanks!
Quoted 51 lines
Quoted 51 lines
Alternatively, this 'might' be sufficient if my guess for the problem is correct. Thanks!
From
956df037f024783f19b6b00e5e280484380227a0Mon Sep 17 00:00:00 2001
From: Jonathan Cameron <[email protected]>
Date: Wed, 5 Jun 2024 17:01:36 +0100
Subject: [PATCH] hw/acpi: Fix big endian host creation of Generic Port
Affinity StructuresTreating the HID as an integer caused it to get bit reversed on big endian hosts running little endian guests. Treat it as a character array instead.
Fixes hw/acpi: Generic Port Affinity Structure Support
Signed-off-by Jonathan Cameron <[email protected]>---
Maybe this is the only problem? I don't have a setup to test so any help would be appreciated.--- include/hw/acpi/acpi_generic_initiator.h | 2 +- hw/acpi/acpi_generic_initiator.c | 6 +++++- 2 files changed, 6 insertions(+), 2 deletions(-)include/hw/acpi/acpi_generic_initiator.h +1
-1@@ -61,7 +61,7 @@ typedef struct PCIDeviceHandle {uint16_t bdf; };struct { -uint64_t hid; +char hid[8 ];uint32_t uid; }; };hw/acpi/acpi_generic_initiator.c +3
-1@@ -150,8 +150,12 @@ build_srat_generic_node_affinity(GArray *table_data, int node,build_append_int_noprefix (table_data, handle->bdf,2 );build_append_int_noprefix (table_data,0 ,12 ); }else { +int i; +/* Device Handle - ACPI */ -build_append_int_noprefix (table_data, handle->hid,8 ); +for (i =0 ; i <sizeof (handle->hid); i++) {
Quoted 8 lines
hw/acpi/acpi_generic_initiator.c build_srat_generic_node_affinity(GArray *table_data, int node, · line 161
Quoted 5 lines
hw/acpi/acpi_generic_initiator.c +2
-0+build_append_int_noprefix (table_data, handle->hid[i],1 ); + }build_append_int_noprefix (table_data, handle->uid,4 );build_append_int_noprefix (table_data,0 ,4 ); }Yes, this fixes the abort.
Merge the declaration of i into the for loop?
sure.
Thanks for testing. Seems it's time I tried to get an emulated s390 setup running if that's practical as two of these in the last year :(
Jonathan
Quoted 3 lines
r~
Quoted 8 lines · Michael S. Tsirkin
The following changes since commit
60b54b67c63d8f076152e0f7dccf39854dfc6a77:Merge tag 'pull-lu-20240526' of https://gitlab.com/rth7680/qemu into staging (2024-05-26 17:51:00 -0700)
are available in the Git repository at:
https://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_upstream
for you to fetch changes up tobfcacf81d63a3d95f128bce3faf3564e7f98ea8b:
Dropped a patch from this pull at Author's request. New head a2da15a164ddd798227262b58507b46ad5ab0ca9 Sorry about the noise - ok like this?
Don't want to spam the list posting v2 just for this.
Quoted 21 lines
hw/cxl: Fix read from bogus memory (2024-06-04 15:05:03 -0400)
----------------------------------------------------------------
virtio: features,fixesA bunch of improvements:
- vhost dirty log is now only scanned once, not once per device
- virtio and vhost now supportVIRTIO_F_NOTIFICATION_DATA
- cxl gained DCD emulation support
- pvpanic gained shutdown support
- acpi now supports Generic Port Affinity Structure
- new tests
- bugfixesSigned-off-by Michael S. Tsirkin <[email protected]>----------------------------------------------------------------
Alejandro Jimenez (1):
pvpanic: EmitGUEST_PVSHUTDOWNQMP event on pvpanic shutdown signal
Quoted 5 lines
Christian Pötzsch (1):
Fix vhost user assertion when sending more than one fdCindy Lu (2):
virtio-pci: Fix the use of an uninitialized irqfd.
This is the patch that I dropped.
Quoted 148 lines
virtio-pci: Fix the failure process in
kvm_virtio_pci_vector_use_one()Fan Ni (12):
hw/cxl/cxl-mailbox-utils: Adddc_event_log_sizefield to output payload of identify memory device command hw/cxl/cxl-mailbox-utils: Add dynamic capacity region representative and mailbox command supportinclude/hw/cxl/cxl_device: Renamemem_sizeasstatic_mem_sizefor type3 memory devices hw/mem/cxl_type3: Add support to create DC regions to type3 memory devices hw/mem/cxl-type3: Refactorct3_build_cdat_entries_for_mrto take mr size instead of mr as argument hw/mem/cxl_type3: Add host backend and address space handling for DC regions hw/mem/cxl_type3: Add DC extent list representative and get DC extent list mailbox support hw/cxl/cxl-mailbox-utils: Add mailbox commands to support add/release dynamic capacity response hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents hw/mem/cxl_type3: Add DPA range validation for accesses to DC regions hw/cxl/cxl-mailbox-utils: Add superset extent release mailbox support
hw/mem/cxl_type3: Allow to release extent superset in QMP interfaceGregory Price (2):
hw/cxl/mailbox: change CCI cmd set structure to be a member, not a reference hw/cxl/mailbox: interface to add CCI commands to an existing CCIHalil Pasic (1):
vhost-vsock: addVIRTIO_F_RING_PACKEDtofeature_bitsIra Weiny (1):
hw/cxl: Fix read from bogus memoryJiqian Chen (1):
virtio-pci: only reset pm state during resettingJonah Palmer (5):
virtio/virtio-pci: Handle extra notification data
virtio: Prevent creation of device using notification-data with ioeventfd
virtio-mmio: Handle extra notification data
virtio-ccw: Handle extra notification data
vhost/vhost-user: AddVIRTIO_F_NOTIFICATION_DATAto vhost feature bitsJonathan Cameron (6):
hw/acpi/GI: Fix trivial parameter alignment issue. hw/acpi: Insert an acpi-generic-node base under acpi-generic-initiator hw/acpi: Generic Port Affinity Structure support
bios-tables-test: Allow for new acpihmat-generic-x test data.
bios-tables-test: Add complex SRAT / HMAT test for GI GP
bios-tables-test: Add data for complex numa test (GI, GP etc)Li Feng (2):
Revert "vhost-user: fix lost reconnect"
vhost-user: fix lost reconnect againMarc-André Lureau (1):
vhost-user-gpu: fix import of DMABUFSi-Wei Liu (2):
vhost: dirty log should be per backend type
vhost: Perform memory section dirty scans once per iterationStefano Garzarella (1):
vhost-vdpa: checkvhost_vdpa_set_vring_ready()return valueThomas Weißschuh (7):
scripts/update-linux-headers: Copysetup_data.hto correct directory
linux-headers: update to 6.10-rc1
hw/misc/pvpanic: centralize definition of supported events tests/qtest/pvpanic: use centralized definition of supported events hw/misc/pvpanic: add support for normal shutdowns tests/qtest/pvpanic: add tests for pvshutdown event Revert "docs/specs/pvpanic: mark shutdown event as not implemented"Wafer (1):
hw/virtio: Fix obtain the buffer id from the last descriptorqapi/cxl.json | 143 ++++++ qapi/qom.json | 35 ++ qapi/run-state.json | 14 + include/hw/acpi/acpi_generic_initiator.h | 33 +- include/hw/cxl/cxl_device.h | 85 +++- include/hw/cxl/cxl_events.h | 18 + include/hw/misc/pvpanic.h | 6 + include/hw/pci/pci_bridge.h | 1 + include/hw/virtio/vhost-user.h | 3 +- include/hw/virtio/vhost.h | 1 + include/hw/virtio/virtio.h | 2 + include/standard-headers/linux/ethtool.h | 55 +++ include/standard-headers/linux/pci_regs.h | 6 + include/standard-headers/linux/pvpanic.h | 7 +- include/standard-headers/linux/virtio_bt.h | 1 - include/standard-headers/linux/virtio_mem.h | 2 + include/standard-headers/linux/virtio_net.h | 143 ++++++ include/sysemu/runstate.h | 1 + linux-headers/asm-generic/unistd.h | 5 +- linux-headers/asm-loongarch/kvm.h | 4 + linux-headers/asm-mips/unistd_n32.h | 1 + linux-headers/asm-mips/unistd_n64.h | 1 + linux-headers/asm-mips/unistd_o32.h | 1 + linux-headers/asm-powerpc/unistd_32.h | 1 + linux-headers/asm-powerpc/unistd_64.h | 1 + linux-headers/asm-riscv/kvm.h | 1 + linux-headers/asm-s390/unistd_32.h | 1 + linux-headers/asm-s390/unistd_64.h | 1 + linux-headers/asm-x86/kvm.h | 4 +- linux-headers/asm-x86/unistd_32.h | 1 + linux-headers/asm-x86/unistd_64.h | 1 + linux-headers/asm-x86/unistd_x32.h | 2 + linux-headers/linux/kvm.h | 4 +- linux-headers/linux/stddef.h | 8 + linux-headers/linux/vhost.h | 15 +- hw/acpi/acpi_generic_initiator.c | 209 ++++++--- hw/block/vhost-user-blk.c | 6 +- hw/cxl/cxl-mailbox-utils.c | 658 +++++++++++++++++++++++++++- hw/display/vhost-user-gpu.c | 5 +- hw/mem/cxl_type3.c | 637 +++++++++++++++++++++++++-- hw/mem/cxl_type3_stubs.c | 25 ++ hw/misc/pvpanic-isa.c | 3 +- hw/misc/pvpanic-pci.c | 3 +- hw/misc/pvpanic.c | 8 +- hw/net/vhost_net.c | 2 + hw/pci-bridge/pci_expander_bridge.c | 1 - hw/s390x/s390-virtio-ccw.c | 17 +- hw/scsi/vhost-scsi.c | 1 + hw/scsi/vhost-user-scsi.c | 7 +- hw/virtio/vhost-user-base.c | 5 +- hw/virtio/vhost-user-fs.c | 2 +- hw/virtio/vhost-user-vsock.c | 1 + hw/virtio/vhost-user.c | 18 +- hw/virtio/vhost-vsock-common.c | 1 + hw/virtio/vhost.c | 112 ++++- hw/virtio/virtio-mmio.c | 11 +- hw/virtio/virtio-pci.c | 45 +- hw/virtio/virtio.c | 45 ++ net/vhost-vdpa.c | 16 +- subprojects/libvhost-user/libvhost-user.c | 2 +- system/runstate.c | 6 + tests/qtest/bios-tables-test.c | 92 ++++ tests/qtest/pvpanic-pci-test.c | 44 +- tests/qtest/pvpanic-test.c | 34 +- docs/specs/pvpanic.rst | 2 +- scripts/update-linux-headers.sh | 2 +- tests/data/acpi/q35/APIC.acpihmat-generic-x | Bin 0 -> 136 bytes tests/data/acpi/q35/CEDT.acpihmat-generic-x | Bin 0 -> 68 bytes tests/data/acpi/q35/DSDT.acpihmat-generic-x | Bin 0 -> 10400 bytes tests/data/acpi/q35/HMAT.acpihmat-generic-x | Bin 0 -> 360 bytes tests/data/acpi/q35/SRAT.acpihmat-generic-x | Bin 0 -> 520 bytes 71 files changed, 2407 insertions(+), 221 deletions(-) create mode 100644 tests/data/acpi/q35/APIC.acpihmat-generic-x create mode 100644 tests/data/acpi/q35/CEDT.acpihmat-generic-x create mode 100644 tests/data/acpi/q35/DSDT.acpihmat-generic-x create mode 100644 tests/data/acpi/q35/HMAT.acpihmat-generic-x create mode 100644 tests/data/acpi/q35/SRAT.acpihmat-generic-x
Quoted 7 lines · Michael S. Tsirkin
Quoted 6 lines · Michael S. Tsirkin
The following changes since commit
60b54b67c63d8f076152e0f7dccf39854dfc6a77:Merge tag 'pull-lu-20240526' of https://gitlab.com/rth7680/qemu into staging (2024-05-26 17:51:00 -0700)are available in the Git repository at:
Quoted 7 lines
Quoted 2 lines
https://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_upstream
for you to fetch changes up tobfcacf81d63a3d95f128bce3faf3564e7f98ea8b:Dropped a patch from this pull at Author's request. New head
a2da15a164ddd798227262b58507b46ad5ab0ca9Sorry about the noise - ok like this?
Don't want to spam the list posting v2 just for this.
When you do this in future, send a new v2 cover.
However, the bios-tables-test still fails, so I won't merge this either.
r~
Quoted 12 lines · Michael S. Tsirkin
----------------------------------------------------------------
virtio: features,fixesA bunch of improvements:
- vhost dirty log is now only scanned once, not once per device
- virtio and vhost now supportVIRTIO_F_NOTIFICATION_DATA
- cxl gained DCD emulation support
- pvpanic gained shutdown support
- acpi now supports Generic Port Affinity Structure
- new tests
- bugfixes
Quoted 4 lines
Signed-off-by Michael S. Tsirkin <[email protected]>Cindy Lu (2):
virtio-pci: Fix the use of an uninitialized irqfd.
virtio-pci: Fix the failure process inkvm_virtio_pci_vector_use_one()
Hi -- I was wondering what happened to this virtio-pci patch, which I reviewed. It seems like it got into this pullreq which didn't get merged because of a bios-tables-test failure.
Michael, do you plan to respin this pullreq soon ?
-- PMM
Quoted 18 lines · Peter Maydell
Quoted 12 lines · Michael S. Tsirkin
----------------------------------------------------------------
virtio: features,fixesA bunch of improvements:
- vhost dirty log is now only scanned once, not once per device
- virtio and vhost now supportVIRTIO_F_NOTIFICATION_DATA
- cxl gained DCD emulation support
- pvpanic gained shutdown support
- acpi now supports Generic Port Affinity Structure
- new tests
- bugfixesQuoted 4 lines
Signed-off-by Michael S. Tsirkin <[email protected]>Cindy Lu (2):
virtio-pci: Fix the use of an uninitialized irqfd.
virtio-pci: Fix the failure process inkvm_virtio_pci_vector_use_one()
Quoted 7 lines
Hi -- I was wondering what happened to this virtio-pci patch, which I reviewed. It seems like it got into this pullreq which didn't get merged because of a bios-tables-test failure.
Michael, do you plan to respin this pullreq soon ?
-- PMM
For some reason I was sure it got merged.
Whatevs I will do a new pull req.