FAILED: patch "[PATCH] drm/amd/display: fix disable otg wa logic in DCN316" failed to apply to 5.10-stable tree
[email protected]
maintainerThe patch below does not apply to the 5.10-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-5.10.y
git checkout FETCH_HEAD
git cherry-pick -x 27e718ac8b8194d13eee5738c4d3fd247736186e
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '2024061904-refund-waking-de5e@gregkh' --subject-prefix 'PATCH 5.10.y' HEAD^..
Possible dependencies:
27e718ac8b81 ("drm/amd/display: fix disable otg wa logic in DCN316") 72002056f771 ("drm/amd/display: Display distortion after hotplug 5K tiled display") d5c6909e7460 ("drm/amd/display: Add DCN314 clock manager")8a077d9caa3a ("drm/amd/display: disable otg toggle w/a on boot") 66a197203794 ("drm/amd/display: Check zero planes for OTG disable W/A on clock change") f94903996140 ("drm/amd/display: Add DCN315 CLK_MGR")c477eaa6a79d ("drm/amd/display: Add DCN316 resource and SMU clock manager") 5f0c74915815 ("drm/amd/display: Fix for otg synchronization logic") 59d41458f143 ("Merge tag 'drm-next-2022-01-14' of git://anongit.freedesktop.org/drm/drm")
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From 27e718ac8b8194d13eee5738c4d3fd247736186e Mon Sep 17 00:00:00 2001
From: Fudongwang <[email protected]>
Date: Tue, 26 Mar 2024 16:03:16 +0800
Subject: [PATCH] drm/amd/display: fix disable otg wa logic in DCN316
[Why]
Wrong logic cause screen corruption.
[How]
Port logic from DCN35/314.
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c +12 -7
@@ -99,20 +99,25 @@ static int dcn316_get_active_display_cnt_wa(return display_count; } -static void dcn316_disable_otg_wa (struct clk_mgr *clk_mgr_base,struct dc_state *context,bool disable) +static void dcn316_disable_otg_wa (struct clk_mgr *clk_mgr_base,struct dc_state *context, +bool safe_to_lower,bool disable) {struct dc *dc = clk_mgr_base->ctx->dc;int i;for (i =0 ; i < dc->res_pool->pipe_count; ++i) { -struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; +struct pipe_ctx *pipe = safe_to_lower + ? &context->res_ctx.pipe_ctx[i] + : &dc->current_state->res_ctx.pipe_ctx[i];if (pipe->top_pipe || pipe->prev_odm_pipe)continue ; -if (pipe->stream && (pipe->stream->dpms_off || pipe->plane_state ==NULL || -dc_is_virtual_signal (pipe->stream->signal))) { +if (pipe->stream && (pipe->stream->dpms_off ||dc_is_virtual_signal (pipe->stream->signal) || + !pipe->stream->link_enc)) {if (disable) { - pipe->stream_res.tg->funcs->immediate_disable_crtc (pipe->stream_res.tg); +if (pipe->stream_res.tg && pipe->stream_res.tg->funcs->immediate_disable_crtc) + pipe->stream_res.tg->funcs->immediate_disable_crtc (pipe->stream_res.tg); +reset_sync_context_for_pipe (dc, context, i); }else pipe->stream_res.tg->funcs->enable_crtc (pipe->stream_res.tg);
@@ -207,11 +212,11 @@ static void dcn316_update_clocks(struct clk_mgr *clk_mgr_base, }if (should_set_clock (safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { -dcn316_disable_otg_wa (clk_mgr_base, context, true); +dcn316_disable_otg_wa (clk_mgr_base, context, safe_to_lower, true); clk_mgr_base->clks.dispclk_khz = new_clocks->dispclk_khz;dcn316_smu_set_dispclk (clk_mgr, clk_mgr_base->clks.dispclk_khz); -dcn316_disable_otg_wa (clk_mgr_base, context, false); +dcn316_disable_otg_wa (clk_mgr_base, context, safe_to_lower, false); update_dispclk = true; }