powerpc-e500-remove-enc-and-ind-fields-from-struct-mmu_psize_def.patch removed from -mm tree
The quilt patch titled
Subject: powerpc/e500: remove enc and ind fields from struct mmu_psize_def
has been removed from the -mm tree. Its filename was
powerpc-e500-remove-enc-and-ind-fields-from-struct-mmu_psize_def.patch
This patch was dropped because it was merged into the mm-stable branch of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm
------------------------------------------------------
From: Christophe Leroy <[email protected]>
Subject: powerpc/e500: remove enc and ind fields from struct mmu_psize_def
Date: Tue, 2 Jul 2024 15:51:27 +0200
enc field is hidden behind BOOK3E_PAGESZ_XX macros, and when you look closer you realise that this field is nothing else than the value of shift minus ten.
So remove enc field and calculate tsize from shift field.
Also remove inc field which is unused.
---
arch/powerpc/include/asm/nohash/mmu-e500.h | 3 --- arch/powerpc/mm/nohash/book3e_pgtable.c | 4 ++-- arch/powerpc/mm/nohash/tlb.c | 9 +-------- arch/powerpc/mm/nohash/tlb_64e.c | 2 +- 4 files changed, 4 insertions(+), 14 deletions(-)
arch/powerpc/include/asm/nohash/mmu-e500.h renamed from arch/powerpc/include/asm/nohash/mmu-e500.h~powerpc-e500-remove-enc-and-ind-fields-from-struct-mmu_psize_def +0 -3
@@ -244,14 +244,11 @@ typedef struct {/* Page size definitions, common between 32 and 64-bit * * shift : is the "PAGE_SHIFT" value for that page size -* penc : is the pte encoding mask * */ struct mmu_psize_def {unsigned int shift;/* number of bits */ -unsigned int enc;/* PTE encoding */ -unsigned int ind;/* Corresponding indirect page size shift */ unsigned int flags;#define MMU_PAGE_SIZE_DIRECT 0x1/* Supported as a direct size */ #define MMU_PAGE_SIZE_INDIRECT 0x2/* Supported as an indirect size */
arch/powerpc/mm/nohash/book3e_pgtable.c renamed from arch/powerpc/mm/nohash/book3e_pgtable.c~powerpc-e500-remove-enc-and-ind-fields-from-struct-mmu_psize_def +2 -2
@@ -29,10 +29,10 @@ int __meminit vmemmap_create_mapping(uns _PAGE_KERNEL_RW;/* PTEs only contain page size encodings up to 32M */ -BUG_ON (mmu_psize_defs[mmu_vmemmap_psize].enc >0xf ); +BUG_ON (mmu_psize_defs[mmu_vmemmap_psize].shift -10 >0xf );/* Encode the size in the PTE */ - flags |= mmu_psize_defs[mmu_vmemmap_psize].enc <<8 ; + flags |= (mmu_psize_defs[mmu_vmemmap_psize].shift -10 ) <<8 ;/* For each PTE for that area, map things. Note that we don't * increment phys because all PTEs are of the large size and
arch/powerpc/mm/nohash/tlb_64e.c renamed from arch/powerpc/mm/nohash/tlb_64e.c~powerpc-e500-remove-enc-and-ind-fields-from-struct-mmu_psize_def +1 -1
@@ -53,7 +53,7 @@ int extlb_level_exc;*/ void tlb_flush_pgtable (struct mmu_gather *tlb,unsigned long address) { -int tsize = mmu_psize_defs[mmu_pte_psize].enc; +int tsize = mmu_psize_defs[mmu_pte_psize].shift -10 ;if (book3e_htw_mode !=PPC_HTW_NONE ) {unsigned long start = address &PMD_MASK ;
arch/powerpc/mm/nohash/tlb.c renamed from arch/powerpc/mm/nohash/tlb.c~powerpc-e500-remove-enc-and-ind-fields-from-struct-mmu_psize_def +1 -8
@@ -53,37 +53,30 @@struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT ] = { [MMU_PAGE_4K ] = { .shift =12 , - .enc =BOOK3E_PAGESZ_4K , }, [MMU_PAGE_2M ] = { .shift =21 , - .enc =BOOK3E_PAGESZ_2M , }, [MMU_PAGE_4M ] = { .shift =22 , - .enc =BOOK3E_PAGESZ_4M , }, [MMU_PAGE_16M ] = { .shift =24 , - .enc =BOOK3E_PAGESZ_16M , }, [MMU_PAGE_64M ] = { .shift =26 , - .enc =BOOK3E_PAGESZ_64M , }, [MMU_PAGE_256M ] = { .shift =28 , - .enc =BOOK3E_PAGESZ_256M , }, [MMU_PAGE_1G ] = { .shift =30 , - .enc =BOOK3E_PAGESZ_1GB , }, };static inline int mmu_get_tsize (int psize) { -return mmu_psize_defs[psize].enc; +return mmu_psize_defs[psize].shift -10 ; }#else static inline int mmu_get_tsize (int psize)
_
Patches currently in -mm which might be from [email protected] are