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FAILED: patch "[PATCH] arm64: dts: qcom: x1e80100-crd: fix missing PCIe4 gpios" failed to apply to 6.10-stable tree

PATCH [email protected] 1 participant 1 message Sep 1, 2024

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The patch below does not apply to the 6.10-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.

To reproduce the conflict and resubmit, you may use the following commands:

git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.10.y
git checkout FETCH_HEAD
git cherry-pick -x 42b33ad188466292eaac9825544b8be8deddb3cb
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '2024090124-chaffing-curable-eb92@gregkh' --subject-prefix 'PATCH 6.10.y' HEAD^..

Possible dependencies:

42b33ad18846 ("arm64: dts: qcom: x1e80100-crd: fix missing PCIe4 gpios") 6e3902c49954 ("arm64: dts: qcom: x1e80100-crd: fix up PCIe6a pinctrl node") eb57cbe730d1 ("arm64: dts: qcom: x1e80100: Describe the PCIe 6a resources")

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From 42b33ad188466292eaac9825544b8be8deddb3cb Mon Sep 17 00:00:00 2001
From: Johan Hovold <[email protected]>
Date: Mon, 22 Jul 2024 11:42:47 +0200
Subject: [PATCH] arm64: dts: qcom: x1e80100-crd: fix missing PCIe4 gpios

Add the missing PCIe4 perst, wake and clkreq GPIOs and pin config.

Fixes d7e03cce0400 ("arm64: dts: qcom: x1e80100-crd: Enable more support")
arch/arm64/boot/dts/qcom/x1e80100-crd.dts +29 -0
index aeb279b1a0cc..d65a22172006 100644
@@ -756,6 +756,12 @@ &mdss_dp3_phy {
 };
 
 &pcie4 {
+	perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+	wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+
+	pinctrl-0 = <&pcie4_default>;
+	pinctrl-names = "default";
+
 	status = "okay";
 };
 
@@ -931,6 +937,29 @@ nvme_reg_en: nvme-reg-en-state {
 		bias-disable;
 	};
 
+	pcie4_default: pcie4-default-state {
+		clkreq-n-pins {
+			pins = "gpio147";
+			function = "pcie4_clk";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+
+		perst-n-pins {
+			pins = "gpio146";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-disable;
+		};
+
+		wake-n-pins {
+			pins = "gpio148";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+	};
+
 	pcie6a_default: pcie6a-default-state {
 		clkreq-n-pins {
 			pins = "gpio153";