spinlock: extend guard with spinlock_bh variants

PATCH Superseded Christian Marangi 3 participants 8 messages Nov 2, 2024 – Nov 10, 2024

Subsystems (5)

Device tree bindings Crypto API Locking primitives Inside secure crypto driver +1 more subsystems

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Christian Marangi

author maintainer

2024-11-02 17:51 UTC #0 lore raw

PATCH v6 1/3 spinlock: extend guard with spinlock_bh variants

Extend guard APIs with missing raw/spinlock_bh variants.

Signed-off-by Christian Marangi <[email protected]>

Acked-by Peter Zijlstra (Intel) <[email protected]>

---
Changes v5:
- Add Ack tag
Changes v4:
- Out of RFC
Changes v2:
- Add this patch

 include/linux/spinlock.h | 13 +++++++++++++
 1 file changed, 13 insertions(+)

include/linux/spinlock.h +13 -0

index 63dd8cf3c3c2..d3561c4a080e 100644
@@ -548,6 +548,12 @@ DEFINE_LOCK_GUARD_1(raw_spinlock_irq, raw_spinlock_t,
 
 DEFINE_LOCK_GUARD_1_COND(raw_spinlock_irq, _try, raw_spin_trylock_irq(_T->lock))
 
+DEFINE_LOCK_GUARD_1(raw_spinlock_bh, raw_spinlock_t,
+		    raw_spin_lock_bh(_T->lock),
+		    raw_spin_unlock_bh(_T->lock))
+
+DEFINE_LOCK_GUARD_1_COND(raw_spinlock_bh, _try, raw_spin_trylock_bh(_T->lock))
+
 DEFINE_LOCK_GUARD_1(raw_spinlock_irqsave, raw_spinlock_t,
 		    raw_spin_lock_irqsave(_T->lock, _T->flags),
 		    raw_spin_unlock_irqrestore(_T->lock, _T->flags),

@@ -569,6 +575,13 @@ DEFINE_LOCK_GUARD_1(spinlock_irq, spinlock_t,
 DEFINE_LOCK_GUARD_1_COND(spinlock_irq, _try,
 			 spin_trylock_irq(_T->lock))
 
+DEFINE_LOCK_GUARD_1(spinlock_bh, spinlock_t,
+		    spin_lock_bh(_T->lock),
+		    spin_unlock_bh(_T->lock))
+
+DEFINE_LOCK_GUARD_1_COND(spinlock_bh, _try,
+			 spin_trylock_bh(_T->lock))
+
 DEFINE_LOCK_GUARD_1(spinlock_irqsave, spinlock_t,
 		    spin_lock_irqsave(_T->lock, _T->flags),
 		    spin_unlock_irqrestore(_T->lock, _T->flags),

Signature · 1 line

2.45.2

Christian Marangi

author maintainer

2024-11-02 17:51 UTC #1 lore raw

PATCH v6 2/3 dt-bindings: crypto: Add Inside Secure SafeXcel EIP-93 crypto engine

Add bindings for the Inside Secure SafeXcel EIP-93 crypto engine.

The IP is present on Airoha SoC and on various Mediatek devices and other SoC under different names like mtk-eip93 or PKTE.

All the compatible that currently doesn't have any user are defined but rejected waiting for an actual device that makes use of them.

Signed-off-by Christian Marangi <[email protected]>

---
Changes v6:
- Add SoC specific compatible
- Add now supported entry for compatible with no user Changes v5:
- Comment out compatible with no current user Changes v4:
- Out of RFC
Changes v3:
- Add SoC compatible with generic one
Changes v2:
- Change to better compatible
- Add description for EIP93 models

 .../crypto/inside-secure,safexcel-eip93.yaml  | 67 +++++++++++++++++++
 1 file changed, 67 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/crypto/inside-secure,safexcel-eip93.yaml

Documentation/devicetree/bindings/crypto/inside-secure,safexcel-eip93.yaml new file +67 -0

new file mode 100644
index 000000000000..997bf9717f9e
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/crypto/inside-secure,safexcel-eip93.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Inside Secure SafeXcel EIP-93 cryptographic engine
+
+maintainers:
+  - Christian Marangi <[email protected]>
+
+description: |
+  The Inside Secure SafeXcel EIP-93 is a cryptographic engine IP block
+  integrated in varios devices with very different and generic name from
+  PKTE to simply vendor+EIP93. The real IP under the hood is actually
+  developed by Inside Secure and given to license to vendors.
+
+  The IP block is sold with different model based on what feature are
+  needed and are identified with the final letter. Each letter correspond
+  to a specific set of feature and multiple letter reflect the sum of the
+  feature set.
+
+  EIP-93 models:
+    - EIP-93i: (basic) DES/Triple DES, AES, PRNG, IPsec ESP, SRTP, SHA1
+    - EIP-93ie: i + SHA224/256, AES-192/256
+    - EIP-93is: i + SSL/DTLS/DTLS, MD5, ARC4
+    - EIP-93ies: i + e + s
+    - EIP-93iw: i + AES-XCB-MAC, AES-CCM
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - const: airoha,en7581-eip93
+          - const: inside-secure,safexcel-eip93ies
+      - items:
+          - not: {}
+            description: Need a SoC specific compatible
+          - enum:
+              - inside-secure,safexcel-eip93i
+              - inside-secure,safexcel-eip93ie
+              - inside-secure,safexcel-eip93is
+              - inside-secure,safexcel-eip93iw
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    crypto@1e004000 {
+      compatible = "airoha,en7581-eip93", "inside-secure,safexcel-eip93ies";
+      reg = <0x1fb70000 0x1000>;
+
+      interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+    };

Signature · 1 line

2.45.2

Rob Herring (Arm)

maintainer Reviewed-by on v6 2/3

2024-11-04 16:11 UTC #2 lore raw

Re: [PATCH v6 2/3] dt-bindings: crypto: Add Inside Secure SafeXcel EIP-93 crypto engine

Quoted 23 lines · Christian Marangi

Add bindings for the Inside Secure SafeXcel EIP-93 crypto engine.
The IP is present on Airoha SoC and on various Mediatek devices and other SoC under different names like mtk-eip93 or PKTE.
All the compatible that currently doesn't have any user are defined but rejected waiting for an actual device that makes use of them.
Signed-off-by Christian Marangi <[email protected]>
---
Changes v6:
- Add SoC specific compatible
- Add now supported entry for compatible with no user Changes v5:
- Comment out compatible with no current user Changes v4:
- Out of RFC
Changes v3:
- Add SoC compatible with generic one
Changes v2:
- Change to better compatible
- Add description for EIP93 models

Quoted 4 lines

 .../crypto/inside-secure,safexcel-eip93.yaml  | 67 +++++++++++++++++++
 1 file changed, 67 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/crypto/inside-secure,safexcel-eip93.yaml

Reviewed-by Rob Herring (Arm) <[email protected]>

Christian Marangi

author maintainer

2024-11-02 17:51 UTC #3 lore raw

PATCH v6 3/3 crypto: Add Mediatek EIP-93 crypto engine support

In reply to Christian Marangi

Add support for the Mediatek EIP-93 crypto engine used on MT7621 and new Airoha SoC.

EIP-93 IP supports AES/DES/3DES ciphers in ECB/CBC and CTR modes as well as authenc(HMAC(x), cipher(y)) using HMAC MD5, SHA1, SHA224 and SHA256.

EIP-93 provide regs to signal support for specific chipers and the driver dynamically register only the supported one by the chip.

Signed-off-by Richard van Schagen <[email protected]>

Co-developed-by Christian Marangi <[email protected]>

Signed-off-by Christian Marangi <[email protected]>

---
Changes v5:
- Fix smatch warning (reported by Dan Carpenter)
Changes v4:
- Out of RFC
- Add missing bitfield.h
- Drop useless header
Changes v3:
- Mute warning from Clang about C23
- Fix not inizialized err
- Drop unused variable
Changes v2:
- Rename all variables from mtk to eip93
- Move to inside-secure directory
- Check DMA map errors
- Use guard API for spinlock
- Minor improvements to code

 MAINTAINERS                                   |   7 +
 drivers/crypto/Kconfig                        |   1 +
 drivers/crypto/Makefile                       |   1 +
 drivers/crypto/inside-secure/eip93/Kconfig    |  20 +
 drivers/crypto/inside-secure/eip93/Makefile   |   5 +
 .../crypto/inside-secure/eip93/eip93-aead.c   | 710 ++++++++++++++
 .../crypto/inside-secure/eip93/eip93-aead.h   |  38 +
 .../crypto/inside-secure/eip93/eip93-aes.h    |  16 +
 .../crypto/inside-secure/eip93/eip93-cipher.c | 413 ++++++++
 .../crypto/inside-secure/eip93/eip93-cipher.h |  60 ++
 .../crypto/inside-secure/eip93/eip93-common.c | 823 ++++++++++++++++
 .../crypto/inside-secure/eip93/eip93-common.h |  23 +
 .../crypto/inside-secure/eip93/eip93-des.h    |  16 +
 .../crypto/inside-secure/eip93/eip93-hash.c   | 912 ++++++++++++++++++
 .../crypto/inside-secure/eip93/eip93-hash.h   |  72 ++
 .../crypto/inside-secure/eip93/eip93-main.c   | 502 ++++++++++
 .../crypto/inside-secure/eip93/eip93-main.h   | 152 +++
 .../crypto/inside-secure/eip93/eip93-regs.h   | 335 +++++++
 18 files changed, 4106 insertions(+)
 create mode 100644 drivers/crypto/inside-secure/eip93/Kconfig
 create mode 100644 drivers/crypto/inside-secure/eip93/Makefile
 create mode 100644 drivers/crypto/inside-secure/eip93/eip93-aead.c
 create mode 100644 drivers/crypto/inside-secure/eip93/eip93-aead.h
 create mode 100644 drivers/crypto/inside-secure/eip93/eip93-aes.h
 create mode 100644 drivers/crypto/inside-secure/eip93/eip93-cipher.c
 create mode 100644 drivers/crypto/inside-secure/eip93/eip93-cipher.h
 create mode 100644 drivers/crypto/inside-secure/eip93/eip93-common.c
 create mode 100644 drivers/crypto/inside-secure/eip93/eip93-common.h
 create mode 100644 drivers/crypto/inside-secure/eip93/eip93-des.h
 create mode 100644 drivers/crypto/inside-secure/eip93/eip93-hash.c
 create mode 100644 drivers/crypto/inside-secure/eip93/eip93-hash.h
 create mode 100644 drivers/crypto/inside-secure/eip93/eip93-main.c
 create mode 100644 drivers/crypto/inside-secure/eip93/eip93-main.h
 create mode 100644 drivers/crypto/inside-secure/eip93/eip93-regs.h

MAINTAINERS +7 -0

index b009c3ced239..c8876023b0bd 100644
@@ -11322,6 +11322,13 @@ L:	[email protected]
 S:	Maintained
 F:	drivers/crypto/inside-secure/
 
+INSIDE SECURE EIP93 CRYPTO DRIVER
+M:	Christian Marangi <[email protected]>
+L:	[email protected]
+S:	Maintained
+F:	Documentation/devicetree/bindings/crypto/inside-secure,safexcel-eip93.yaml
+F:	drivers/crypto/inside-secure/eip93/
+
 INTEGRITY MEASUREMENT ARCHITECTURE (IMA)
 M:	Mimi Zohar <[email protected]>
 M:	Roberto Sassu <[email protected]>

drivers/crypto/Kconfig +1 -0

index 08b1238bcd7b..8891ce8cc955 100644
@@ -851,5 +851,6 @@ config CRYPTO_DEV_SA2UL
 
 source "drivers/crypto/aspeed/Kconfig"
 source "drivers/crypto/starfive/Kconfig"
+source "drivers/crypto/inside-secure/eip93/Kconfig"
 
 endif # CRYPTO_HW

drivers/crypto/Makefile +1 -0

index ad4ccef67d12..49fb90526c3f 100644
@@ -52,3 +52,4 @@ obj-y += hisilicon/
 obj-$(CONFIG_CRYPTO_DEV_AMLOGIC_GXL) += amlogic/
 obj-y += intel/
 obj-y += starfive/
+obj-y += inside-secure/eip93/

drivers/crypto/inside-secure/eip93/Kconfig new file +20 -0

new file mode 100644
index 000000000000..8353d3d7ec9b
@@ -0,0 +1,20 @@
+# SPDX-License-Identifier: GPL-2.0
+config CRYPTO_DEV_EIP93
+	tristate "Support for EIP93 crypto HW accelerators"
+	depends on SOC_MT7621 || ARCH_AIROHA ||COMPILE_TEST
+	select CRYPTO_LIB_AES
+	select CRYPTO_LIB_DES
+	select CRYPTO_SKCIPHER
+	select CRYPTO_AEAD
+	select CRYPTO_AUTHENC
+	select CRYPTO_MD5
+	select CRYPTO_SHA1
+	select CRYPTO_SHA256
+	help
+	  EIP93 have various crypto HW accelerators. Select this if
+	  you want to use the EIP93 modules for any of the crypto algorithms.
+
+	  If the IP supports it, this provide offload for AES - ECB, CBC and
+	  CTR crypto. Also provide DES and 3DES ECB and CBC.
+
+	  Also provide AEAD authenc(hmac(x), cipher(y)) for supported algo.

drivers/crypto/inside-secure/eip93/Makefile new file +5 -0

new file mode 100644
index 000000000000..a3d3d3677cdc
@@ -0,0 +1,5 @@
+obj-$(CONFIG_CRYPTO_DEV_EIP93) += crypto-hw-eip93.o
+
+crypto-hw-eip93-y += eip93-main.o eip93-common.o
+crypto-hw-eip93-y += eip93-cipher.o eip93-aead.o
+crypto-hw-eip93-y += eip93-hash.o

drivers/crypto/inside-secure/eip93/eip93-aead.c new file +710 -0

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drivers/crypto/inside-secure/eip93/eip93-aead.h new file +38 -0

new file mode 100644
index 000000000000..e2fa8fd39c50
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (C) 2019 - 2021
+ *
+ * Richard van Schagen <[email protected]>
+ * Christian Marangi <[email protected]
+ */
+#ifndef _EIP93_AEAD_H_
+#define _EIP93_AEAD_H_
+
+extern struct eip93_alg_template eip93_alg_authenc_hmac_md5_cbc_aes;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_sha1_cbc_aes;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_sha224_cbc_aes;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_sha256_cbc_aes;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_md5_ctr_aes;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_sha1_ctr_aes;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_sha224_ctr_aes;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_sha256_ctr_aes;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_md5_rfc3686_aes;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_sha1_rfc3686_aes;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_sha224_rfc3686_aes;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_sha256_rfc3686_aes;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_md5_cbc_des;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_sha1_cbc_des;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_sha224_cbc_des;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_sha256_cbc_des;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_md5_cbc_des3_ede;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_sha1_cbc_des3_ede;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_sha224_cbc_des3_ede;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_sha256_cbc_des3_ede;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_md5_ecb_null;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_sha1_ecb_null;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_sha224_ecb_null;
+extern struct eip93_alg_template eip93_alg_authenc_hmac_sha256_ecb_null;
+
+void eip93_aead_handle_result(struct crypto_async_request *async, int err);
+
+#endif /* _EIP93_AEAD_H_ */

drivers/crypto/inside-secure/eip93/eip93-aes.h new file +16 -0

new file mode 100644
index 000000000000..1d83d39cab2a
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (C) 2019 - 2021
+ *
+ * Richard van Schagen <[email protected]>
+ * Christian Marangi <[email protected]
+ */
+#ifndef _EIP93_AES_H_
+#define _EIP93_AES_H_
+
+extern struct eip93_alg_template eip93_alg_ecb_aes;
+extern struct eip93_alg_template eip93_alg_cbc_aes;
+extern struct eip93_alg_template eip93_alg_ctr_aes;
+extern struct eip93_alg_template eip93_alg_rfc3686_aes;
+
+#endif /* _EIP93_AES_H_ */

drivers/crypto/inside-secure/eip93/eip93-cipher.c new file +413 -0

413 lines not on this page · raw message

drivers/crypto/inside-secure/eip93/eip93-cipher.h new file +60 -0

60 lines not on this page · raw message

drivers/crypto/inside-secure/eip93/eip93-common.c new file +823 -0

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drivers/crypto/inside-secure/eip93/eip93-common.h new file +23 -0

new file mode 100644
index 000000000000..9cf18297220f
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (C) 2019 - 2021
+ *
+ * Richard van Schagen <[email protected]>
+ * Christian Marangi <[email protected]
+ */
+
+#ifndef _EIP93_COMMON_H_
+#define _EIP93_COMMON_H_
+
+void *eip93_get_descriptor(struct eip93_device *mtk);
+int eip93_put_descriptor(struct eip93_device *mtk, struct eip93_descriptor *desc);
+
+void eip93_set_sa_record(struct sa_record *sa_record, const unsigned int keylen,
+			 const u32 flags);
+
+int eip93_parse_ctrl_stat_err(struct eip93_device *mtk, int err);
+
+int eip93_authenc_setkey(struct crypto_aead *aead, struct sa_record *sa,
+			 const u8 *authkey, unsigned int authkeylen);
+
+#endif /* _EIP93_COMMON_H_ */

drivers/crypto/inside-secure/eip93/eip93-des.h new file +16 -0

new file mode 100644
index 000000000000..74748df04acf
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (C) 2019 - 2021
+ *
+ * Richard van Schagen <[email protected]>
+ * Christian Marangi <[email protected]
+ */
+#ifndef _EIP93_DES_H_
+#define _EIP93_DES_H_
+
+extern struct eip93_alg_template eip93_alg_ecb_des;
+extern struct eip93_alg_template eip93_alg_cbc_des;
+extern struct eip93_alg_template eip93_alg_ecb_des3_ede;
+extern struct eip93_alg_template eip93_alg_cbc_des3_ede;
+
+#endif /* _EIP93_DES_H_ */

drivers/crypto/inside-secure/eip93/eip93-hash.c new file +912 -0

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drivers/crypto/inside-secure/eip93/eip93-hash.h new file +72 -0

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drivers/crypto/inside-secure/eip93/eip93-main.c new file +502 -0

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drivers/crypto/inside-secure/eip93/eip93-main.h new file +152 -0

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drivers/crypto/inside-secure/eip93/eip93-regs.h new file +335 -0

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The rest of this diff is not shown. View the raw message.

Signature · 1 line

2.45.2

Part of the diff is not shown here. View the raw message.

Herbert Xu

maintainer

2024-11-10 03:46 UTC #4 lore raw

Re: [PATCH v6 3/3] crypto: Add Mediatek EIP-93 crypto engine support

drivers/crypto/inside-secure/eip93/eip93-hash.c line 641

Quoted 8 lines · Christian Marangi

drivers/crypto/inside-secure/eip93/eip93-hash.c new file +7 -0

+static int eip93_hash_import(struct ahash_request *req, const void *in)
+{
+	struct eip93_hash_reqctx *rctx = ahash_request_ctx(req);
+	const struct eip93_hash_export_state *state = in;
+	int ret;
+
+	ret = _eip93_hash_init(req, state->sa_state, state->sa_state_base);

You cannot export/import any kernel pointers. The state is meant to be a serialised version of the hash state.

So state->sa_state_base has got to go.

Cheers,

Signature · 3 lines

Email: Herbert Xu <[email protected]>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

Christian Marangi

author maintainer

2024-11-10 11:59 UTC #5 lore raw

Re: [PATCH v6 3/3] crypto: Add Mediatek EIP-93 crypto engine support

Quoted 13 lines · Herbert Xu

drivers/crypto/inside-secure/eip93/eip93-hash.c line 641
Quoted 8 lines · Christian Marangi
drivers/crypto/inside-secure/eip93/eip93-hash.c new file +7 -0
+static int eip93_hash_import(struct ahash_request *req, const void *in)
+{
+	struct eip93_hash_reqctx *rctx = ahash_request_ctx(req);
+	const struct eip93_hash_export_state *state = in;
+	int ret;
+
+	ret = _eip93_hash_init(req, state->sa_state, state->sa_state_base);
You cannot export/import any kernel pointers. The state is meant to be a serialised version of the hash state.

Quoted 2 lines

So state->sa_state_base has got to go.

Hoped it was OK since it greatly simplify the logic but OK will do this change.

Signature · 1 line

	Ansuel

Herbert Xu

maintainer

2024-11-10 03:48 UTC #6 lore raw

Re: [PATCH v6 3/3] crypto: Add Mediatek EIP-93 crypto engine support

In reply to Christian Marangi

Quoted 6 lines · Christian Marangi

Add support for the Mediatek EIP-93 crypto engine used on MT7621 and new Airoha SoC.
EIP-93 IP supports AES/DES/3DES ciphers in ECB/CBC and CTR modes as well as authenc(HMAC(x), cipher(y)) using HMAC MD5, SHA1, SHA224 and SHA256.

Quoted 6 lines

EIP-93 provide regs to signal support for specific chipers and the driver dynamically register only the supported one by the chip.
Signed-off-by Richard van Schagen <[email protected]>
Co-developed-by Christian Marangi <[email protected]>
Signed-off-by Christian Marangi <[email protected]>

Please ensure that this passes the kernel crypto fuzz testing (CRYPTO_MANAGER_EXTRA_TESTS).

Thanks,

Signature · 3 lines

Email: Herbert Xu <[email protected]>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

Christian Marangi

author maintainer

2024-11-10 12:00 UTC #7 lore raw

Re: [PATCH v6 3/3] crypto: Add Mediatek EIP-93 crypto engine support

Quoted 10 lines · Herbert Xu

Quoted 9 lines · Christian Marangi
Add support for the Mediatek EIP-93 crypto engine used on MT7621 and new Airoha SoC.
EIP-93 IP supports AES/DES/3DES ciphers in ECB/CBC and CTR modes as well as authenc(HMAC(x), cipher(y)) using HMAC MD5, SHA1, SHA224 and SHA256.
EIP-93 provide regs to signal support for specific chipers and the driver dynamically register only the supported one by the chip.

Quoted 7 lines

Quoted 3 lines
Signed-off-by Richard van Schagen <[email protected]>
Co-developed-by Christian Marangi <[email protected]>
Signed-off-by Christian Marangi <[email protected]>
Please ensure that this passes the kernel crypto fuzz testing (CRYPTO_MANAGER_EXTRA_TESTS).

Yep I also tested with setting the fuzzing to 10000 just to make sure and they all pass correctly.

Signature · 1 line

	Ansuel