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FAILED: patch "[PATCH] drm/amd/display: Revert commit Update Interface to Check UCLK" failed to apply to 6.12-stable tree

PATCH [email protected] 1 participant 1 message Dec 12, 2024

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Stable branch DRM drivers Radeon and amdgpu DRM drivers AMD display core
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The patch below does not apply to the 6.12-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.

To reproduce the conflict and resubmit, you may use the following commands:

git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.12.y
git checkout FETCH_HEAD
git cherry-pick -x 0e93b76cf92f229409e8da85c2a143868835fec3
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '2024121247-pantomime-moonlight-81f0@gregkh' --subject-prefix 'PATCH 6.12.y' HEAD^..

Possible dependencies:

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From 0e93b76cf92f229409e8da85c2a143868835fec3 Mon Sep 17 00:00:00 2001
From: Austin Zheng <[email protected]>
Date: Mon, 23 Sep 2024 10:07:32 -0400
Subject: [PATCH] drm/amd/display: Revert commit Update Interface to Check UCLK
DPM

This reverts commit b8d046985c2dc41a0e264a391da4606099f8d44f.

Reverting as regression discovered on certain systems and golden values need to updated.

Reviewed-by Alvin Lee <[email protected]>
Signed-off-by Austin Zheng <[email protected]>
Signed-off-by Rodrigo Siqueira <[email protected]>
Tested-by Daniel Wheeler <[email protected]>
Signed-off-by Alex Deucher <[email protected]>
drivers/gpu/drm/amd/display/dc/core/dc.c +1 -8
index 48057ac22cbd..57ad6ce88f3f 100644
@@ -6038,15 +6038,8 @@ void dc_set_edp_power(const struct dc *dc, struct dc_link *edp_link,
 struct dc_power_profile dc_get_power_profile_for_dc_state(const struct dc_state *context)
 {
 	struct dc_power_profile profile = { 0 };
-	struct dc *dc = NULL;
 
-	if (!context || !context->clk_mgr || !context->clk_mgr->ctx || !context->clk_mgr->ctx->dc)
-		return profile;
-
-	dc = context->clk_mgr->ctx->dc;
-
-	if (dc->res_pool->funcs->get_power_profile)
-		profile.power_level = dc->res_pool->funcs->get_power_profile(context);
+	profile.power_level += !context->bw_ctx.bw.dcn.clk.p_state_change_support;
 
 	return profile;
 }
drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c +0 -1
index 2e9c59e9e0c1..1cf9015e854a 100644
@@ -1798,7 +1798,6 @@ bool pmo_dcn4_fams2_init_for_pstate_support(struct dml2_pmo_init_for_pstate_supp
 	}
 
 	if (s->pmo_dcn4.num_pstate_candidates > 0) {
-		s->pmo_dcn4.pstate_strategy_candidates[s->pmo_dcn4.num_pstate_candidates-1].allow_state_increase = true;
 		s->pmo_dcn4.cur_pstate_candidate = -1;
 		return true;
 	} else {
drivers/gpu/drm/amd/display/dc/inc/core_types.h +0 -4
index 8597e866bfe6..bfb8b8502d20 100644
@@ -215,10 +215,6 @@ struct resource_funcs {
 
 	void (*get_panel_config_defaults)(struct dc_panel_config *panel_config);
 	void (*build_pipe_pix_clk_params)(struct pipe_ctx *pipe_ctx);
-	/*
-	 * Get indicator of power from a context that went through full validation
-	 */
-	int (*get_power_profile)(const struct dc_state *context);
 };
 
 struct audio_support{
drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c +0 -6
index f6b840f046a5..3f4b9dba4112 100644
@@ -1812,11 +1812,6 @@ static void dcn315_get_panel_config_defaults(struct dc_panel_config *panel_confi
 	*panel_config = panel_config_defaults;
 }
 
-static int dcn315_get_power_profile(const struct dc_state *context)
-{
-	return !context->bw_ctx.bw.dcn.clk.p_state_change_support;
-}
-
 static struct dc_cap_funcs cap_funcs = {
 	.get_dcc_compression_cap = dcn20_get_dcc_compression_cap
 };

@@ -1845,7 +1840,6 @@ static struct resource_funcs dcn315_res_pool_funcs = {
 	.update_bw_bounding_box = dcn315_update_bw_bounding_box,
 	.patch_unknown_plane_state = dcn20_patch_unknown_plane_state,
 	.get_panel_config_defaults = dcn315_get_panel_config_defaults,
-	.get_power_profile = dcn315_get_power_profile,
 };
 
 static bool dcn315_resource_construct(
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c +0 -17
index 59184abab1a7..f2653a86d3e7 100644
@@ -1688,22 +1688,6 @@ static void dcn401_build_pipe_pix_clk_params(struct pipe_ctx *pipe_ctx)
 	}
 }
 
-static int dcn401_get_power_profile(const struct dc_state *context)
-{
-	int uclk_mhz = context->bw_ctx.bw.dcn.clk.dramclk_khz / 1000;
-	int dpm_level = 0;
-
-	for (int i = 0; i < context->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels; i++) {
-		if (context->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz == 0 ||
-			uclk_mhz < context->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz)
-			break;
-		if (uclk_mhz > context->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz)
-			dpm_level++;
-	}
-
-	return dpm_level;
-}
-
 static struct resource_funcs dcn401_res_pool_funcs = {
 	.destroy = dcn401_destroy_resource_pool,
 	.link_enc_create = dcn401_link_encoder_create,

@@ -1730,7 +1714,6 @@ static struct resource_funcs dcn401_res_pool_funcs = {
 	.prepare_mcache_programming = dcn401_prepare_mcache_programming,
 	.build_pipe_pix_clk_params = dcn401_build_pipe_pix_clk_params,
 	.calculate_mall_ways_from_bytes = dcn32_calculate_mall_ways_from_bytes,
-	.get_power_profile = dcn401_get_power_profile,
 };
 
 static uint32_t read_pipe_fuses(struct dc_context *ctx)