Skip to contentSkip to conversation

continue mt7988 devicetree work

PATCH Applied Frank Wunderlich 2 participants 25 messages Dec 17, 2024 – Jan 2, 2025

Subsystems (2)
Device tree bindings Arm MediaTek
lore
Share & tools
lore

Frank Wunderlich

author
#0 lore raw

v3 cover continue mt7988 devicetree work

From: Frank Wunderlich <[email protected]>

This series adds some missing labels and new nodes to mt7988 DTS.

based on pinctrl-series
https://patchwork.kernel.org/project/linux-mediatek/list/?series=918572

changes:
v3:
- reorder
- small fixes
- add some new patches (t-phy, pcie, mmc overlays)
- dropped pmic and proc-supply for now because we found a mismatch compared with schematic

v2:
- reorder and squash label-commits to where they are used
- add some more nodes
- add changes to bananapi-r4 board
- moving some nodes from SoC dtsi to board dts

Frank Wunderlich (22):
arm64: dts: mediatek: mt7988: Add reserved memory
arm64: dts: mediatek: mt7988: Add mmc support
arm64: dts: mediatek: mt7988: Add lvts node
arm64: dts: mediatek: mt7988: Add thermal-zone
arm64: dts: mediatek: mt7988: Add missing clock-div property for i2c
arm64: dts: mediatek: mt7988: Add mcu-sys node for cpu
arm64: dts: mediatek: mt7988: Add CPU OPP table for clock scaling
arm64: dts: mediatek: mt7988: Disable usb controllers by default
arm64: dts: mediatek: mt7988: Add t-phy for ssusb1
arm64: dts: mediatek: mt7988: Add pcie nodes
arm64: dts: mediatek: mt7988a-bpi-r4: Enable watchdog
arm64: dts: mediatek: mt7988a-bpi-r4: Add fixed regulators for 1v8 and

    3v3

arm64: dts: mediatek: mt7988a-bpi-r4: Add dt overlays for sd + emmc
arm64: dts: mediatek: mt7988a-bpi-r4: Add thermal configuration
arm64: dts: mediatek: mt7988a-bpi-r4: Enable serial0 debug uart
arm64: dts: mediatek: mt7988a-bpi-r4: Add default UART stdout
arm64: dts: mediatek: mt7988a-bpi-r4: Enable I2C controllers
arm64: dts: mediatek: mt7988a-bpi-r4: Add PCA9545 I2C Mux
arm64: dts: mediatek: mt7988a-bpi-r4: Enable t-phy for ssusb1
arm64: dts: mediatek: mt7988a-bpi-r4: Enable ssusb1 on bpi-r4
arm64: dts: mediatek: mt7988a-bpi-r4: Enable pwm
arm64: dts: mediatek: mt7988a-bpi-r4: Enable pcie

 arch/arm64/boot/dts/mediatek/Makefile         |   3 +
 .../mt7988a-bananapi-bpi-r4-emmc.dtso         |  33 ++
 .../mediatek/mt7988a-bananapi-bpi-r4-sd.dtso  |  31 ++
 .../dts/mediatek/mt7988a-bananapi-bpi-r4.dts  | 143 +++++++++
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi     | 303 +++++++++++++++++-
 5 files changed, 506 insertions(+), 7 deletions(-)
 create mode 100644 arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-emmc.dtso
 create mode 100644 arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-sd.dtso
Signature · 1 line
2.43.0
author
#1 lore raw

PATCH v3 1/22 arm64: dts: mediatek: mt7988: Add reserved memory

From: Frank Wunderlich <[email protected]>

Add memory range handled by ATF to not be touched by linux kernel. ATF is SoC specific and not board-specific so add it to mt7988.dtsi.

Signed-off-by Frank Wunderlich <[email protected]>

---
changes: v3:
- move commit to first of series
- drop secmon_reserved label

---
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)
arch/arm64/boot/dts/mediatek/mt7988a.dtsi +12 -0
index 46969577c87a..d205717ac78b 100644
@@ -62,6 +62,18 @@ psci {
 		method = "smc";
 	};
 
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		/* 320 KiB reserved for ARM Trusted Firmware (BL31 and BL32) */
+		secmon@43000000 {
+			reg = <0 0x43000000 0 0x50000>;
+			no-map;
+		};
+	};
+
 	soc {
 		compatible = "simple-bus";
 		ranges;
Signature · 1 line
2.43.0
author
#2 lore raw

PATCH v3 2/22 arm64: dts: mediatek: mt7988: Add mmc support

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Add devicetree node for MMC controller.

Signed-off-by Frank Wunderlich <[email protected]>
Reviewed-by AngeloGioacchino Del Regno <[email protected]>

---
changes:
v3:
move clocks in one line
v2:
squash "add missing label for apmixedsys"

---
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/mediatek/mt7988a.dtsi +20 -1
index d205717ac78b..2e224d0d0168 100644
@@ -112,7 +112,7 @@ watchdog: watchdog@1001c000 {
 			#reset-cells = <1>;
 		};
 
-		clock-controller@1001e000 {
+		apmixedsys: clock-controller@1001e000 {
 			compatible = "mediatek,mt7988-apmixedsys";
 			reg = <0 0x1001e000 0 0x1000>;
 			#clock-cells = <1>;

@@ -290,6 +290,25 @@ usb@11200000 {
 			clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck";
 		};
 
+		mmc0: mmc@11230000 {
+			compatible = "mediatek,mt7988-mmc";
+			reg = <0 0x11230000 0 0x1000>,
+			      <0 0x11D60000 0 0x1000>;
+			interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&infracfg CLK_INFRA_MSDC400>,
+				 <&infracfg CLK_INFRA_MSDC2_HCK>,
+				 <&infracfg CLK_INFRA_66M_MSDC_0_HCK>,
+				 <&infracfg CLK_INFRA_133M_MSDC_0_HCK>;
+			assigned-clocks = <&topckgen CLK_TOP_EMMC_250M_SEL>,
+					  <&topckgen CLK_TOP_EMMC_400M_SEL>;
+			assigned-clock-parents = <&topckgen CLK_TOP_NET1PLL_D5_D2>,
+						 <&apmixedsys CLK_APMIXED_MSDCPLL>;
+			clock-names = "source", "hclk", "axi_cg", "ahb_cg";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		clock-controller@11f40000 {
 			compatible = "mediatek,mt7988-xfi-pll";
 			reg = <0 0x11f40000 0 0x1000>;
Signature · 1 line
2.43.0
author
#3 lore raw

PATCH v3 3/22 arm64: dts: mediatek: mt7988: Add lvts node

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Add Low Voltage Thermal Sensor (LVTS) node for mt7988 SoC.

Signed-off-by Frank Wunderlich <[email protected]>
Reviewed-by AngeloGioacchino Del Regno <[email protected]>

---
changes:
v3:
dropped efuse label
v2:
squash
- "arm64: dts: mediatek: mt7988: add label for efuse"
- "arm64: dts: mediatek: mt7988: extend efuse node" (drop other efuse subnodes)

---
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
arch/arm64/boot/dts/mediatek/mt7988a.dtsi +17 -0
index 2e224d0d0168..32bb04ce21b3 100644
@@ -4,6 +4,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/phy/phy.h>
 #include <dt-bindings/pinctrl/mt65xx.h>
+#include <dt-bindings/reset/mediatek,mt7988-resets.h>
 
 / {
 	compatible = "mediatek,mt7988a";

@@ -97,6 +98,7 @@ infracfg: clock-controller@10001000 {
 			compatible = "mediatek,mt7988-infracfg", "syscon";
 			reg = <0 0x10001000 0 0x1000>;
 			#clock-cells = <1>;
+			#reset-cells = <1>;
 		};
 
 		topckgen: clock-controller@1001b000 {

@@ -262,6 +264,17 @@ i2c@11005000 {
 			status = "disabled";
 		};
 
+		lvts: lvts@1100a000 {
+			compatible = "mediatek,mt7988-lvts-ap";
+			#thermal-sensor-cells = <1>;
+			reg = <0 0x1100a000 0 0x1000>;
+			clocks = <&infracfg CLK_INFRA_26M_THERM_SYSTEM>;
+			interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+			resets = <&infracfg MT7988_INFRA_RST1_THERM_CTRL_SWRST>;
+			nvmem-cells = <&lvts_calibration>;
+			nvmem-cell-names = "lvts-calib-data-1";
+		};
+
 		usb@11190000 {
 			compatible = "mediatek,mt7988-xhci", "mediatek,mtk-xhci";
 			reg = <0 0x11190000 0 0x2e00>,

@@ -321,6 +334,10 @@ efuse@11f50000 {
 			reg = <0 0x11f50000 0 0x1000>;
 			#address-cells = <1>;
 			#size-cells = <1>;
+
+			lvts_calibration: calib@918 {
+				reg = <0x918 0x28>;
+			};
 		};
 
 		clock-controller@15000000 {
Signature · 1 line
2.43.0
author
#4 lore raw

PATCH v3 4/22 arm64: dts: mediatek: mt7988: Add thermal-zone

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Add basic thermal-zone node.

Signed-off-by Frank Wunderlich <[email protected]>
Reviewed-by AngeloGioacchino Del Regno <[email protected]>

---
v2:
- only add critical trip to SoC dtsi, lower trips have to go to board dts

---
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
arch/arm64/boot/dts/mediatek/mt7988a.dtsi +15 -0
index 32bb04ce21b3..0e75a8692879 100644
@@ -355,6 +355,21 @@ clock-controller@15031000 {
 		};
 	};
 
+	thermal-zones {
+		cpu_thermal: cpu-thermal {
+			polling-delay-passive = <1000>;
+			polling-delay = <1000>;
+			thermal-sensors = <&lvts 0>;
+			trips {
+				cpu_trip_crit: crit {
+					temperature = <125000>;
+					hysteresis = <2000>;
+					type = "critical";
+				};
+			};
+		};
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupt-parent = <&gic>;
Signature · 1 line
2.43.0
author
#5 lore raw

PATCH v3 5/22 arm64: dts: mediatek: mt7988: Add missing clock-div property for i2c

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

I2C binding requires clock-div property.

Signed-off-by Frank Wunderlich <[email protected]>
Fixes 660c230bf302 ("arm64: dts: mediatek: mt7988: add I2C controllers")
Reviewed-by AngeloGioacchino Del Regno <[email protected]>
---
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 3 +++
 1 file changed, 3 insertions(+)
arch/arm64/boot/dts/mediatek/mt7988a.dtsi +3 -0
index 0e75a8692879..16b28fcf1e3c 100644
@@ -230,6 +230,7 @@ i2c@11003000 {
 			reg = <0 0x11003000 0 0x1000>,
 			      <0 0x10217080 0 0x80>;
 			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+			clock-div = <1>;
 			clocks = <&infracfg CLK_INFRA_I2C_BCK>,
 				 <&infracfg CLK_INFRA_66M_AP_DMA_BCK>;
 			clock-names = "main", "dma";

@@ -243,6 +244,7 @@ i2c@11004000 {
 			reg = <0 0x11004000 0 0x1000>,
 			      <0 0x10217100 0 0x80>;
 			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+			clock-div = <1>;
 			clocks = <&infracfg CLK_INFRA_I2C_BCK>,
 				 <&infracfg CLK_INFRA_66M_AP_DMA_BCK>;
 			clock-names = "main", "dma";

@@ -256,6 +258,7 @@ i2c@11005000 {
 			reg = <0 0x11005000 0 0x1000>,
 			      <0 0x10217180 0 0x80>;
 			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+			clock-div = <1>;
 			clocks = <&infracfg CLK_INFRA_I2C_BCK>,
 				 <&infracfg CLK_INFRA_66M_AP_DMA_BCK>;
 			clock-names = "main", "dma";
Signature · 1 line
2.43.0
author
#6 lore raw

PATCH v3 6/22 arm64: dts: mediatek: mt7988: Add mcu-sys node for cpu

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

In preparation for adding support for CPU DVFS and clock tables for it, add the MCUSYS clock controller node.

Signed-off-by Frank Wunderlich <[email protected]>
Reviewed-by AngeloGioacchino Del Regno <[email protected]>
---
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)
arch/arm64/boot/dts/mediatek/mt7988a.dtsi +6 -0
index 16b28fcf1e3c..5e53ea47f159 100644
@@ -192,6 +192,12 @@ pwm@10048000 {
 			status = "disabled";
 		};
 
+		mcusys: mcusys@100e0000 {
+			compatible = "mediatek,mt7988-mcusys", "syscon";
+			reg = <0 0x100e0000 0 0x1000>;
+			#clock-cells = <1>;
+		};
+
 		serial@11000000 {
 			compatible = "mediatek,mt7988-uart", "mediatek,mt6577-uart";
 			reg = <0 0x11000000 0 0x100>;
Signature · 1 line
2.43.0
author
#7 lore raw

PATCH v3 7/22 arm64: dts: mediatek: mt7988: Add CPU OPP table for clock scaling

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Add operating points defining frequency/voltages of cpu cores.

Signed-off-by Frank Wunderlich <[email protected]>
Reviewed-by AngeloGioacchino Del Regno <[email protected]>

---
changes:
v3:
- change commit-title
v2:
- drop cpu-labels for now

---
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 38 +++++++++++++++++++++++
 1 file changed, 38 insertions(+)
arch/arm64/boot/dts/mediatek/mt7988a.dtsi +38 -0
index 5e53ea47f159..a7954bf5c81e 100644
@@ -21,6 +21,10 @@ cpu@0 {
 			reg = <0x0>;
 			device_type = "cpu";
 			enable-method = "psci";
+			clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>,
+				 <&topckgen CLK_TOP_XTAL>;
+			clock-names = "cpu", "intermediate";
+			operating-points-v2 = <&cluster0_opp>;
 		};
 
 		cpu@1 {

@@ -28,6 +32,10 @@ cpu@1 {
 			reg = <0x1>;
 			device_type = "cpu";
 			enable-method = "psci";
+			clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>,
+				 <&topckgen CLK_TOP_XTAL>;
+			clock-names = "cpu", "intermediate";
+			operating-points-v2 = <&cluster0_opp>;
 		};
 
 		cpu@2 {

@@ -35,6 +43,10 @@ cpu@2 {
 			reg = <0x2>;
 			device_type = "cpu";
 			enable-method = "psci";
+			clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>,
+				 <&topckgen CLK_TOP_XTAL>;
+			clock-names = "cpu", "intermediate";
+			operating-points-v2 = <&cluster0_opp>;
 		};
 
 		cpu@3 {

@@ -42,6 +54,32 @@ cpu@3 {
 			reg = <0x3>;
 			device_type = "cpu";
 			enable-method = "psci";
+			clocks = <&mcusys CLK_MCU_ARM_DIV_SEL>,
+				 <&topckgen CLK_TOP_XTAL>;
+			clock-names = "cpu", "intermediate";
+			operating-points-v2 = <&cluster0_opp>;
+		};
+
+		cluster0_opp: opp-table-0 {
+			compatible = "operating-points-v2";
+			opp-shared;
+
+			opp-800000000 {
+				opp-hz = /bits/ 64 <800000000>;
+				opp-microvolt = <850000>;
+			};
+			opp-1100000000 {
+				opp-hz = /bits/ 64 <1100000000>;
+				opp-microvolt = <850000>;
+			};
+			opp-1500000000 {
+				opp-hz = /bits/ 64 <1500000000>;
+				opp-microvolt = <850000>;
+			};
+			opp-1800000000 {
+				opp-hz = /bits/ 64 <1800000000>;
+				opp-microvolt = <900000>;
+			};
 		};
 	};
Signature · 1 line
2.43.0
author
#8 lore raw

PATCH v3 8/22 arm64: dts: mediatek: mt7988: Disable usb controllers by default

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

The controllers should be enabled at board level if used.

Signed-off-by Frank Wunderlich <[email protected]>
---
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 2 ++
 1 file changed, 2 insertions(+)
arch/arm64/boot/dts/mediatek/mt7988a.dtsi +2 -0
index a7954bf5c81e..f8b01f3fff32 100644
@@ -334,6 +334,7 @@ usb@11190000 {
 				 <&infracfg CLK_INFRA_133M_USB_HCK>,
 				 <&infracfg CLK_INFRA_USB_XHCI>;
 			clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck";
+			status = "disabled";
 		};
 
 		usb@11200000 {

@@ -348,6 +349,7 @@ usb@11200000 {
 				 <&infracfg CLK_INFRA_133M_USB_HCK_CK_P1>,
 				 <&infracfg CLK_INFRA_USB_XHCI_CK_P1>;
 			clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck";
+			status = "disabled";
 		};
 
 		mmc0: mmc@11230000 {
Signature · 1 line
2.43.0
author
#9 lore raw

PATCH v3 9/22 arm64: dts: mediatek: mt7988: Add t-phy for ssusb1

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

USB controller needs phys for working properly.
On mt7988 ssusb0 uses a xs-phy, ssusb uses t-phy.
For now add the t-phy for ssusb1. We can reuse the mt7986 compatible here.

Signed-off-by Frank Wunderlich <[email protected]>
---
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 25 +++++++++++++++++++++++
 1 file changed, 25 insertions(+)
arch/arm64/boot/dts/mediatek/mt7988a.dtsi +25 -0
index f8b01f3fff32..209d170bce7f 100644
@@ -349,6 +349,8 @@ usb@11200000 {
 				 <&infracfg CLK_INFRA_133M_USB_HCK_CK_P1>,
 				 <&infracfg CLK_INFRA_USB_XHCI_CK_P1>;
 			clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck";
+			phys = <&tphyu2port0 PHY_TYPE_USB2>,
+			       <&tphyu3port0 PHY_TYPE_USB3>;
 			status = "disabled";
 		};
 

@@ -371,6 +373,29 @@ mmc0: mmc@11230000 {
 			status = "disabled";
 		};
 
+		t-phy@11c50000 {
+			compatible = "mediatek,mt7986-tphy",
+				     "mediatek,generic-tphy-v2";
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges;
+			status = "disabled";
+
+			tphyu2port0: usb-phy@11c50000 {
+				reg = <0 0x11c50000 0 0x700>;
+				clocks = <&infracfg CLK_INFRA_USB_UTMI_CK_P1>;
+				clock-names = "ref";
+				#phy-cells = <1>;
+			};
+
+			tphyu3port0: usb-phy@11c50700 {
+				reg = <0 0x11c50700 0 0x900>;
+				clocks = <&infracfg CLK_INFRA_USB_PIPE_CK_P1>;
+				clock-names = "ref";
+				#phy-cells = <1>;
+			};
+		};
+
 		clock-controller@11f40000 {
 			compatible = "mediatek,mt7988-xfi-pll";
 			reg = <0 0x11f40000 0 0x1000>;
Signature · 1 line
2.43.0
author
#10 lore raw

PATCH v3 10/22 arm64: dts: mediatek: mt7988: Add pcie nodes

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Add pcie controllers for mt7988. Reuse mt7986 compatible.

Signed-off-by Frank Wunderlich <[email protected]>
---
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 152 ++++++++++++++++++++++
 1 file changed, 152 insertions(+)
arch/arm64/boot/dts/mediatek/mt7988a.dtsi +152 -0
index 209d170bce7f..74c75d5149d7 100644
@@ -373,6 +373,158 @@ mmc0: mmc@11230000 {
 			status = "disabled";
 		};
 
+		pcie@11280000 {
+			compatible = "mediatek,mt7986-pcie",
+				     "mediatek,mt8192-pcie";
+			device_type = "pci";
+			#address-cells = <3>;
+			#size-cells = <2>;
+			reg = <0 0x11280000 0 0x2000>;
+			reg-names = "pcie-mac";
+			linux,pci-domain = <3>;
+			interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
+			bus-range = <0x00 0xff>;
+			ranges = <0x81000000 0x00 0x20000000 0x00
+				  0x20000000 0x00 0x00200000>,
+				 <0x82000000 0x00 0x20200000 0x00
+				  0x20200000 0x00 0x07e00000>;
+			clocks = <&infracfg CLK_INFRA_PCIE_PIPE_P2>,
+				 <&infracfg CLK_INFRA_PCIE_GFMUX_TL_P2>,
+				 <&infracfg CLK_INFRA_PCIE_PERI_26M_CK_P2>,
+				 <&infracfg CLK_INFRA_133M_PCIE_CK_P2>;
+			clock-names = "pl_250m", "tl_26m", "peri_26m",
+				      "top_133m";
+			pinctrl-names = "default";
+			pinctrl-0 = <&pcie2_pins>;
+			status = "disabled";
+
+			#interrupt-cells = <1>;
+			interrupt-map-mask = <0 0 0 0x7>;
+			interrupt-map = <0 0 0 1 &pcie_intc2 0>,
+					<0 0 0 2 &pcie_intc2 1>,
+					<0 0 0 3 &pcie_intc2 2>,
+					<0 0 0 4 &pcie_intc2 3>;
+			pcie_intc2: interrupt-controller {
+				#address-cells = <0>;
+				#interrupt-cells = <1>;
+				interrupt-controller;
+			};
+		};
+
+		pcie@11290000 {
+			compatible = "mediatek,mt7986-pcie",
+				     "mediatek,mt8192-pcie";
+			device_type = "pci";
+			#address-cells = <3>;
+			#size-cells = <2>;
+			reg = <0 0x11290000 0 0x2000>;
+			reg-names = "pcie-mac";
+			linux,pci-domain = <2>;
+			interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
+			bus-range = <0x00 0xff>;
+			ranges = <0x81000000 0x00 0x28000000 0x00
+				  0x28000000 0x00 0x00200000>,
+				 <0x82000000 0x00 0x28200000 0x00
+				  0x28200000 0x00 0x07e00000>;
+			clocks = <&infracfg CLK_INFRA_PCIE_PIPE_P3>,
+				 <&infracfg CLK_INFRA_PCIE_GFMUX_TL_P3>,
+				 <&infracfg CLK_INFRA_PCIE_PERI_26M_CK_P3>,
+				 <&infracfg CLK_INFRA_133M_PCIE_CK_P3>;
+			clock-names = "pl_250m", "tl_26m", "peri_26m",
+				      "top_133m";
+			pinctrl-names = "default";
+			pinctrl-0 = <&pcie3_pins>;
+			status = "disabled";
+
+			#interrupt-cells = <1>;
+			interrupt-map-mask = <0 0 0 0x7>;
+			interrupt-map = <0 0 0 1 &pcie_intc3 0>,
+					<0 0 0 2 &pcie_intc3 1>,
+					<0 0 0 3 &pcie_intc3 2>,
+					<0 0 0 4 &pcie_intc3 3>;
+			pcie_intc3: interrupt-controller {
+				#address-cells = <0>;
+				#interrupt-cells = <1>;
+				interrupt-controller;
+			};
+		};
+
+		pcie@11300000 {
+			compatible = "mediatek,mt7986-pcie",
+				     "mediatek,mt8192-pcie";
+			device_type = "pci";
+			#address-cells = <3>;
+			#size-cells = <2>;
+			reg = <0 0x11300000 0 0x2000>;
+			reg-names = "pcie-mac";
+			linux,pci-domain = <0>;
+			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+			bus-range = <0x00 0xff>;
+			ranges = <0x81000000 0x00 0x30000000 0x00
+				  0x30000000 0x00 0x00200000>,
+				 <0x82000000 0x00 0x30200000 0x00
+				  0x30200000 0x00 0x07e00000>;
+			clocks = <&infracfg CLK_INFRA_PCIE_PIPE_P0>,
+				 <&infracfg CLK_INFRA_PCIE_GFMUX_TL_P0>,
+				 <&infracfg CLK_INFRA_PCIE_PERI_26M_CK_P0>,
+				 <&infracfg CLK_INFRA_133M_PCIE_CK_P0>;
+			clock-names = "pl_250m", "tl_26m", "peri_26m",
+				      "top_133m";
+			pinctrl-names = "default";
+			pinctrl-0 = <&pcie0_pins>;
+			status = "disabled";
+
+			#interrupt-cells = <1>;
+			interrupt-map-mask = <0 0 0 0x7>;
+			interrupt-map = <0 0 0 1 &pcie_intc0 0>,
+					<0 0 0 2 &pcie_intc0 1>,
+					<0 0 0 3 &pcie_intc0 2>,
+					<0 0 0 4 &pcie_intc0 3>;
+			pcie_intc0: interrupt-controller {
+				#address-cells = <0>;
+				#interrupt-cells = <1>;
+				interrupt-controller;
+			};
+		};
+
+		pcie@11310000 {
+			compatible = "mediatek,mt7986-pcie",
+				     "mediatek,mt8192-pcie";
+			device_type = "pci";
+			#address-cells = <3>;
+			#size-cells = <2>;
+			reg = <0 0x11310000 0 0x2000>;
+			reg-names = "pcie-mac";
+			linux,pci-domain = <1>;
+			interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+			bus-range = <0x00 0xff>;
+			ranges = <0x81000000 0x00 0x38000000 0x00
+				  0x38000000 0x00 0x00200000>,
+				 <0x82000000 0x00 0x38200000 0x00
+				  0x38200000 0x00 0x07e00000>;
+			clocks = <&infracfg CLK_INFRA_PCIE_PIPE_P1>,
+				 <&infracfg CLK_INFRA_PCIE_GFMUX_TL_P1>,
+				 <&infracfg CLK_INFRA_PCIE_PERI_26M_CK_P1>,
+				 <&infracfg CLK_INFRA_133M_PCIE_CK_P1>;
+			clock-names = "pl_250m", "tl_26m", "peri_26m",
+				      "top_133m";
+			pinctrl-names = "default";
+			pinctrl-0 = <&pcie1_pins>;
+			status = "disabled";
+
+			#interrupt-cells = <1>;
+			interrupt-map-mask = <0 0 0 0x7>;
+			interrupt-map = <0 0 0 1 &pcie_intc1 0>,
+					<0 0 0 2 &pcie_intc1 1>,
+					<0 0 0 3 &pcie_intc1 2>,
+					<0 0 0 4 &pcie_intc1 3>;
+			pcie_intc1: interrupt-controller {
+				#address-cells = <0>;
+				#interrupt-cells = <1>;
+				interrupt-controller;
+			};
+		};
+
 		t-phy@11c50000 {
 			compatible = "mediatek,mt7986-tphy",
 				     "mediatek,generic-tphy-v2";
Signature · 1 line
2.43.0
author
#11 lore raw

PATCH v3 11/22 arm64: dts: mediatek: mt7988a-bpi-r4: Enable watchdog

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Enable the watchdog on Bananapi R4 board.

Signed-off-by Frank Wunderlich <[email protected]>
Reviewed-by AngeloGioacchino Del Regno <[email protected]>

---
changes:
v3: change commit title to include prefix for r4

---
 arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts +4 -0
index aa2dabc041fd..d914eae2b524 100644
@@ -198,3 +198,7 @@ mux {
 		};
 	};
 };
+
+&watchdog {
+	status = "okay";
+};
Signature · 1 line
2.43.0
author
#12 lore raw

PATCH v3 12/22 arm64: dts: mediatek: mt7988a-bpi-r4: Add fixed regulators for 1v8 and 3v3

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Add regulator nodes used for mmc to Bananapi R4 board.
This board has 1 MMC controller used for SDMMC and eMMC where only one can be used at one time, selected by hardware switches. SD uses 3v3 for both supplies and emmc uses both regulators.
So defining both regulators in board dts and referencing them in the dt overlay.

Signed-off-by Frank Wunderlich <[email protected]>

---
v3:
- change title to include prefix for r4
v2:
- move mmc regulators to board dts of bpi-r4

---
 .../dts/mediatek/mt7988a-bananapi-bpi-r4.dts   | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts +18 -0
index d914eae2b524..df53512c6890 100644
@@ -8,6 +8,24 @@ / {
 	compatible = "bananapi,bpi-r4", "mediatek,mt7988a";
 	model = "Banana Pi BPI-R4";
 	chassis-type = "embedded";
+
+	reg_1p8v: regulator-1p8v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-1.8V";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	reg_3p3v: regulator-3p3v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-3.3V";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
 };
 
 &pio {
Signature · 1 line
2.43.0
author
#13 lore raw

PATCH v3 13/22 arm64: dts: mediatek: mt7988a-bpi-r4: Add dt overlays for sd + emmc

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Bananapi R4 can use the mmc controller either with sd card or the onboard emmc. The used device is selected through hardware-switches and probed in bootloader.
Add devicetree overlays for both mmc configurations.

Signed-off-by Frank Wunderlich <[email protected]>
---
 arch/arm64/boot/dts/mediatek/Makefile         |  3 ++
 .../mt7988a-bananapi-bpi-r4-emmc.dtso         | 33 +++++++++++++++++++
 .../mediatek/mt7988a-bananapi-bpi-r4-sd.dtso  | 31 +++++++++++++++++
 3 files changed, 67 insertions(+)
 create mode 100644 arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-emmc.dtso
 create mode 100644 arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-sd.dtso
arch/arm64/boot/dts/mediatek/Makefile +3 -0
index 8fd7b2bb7a15..33e244898849 100644
@@ -21,6 +21,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-sd.dtbo
 dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-rfb.dtb
 dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986b-rfb.dtb
 dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4-emmc.dtbo
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4-sd.dtbo
 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8167-pumpkin.dtb
 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm.dtb
 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb

@@ -90,3 +92,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb
 # Device tree overlays support
 DTC_FLAGS_mt7986a-bananapi-bpi-r3 := -@
 DTC_FLAGS_mt7986a-bananapi-bpi-r3-mini := -@
+DTC_FLAGS_mt7988a-bananapi-bpi-r4 := -@
arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-emmc.dtso new file +33 -0
new file mode 100644
index 000000000000..3e320b2f83d5
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2021 MediaTek Inc.
+ * Author: Frank Wunderlich <[email protected]>
+ */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "bananapi,bpi-r4", "mediatek,mt7988a";
+};
+
+&{/soc/mmc@11230000} {
+	pinctrl-names = "default", "state_uhs";
+	pinctrl-0 = <&mmc0_pins_emmc_51>;
+	pinctrl-1 = <&mmc0_pins_emmc_51>;
+	bus-width = <8>;
+	max-frequency = <200000000>;
+	cap-mmc-highspeed;
+	mmc-hs200-1_8v;
+	mmc-hs400-1_8v;
+	hs400-ds-delay = <0x12814>;
+	vqmmc-supply = <&reg_1p8v>;
+	vmmc-supply = <&reg_3p3v>;
+	non-removable;
+	no-sd;
+	no-sdio;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+};
+
arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-sd.dtso new file +31 -0
new file mode 100644
index 000000000000..663c6345dd31
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2023 MediaTek Inc.
+ * Author: Frank Wunderlich <[email protected]>
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	compatible = "bananapi,bpi-r4", "mediatek,mt7988a";
+};
+
+&{/soc/mmc@11230000} {
+	pinctrl-names = "default", "state_uhs";
+	pinctrl-0 = <&mmc0_pins_sdcard>;
+	pinctrl-1 = <&mmc0_pins_sdcard>;
+	cd-gpios = <&pio 12 GPIO_ACTIVE_LOW>;
+	bus-width = <4>;
+	max-frequency = <52000000>;
+	cap-sd-highspeed;
+	vmmc-supply = <&reg_3p3v>;
+	vqmmc-supply = <&reg_3p3v>;
+	no-mmc;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+};
+
Signature · 1 line
2.43.0
author
#14 lore raw

PATCH v3 14/22 arm64: dts: mediatek: mt7988a-bpi-r4: Add thermal configuration

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Add additional thermal trips to Bananapi R4 board. SoC only contains the critical trip.

Signed-off-by Frank Wunderlich <[email protected]>
Reviewed-by AngeloGioacchino Del Regno <[email protected]>
---
 .../dts/mediatek/mt7988a-bananapi-bpi-r4.dts  | 28 +++++++++++++++++++
 1 file changed, 28 insertions(+)
arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts +28 -0
index df53512c6890..8a320d9da443 100644
@@ -28,6 +28,34 @@ reg_3p3v: regulator-3p3v {
 	};
 };
 
+&cpu_thermal {
+	trips {
+		cpu_trip_hot: hot {
+			temperature = <120000>;
+			hysteresis = <2000>;
+			type = "hot";
+		};
+
+		cpu_trip_active_high: active-high {
+			temperature = <115000>;
+			hysteresis = <2000>;
+			type = "active";
+		};
+
+		cpu_trip_active_med: active-med {
+			temperature = <85000>;
+			hysteresis = <2000>;
+			type = "active";
+		};
+
+		cpu_trip_active_low: active-low {
+			temperature = <40000>;
+			hysteresis = <2000>;
+			type = "active";
+		};
+	};
+};
+
 &pio {
 	mdio0_pins: mdio0-pins {
 		mux {
Signature · 1 line
2.43.0
author
#15 lore raw

PATCH v3 15/22 arm64: dts: mediatek: mt7988a-bpi-r4: Enable serial0 debug uart

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Enable the debug uart on Bananapi R4 board.

Signed-off-by Frank Wunderlich <[email protected]>
Reviewed-by AngeloGioacchino Del Regno <[email protected]>
---
 arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts | 4 ++++
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi                | 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts +4 -0
index 8a320d9da443..9037f35857a9 100644
@@ -245,6 +245,10 @@ mux {
 	};
 };
 
+&serial0 {
+	status = "okay";
+};
+
 &watchdog {
 	status = "okay";
 };
arch/arm64/boot/dts/mediatek/mt7988a.dtsi +1 -1
index 74c75d5149d7..59a1ffc2edfc 100644
@@ -236,7 +236,7 @@ mcusys: mcusys@100e0000 {
 			#clock-cells = <1>;
 		};
 
-		serial@11000000 {
+		serial0: serial@11000000 {
 			compatible = "mediatek,mt7988-uart", "mediatek,mt6577-uart";
 			reg = <0 0x11000000 0 0x100>;
 			interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
Signature · 1 line
2.43.0
author
#16 lore raw

PATCH v3 16/22 arm64: dts: mediatek: mt7988a-bpi-r4: Add default UART stdout

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Add chosen node on Bananapi R4 board with stdout and default bootargs.

Signed-off-by Frank Wunderlich <[email protected]>
Reviewed-by AngeloGioacchino Del Regno <[email protected]>

---
changes:
v3:
- changed stdout-path to contain serial settings and dropped bootargs property
- changed commit title

---
 arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts +4 -0
index 9037f35857a9..46117df7d44c 100644
@@ -9,6 +9,10 @@ / {
 	model = "Banana Pi BPI-R4";
 	chassis-type = "embedded";
 
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
 	reg_1p8v: regulator-1p8v {
 		compatible = "regulator-fixed";
 		regulator-name = "fixed-1.8V";
Signature · 1 line
2.43.0
author
#17 lore raw

PATCH v3 17/22 arm64: dts: mediatek: mt7988a-bpi-r4: Enable I2C controllers

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Enable the I2C0, I2C2 controllers found on the BananaPi R4 board. Both controllers are not accessible from user and having fixed spare devices. I2C0 have a pmic connected, I2C2 is used with I2C-multiplexer for e.g. SFP cages.
The missing I2C1 is connected to GPIO header which can have either GPIO mode or I2C mode.

Signed-off-by Frank Wunderlich <[email protected]>
Reviewed-by AngeloGioacchino Del Regno <[email protected]>
---
 .../boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts    | 12 ++++++++++++
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi            |  6 +++---
 2 files changed, 15 insertions(+), 3 deletions(-)
arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts +12 -0
index 46117df7d44c..3d165f7b29dc 100644
@@ -60,6 +60,18 @@ cpu_trip_active_low: active-low {
 	};
 };
 
+&i2c0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c0_pins>;
+	status = "okay";
+};
+
+&i2c2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c2_1_pins>;
+	status = "okay";
+};
+
 &pio {
 	mdio0_pins: mdio0-pins {
 		mux {
arch/arm64/boot/dts/mediatek/mt7988a.dtsi +3 -3
index 59a1ffc2edfc..c0a49f68834a 100644
@@ -269,7 +269,7 @@ serial@11000200 {
 			status = "disabled";
 		};
 
-		i2c@11003000 {
+		i2c0: i2c@11003000 {
 			compatible = "mediatek,mt7981-i2c";
 			reg = <0 0x11003000 0 0x1000>,
 			      <0 0x10217080 0 0x80>;

@@ -283,7 +283,7 @@ i2c@11003000 {
 			status = "disabled";
 		};
 
-		i2c@11004000 {
+		i2c1: i2c@11004000 {
 			compatible = "mediatek,mt7981-i2c";
 			reg = <0 0x11004000 0 0x1000>,
 			      <0 0x10217100 0 0x80>;

@@ -297,7 +297,7 @@ i2c@11004000 {
 			status = "disabled";
 		};
 
-		i2c@11005000 {
+		i2c2: i2c@11005000 {
 			compatible = "mediatek,mt7981-i2c";
 			reg = <0 0x11005000 0 0x1000>,
 			      <0 0x10217180 0 0x80>;
Signature · 1 line
2.43.0
author
#18 lore raw

PATCH v3 18/22 arm64: dts: mediatek: mt7988a-bpi-r4: Add PCA9545 I2C Mux

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Bananapi R4 uses an i2c multiplexer for SFP slots, rtc and eeprom. Add its node to the right i2c controller.

Signed-off-by Frank Wunderlich <[email protected]>
Reviewed-by AngeloGioacchino Del Regno <[email protected]>

---
changes:
v3:
- move reg after compatible
- change commit title

---
 .../dts/mediatek/mt7988a-bananapi-bpi-r4.dts  | 41 +++++++++++++++++++
 1 file changed, 41 insertions(+)
arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts +41 -0
index 3d165f7b29dc..0dc1fd9265c6 100644
@@ -2,6 +2,8 @@
 
 /dts-v1/;
 
+#include <dt-bindings/gpio/gpio.h>
+
 #include "mt7988a.dtsi"
 
 / {

@@ -70,6 +72,45 @@ &i2c2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&i2c2_1_pins>;
 	status = "okay";
+
+	pca9545: i2c-mux@70 {
+		compatible = "nxp,pca9545";
+		reg = <0x70>;
+		reset-gpios = <&pio 5 GPIO_ACTIVE_LOW>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		i2c@0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+
+			pcf8563: rtc@51 {
+				compatible = "nxp,pcf8563";
+				reg = <0x51>;
+				#clock-cells = <0>;
+			};
+
+			eeprom@57 {
+				compatible = "atmel,24c02";
+				reg = <0x57>;
+				size = <256>;
+			};
+
+		};
+
+		i2c_sfp1: i2c@1 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <1>;
+		};
+
+		i2c_sfp2: i2c@2 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <2>;
+		};
+	};
 };
 
 &pio {
Signature · 1 line
2.43.0
author
#19 lore raw

PATCH v3 19/22 arm64: dts: mediatek: mt7988a-bpi-r4: Enable t-phy for ssusb1

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Bananapi R4 uses t-phy for usb. Enable its node at board level.

Signed-off-by Frank Wunderlich <[email protected]>
---
 arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts | 4 ++++
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi                | 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts +4 -0
index 0dc1fd9265c6..129031b0d784 100644
@@ -306,6 +306,10 @@ &serial0 {
 	status = "okay";
 };
 
+&tphy {
+	status = "okay";
+};
+
 &watchdog {
 	status = "okay";
 };
arch/arm64/boot/dts/mediatek/mt7988a.dtsi +1 -1
index c0a49f68834a..0766ca0dd3f6 100644
@@ -525,7 +525,7 @@ pcie_intc1: interrupt-controller {
 			};
 		};
 
-		t-phy@11c50000 {
+		tphy: t-phy@11c50000 {
 			compatible = "mediatek,mt7986-tphy",
 				     "mediatek,generic-tphy-v2";
 			#address-cells = <2>;
Signature · 1 line
2.43.0
author
#20 lore raw

PATCH v3 20/22 arm64: dts: mediatek: mt7988a-bpi-r4: Enable ssusb1 on bpi-r4

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Enable usb on Bananapi R4 board.

Signed-off-by Frank Wunderlich <[email protected]>
Reviewed-by AngeloGioacchino Del Regno <[email protected]>

---
changes:
v3:
change commit title to have bpi-r4 prefix

---
 arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts | 4 ++++
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi                | 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts +4 -0
index 129031b0d784..08d664d6449b 100644
@@ -306,6 +306,10 @@ &serial0 {
 	status = "okay";
 };
 
+&ssusb1 {
+	status = "okay";
+};
+
 &tphy {
 	status = "okay";
 };
arch/arm64/boot/dts/mediatek/mt7988a.dtsi +1 -1
index 0766ca0dd3f6..f3e942db0b99 100644
@@ -337,7 +337,7 @@ usb@11190000 {
 			status = "disabled";
 		};
 
-		usb@11200000 {
+		ssusb1: usb@11200000 {
 			compatible = "mediatek,mt7988-xhci", "mediatek,mtk-xhci";
 			reg = <0 0x11200000 0 0x2e00>,
 			      <0 0x11203e00 0 0x0100>;
Signature · 1 line
2.43.0
author
#21 lore raw

PATCH v3 21/22 arm64: dts: mediatek: mt7988a-bpi-r4: Enable pwm

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Enable pwm on Bananapi R4 board.

Signed-off-by Frank Wunderlich <[email protected]>
Reviewed-by AngeloGioacchino Del Regno <[email protected]>

---
changes:
v3:
- change commit title to habe r4 prefix

---
 arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts | 4 ++++
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi                | 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts +4 -0
index 08d664d6449b..4b1eaf818b66 100644
@@ -302,6 +302,10 @@ mux {
 	};
 };
 
+&pwm {
+	status = "okay";
+};
+
 &serial0 {
 	status = "okay";
 };
arch/arm64/boot/dts/mediatek/mt7988a.dtsi +1 -1
index f3e942db0b99..6f6a1a1c1d78 100644
@@ -211,7 +211,7 @@ mux {
 			};
 		};
 
-		pwm@10048000 {
+		pwm: pwm@10048000 {
 			compatible = "mediatek,mt7988-pwm";
 			reg = <0 0x10048000 0 0x1000>;
 			clocks = <&infracfg CLK_INFRA_66M_PWM_BCK>,
Signature · 1 line
2.43.0
author
#22 lore raw

PATCH v3 22/22 arm64: dts: mediatek: mt7988a-bpi-r4: Enable pcie

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Enable the pci controllers on BPI-R4.

Signed-off-by Frank Wunderlich <[email protected]>
---
 .../dts/mediatek/mt7988a-bananapi-bpi-r4.dts  | 20 +++++++++++++++++++
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi     |  8 ++++----
 2 files changed, 24 insertions(+), 4 deletions(-)
arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts +20 -0
index 4b1eaf818b66..d6f1fca3323c 100644
@@ -113,6 +113,26 @@ i2c_sfp2: i2c@2 {
 	};
 };
 
+/* mPCIe SIM2 */
+&pcie0 {
+	status = "okay";
+};
+
+/* mPCIe SIM3 */
+&pcie1 {
+	status = "okay";
+};
+
+/* M.2 key-B SIM1 */
+&pcie2 {
+	status = "okay";
+};
+
+/* M.2 key-M SSD */
+&pcie3 {
+	status = "okay";
+};
+
 &pio {
 	mdio0_pins: mdio0-pins {
 		mux {
arch/arm64/boot/dts/mediatek/mt7988a.dtsi +4 -4
index 6f6a1a1c1d78..7a5e16a97476 100644
@@ -373,7 +373,7 @@ mmc0: mmc@11230000 {
 			status = "disabled";
 		};
 
-		pcie@11280000 {
+		pcie2: pcie@11280000 {
 			compatible = "mediatek,mt7986-pcie",
 				     "mediatek,mt8192-pcie";
 			device_type = "pci";

@@ -411,7 +411,7 @@ pcie_intc2: interrupt-controller {
 			};
 		};
 
-		pcie@11290000 {
+		pcie3: pcie@11290000 {
 			compatible = "mediatek,mt7986-pcie",
 				     "mediatek,mt8192-pcie";
 			device_type = "pci";

@@ -449,7 +449,7 @@ pcie_intc3: interrupt-controller {
 			};
 		};
 
-		pcie@11300000 {
+		pcie0: pcie@11300000 {
 			compatible = "mediatek,mt7986-pcie",
 				     "mediatek,mt8192-pcie";
 			device_type = "pci";

@@ -487,7 +487,7 @@ pcie_intc0: interrupt-controller {
 			};
 		};
 
-		pcie@11310000 {
+		pcie1: pcie@11310000 {
 			compatible = "mediatek,mt7986-pcie",
 				     "mediatek,mt8192-pcie";
 			device_type = "pci";
Signature · 1 line
2.43.0
maintainer Reviewed-by on the v3 series
#23 lore raw
In reply to Frank Wunderlich

Il 17/12/24 10:12, Frank Wunderlich ha scritto:

Quoted 7 lines

From: Frank Wunderlich <[email protected]>

This series adds some missing labels and new nodes to mt7988 DTS.

based on pinctrl-series
https://patchwork.kernel.org/project/linux-mediatek/list/?series=918572

The whole series is

Reviewed-by AngeloGioacchino Del Regno <[email protected]>

Good job!

Cheers,
Angelo

Quoted 47 lines

changes:
v3:
- reorder
- small fixes
- add some new patches (t-phy, pcie, mmc overlays)
- dropped pmic and proc-supply for now because we found a mismatch compared with schematic

v2:
- reorder and squash label-commits to where they are used
- add some more nodes
- add changes to bananapi-r4 board
- moving some nodes from SoC dtsi to board dts

Frank Wunderlich (22):
arm64: dts: mediatek: mt7988: Add reserved memory
arm64: dts: mediatek: mt7988: Add mmc support
arm64: dts: mediatek: mt7988: Add lvts node
arm64: dts: mediatek: mt7988: Add thermal-zone
arm64: dts: mediatek: mt7988: Add missing clock-div property for i2c
arm64: dts: mediatek: mt7988: Add mcu-sys node for cpu
arm64: dts: mediatek: mt7988: Add CPU OPP table for clock scaling
arm64: dts: mediatek: mt7988: Disable usb controllers by default
arm64: dts: mediatek: mt7988: Add t-phy for ssusb1
arm64: dts: mediatek: mt7988: Add pcie nodes
arm64: dts: mediatek: mt7988a-bpi-r4: Enable watchdog
arm64: dts: mediatek: mt7988a-bpi-r4: Add fixed regulators for 1v8 and

     3v3

arm64: dts: mediatek: mt7988a-bpi-r4: Add dt overlays for sd + emmc
arm64: dts: mediatek: mt7988a-bpi-r4: Add thermal configuration
arm64: dts: mediatek: mt7988a-bpi-r4: Enable serial0 debug uart
arm64: dts: mediatek: mt7988a-bpi-r4: Add default UART stdout
arm64: dts: mediatek: mt7988a-bpi-r4: Enable I2C controllers
arm64: dts: mediatek: mt7988a-bpi-r4: Add PCA9545 I2C Mux
arm64: dts: mediatek: mt7988a-bpi-r4: Enable t-phy for ssusb1
arm64: dts: mediatek: mt7988a-bpi-r4: Enable ssusb1 on bpi-r4
arm64: dts: mediatek: mt7988a-bpi-r4: Enable pwm
arm64: dts: mediatek: mt7988a-bpi-r4: Enable pcie

  arch/arm64/boot/dts/mediatek/Makefile         |   3 +
  .../mt7988a-bananapi-bpi-r4-emmc.dtso         |  33 ++
  .../mediatek/mt7988a-bananapi-bpi-r4-sd.dtso  |  31 ++
  .../dts/mediatek/mt7988a-bananapi-bpi-r4.dts  | 143 +++++++++
  arch/arm64/boot/dts/mediatek/mt7988a.dtsi     | 303 +++++++++++++++++-
  5 files changed, 506 insertions(+), 7 deletions(-)

create mode 100644 arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-emmc.dtso create mode 100644 arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-sd.dtso

maintainer Applied
#24 lore raw
In reply to Frank Wunderlich
Quoted 8 lines · Frank Wunderlich

From: Frank Wunderlich <[email protected]>

This series adds some missing labels and new nodes to mt7988 DTS.

based on pinctrl-series
https://patchwork.kernel.org/project/linux-mediatek/list/?series=918572

[...]

Applied to v6.13-next/dts64, thanks!

[01/22] arm64: dts: mediatek: mt7988: Add reserved memory

        commit: d789c6aaefe9b23edcddaa736cd167b113171e48
[02/22] arm64: dts: mediatek: mt7988: Add mmc support
        commit: df6cfc7ce2c88943c9593a7034a18c2e16cf7b85
[03/22] arm64: dts: mediatek: mt7988: Add lvts node
        commit: c8368a5d7b990180a2f93a7f17695da23e317da7
[04/22] arm64: dts: mediatek: mt7988: Add thermal-zone
        commit: 38414fa65e38bffe64ed425fe2face87107e18f6
[05/22] arm64: dts: mediatek: mt7988: Add missing clock-div property for i2c
        commit: 4b306c10c902c61a6fedb5b36b6acd7dc7d94c3a
[06/22] arm64: dts: mediatek: mt7988: Add mcu-sys node for cpu
        commit: 6e8485a022deea5d18417af5d37354adeebb14df
[07/22] arm64: dts: mediatek: mt7988: Add CPU OPP table for clock scaling
        commit: bb90f43b8d3bc4214829573dcd001bd8a66aab9b
[08/22] arm64: dts: mediatek: mt7988: Disable usb controllers by default
        commit: 55c8d22c5b117e43be97ddde9b256301e598e6bf
[09/22] arm64: dts: mediatek: mt7988: Add t-phy for ssusb1
        commit: b5443e5080c57b07459873fa4a5287f4b2b2c464
[10/22] arm64: dts: mediatek: mt7988: Add pcie nodes
        commit: 8fa4fc0bb0e6cedec8c1c8e353323f7178b891de
[11/22] arm64: dts: mediatek: mt7988a-bpi-r4: Enable watchdog
        commit: 4242aa5ab0ad83d4379c4f189560a1766251db4b
[12/22] arm64: dts: mediatek: mt7988a-bpi-r4: Add fixed regulators for 1v8 and 3v3
        commit: 82af3f6028e6dbe3437539882b39c643c3c91d7e
[13/22] arm64: dts: mediatek: mt7988a-bpi-r4: Add dt overlays for sd + emmc
        commit: cf9b2081edcd8af513cfd11ccbb4c55b8cb10da5
[14/22] arm64: dts: mediatek: mt7988a-bpi-r4: Add thermal configuration
        commit: e945e2a9a1c507aa8b15e7282ae209c6507cc3ff
[15/22] arm64: dts: mediatek: mt7988a-bpi-r4: Enable serial0 debug uart
        commit: 070c7da3601987fcd9b301e9686d29bb00c80e3c
[16/22] arm64: dts: mediatek: mt7988a-bpi-r4: Add default UART stdout
        commit: c4329c5f5fccb7915db6ba2f38462262a361ee6f
[17/22] arm64: dts: mediatek: mt7988a-bpi-r4: Enable I2C controllers
        commit: 4ad665e1d614b48a5823cf8cd73c13ce1d958d8d
[18/22] arm64: dts: mediatek: mt7988a-bpi-r4: Add PCA9545 I2C Mux
        commit: 78397a31e333e1606d1e2a4720946c76ad8414a6
[19/22] arm64: dts: mediatek: mt7988a-bpi-r4: Enable t-phy for ssusb1
        commit: edfbe5e9809adc3c44869b4462ebb5dab08bf36f
[20/22] arm64: dts: mediatek: mt7988a-bpi-r4: Enable ssusb1 on bpi-r4
        commit: 80acfee3dc29bd5e3ca9a4d7cb645edd6441dee9
[21/22] arm64: dts: mediatek: mt7988a-bpi-r4: Enable pwm
        commit: ef3869173b931d4d400e3793764de99e953e87a3
[22/22] arm64: dts: mediatek: mt7988a-bpi-r4: Enable pcie
        commit: 16a2c22259d80579e1e495ee264d8797fda5b76c

Cheers,
Angelo