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lib/crc: make arch-optimized code use subsys_initcall

PATCH New Eric Biggers 1 participant 1 message May 10, 2025

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Arm (32-bit) x86 PowerPC MIPS +5 more subsystems
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Eric Biggers

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PATCH 1/1 lib/crc: make arch-optimized code use subsys_initcall

From: Eric Biggers <[email protected]>

Make the architecture-optimized CRC code do its CPU feature checks in subsys_initcalls instead of arch_initcalls. This makes it consistent with arch/*/lib/crypto/ and ensures that it runs after initcalls that possibly could be a prerequisite for kernel-mode FPU, such as x86's xfd_update_static_branch() and loongarch's init_euen_mask().

Note: as far as I can tell, x86's xfd_update_static_branch() isn't *actually* needed for kernel-mode FPU. loongarch's init_euen_mask() is needed to enable save/restore of the vector registers, but loongarch doesn't yet have any CRC or crypto code that uses vector registers anyway. Regardless, let's be consistent with arch/*/lib/crypto/ and robust against any potential future dependency on an arch_initcall.

Signed-off-by Eric Biggers <[email protected]>

---

I'm planning to take this through the crc tree.

 arch/arm/lib/crc-t10dif.c            | 2 +-
 arch/arm/lib/crc32.c                 | 2 +-
 arch/arm64/lib/crc-t10dif.c          | 2 +-
 arch/loongarch/lib/crc32-loongarch.c | 2 +-
 arch/mips/lib/crc32-mips.c           | 2 +-
 arch/powerpc/lib/crc-t10dif.c        | 2 +-
 arch/powerpc/lib/crc32.c             | 2 +-
 arch/sparc/lib/crc32.c               | 2 +-
 arch/x86/lib/crc-t10dif.c            | 2 +-
 arch/x86/lib/crc32.c                 | 2 +-
 arch/x86/lib/crc64.c                 | 2 +-
 11 files changed, 11 insertions(+), 11 deletions(-)
arch/arm/lib/crc-t10dif.c +1 -1
index 382437094bddd..1093f8ec13b0b 100644
@@ -58,11 +58,11 @@ static int __init crc_t10dif_arm_init(void)
 		if (elf_hwcap2 & HWCAP2_PMULL)
 			static_branch_enable(&have_pmull);
 	}
 	return 0;
 }
-arch_initcall(crc_t10dif_arm_init);
+subsys_initcall(crc_t10dif_arm_init);
 
 static void __exit crc_t10dif_arm_exit(void)
 {
 }
 module_exit(crc_t10dif_arm_exit);
arch/arm/lib/crc32.c +1 -1
index 7ef7db9c0de73..f2bef8849c7c3 100644
@@ -101,11 +101,11 @@ static int __init crc32_arm_init(void)
 		static_branch_enable(&have_crc32);
 	if (elf_hwcap2 & HWCAP2_PMULL)
 		static_branch_enable(&have_pmull);
 	return 0;
 }
-arch_initcall(crc32_arm_init);
+subsys_initcall(crc32_arm_init);
 
 static void __exit crc32_arm_exit(void)
 {
 }
 module_exit(crc32_arm_exit);
arch/arm64/lib/crc-t10dif.c +1 -1
index 99d0b5668a286..c2ffe4fdb59d1 100644
@@ -59,11 +59,11 @@ static int __init crc_t10dif_arm64_init(void)
 		if (cpu_have_named_feature(PMULL))
 			static_branch_enable(&have_pmull);
 	}
 	return 0;
 }
-arch_initcall(crc_t10dif_arm64_init);
+subsys_initcall(crc_t10dif_arm64_init);
 
 static void __exit crc_t10dif_arm64_exit(void)
 {
 }
 module_exit(crc_t10dif_arm64_exit);
arch/loongarch/lib/crc32-loongarch.c +1 -1
index 8e6d1f517e73c..b37cd8537b459 100644
@@ -112,11 +112,11 @@ static int __init crc32_loongarch_init(void)
 {
 	if (cpu_has_crc32)
 		static_branch_enable(&have_crc32);
 	return 0;
 }
-arch_initcall(crc32_loongarch_init);
+subsys_initcall(crc32_loongarch_init);
 
 static void __exit crc32_loongarch_exit(void)
 {
 }
 module_exit(crc32_loongarch_exit);
arch/mips/lib/crc32-mips.c +1 -1
index 84df361e71813..45e4d2c9fbf54 100644
@@ -161,11 +161,11 @@ static int __init crc32_mips_init(void)
 {
 	if (cpu_have_feature(cpu_feature(MIPS_CRC32)))
 		static_branch_enable(&have_crc32);
 	return 0;
 }
-arch_initcall(crc32_mips_init);
+subsys_initcall(crc32_mips_init);
 
 static void __exit crc32_mips_exit(void)
 {
 }
 module_exit(crc32_mips_exit);
arch/powerpc/lib/crc-t10dif.c +1 -1
index ddd5c4088f508..4253842cc50d3 100644
@@ -69,11 +69,11 @@ static int __init crc_t10dif_powerpc_init(void)
 	if (cpu_has_feature(CPU_FTR_ARCH_207S) &&
 	    (cur_cpu_spec->cpu_user_features2 & PPC_FEATURE2_VEC_CRYPTO))
 		static_branch_enable(&have_vec_crypto);
 	return 0;
 }
-arch_initcall(crc_t10dif_powerpc_init);
+subsys_initcall(crc_t10dif_powerpc_init);
 
 static void __exit crc_t10dif_powerpc_exit(void)
 {
 }
 module_exit(crc_t10dif_powerpc_exit);
arch/powerpc/lib/crc32.c +1 -1
index 42f2dd3c85dde..77e5a37006f00 100644
@@ -70,11 +70,11 @@ static int __init crc32_powerpc_init(void)
 	if (cpu_has_feature(CPU_FTR_ARCH_207S) &&
 	    (cur_cpu_spec->cpu_user_features2 & PPC_FEATURE2_VEC_CRYPTO))
 		static_branch_enable(&have_vec_crypto);
 	return 0;
 }
-arch_initcall(crc32_powerpc_init);
+subsys_initcall(crc32_powerpc_init);
 
 static void __exit crc32_powerpc_exit(void)
 {
 }
 module_exit(crc32_powerpc_exit);
arch/sparc/lib/crc32.c +1 -1
index 428fd5588e936..40d4720a42a1b 100644
@@ -72,11 +72,11 @@ static int __init crc32_sparc_init(void)
 
 	static_branch_enable(&have_crc32c_opcode);
 	pr_info("Using sparc64 crc32c opcode optimized CRC32C implementation\n");
 	return 0;
 }
-arch_initcall(crc32_sparc_init);
+subsys_initcall(crc32_sparc_init);
 
 static void __exit crc32_sparc_exit(void)
 {
 }
 module_exit(crc32_sparc_exit);
arch/x86/lib/crc-t10dif.c +1 -1
index d073b3678edc2..db7ce59c31ace 100644
@@ -27,11 +27,11 @@ static int __init crc_t10dif_x86_init(void)
 		static_branch_enable(&have_pclmulqdq);
 		INIT_CRC_PCLMUL(crc16_msb);
 	}
 	return 0;
 }
-arch_initcall(crc_t10dif_x86_init);
+subsys_initcall(crc_t10dif_x86_init);
 
 static void __exit crc_t10dif_x86_exit(void)
 {
 }
 module_exit(crc_t10dif_x86_exit);
arch/x86/lib/crc32.c +1 -1
index e6a6285cfca87..d09343e2cea93 100644
@@ -86,11 +86,11 @@ static int __init crc32_x86_init(void)
 		static_branch_enable(&have_pclmulqdq);
 		INIT_CRC_PCLMUL(crc32_lsb);
 	}
 	return 0;
 }
-arch_initcall(crc32_x86_init);
+subsys_initcall(crc32_x86_init);
 
 static void __exit crc32_x86_exit(void)
 {
 }
 module_exit(crc32_x86_exit);
arch/x86/lib/crc64.c +1 -1
index 1214ee726c16d..351a09f5813e2 100644
@@ -37,11 +37,11 @@ static int __init crc64_x86_init(void)
 		INIT_CRC_PCLMUL(crc64_msb);
 		INIT_CRC_PCLMUL(crc64_lsb);
 	}
 	return 0;
 }
-arch_initcall(crc64_x86_init);
+subsys_initcall(crc64_x86_init);
 
 static void __exit crc64_x86_exit(void)
 {
 }
 module_exit(crc64_x86_exit);

base-commit: 46e3311607d6c18a760fba4afbd5d24d42abb0f3

Signature · 1 line
2.49.0