dt-bindings: clock: Convert marvell,armada-3700-periph-clock to DT schema
Subsystems (2)
Rob Herring (Arm)
maintainerPATCH v2 1/1 dt-bindings: clock: Convert marvell,armada-3700-periph-clock to DT schema
Convert the Marvell Armada 3700 peripheral clock binding to DT schema format. The north bridge is also a "syscon", so add the compatible to it.
Signed-off-by Rob Herring (Arm) <[email protected]>
---
v2:
- Fix compatible schema (forgot to commit the fix)
--- .../clock/armada3700-periph-clock.txt | 71 -------------- .../marvell,armada-3700-periph-clock.yaml | 96 +++++++++++++++++++ 2 files changed, 96 insertions(+), 71 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/armada3700-periph-clock.txt create mode 100644 Documentation/devicetree/bindings/clock/marvell,armada-3700-periph-clock.yaml
Documentation/devicetree/bindings/clock/armada3700-periph-clock.txt deleted +0 -71
@@ -1,71 +0,0 @@ -* Peripheral Clock bindings for Marvell Armada 37xx SoCs - -Marvell Armada 37xx SoCs provide peripheral clocks which are -used as clock source for the peripheral of the SoC. - -There are two different blocks associated to north bridge and south -bridge. - -The peripheral clock consumer should specify the desired clock by -having the clock ID in its "clocks" phandle cell. - -The following is a list of provided IDs for Armada 3700 North bridge clocks: -ID Clock name Description ------------------------------------ -0 mmc MMC controller -1 sata_host Sata Host -2 sec_at Security AT -3 sac_dap Security DAP -4 tsecm Security Engine -5 setm_tmx Serial Embedded Trace Module -6 avs Adaptive Voltage Scaling -7 sqf SPI -8 pwm PWM -9 i2c_2 I2C 2 -10 i2c_1 I2C 1 -11 ddr_phy DDR PHY -12 ddr_fclk DDR F clock -13 trace Trace -14 counter Counter -15 eip97 EIP 97 -16 cpu CPU - -The following is a list of provided IDs for Armada 3700 South bridge clocks: -ID Clock name Description ------------------------------------ -0 gbe-50 50 MHz parent clock for Gigabit Ethernet -1 gbe-core parent clock for Gigabit Ethernet core -2 gbe-125 125 MHz parent clock for Gigabit Ethernet -3 gbe1-50 50 MHz clock for Gigabit Ethernet port 1 -4 gbe0-50 50 MHz clock for Gigabit Ethernet port 0 -5 gbe1-125 125 MHz clock for Gigabit Ethernet port 1 -6 gbe0-125 125 MHz clock for Gigabit Ethernet port 0 -7 gbe1-core Gigabit Ethernet core port 1 -8 gbe0-core Gigabit Ethernet core port 0 -9 gbe-bm Gigabit Ethernet Buffer Manager -10 sdio SDIO -11 usb32-sub2-sys USB 2 clock -12 usb32-ss-sys USB 3 clock -13 pcie PCIe controller - -Required properties: - -- compatible : shall be "marvell,armada-3700-periph-clock-nb" for the - north bridge block, or - "marvell,armada-3700-periph-clock-sb" for the south bridge block -- reg : must be the register address of North/South Bridge Clock register -- #clock-cells : from common clock binding; shall be set to 1 - -- clocks : list of the parent clock phandle in the following order: - TBG-A P, TBG-B P, TBG-A S, TBG-B S and finally the xtal clock. - - -Example: - -nb_perih_clk: nb-periph-clk@13000{ - compatible = "marvell,armada-3700-periph-clock-nb"; - reg = <0x13000 0x1000>; - clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, - <&tbg 3>, <&xtalclk>; - #clock-cells = <1>; -};
Documentation/devicetree/bindings/clock/marvell,armada-3700-periph-clock.yaml new file +96 -0
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Signature · 1 line
2.47.2
Quoting Rob Herring (Arm) (2025-05-21 14:18:25)
Quoted 6 lines
Convert the Marvell Armada 3700 peripheral clock binding to DT schema format. The north bridge is also a "syscon", so add the compatible to it.
Signed-off-by Rob Herring (Arm) <[email protected]>---
Applied to clk-next