FAILED: patch "[PATCH] ALSA: hda: Add missing NVIDIA HDA codec IDs" failed to apply to 5.4-stable tree
Subsystems (2)
[email protected]
maintainerThe patch below does not apply to the 5.4-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-5.4.y
git checkout FETCH_HEAD
git cherry-pick -x e0a911ac86857a73182edde9e50d9b4b949b7f01
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '2025071244-depraved-handwrite-5db8@gregkh' --subject-prefix 'PATCH 5.4.y' HEAD^..
Possible dependencies:
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From e0a911ac86857a73182edde9e50d9b4b949b7f01 Mon Sep 17 00:00:00 2001
From: Daniel Dadap <[email protected]>
Date: Thu, 26 Jun 2025 16:16:30 -0500
Subject: [PATCH] ALSA: hda: Add missing NVIDIA HDA codec IDs
Add codec IDs for several NVIDIA products with HDA controllers to the snd_hda_id_hdmi[] patch table.
sound/pci/hda/patch_hdmi.c +19 -0
@@ -4551,7 +4551,9 @@ HDA_CODEC_ENTRY(0x10de002e, "Tegra186 HDMI/DP1", patch_tegra_hdmi),HDA_CODEC_ENTRY (0x10de002f ,"Tegra194 HDMI/DP2" , patch_tegra_hdmi),HDA_CODEC_ENTRY (0x10de0030 ,"Tegra194 HDMI/DP3" , patch_tegra_hdmi),HDA_CODEC_ENTRY (0x10de0031 ,"Tegra234 HDMI/DP" , patch_tegra234_hdmi), +HDA_CODEC_ENTRY (0x10de0033 ,"SoC 33 HDMI/DP" , patch_tegra234_hdmi),HDA_CODEC_ENTRY (0x10de0034 ,"Tegra264 HDMI/DP" , patch_tegra234_hdmi), +HDA_CODEC_ENTRY (0x10de0035 ,"SoC 35 HDMI/DP" , patch_tegra234_hdmi),HDA_CODEC_ENTRY (0x10de0040 ,"GPU 40 HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de0041 ,"GPU 41 HDMI/DP" , patch_nvhdmi), HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP", patch_nvhdmi),
@@ -4590,15 +4592,32 @@ HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP", patch_nvhdmi),HDA_CODEC_ENTRY (0x10de0098 ,"GPU 98 HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de0099 ,"GPU 99 HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de009a ,"GPU 9a HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de009b ,"GPU 9b HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de009c ,"GPU 9c HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de009d ,"GPU 9d HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de009e ,"GPU 9e HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de009f ,"GPU 9f HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de00a0 ,"GPU a0 HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00a1 ,"GPU a1 HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de00a3 ,"GPU a3 HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de00a4 ,"GPU a4 HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de00a5 ,"GPU a5 HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de00a6 ,"GPU a6 HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de00a7 ,"GPU a7 HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00a8 ,"GPU a8 HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00a9 ,"GPU a9 HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00aa ,"GPU aa HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00ab ,"GPU ab HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00ad ,"GPU ad HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00ae ,"GPU ae HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00af ,"GPU af HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00b0 ,"GPU b0 HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00b1 ,"GPU b1 HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00c0 ,"GPU c0 HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00c1 ,"GPU c1 HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00c3 ,"GPU c3 HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00c4 ,"GPU c4 HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00c5 ,"GPU c5 HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de8001 ,"MCP73 HDMI" , patch_nvhdmi_2ch),HDA_CODEC_ENTRY (0x10de8067 ,"MCP67/68 HDMI" , patch_nvhdmi_2ch), HDA_CODEC_ENTRY(0x67663d82, "Arise 82 HDMI/DP", patch_gf_hdmi),
Sasha Levin
maintainerPATCH 1/1 ALSA: hda: Add missing NVIDIA HDA codec IDs
From: Daniel Dadap <[email protected]>
[ Upstream commit e0a911ac86857a73182edde9e50d9b4b949b7f01 ]
Add codec IDs for several NVIDIA products with HDA controllers to the snd_hda_id_hdmi[] patch table.
--- sound/pci/hda/patch_hdmi.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)
sound/pci/hda/patch_hdmi.c +19 -0
@@ -4161,6 +4161,8 @@ HDA_CODEC_ENTRY(0x10de002d, "Tegra186 HDMI/DP0", patch_tegra_hdmi),HDA_CODEC_ENTRY (0x10de002e ,"Tegra186 HDMI/DP1" , patch_tegra_hdmi),HDA_CODEC_ENTRY (0x10de002f ,"Tegra194 HDMI/DP2" , patch_tegra_hdmi),HDA_CODEC_ENTRY (0x10de0030 ,"Tegra194 HDMI/DP3" , patch_tegra_hdmi), +HDA_CODEC_ENTRY (0x10de0033 ,"SoC 33 HDMI/DP" , patch_tegra_hdmi), +HDA_CODEC_ENTRY (0x10de0035 ,"SoC 35 HDMI/DP" , patch_tegra_hdmi),HDA_CODEC_ENTRY (0x10de0040 ,"GPU 40 HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de0041 ,"GPU 41 HDMI/DP" , patch_nvhdmi), HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP", patch_nvhdmi),
@@ -4199,15 +4201,32 @@ HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP", patch_nvhdmi),HDA_CODEC_ENTRY (0x10de0098 ,"GPU 98 HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de0099 ,"GPU 99 HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de009a ,"GPU 9a HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de009b ,"GPU 9b HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de009c ,"GPU 9c HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de009d ,"GPU 9d HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de009e ,"GPU 9e HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de009f ,"GPU 9f HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de00a0 ,"GPU a0 HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00a1 ,"GPU a1 HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de00a3 ,"GPU a3 HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de00a4 ,"GPU a4 HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de00a5 ,"GPU a5 HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de00a6 ,"GPU a6 HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de00a7 ,"GPU a7 HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00a8 ,"GPU a8 HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00a9 ,"GPU a9 HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00aa ,"GPU aa HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00ab ,"GPU ab HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00ad ,"GPU ad HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00ae ,"GPU ae HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00af ,"GPU af HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00b0 ,"GPU b0 HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00b1 ,"GPU b1 HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00c0 ,"GPU c0 HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00c1 ,"GPU c1 HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00c3 ,"GPU c3 HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00c4 ,"GPU c4 HDMI/DP" , patch_nvhdmi), +HDA_CODEC_ENTRY (0x10de00c5 ,"GPU c5 HDMI/DP" , patch_nvhdmi),HDA_CODEC_ENTRY (0x10de8001 ,"MCP73 HDMI" , patch_nvhdmi_2ch),HDA_CODEC_ENTRY (0x10de8067 ,"MCP67/68 HDMI" , patch_nvhdmi_2ch), HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP", patch_via_hdmi),
Signature · 1 line
2.39.5