KVM: SVM: Set synthesized TSA CPUID flags
PATCH 1/1 KVM: SVM: Set synthesized TSA CPUID flags
From: "Borislav Petkov (AMD)" <[email protected]>
VERW_CLEAR is supposed to be set only by the hypervisor to denote TSA mitigation support to a guest. SQ_NO and L1_NO are both synthesizable, and are going to be set by hw CPUID on future machines.
So keep the kvm_cpu_cap_init_kvm_defined() invocation *and* set them when synthesized.
This fix is stable-only.
Co-developed-by Jinpu Wang <[email protected]>
Signed-off-by Jinpu Wang <[email protected]>
Signed-off-by Borislav Petkov (AMD) <[email protected]>
--- arch/x86/kvm/cpuid.c | 4 ++++ 1 file changed, 4 insertions(+)
arch/x86/kvm/cpuid.c +4 -0
@@ -822,6 +822,7 @@ void kvm_set_cpu_caps(void)kvm_cpu_cap_check_and_set (X86_FEATURE_SBPB );kvm_cpu_cap_check_and_set (X86_FEATURE_IBPB_BRTYPE );kvm_cpu_cap_check_and_set (X86_FEATURE_SRSO_NO ); +kvm_cpu_cap_check_and_set (X86_FEATURE_VERW_CLEAR );kvm_cpu_cap_init_kvm_defined (CPUID_8000_0022_EAX , F(PERFMON_V2)
@@ -831,6 +832,9 @@ void kvm_set_cpu_caps(void)F (TSA_SQ_NO ) |F (TSA_L1_NO ) ); +kvm_cpu_cap_check_and_set (X86_FEATURE_TSA_SQ_NO ); +kvm_cpu_cap_check_and_set (X86_FEATURE_TSA_L1_NO ); +/* * Synthesize "LFENCE is serializing" into the AMD-defined entry in * KVM's supported CPUID if the feature is reported as supported by the
Signature · 1 line
2.43.0