dt-bindings: gpio: Add Tegra256 support
Subsystems (3)
PATCH 1/2 dt-bindings: gpio: Add Tegra256 support
Extend the existing Tegra186 GPIO controller device tree bindings with support for the GPIO controller found on Tegra256. The number of pins is slightly different, but the programming model remains the same
--- .../bindings/gpio/nvidia,tegra186-gpio.yaml | 2 ++ include/dt-bindings/gpio/tegra256-gpio.h | 28 +++++++++++++++++++ 2 files changed, 30 insertions(+) create mode 100644 include/dt-bindings/gpio/tegra256-gpio.h
Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml +2 -0
@@ -85,6 +85,7 @@ properties: - nvidia,tegra194-gpio-aon - nvidia,tegra234-gpio - nvidia,tegra234-gpio-aon + - nvidia,tegra256-gpio reg-names: items:
@@ -155,6 +156,7 @@ allOf: - nvidia,tegra186-gpio - nvidia,tegra194-gpio - nvidia,tegra234-gpio + - nvidia,tegra256-gpio then: properties: interrupts:
include/dt-bindings/gpio/tegra256-gpio.h new file +28 -0
@@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. */ + +/* +** This header provides constants for binding nvidia,tegra256-gpio*. +** +** The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below +** provide names for this. +** +** The second cell contains standard flag values specified in gpio.h. +**/ + +#ifndef _DT_BINDINGS_GPIO_TEGRA256_GPIO_H +#define _DT_BINDINGS_GPIO_TEGRA256_GPIO_H + +#include <dt-bindings/gpio/gpio.h> + +/* GPIOs implemented by main GPIO controller */ +#define TEGRA256_MAIN_GPIO_PORT_A 0 +#define TEGRA256_MAIN_GPIO_PORT_B 1 +#define TEGRA256_MAIN_GPIO_PORT_C 2 +#define TEGRA256_MAIN_GPIO_PORT_D 3 + +#define TEGRA256_MAIN_GPIO (port, offset) \ + ((TEGRA256_MAIN_GPIO_PORT_##port * 8) + (offset)) + +#endif +
Signature · 1 line
2.17.1
PATCH 2/2 gpio: tegra186: Add support for Tegra256
Extend the existing Tegra186 GPIO controller driver with support for the GPIO controller found on Tegra256. While the programming model remains the same, the number of pins has slightly changed.
--- drivers/gpio/gpio-tegra186.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)
drivers/gpio/gpio-tegra186.c +28 -0
@@ -20,6 +20,7 @@#include <dt-bindings/gpio/tegra194-gpio.h> #include <dt-bindings/gpio/tegra234-gpio.h> #include <dt-bindings/gpio/tegra241-gpio.h> +#include <dt-bindings/gpio/tegra256-gpio.h> /* security registers */ #define TEGRA186_GPIO_CTL_SCR 0x0c
@@ -1274,6 +1275,30 @@ static const struct tegra_gpio_soc tegra241_aon_soc = { .has_vm_support = false, }; +#define TEGRA256_MAIN_GPIO_PORT (_name, _bank, _port, _pins) \ + [TEGRA256_MAIN_GPIO_PORT_##_name] = { \ + .name = #_name, \ + .bank = _bank, \ + .port = _port, \ + .pins = _pins, \ + } + +static const struct tegra_gpio_port tegra256_main_ports[] = { +TEGRA256_MAIN_GPIO_PORT (A ,0 ,0 ,8 ), +TEGRA256_MAIN_GPIO_PORT (B ,0 ,1 ,8 ), +TEGRA256_MAIN_GPIO_PORT (C ,0 ,2 ,8 ), +TEGRA256_MAIN_GPIO_PORT (D ,0 ,3 ,8 ), +}; + +static const struct tegra_gpio_soc tegra256_main_soc = { + .num_ports =ARRAY_SIZE (tegra256_main_ports), + .ports = tegra256_main_ports, + .name ="tegra256-gpio-main" , + .instance =1 , + .num_irqs_per_bank =8 , + .has_vm_support = true, +}; +static const struct of_device_id tegra186_gpio_of_match[] = { { .compatible ="nvidia,tegra186-gpio" ,
@@ -1293,6 +1318,9 @@ static const struct of_device_id tegra186_gpio_of_match[] = { }, { .compatible = "nvidia,tegra234-gpio-aon", .data = &tegra234_aon_soc + }, { + .compatible = "nvidia,tegra256-gpio", + .data = &tegra256_main_soc }, {/* sentinel */ }
Signature · 1 line
2.17.1
Quoted 9 lines · Prathamesh Shete
then:
properties:
interrupts:include/dt-bindings/gpio/tegra256-gpio.h new file +0
-0
include/dt-bindings/gpio/tegra256-gpio.h line 5
Quoted 5 lines
include/dt-bindings/gpio/tegra256-gpio.h new file +5
-0@@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. */ + +/* +** This header provides constants for binding nvidia,tegra256-gpio*.
Use Linux style comments. See Coding style.
Quoted 10 lines
include/dt-bindings/gpio/tegra256-gpio.h new file +10
-0+** +** The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below +** provide names for this. +** +** The second cell contains standard flag values specified in gpio.h. +**/ + +#ifndef _DT_BINDINGS_GPIO_TEGRA256_GPIO_H +#define _DT_BINDINGS_GPIO_TEGRA256_GPIO_H +
include/dt-bindings/gpio/tegra256-gpio.h line 25
Quoted 10 lines
include/dt-bindings/gpio/tegra256-gpio.h new file +10
-0+#include <dt-bindings/gpio/gpio.h> + +/* GPIOs implemented by main GPIO controller */ +#define TEGRA256_MAIN_GPIO_PORT_A 0 +#define TEGRA256_MAIN_GPIO_PORT_B 1 +#define TEGRA256_MAIN_GPIO_PORT_C 2 +#define TEGRA256_MAIN_GPIO_PORT_D 3 + +#define TEGRA256_MAIN_GPIO (port, offset) \ + ((TEGRA256_MAIN_GPIO_PORT_##port * 8) + (offset))
I don't see this macro being used in the drivers. I guess you need it for embedding hardware constant (so not really bindings)? You have entire commit msg to explain that...
Best regards,
Krzysztof
include/dt-bindings/gpio/tegra256-gpio.h line 1
Quoted 7 lines · Prathamesh Shete
include/dt-bindings/gpio/tegra256-gpio.h new file +1
-0@@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0 */
Please run scripts/checkpatch.pl on the patches and fix reported warnings. After that, run also 'scripts/checkpatch.pl --strict' on the patches and (probably) fix more warnings. Some warnings can be ignored, especially from --strict run, but the code here looks like it needs a fix. Feel free to get in touch if the warning is not clear.
Best regards,
Krzysztof