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dt-bindings: mailbox: Convert rockchip,rk3368-mailbox to DT schema

PATCH Applied Rob Herring (Arm) 1 participant 2 messages Aug 12, 2025 – Sep 10, 2025

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Rob Herring (Arm)

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#0 lore raw

PATCH 1/1 dt-bindings: mailbox: Convert rockchip,rk3368-mailbox to DT schema

Convert the rockchip,rk3368-mailbox binding to DT schema format. Add the missing 'clocks' and 'clock-names' properties. Document that it's one interrupt per mailbox channel (and there are 4 channels).

---
 .../mailbox/rockchip,rk3368-mailbox.yaml      | 56 +++++++++++++++++++
 .../bindings/mailbox/rockchip-mailbox.txt     | 32 -----------
 2 files changed, 56 insertions(+), 32 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/mailbox/rockchip,rk3368-mailbox.yaml
 delete mode 100644 Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
Documentation/devicetree/bindings/mailbox/rockchip,rk3368-mailbox.yaml new file +56 -0
new file mode 100644
index 000000000000..107bc96a8f3d
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mailbox/rockchip,rk3368-mailbox.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip RK3368 Mailbox Controller
+
+maintainers:
+  - Heiko Stuebner <[email protected]>
+
+description:
+  The Rockchip mailbox is used by the Rockchip CPU cores to communicate
+  requests to MCU processor.
+
+properties:
+  compatible:
+    const: rockchip,rk3368-mailbox
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    const: pclk_mailbox
+
+  interrupts:
+    description: One interrupt for each channel
+    maxItems: 4
+
+  '#mbox-cells':
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - '#mbox-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    mailbox@ff6b0000 {
+        compatible = "rockchip,rk3368-mailbox";
+        reg = <0xff6b0000 0x1000>;
+        interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+        #mbox-cells = <1>;
+    };
Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt deleted +0 -32
deleted file mode 100644
index b6bb84acf5be..000000000000
@@ -1,32 +0,0 @@
-Rockchip mailbox
-
-The Rockchip mailbox is used by the Rockchip CPU cores to communicate
-requests to MCU processor.
-
-Refer to ./mailbox.txt for generic information about mailbox device-tree
-bindings.
-
-Required properties:
-
- - compatible: should be one of the following.
-   - "rockchip,rk3368-mbox" for rk3368
- - reg: physical base address of the controller and length of memory mapped
-	region.
- - interrupts: The interrupt number to the cpu. The interrupt specifier format
-	depends on the interrupt controller.
- - #mbox-cells: Common mailbox binding property to identify the number
-	of cells required for the mailbox specifier. Should be 1
-
-Example:
---------
-
-/* RK3368 */
-mbox: mbox@ff6b0000 {
-	compatible = "rockchip,rk3368-mailbox";
-	reg = <0x0 0xff6b0000 0x0 0x1000>,
-	interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
-		     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
-		     <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
-		     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
-	#mbox-cells = <1>;
-};
Signature · 1 line
2.47.2
author maintainer Applied
#1 lore raw
Quoted 4 lines · Rob Herring (Arm)

Convert the rockchip,rk3368-mailbox binding to DT schema format. Add the missing 'clocks' and 'clock-names' properties. Document that it's one interrupt per mailbox channel (and there are 4 channels).

Quoted 8 lines
---
 .../mailbox/rockchip,rk3368-mailbox.yaml      | 56 +++++++++++++++++++
 .../bindings/mailbox/rockchip-mailbox.txt     | 32 -----------
 2 files changed, 56 insertions(+), 32 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/mailbox/rockchip,rk3368-mailbox.yaml
 delete mode 100644 Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt

Applied, thanks!