FAILED: patch "[PATCH] mmc: sdhci-pci-gli: Add a new function to simplify the code" failed to apply to 5.15-stable tree
Subsystems (3)
[email protected]
maintainerThe patch below does not apply to the 5.15-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-5.15.y
git checkout FETCH_HEAD
git cherry-pick -x dec8b38be4b35cae5f7fa086daf2631e2cfa09c1
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '2025082238-ember-profusely-366a@gregkh' --subject-prefix 'PATCH 5.15.y' HEAD^..
Possible dependencies:
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From dec8b38be4b35cae5f7fa086daf2631e2cfa09c1 Mon Sep 17 00:00:00 2001
From: Victor Shih <[email protected]>
Date: Thu, 31 Jul 2025 14:57:50 +0800
Subject: [PATCH] mmc: sdhci-pci-gli: Add a new function to simplify the code
In preparation to fix replay timer timeout, add sdhci_gli_mask_replay_timer_timeout() function to simplify some of the code, allowing it to be re-used.
drivers/mmc/host/sdhci-pci-gli.c +16 -14
@@ -287,6 +287,20 @@#define GLI_MAX_TUNING_LOOP 40/* Genesys Logic chipset */ +static void sdhci_gli_mask_replay_timer_timeout (struct pci_dev *pdev) +{ +int aer; +u32 value; + +/* mask the replay timer timeout of AER */ + aer =pci_find_ext_capability (pdev,PCI_EXT_CAP_ID_ERR ); +if (aer) { +pci_read_config_dword (pdev, aer +PCI_ERR_COR_MASK , &value); + value |=PCI_ERR_COR_REP_TIMER ; +pci_write_config_dword (pdev, aer +PCI_ERR_COR_MASK , value); + } +} +static inline void gl9750_wt_on (struct sdhci_host *host) {u32 wt_value;
@@ -607,7 +621,6 @@ static void gl9750_hw_setting(struct sdhci_host *host) {struct sdhci_pci_slot *slot =sdhci_priv (host);struct pci_dev *pdev; -int aer;u32 value; pdev = slot->chip->pdev;
@@ -626,12 +639,7 @@ static void gl9750_hw_setting(struct sdhci_host *host)pci_set_power_state (pdev,PCI_D0 );/* mask the replay timer timeout of AER */ - aer =pci_find_ext_capability (pdev,PCI_EXT_CAP_ID_ERR ); -if (aer) { -pci_read_config_dword (pdev, aer +PCI_ERR_COR_MASK , &value); - value |=PCI_ERR_COR_REP_TIMER ; -pci_write_config_dword (pdev, aer +PCI_ERR_COR_MASK , value); - } +sdhci_gli_mask_replay_timer_timeout (pdev);gl9750_wt_off (host); }
@@ -806,7 +814,6 @@ static void sdhci_gl9755_set_clock(struct sdhci_host *host, unsigned int clock)static void gl9755_hw_setting (struct sdhci_pci_slot *slot) {struct pci_dev *pdev = slot->chip->pdev; -int aer;u32 value;gl9755_wt_on (pdev);
@@ -841,12 +848,7 @@ static void gl9755_hw_setting(struct sdhci_pci_slot *slot)pci_set_power_state (pdev,PCI_D0 );/* mask the replay timer timeout of AER */ - aer =pci_find_ext_capability (pdev,PCI_EXT_CAP_ID_ERR ); -if (aer) { -pci_read_config_dword (pdev, aer +PCI_ERR_COR_MASK , &value); - value |=PCI_ERR_COR_REP_TIMER ; -pci_write_config_dword (pdev, aer +PCI_ERR_COR_MASK , value); - } +sdhci_gli_mask_replay_timer_timeout (pdev);gl9755_wt_off (pdev); }