Update Arrow Lake telemetry GUID
Subsystems (2)
Xi Pardee
maintainercover Update Arrow Lake telemetry GUID
This patch series updates the Arrow Lake DMU telemetry GUID and enhances the infrastructure for managing lpm_req_guid. Additionally, it includes two patches that improve the intel_pmc_core driver.
The first three patches update the Arrow Lake DMU telemetry GUID and add support for multiple possible GUIDs. The fourth patch standardizes the naming convention for PMC variable indices. The fifth patch enhances lpm_req_guid management. The final patch removes an unnecessary variable.
Xi Pardee (6):
platform/x86:intel/pmc: Update Arrow Lake telemetry GUID platform/x86:intel/pmc: Add support for multiple DMU GUIDs platform/x86:intel/pmc: Add DMU GUID to Arrow Lake U/H platform/x86:intel/pmc: Rename PMC index variable to pmc_idx platform/x86:intel/pmc: Relocate lpm_req_guid to pmc_reg_map platform/x86:intel/pmc: Remove redundant has_die_c6 variable
drivers/platform/x86/intel/pmc/arl.c | 12 +-- drivers/platform/x86/intel/pmc/core.c | 150 +++++++++++++------------- drivers/platform/x86/intel/pmc/core.h | 14 +-- drivers/platform/x86/intel/pmc/lnl.c | 2 +- drivers/platform/x86/intel/pmc/mtl.c | 9 +- drivers/platform/x86/intel/pmc/ptl.c | 3 +- 6 files changed, 97 insertions(+), 93 deletions(-)
Signature · 1 line
2.43.0
Xi Pardee
maintainerPATCH 1/6 platform/x86:intel/pmc: Update Arrow Lake telemetry GUID
Update ARL_PMT_DMU_GUID value. Arrow Lake PMT DMU GUID has been updated after it was released. This updates ensures that the die C6 value is available in the debug filesystem.
Bugzilla Link: https://bugzilla.kernel.org/show_bug.cgi?id=220421
--- drivers/platform/x86/intel/pmc/core.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/platform/x86/intel/pmc/core.h +1 -1
@@ -282,7 +282,7 @@ enum ppfear_regs {/* Die C6 from PUNIT telemetry */ #define MTL_PMT_DMU_DIE_C6_OFFSET 15#define MTL_PMT_DMU_GUID 0x1A067102 -#define ARL_PMT_DMU_GUID 0x1A06A000 +#define ARL_PMT_DMU_GUID 0x1A06A102#define LNL_PMC_MMIO_REG_LEN 0x2708#define LNL_PMC_LTR_OSSE 0x1B88
Signature · 1 line
2.43.0
Xi Pardee
maintainerPATCH 2/6 platform/x86:intel/pmc: Add support for multiple DMU GUIDs
In reply to Xi PardeeEnable support for multiple DMU GUIDs to accommodate Arrow Lake H/U platforms. Arrow Lake U/H may have several GUIDs pointing to a single telemetry region providing die C6 value Add support to search for available GUIDs.
--- drivers/platform/x86/intel/pmc/arl.c | 6 ++++-- drivers/platform/x86/intel/pmc/core.c | 23 +++++++++++++++++++---- drivers/platform/x86/intel/pmc/core.h | 6 +++--- drivers/platform/x86/intel/pmc/mtl.c | 3 ++- 4 files changed, 28 insertions(+), 10 deletions(-)
drivers/platform/x86/intel/pmc/arl.c +4 -2
@@ -720,9 +720,10 @@ static int arl_h_core_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_return generic_core_init (pmcdev, pmc_dev_info); } +static u32 ARL_PMT_DMU_GUIDS [] = {ARL_PMT_DMU_GUID ,0x0 };struct pmc_dev_info arl_pmc_dev = { .pci_func =0 , - .dmu_guid =ARL_PMT_DMU_GUID , + .dmu_guids =ARL_PMT_DMU_GUIDS , .regmap_list = arl_pmc_info_list, .map = &arl_socs_reg_map, .sub_req_show = &pmc_core_substate_req_regs_fops,
@@ -732,9 +733,10 @@ struct pmc_dev_info arl_pmc_dev = { .sub_req = pmc_core_pmt_get_lpm_req, }; +static u32 ARL_H_PMT_DMU_GUIDS [] = {ARL_PMT_DMU_GUID ,0x0 };struct pmc_dev_info arl_h_pmc_dev = { .pci_func =2 , - .dmu_guid =ARL_PMT_DMU_GUID , + .dmu_guids =ARL_H_PMT_DMU_GUIDS , .regmap_list = arl_pmc_info_list, .map = &mtl_socm_reg_map, .sub_req_show = &pmc_core_substate_req_regs_fops,
drivers/platform/x86/intel/pmc/core.c +19 -4
@@ -1281,7 +1281,22 @@ int get_primary_reg_base(struct pmc *pmc)return 0 ; } -void pmc_core_punit_pmt_init (struct pmc_dev *pmcdev,u32 guid) +static struct telem_endpoint *pmc_core_register_endpoint (struct pci_dev *pcidev,u32 *guids) +{ +struct telem_endpoint *ep; +unsigned int i; + +for (i =0 ; guids[i]; i++) { + ep =pmt_telem_find_and_register_endpoint (pcidev, guids[i],0 ); + +if (IS_ERR (ep)) +continue ; +return ep; + } +return ERR_PTR (-ENODEV ); +} + +void pmc_core_punit_pmt_init (struct pmc_dev *pmcdev,u32 *guids) {struct telem_endpoint *ep;struct pci_dev *pcidev;
@@ -1292,7 +1307,7 @@ void pmc_core_punit_pmt_init(struct pmc_dev *pmcdev, u32 guid)return ; } - ep =pmt_telem_find_and_register_endpoint (pcidev, guid,0 ); + ep =pmc_core_register_endpoint (pcidev, guids);pci_dev_put (pcidev);if (IS_ERR (ep)) { dev_err(&pmcdev->pdev->dev,
@@ -1689,8 +1704,8 @@ int generic_core_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_info) }pmc_core_get_low_power_modes (pmcdev); -if (pmc_dev_info->dmu_guid) -pmc_core_punit_pmt_init (pmcdev, pmc_dev_info->dmu_guid); +if (pmc_dev_info->dmu_guids) +pmc_core_punit_pmt_init (pmcdev, pmc_dev_info->dmu_guids);if (ssram) { ret =pmc_core_get_telem_info (pmcdev, pmc_dev_info);
drivers/platform/x86/intel/pmc/core.h +3 -3
@@ -481,7 +481,7 @@ enum pmc_index {/** * struct pmc_dev_info - Structure to keep PMC device info * @pci_func: Function number of the primary PMC -* @dmu_guid: Die Management Unit GUID +* @dmu_guids: List of Die Management Unit GUID * @regmap_list: Pointer to a list of pmc_info structure that could be * available for the platform. When set, this field implies * SSRAM support.
@@ -495,7 +495,7 @@ enum pmc_index {*/ struct pmc_dev_info {u8 pci_func; -u32 dmu_guid; +u32 *dmu_guids;struct pmc_info *regmap_list;const struct pmc_reg_map *map;const struct file_operations *sub_req_show;
@@ -532,7 +532,7 @@ int pmc_core_send_ltr_ignore(struct pmc_dev *pmcdev, u32 value, int ignore);int pmc_core_resume_common (struct pmc_dev *pmcdev);int get_primary_reg_base (struct pmc *pmc);void pmc_core_get_low_power_modes (struct pmc_dev *pmcdev); -void pmc_core_punit_pmt_init (struct pmc_dev *pmcdev,u32 guid); +void pmc_core_punit_pmt_init (struct pmc_dev *pmcdev,u32 *guids);void pmc_core_set_device_d3 (unsigned int device);int generic_core_init (struct pmc_dev *pmcdev,struct pmc_dev_info *pmc_dev_info);
drivers/platform/x86/intel/pmc/mtl.c +2 -1
@@ -992,9 +992,10 @@ static int mtl_core_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_inreturn generic_core_init (pmcdev, pmc_dev_info); } +static u32 MTL_PMT_DMU_GUIDS [] = {MTL_PMT_DMU_GUID ,0x0 };struct pmc_dev_info mtl_pmc_dev = { .pci_func =2 , - .dmu_guid =MTL_PMT_DMU_GUID , + .dmu_guids =MTL_PMT_DMU_GUIDS , .regmap_list = mtl_pmc_info_list, .map = &mtl_socm_reg_map, .sub_req_show = &pmc_core_substate_req_regs_fops,
Signature · 1 line
2.43.0
Xi Pardee
maintainerPATCH 3/6 platform/x86:intel/pmc: Add DMU GUID to Arrow Lake U/H
In reply to Xi PardeeArrow Lake U/H platforms may have multiple GUIDs pointing to the same telemetry region. Add the second possible GUID to the GUID list to support the Arrow Lake U/H platforms with this GUID.
--- drivers/platform/x86/intel/pmc/arl.c | 2 +- drivers/platform/x86/intel/pmc/core.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-)
drivers/platform/x86/intel/pmc/arl.c +1 -1
@@ -733,7 +733,7 @@ struct pmc_dev_info arl_pmc_dev = { .sub_req = pmc_core_pmt_get_lpm_req, }; -static u32 ARL_H_PMT_DMU_GUIDS [] = {ARL_PMT_DMU_GUID ,0x0 }; +static u32 ARL_H_PMT_DMU_GUIDS [] = {ARL_PMT_DMU_GUID ,ARL_H_PMT_DMU_GUID ,0x0 };struct pmc_dev_info arl_h_pmc_dev = { .pci_func =2 , .dmu_guids =ARL_H_PMT_DMU_GUIDS ,
drivers/platform/x86/intel/pmc/core.h +1 -0
@@ -283,6 +283,7 @@ enum ppfear_regs {#define MTL_PMT_DMU_DIE_C6_OFFSET 15#define MTL_PMT_DMU_GUID 0x1A067102#define ARL_PMT_DMU_GUID 0x1A06A102 +#define ARL_H_PMT_DMU_GUID 0x1A06A101#define LNL_PMC_MMIO_REG_LEN 0x2708#define LNL_PMC_LTR_OSSE 0x1B88
Signature · 1 line
2.43.0
Xi Pardee
maintainerPATCH 4/6 platform/x86:intel/pmc: Rename PMC index variable to pmc_idx
In reply to Xi PardeeRename all PMC index variables to pmc_idx in core.c. This improves code readability and consistency.
--- drivers/platform/x86/intel/pmc/core.c | 108 +++++++++++++------------- 1 file changed, 54 insertions(+), 54 deletions(-)
drivers/platform/x86/intel/pmc/core.c +54 -54
@@ -311,20 +311,20 @@ static inline u8 pmc_core_reg_read_byte(struct pmc *pmc, int offset) }static void pmc_core_display_map (struct seq_file *s,int index,int idx,int ip, -int pmc_index,u8 pf_reg,const struct pmc_bit_map **pf_map) +int pmc_idx,u8 pf_reg,const struct pmc_bit_map **pf_map) {seq_printf (s,"PMC%d:PCH IP: %-2d - %-32s\tState: %s\n" , - pmc_index, ip, pf_map[idx][index].name, + pmc_idx, ip, pf_map[idx][index].name, pf_map[idx][index].bit_mask & pf_reg ?"Off" :"On" ); }static int pmc_core_ppfear_show (struct seq_file *s,void *unused) {struct pmc_dev *pmcdev = s->private; -unsigned int i; +unsigned int pmc_idx; -for (i =0 ; i <ARRAY_SIZE (pmcdev->pmcs); ++i) { -struct pmc *pmc = pmcdev->pmcs[i]; +for (pmc_idx =0 ; pmc_idx <ARRAY_SIZE (pmcdev->pmcs); ++pmc_idx) { +struct pmc *pmc = pmcdev->pmcs[pmc_idx];const struct pmc_bit_map **maps;u8 pf_regs[PPFEAR_MAX_NUM_ENTRIES ];unsigned int index, iter, idx, ip =0 ;
@@ -342,7 +342,7 @@ static int pmc_core_ppfear_show(struct seq_file *s, void *unused)for (idx =0 ; maps[idx]; idx++) {for (index =0 ; maps[idx][index].name && index < pmc->map->ppfear_buckets *8 ; ip++, index++) -pmc_core_display_map (s, index, idx, ip, i, +pmc_core_display_map (s, index, idx, ip, pmc_idx, pf_regs[index /8 ], maps); } }
@@ -471,7 +471,7 @@ int pmc_core_send_ltr_ignore(struct pmc_dev *pmcdev, u32 value, int ignore)struct pmc *pmc;const struct pmc_reg_map *map;u32 reg; -unsigned int pmc_index; +unsigned int pmc_idx;int ltr_index; ltr_index = value;
@@ -479,8 +479,8 @@ int pmc_core_send_ltr_ignore(struct pmc_dev *pmcdev, u32 value, int ignore)* is based on the contiguous indexes from ltr_show output. * pmc index and ltr index needs to be calculated from it. */ -for (pmc_index =0 ; pmc_index <ARRAY_SIZE (pmcdev->pmcs) && ltr_index >=0 ; pmc_index++) { - pmc = pmcdev->pmcs[pmc_index]; +for (pmc_idx =0 ; pmc_idx <ARRAY_SIZE (pmcdev->pmcs) && ltr_index >=0 ; pmc_idx++) { + pmc = pmcdev->pmcs[pmc_idx];if (!pmc)continue ;
@@ -497,10 +497,10 @@ int pmc_core_send_ltr_ignore(struct pmc_dev *pmcdev, u32 value, int ignore) ltr_index = ltr_index - (map->ltr_ignore_max +2 ) -1 ; } -if (pmc_index >=ARRAY_SIZE (pmcdev->pmcs) || ltr_index <0 ) +if (pmc_idx >=ARRAY_SIZE (pmcdev->pmcs) || ltr_index <0 )return -EINVAL ; -pr_debug ("ltr_ignore for pmc%d: ltr_index:%d\n" , pmc_index, ltr_index); +pr_debug ("ltr_ignore for pmc%d: ltr_index:%d\n" , pmc_idx, ltr_index);guard (mutex)(&pmcdev->lock);
@@ -635,14 +635,14 @@ static int pmc_core_ltr_show(struct seq_file *s, void *unused)u64 decoded_snoop_ltr, decoded_non_snoop_ltr, val;u32 ltr_raw_data, scale;u16 snoop_ltr, nonsnoop_ltr; -unsigned int i, index, ltr_index =0 ; +unsigned int pmc_idx, index, ltr_index =0 ; -for (i =0 ; i <ARRAY_SIZE (pmcdev->pmcs); ++i) { +for (pmc_idx =0 ; pmc_idx <ARRAY_SIZE (pmcdev->pmcs); ++pmc_idx) {struct pmc *pmc;const struct pmc_bit_map *map;u32 ltr_ign_reg; - pmc = pmcdev->pmcs[i]; + pmc = pmcdev->pmcs[pmc_idx];if (!pmc)continue ;
@@ -676,7 +676,7 @@ static int pmc_core_ltr_show(struct seq_file *s, void *unused) }seq_printf (s,"%d\tPMC%d:%-32s\tLTR: RAW: 0x%-16x\tNon-Snoop(ns): %-16llu\tSnoop(ns): %-16llu\tLTR_IGNORE: %d\n" , - ltr_index, i, map[index].name, ltr_raw_data, + ltr_index, pmc_idx, map[index].name, ltr_raw_data, decoded_non_snoop_ltr, decoded_snoop_ltr, ltr_ign_data); ltr_index++;
@@ -689,15 +689,15 @@ DEFINE_SHOW_ATTRIBUTE(pmc_core_ltr);static int pmc_core_s0ix_blocker_show (struct seq_file *s,void *unused) {struct pmc_dev *pmcdev = s->private; -unsigned int pmcidx; +unsigned int pmc_idx; -for (pmcidx =0 ; pmcidx <ARRAY_SIZE (pmcdev->pmcs); pmcidx++) { +for (pmc_idx =0 ; pmc_idx <ARRAY_SIZE (pmcdev->pmcs); pmc_idx++) {const struct pmc_bit_map **maps;unsigned int arr_size, r_idx;u32 offset, counter;struct pmc *pmc; - pmc = pmcdev->pmcs[pmcidx]; + pmc = pmcdev->pmcs[pmc_idx];if (!pmc)continue ; maps = pmc->map->s0ix_blocker_maps;
@@ -711,7 +711,7 @@ static int pmc_core_s0ix_blocker_show(struct seq_file *s, void *unused)if (!map->blk)continue ; counter =pmc_core_reg_read (pmc, offset); -seq_printf (s,"PMC%d:%-30s %-30d\n" , pmcidx, +seq_printf (s,"PMC%d:%-30s %-30d\n" , pmc_idx, map->name, counter); offset += map->blk *S0IX_BLK_SIZE ; }
@@ -723,13 +723,13 @@ DEFINE_SHOW_ATTRIBUTE(pmc_core_s0ix_blocker);static void pmc_core_ltr_ignore_all (struct pmc_dev *pmcdev) { -unsigned int i; +unsigned int pmc_idx; -for (i =0 ; i <ARRAY_SIZE (pmcdev->pmcs); i++) { +for (pmc_idx =0 ; pmc_idx <ARRAY_SIZE (pmcdev->pmcs); pmc_idx++) {struct pmc *pmc;u32 ltr_ign; - pmc = pmcdev->pmcs[i]; + pmc = pmcdev->pmcs[pmc_idx];if (!pmc)continue ;
@@ -750,12 +750,12 @@ static void pmc_core_ltr_ignore_all(struct pmc_dev *pmcdev)static void pmc_core_ltr_restore_all (struct pmc_dev *pmcdev) { -unsigned int i; +unsigned int pmc_idx; -for (i =0 ; i <ARRAY_SIZE (pmcdev->pmcs); i++) { +for (pmc_idx =0 ; pmc_idx <ARRAY_SIZE (pmcdev->pmcs); pmc_idx++) {struct pmc *pmc; - pmc = pmcdev->pmcs[i]; + pmc = pmcdev->pmcs[pmc_idx];if (!pmc)continue ;
@@ -794,10 +794,10 @@ DEFINE_SHOW_ATTRIBUTE(pmc_core_substate_res);static int pmc_core_substate_sts_regs_show (struct seq_file *s,void *unused) {struct pmc_dev *pmcdev = s->private; -unsigned int i; +unsigned int pmc_idx; -for (i =0 ; i <ARRAY_SIZE (pmcdev->pmcs); ++i) { -struct pmc *pmc = pmcdev->pmcs[i]; +for (pmc_idx =0 ; pmc_idx <ARRAY_SIZE (pmcdev->pmcs); ++pmc_idx) { +struct pmc *pmc = pmcdev->pmcs[pmc_idx];const struct pmc_bit_map **maps;u32 offset;
@@ -805,7 +805,7 @@ static int pmc_core_substate_sts_regs_show(struct seq_file *s, void *unused)continue ; maps = pmc->map->lpm_sts; offset = pmc->map->lpm_status_offset; -pmc_core_lpm_display (pmc,NULL , s, offset, i,"STATUS" , maps); +pmc_core_lpm_display (pmc,NULL , s, offset, pmc_idx,"STATUS" , maps); }return 0 ;
@@ -815,10 +815,10 @@ DEFINE_SHOW_ATTRIBUTE(pmc_core_substate_sts_regs);static int pmc_core_substate_l_sts_regs_show (struct seq_file *s,void *unused) {struct pmc_dev *pmcdev = s->private; -unsigned int i; +unsigned int pmc_idx; -for (i =0 ; i <ARRAY_SIZE (pmcdev->pmcs); ++i) { -struct pmc *pmc = pmcdev->pmcs[i]; +for (pmc_idx =0 ; pmc_idx <ARRAY_SIZE (pmcdev->pmcs); ++pmc_idx) { +struct pmc *pmc = pmcdev->pmcs[pmc_idx];const struct pmc_bit_map **maps;u32 offset;
@@ -826,7 +826,7 @@ static int pmc_core_substate_l_sts_regs_show(struct seq_file *s, void *unused)continue ; maps = pmc->map->lpm_sts; offset = pmc->map->lpm_live_status_offset; -pmc_core_lpm_display (pmc,NULL , s, offset, i,"LIVE_STATUS" , maps); +pmc_core_lpm_display (pmc,NULL , s, offset, pmc_idx,"LIVE_STATUS" , maps); }return 0 ;
@@ -919,11 +919,11 @@ static int pmc_core_substate_req_regs_show(struct seq_file *s, void *unused)u32 sts_offset;u32 sts_offset_live;u32 *lpm_req_regs; -unsigned int mp, pmc_index; +unsigned int mp, pmc_idx;int num_maps; -for (pmc_index =0 ; pmc_index <ARRAY_SIZE (pmcdev->pmcs); ++pmc_index) { -struct pmc *pmc = pmcdev->pmcs[pmc_index]; +for (pmc_idx =0 ; pmc_idx <ARRAY_SIZE (pmcdev->pmcs); ++pmc_idx) { +struct pmc *pmc = pmcdev->pmcs[pmc_idx];const struct pmc_bit_map **maps;if (!pmc)
@@ -944,7 +944,7 @@ static int pmc_core_substate_req_regs_show(struct seq_file *s, void *unused)continue ;/* Display the header */ -pmc_core_substate_req_header_show (s, pmc_index,HEADER_STATUS ); +pmc_core_substate_req_header_show (s, pmc_idx,HEADER_STATUS );/* Loop over maps */ for (mp =0 ; mp < num_maps; mp++) {
@@ -982,7 +982,7 @@ static int pmc_core_substate_req_regs_show(struct seq_file *s, void *unused) }/* Display the element name in the first column */ -seq_printf (s,"pmc%d: %34s |" , pmc_index, map[i].name); +seq_printf (s,"pmc%d: %34s |" , pmc_idx, map[i].name);/* Loop over the enabled states and display if required */ pmc_for_each_mode (mode, pmcdev) {
@@ -1568,7 +1568,7 @@ static int pmc_core_get_telem_info(struct pmc_dev *pmcdev, struct pmc_dev_info * { struct pci_dev *pcidev __free(pci_dev_put) = NULL;struct telem_endpoint *ep; -unsigned int i; +unsigned int pmc_idx;u32 guid;int ret;
@@ -1576,10 +1576,10 @@ static int pmc_core_get_telem_info(struct pmc_dev *pmcdev, struct pmc_dev_info *if (!pcidev)return -ENODEV ; -for (i =0 ; i <ARRAY_SIZE (pmcdev->pmcs); ++i) { +for (pmc_idx =0 ; pmc_idx <ARRAY_SIZE (pmcdev->pmcs); ++pmc_idx) {struct pmc *pmc; - pmc = pmcdev->pmcs[i]; + pmc = pmcdev->pmcs[pmc_idx];if (!pmc)continue ;
@@ -1611,7 +1611,7 @@ static const struct pmc_reg_map *pmc_core_find_regmap(struct pmc_info *list, u16return NULL ; } -static int pmc_core_pmc_add (struct pmc_dev *pmcdev,unsigned int pmc_index) +static int pmc_core_pmc_add (struct pmc_dev *pmcdev,unsigned int pmc_idx) {struct pmc_ssram_telemetry pmc_ssram_telemetry;
@@ -1619,7 +1619,7 @@ static int pmc_core_pmc_add(struct pmc_dev *pmcdev, unsigned int pmc_index)struct pmc *pmc;int ret; - ret =pmc_ssram_telemetry_get_pmc_info (pmc_index, &pmc_ssram_telemetry); + ret =pmc_ssram_telemetry_get_pmc_info (pmc_idx, &pmc_ssram_telemetry);if (ret)return ret;
@@ -1627,7 +1627,7 @@ static int pmc_core_pmc_add(struct pmc_dev *pmcdev, unsigned int pmc_index)if (!map)return -ENODEV ; - pmc = pmcdev->pmcs[pmc_index]; + pmc = pmcdev->pmcs[pmc_idx];/* Memory for primary PMC has been allocated */ if (!pmc) { pmc =devm_kzalloc (&pmcdev->pdev->dev,sizeof (*pmc),GFP_KERNEL );
@@ -1644,7 +1644,7 @@ static int pmc_core_pmc_add(struct pmc_dev *pmcdev, unsigned int pmc_index)return -ENOMEM ; } - pmcdev->pmcs[pmc_index] = pmc; + pmcdev->pmcs[pmc_idx] = pmc;return 0 ; }
@@ -1716,8 +1716,8 @@ int generic_core_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_info)return 0 ; unmap_regbase: -for (unsigned int i =0 ; i <ARRAY_SIZE (pmcdev->pmcs); ++i) { -struct pmc *pmc = pmcdev->pmcs[i]; +for (unsigned int pmc_idx =0 ; pmc_idx <ARRAY_SIZE (pmcdev->pmcs); ++pmc_idx) { +struct pmc *pmc = pmcdev->pmcs[pmc_idx];if (pmc && pmc->regbase)iounmap (pmc->regbase);
@@ -1810,10 +1810,10 @@ static void pmc_core_do_dmi_quirks(struct pmc *pmc)static void pmc_core_clean_structure (struct platform_device *pdev) {struct pmc_dev *pmcdev =platform_get_drvdata (pdev); -unsigned int i; +unsigned int pmc_idx; -for (i =0 ; i <ARRAY_SIZE (pmcdev->pmcs); ++i) { -struct pmc *pmc = pmcdev->pmcs[i]; +for (pmc_idx =0 ; pmc_idx <ARRAY_SIZE (pmcdev->pmcs); ++pmc_idx) { +struct pmc *pmc = pmcdev->pmcs[pmc_idx];if (pmc && pmc->regbase)iounmap (pmc->regbase);
@@ -1973,7 +1973,7 @@ int pmc_core_resume_common(struct pmc_dev *pmcdev)struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN ];const struct pmc_bit_map **maps = pmc->map->lpm_sts;int offset = pmc->map->lpm_status_offset; -unsigned int i; +unsigned int pmc_idx, i;/* Check if the syspend used S0ix */ if (pm_suspend_via_firmware ())
@@ -2011,13 +2011,13 @@ int pmc_core_resume_common(struct pmc_dev *pmcdev)if (pmc->map->slps0_dbg_maps)pmc_core_slps0_display (pmc, dev,NULL ); -for (i =0 ; i <ARRAY_SIZE (pmcdev->pmcs); ++i) { -struct pmc *pmc = pmcdev->pmcs[i]; +for (pmc_idx =0 ; pmc_idx <ARRAY_SIZE (pmcdev->pmcs); ++pmc_idx) { +struct pmc *pmc = pmcdev->pmcs[pmc_idx];if (!pmc)continue ;if (pmc->map->lpm_sts) -pmc_core_lpm_display (pmc, dev,NULL , offset, i,"STATUS" , maps); +pmc_core_lpm_display (pmc, dev,NULL , offset, pmc_idx,"STATUS" , maps); }return 0 ;
Signature · 1 line
2.43.0
Xi Pardee
maintainerPATCH 5/6 platform/x86:intel/pmc: Relocate lpm_req_guid to pmc_reg_map
In reply to Xi PardeeRelocate the lpm_req_guid field from pmc_info to pmc_reg_map. The previous implementation stored lpm_req_guid in pmc_info and relied on pmc_core_find_guid() to retrieve the correct GUID, which was unnecessary. Since lpm_req_guid is specific to PMC, pmc_reg_map is a more appropriate location for this information.
--- drivers/platform/x86/intel/pmc/arl.c | 6 ++---- drivers/platform/x86/intel/pmc/core.c | 15 ++------------- drivers/platform/x86/intel/pmc/core.h | 4 +++- drivers/platform/x86/intel/pmc/lnl.c | 2 +- drivers/platform/x86/intel/pmc/mtl.c | 6 +++--- drivers/platform/x86/intel/pmc/ptl.c | 3 +-- 6 files changed, 12 insertions(+), 24 deletions(-)
drivers/platform/x86/intel/pmc/arl.c +2 -4
@@ -281,6 +281,7 @@ static const struct pmc_reg_map arl_socs_reg_map = { .etr3_offset = ETR3_OFFSET, .pson_residency_offset = TGL_PSON_RESIDENCY_OFFSET, .pson_residency_counter_step = TGL_PSON_RES_COUNTER_STEP, + .lpm_req_guid = SOCS_LPM_REQ_GUID, };static const struct pmc_bit_map arl_pchs_ltr_show_map[] = {
@@ -648,26 +649,23 @@ static const struct pmc_reg_map arl_pchs_reg_map = { .lpm_num_maps = ADL_LPM_NUM_MAPS, .lpm_reg_index = ARL_LPM_REG_INDEX, .etr3_offset = ETR3_OFFSET, + .lpm_req_guid = PCHS_LPM_REQ_GUID, };static struct pmc_info arl_pmc_info_list[] = { { - .guid =IOEP_LPM_REQ_GUID , .devid =PMC_DEVID_ARL_IOEP , .map = &mtl_ioep_reg_map, }, { - .guid =SOCS_LPM_REQ_GUID , .devid =PMC_DEVID_ARL_SOCS , .map = &arl_socs_reg_map, }, { - .guid =PCHS_LPM_REQ_GUID , .devid =PMC_DEVID_ARL_PCHS , .map = &arl_pchs_reg_map, }, { - .guid =SOCM_LPM_REQ_GUID , .devid =PMC_DEVID_ARL_SOCM , .map = &mtl_socm_reg_map, },
drivers/platform/x86/intel/pmc/core.c +2 -13
@@ -1445,15 +1445,6 @@ static void pmc_core_dbgfs_register(struct pmc_dev *pmcdev, struct pmc_dev_info } } -static u32 pmc_core_find_guid (struct pmc_info *list,const struct pmc_reg_map *map) -{ -for (; list->map; ++list) -if (list->map == map) -return list->guid; - -return 0 ; -} -/* * This function retrieves low power mode requirement data from PMC Low * Power Mode (LPM) table.
@@ -1569,7 +1560,6 @@ static int pmc_core_get_telem_info(struct pmc_dev *pmcdev, struct pmc_dev_info * struct pci_dev *pcidev __free(pci_dev_put) = NULL;struct telem_endpoint *ep;unsigned int pmc_idx; -u32 guid;int ret; pcidev =pci_get_domain_bus_and_slot (0 ,0 ,PCI_DEVFN (20 , pmc_dev_info->pci_func));
@@ -1583,11 +1573,10 @@ static int pmc_core_get_telem_info(struct pmc_dev *pmcdev, struct pmc_dev_info *if (!pmc)continue ; - guid =pmc_core_find_guid (pmcdev->regmap_list, pmc->map); -if (!guid) +if (!pmc->map->lpm_req_guid)return -ENXIO ; - ep =pmt_telem_find_and_register_endpoint (pcidev, guid,0 ); + ep =pmt_telem_find_and_register_endpoint (pcidev, pmc->map->lpm_req_guid,0 );if (IS_ERR (ep)) {dev_dbg (&pmcdev->pdev->dev,"couldn't get telem endpoint %pe" , ep);return -EPROBE_DEFER ;
drivers/platform/x86/intel/pmc/core.h +3 -1
@@ -356,6 +356,7 @@ struct pmc_bit_map {* @s0ix_blocker_offset PWRMBASE offset to S0ix blocker counter * @num_s0ix_blocker: Number of S0ix blockers * @blocker_req_offset: Telemetry offset to S0ix blocker low power mode substate requirement table +* @lpm_req_guid: Telemetry GUID to read low power mode substate requirement table * * Each PCH has unique set of register offsets and bit indexes. This structure * captures them to have a common implementation.
@@ -397,6 +398,8 @@ struct pmc_reg_map {const u8 *lpm_reg_index;const u32 pson_residency_offset;const u32 pson_residency_counter_step; +/* GUID for telemetry regions */ +const u32 lpm_req_guid; };/**
@@ -406,7 +409,6 @@ struct pmc_reg_map {* specific attributes */ struct pmc_info { -u32 guid;u16 devid;const struct pmc_reg_map *map; };
drivers/platform/x86/intel/pmc/lnl.c +1 -1
@@ -533,11 +533,11 @@ static const struct pmc_reg_map lnl_socm_reg_map = { .s0ix_blocker_maps = lnl_blk_maps, .s0ix_blocker_offset = LNL_S0IX_BLOCKER_OFFSET, .lpm_reg_index = LNL_LPM_REG_INDEX, + .lpm_req_guid = SOCM_LPM_REQ_GUID, };static struct pmc_info lnl_pmc_info_list[] = { { - .guid =SOCM_LPM_REQ_GUID , .devid =PMC_DEVID_LNL_SOCM , .map = &lnl_socm_reg_map, },
drivers/platform/x86/intel/pmc/mtl.c +3 -3
@@ -473,6 +473,7 @@ const struct pmc_reg_map mtl_socm_reg_map = { .lpm_status_offset = MTL_LPM_STATUS_OFFSET, .lpm_live_status_offset = MTL_LPM_LIVE_STATUS_OFFSET, .lpm_reg_index = MTL_LPM_REG_INDEX, + .lpm_req_guid = SOCP_LPM_REQ_GUID, };static const struct pmc_bit_map mtl_ioep_pfear_map[] = {
@@ -797,6 +798,7 @@ const struct pmc_reg_map mtl_ioep_reg_map = { .lpm_en_offset = MTL_LPM_EN_OFFSET, .lpm_sts_latch_en_offset = MTL_LPM_STATUS_LATCH_EN_OFFSET, .lpm_reg_index = MTL_LPM_REG_INDEX, + .lpm_req_guid = IOEP_LPM_REQ_GUID, };static const struct pmc_bit_map mtl_ioem_pfear_map[] = {
@@ -944,21 +946,19 @@ static const struct pmc_reg_map mtl_ioem_reg_map = { .lpm_res_counter_step_x2 = TGL_PMC_LPM_RES_COUNTER_STEP_X2, .lpm_residency_offset = MTL_LPM_RESIDENCY_OFFSET, .lpm_reg_index = MTL_LPM_REG_INDEX, + .lpm_req_guid = IOEM_LPM_REQ_GUID, };static struct pmc_info mtl_pmc_info_list[] = { { - .guid =SOCP_LPM_REQ_GUID , .devid =PMC_DEVID_MTL_SOCM , .map = &mtl_socm_reg_map, }, { - .guid =IOEP_LPM_REQ_GUID , .devid =PMC_DEVID_MTL_IOEP , .map = &mtl_ioep_reg_map, }, { - .guid =IOEM_LPM_REQ_GUID , .devid =PMC_DEVID_MTL_IOEM , .map = &mtl_ioem_reg_map },
drivers/platform/x86/intel/pmc/ptl.c +1 -2
@@ -528,16 +528,15 @@ static const struct pmc_reg_map ptl_pcdp_reg_map = { .s0ix_blocker_offset = LNL_S0IX_BLOCKER_OFFSET, .num_s0ix_blocker = PTL_NUM_S0IX_BLOCKER, .blocker_req_offset = PTL_BLK_REQ_OFFSET, + .lpm_req_guid = PCDP_LPM_REQ_GUID, };static struct pmc_info ptl_pmc_info_list[] = { { - .guid =PCDP_LPM_REQ_GUID , .devid =PMC_DEVID_PTL_PCDH , .map = &ptl_pcdp_reg_map, }, { - .guid =PCDP_LPM_REQ_GUID , .devid =PMC_DEVID_PTL_PCDP , .map = &ptl_pcdp_reg_map, },
Signature · 1 line
2.43.0
Xi Pardee
maintainerPATCH 6/6 platform/x86:intel/pmc: Remove redundant has_die_c6 variable
In reply to Xi PardeeRemove has_die_c6 variable from the pmc_dev struct. This variable is unnecessary as the availability of die C6 could be inferred by the punit_ep variable.
--- drivers/platform/x86/intel/pmc/core.c | 4 +--- drivers/platform/x86/intel/pmc/core.h | 1 - 2 files changed, 1 insertion(+), 4 deletions(-)
drivers/platform/x86/intel/pmc/core.c +1 -3
@@ -1317,8 +1317,6 @@ void pmc_core_punit_pmt_init(struct pmc_dev *pmcdev, u32 *guids) } pmcdev->punit_ep = ep; - - pmcdev->has_die_c6 = true; pmcdev->die_c6_offset =MTL_PMT_DMU_DIE_C6_OFFSET ; }
@@ -1438,7 +1436,7 @@ static void pmc_core_dbgfs_register(struct pmc_dev *pmcdev, struct pmc_dev_info pmcdev->dbgfs_dir, primary_pmc, &pmc_core_pson_residency); } -if (pmcdev->has_die_c6) { +if (pmcdev->punit_ep) {debugfs_create_file ("die_c6_us_show" ,0444 , pmcdev->dbgfs_dir, pmcdev, &pmc_core_die_c6_us_fops);
drivers/platform/x86/intel/pmc/core.h +0 -1
@@ -468,7 +468,6 @@ struct pmc_dev {u64 *pkgc_res_cnt;u8 num_of_pkgc; -bool has_die_c6;u32 die_c6_offset;struct telem_endpoint *punit_ep;struct pmc_info *regmap_list;
Signature · 1 line
2.43.0
Ilpo Järvinen
maintainerQuoted 10 lines · Xi Pardee
This patch series updates the Arrow Lake DMU telemetry GUID and enhances the infrastructure for managing
lpm_req_guid. Additionally, it includes two patches that improve theintel_pmc_coredriver.The first three patches update the Arrow Lake DMU telemetry GUID and add support for multiple possible GUIDs. The fourth patch standardizes the naming convention for PMC variable indices. The fifth patch enhances
lpm_req_guidmanagement. The final patch removes an unnecessary variable.[...]
Thank you for your contribution, it has been applied to my local review-ilpo-next branch. Note it will show up in the public platform-drivers-x86/review-ilpo-next branch only once I've pushed my local branch there, which might take a while.
The list of commits applied:
[1/6] platform/x86:intel/pmc: Update Arrow Lake telemetry GUID
commit: 644ab3bc98ee386f178d5209ae8170b3fac591aa
[2/6] platform/x86:intel/pmc: Add support for multiple DMU GUIDs
commit: 3b603955f2423cf668ebd5ba670019a5b4960cc5
[3/6] platform/x86:intel/pmc: Add DMU GUID to Arrow Lake U/H
commit: a32f7d76e3cd7c4170db44d109661d657cfa5e21
[4/6] platform/x86:intel/pmc: Rename PMC index variable to pmc_idx
commit: 7848154c3a11fb3ffbffd150f2185f97b5a6595a
[5/6] platform/x86:intel/pmc: Relocate lpm_req_guid to pmc_reg_map
commit: c2bc11f1f204ef916ec96e45cf329e42873b37d6
[6/6] platform/x86:intel/pmc: Remove redundant has_die_c6 variable
commit: 1c72d9c3e0c61468de878d906a65d4cc845718fb--
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