x86/microcode/AMD: Add more known models to entry sign checking
Subsystems (2)
PATCH 1/1 x86/microcode/AMD: Add more known models to entry sign checking
Two Zen5 systems are missing from need_sha_check.
Signed-off-by Mario Limonciello (AMD) <[email protected]>
--- arch/x86/kernel/cpu/microcode/amd.c | 2 ++ 1 file changed, 2 insertions(+)
arch/x86/kernel/cpu/microcode/amd.c +2 -0
@@ -220,10 +220,12 @@ static bool need_sha_check(u32 cur_rev)case 0xaa001 :return cur_rev <=0xaa00116 ;break ;case 0xaa002 :return cur_rev <=0xaa00218 ;break ;case 0xb0021 :return cur_rev <=0xb002146 ;break ; +case 0xb0081 :return cur_rev <=0xb008111 ;break ;case 0xb1010 :return cur_rev <=0xb101046 ;break ;case 0xb2040 :return cur_rev <=0xb204031 ;break ;case 0xb4040 :return cur_rev <=0xb404031 ;break ;case 0xb6000 :return cur_rev <=0xb600031 ;break ; +case 0xb6080 :return cur_rev <=0xb608031 ;break ;case 0xb7000 :return cur_rev <=0xb700031 ;break ;default :break ; }
Signature · 1 line
2.43.0
The following commit has been merged into the x86/urgent branch of tip:
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: d23550efc6800841b4d1639784afaebdea946ae0 Gitweb: https://git.kernel.org/tip/d23550efc6800841b4d1639784afaebdea946ae0 Author: Mario Limonciello (AMD) <[email protected]> AuthorDate: Thu, 06 Nov 2025 12:28:54 -06:00 Committer: Borislav Petkov (AMD) <[email protected]> CommitterDate: Fri, 07 Nov 2025 12:12:21 +01:00
x86/microcode/AMD: Add more known models to entry sign checking
Two Zen5 systems are missing from need_sha_check(). Add them.
Fixes 50cef76d5cb0 ("x86/microcode/AMD: Load only SHA256-checksummed patches")
Signed-off-by Mario Limonciello (AMD) <[email protected]>
Signed-off-by Borislav Petkov (AMD) <[email protected]>
Cc <[email protected]>
--- arch/x86/kernel/cpu/microcode/amd.c | 2 ++ 1 file changed, 2 insertions(+)
arch/x86/kernel/cpu/microcode/amd.c +2 -0
@@ -220,10 +220,12 @@ static bool need_sha_check(u32 cur_rev)case 0xaa001 :return cur_rev <=0xaa00116 ;break ;case 0xaa002 :return cur_rev <=0xaa00218 ;break ;case 0xb0021 :return cur_rev <=0xb002146 ;break ; +case 0xb0081 :return cur_rev <=0xb008111 ;break ;case 0xb1010 :return cur_rev <=0xb101046 ;break ;case 0xb2040 :return cur_rev <=0xb204031 ;break ;case 0xb4040 :return cur_rev <=0xb404031 ;break ;case 0xb6000 :return cur_rev <=0xb600031 ;break ; +case 0xb6080 :return cur_rev <=0xb608031 ;break ;case 0xb7000 :return cur_rev <=0xb700031 ;break ;default :break ; }