drivers/irqchip/irq-gic-v5-its.c:854:13: sparse: sparse: restricted __le64 degrades to integer
kernel test robot
build botHi Lorenzo,
First bad commit (maybe != root cause):
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: a859eca0e4cc96f63ff125dbe5388d961558b0e9 commit: 53bb952a625fd3247647c7a28366ce990a579415 arm64: Kconfig: Enable GICv5 date: 5 months ago config: arm64-randconfig-r113-20251213 (https://download.01.org/0day-ci/archive/20251213/[email protected]/config) compiler: aarch64-linux-gcc (GCC) 12.5.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251213/[email protected]/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]>
| Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/
sparse warnings: (new ones prefixed by >>)
drivers/irqchip/irq-gic-v5-its.c:854:13: sparse: sparse: cast to restricted __le64
>> drivers/irqchip/irq-gic-v5-its.c:854:13: sparse: sparse: restricted __le64 degrades to integer >> drivers/irqchip/irq-gic-v5-its.c:854:13: sparse: sparse: restricted __le64 degrades to integer
vim +854 drivers/irqchip/irq-gic-v5-its.c
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 845
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 846 static int gicv5_its_map_event(struct gicv5_its_dev *its_dev, u16 event_id, u32 lpi)
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 847 {
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 848 struct gicv5_its_chip_data *its = its_dev->its_node;
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 849 u64 itt_entry;
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 850 __le64 *itte;
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 851
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 852 itte = gicv5_its_device_get_itte_ref(its_dev, event_id);
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 853
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 @854 if (FIELD_GET(GICV5_ITTL2E_VALID, *itte))
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 855 return -EEXIST;
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 856
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 857 itt_entry = FIELD_PREP(GICV5_ITTL2E_LPI_ID, lpi) |
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 858 FIELD_PREP(GICV5_ITTL2E_VALID, 0x1);
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 859
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 860 its_write_table_entry(its, itte, itt_entry);
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 861
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 862 gicv5_its_itt_cache_inv(its, its_dev->device_id, event_id);
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 863
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 864 return 0;
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 865 }
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 866 :::::: The code at line 854 was first introduced by commit
:::::: 57d72196dfc8502b7e376ecdffb11c4f8766f26d irqchip/gic-v5: Add GICv5 ITS support
:::::: TO: Lorenzo Pieralisi <[email protected]> :::::: CC: Marc Zyngier <[email protected]>
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Quoted 33 lines · kernel test robot
Hi Lorenzo,
First bad commit (maybe != root cause):
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: a859eca0e4cc96f63ff125dbe5388d961558b0e9 commit: 53bb952a625fd3247647c7a28366ce990a579415 arm64: Kconfig: Enable GICv5 date: 5 months ago config: arm64-randconfig-r113-20251213 (https://download.01.org/0day-ci/archive/20251213/[email protected]/config) compiler: aarch64-linux-gcc (GCC) 12.5.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251213/[email protected]/reproduce)If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]>
| Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/sparse warnings: (new ones prefixed by >>)
drivers/irqchip/irq-gic-v5-its.c:854:13: sparse: sparse: cast to restricted__le64Quoted 2 lines
Quoted 2 lines
drivers/irqchip/irq-gic-v5-its.c:854:13: sparse: sparse: restricted__le64degrades to integerdrivers/irqchip/irq-gic-v5-its.c:854:13: sparse: sparse: restricted__le64degrades to integervim +854
drivers/irqchip/irq-gic-v5-its.c57d72196dfc850 Lorenzo Pieralisi 2025-07-03 845 57d72196dfc850 Lorenzo Pieralisi 2025-07-03 846 static int gicv5_its_map_event(struct gicv5_its_dev *its_dev, u16 event_id, u32 lpi) 57d72196dfc850 Lorenzo Pieralisi 2025-07-03 847 { 57d72196dfc850 Lorenzo Pieralisi 2025-07-03 848 struct gicv5_its_chip_data *its = its_dev->its_node; 57d72196dfc850 Lorenzo Pieralisi 2025-07-03 849 u64 itt_entry; 57d72196dfc850 Lorenzo Pieralisi 2025-07-03 850 __le64 *itte; 57d72196dfc850 Lorenzo Pieralisi 2025-07-03 851 57d72196dfc850 Lorenzo Pieralisi 2025-07-03 852 itte = gicv5_its_device_get_itte_ref(its_dev, event_id); 57d72196dfc850 Lorenzo Pieralisi 2025-07-03 853
Quoted 2 lines
57d72196dfc850Lorenzo Pieralisi 2025-07-03 @854 if (FIELD_GET(GICV5_ITTL2E_VALID, *itte))57d72196dfc850Lorenzo Pieralisi 2025-07-03 855 return-EEXIST;
Yep, that missed an le64_to_cpu() on the *itte value, fixed, will post the fix shortly.
Thanks,
Lorenzo
Quoted 21 lines
57d72196dfc850 Lorenzo Pieralisi 2025-07-03 856 57d72196dfc850 Lorenzo Pieralisi 2025-07-03 857 itt_entry = FIELD_PREP(GICV5_ITTL2E_LPI_ID, lpi) | 57d72196dfc850 Lorenzo Pieralisi 2025-07-03 858 FIELD_PREP(GICV5_ITTL2E_VALID, 0x1); 57d72196dfc850 Lorenzo Pieralisi 2025-07-03 859 57d72196dfc850 Lorenzo Pieralisi 2025-07-03 860 its_write_table_entry(its, itte, itt_entry); 57d72196dfc850 Lorenzo Pieralisi 2025-07-03 861 57d72196dfc850 Lorenzo Pieralisi 2025-07-03 862 gicv5_its_itt_cache_inv(its, its_dev->device_id, event_id); 57d72196dfc850 Lorenzo Pieralisi 2025-07-03 863 57d72196dfc850 Lorenzo Pieralisi 2025-07-03 864 return 0; 57d72196dfc850 Lorenzo Pieralisi 2025-07-03 865 } 57d72196dfc850 Lorenzo Pieralisi 2025-07-03 866:::::: The code at line 854 was first introduced by commit
::::::57d72196dfc8502b7e376ecdffb11c4f8766f26dirqchip/gic-v5: Add GICv5 ITS support:::::: TO: Lorenzo Pieralisi <[email protected]> :::::: CC: Marc Zyngier <[email protected]>
Signature · 2 lines
0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki