Add MT7987 Thermal support
Subsystems (3)
v2 cover Add MT7987 Thermal support
From: Frank Wunderlich <[email protected]>
This series adds Thermal support for MT7987.
v2:
- dropped non-irq patches
- dropped patch for golden_temp
- moved mt7987 COEFF above mt7988
Frank Wunderlich (2):
dt-bindings: thermal: mediatek: Add LVTS thermal controller definition
for MT7987
thermal/drivers/mediatek/lvts_thermal: Add mt7987 support
.../thermal/mediatek,lvts-thermal.yaml | 1 + drivers/thermal/mediatek/lvts_thermal.c | 36 +++++++++++++++++++ .../thermal/mediatek,lvts-thermal.h | 3 ++ 3 files changed, 40 insertions(+)
Signature · 1 line
2.43.0
PATCH v2 1/2 dt-bindings: thermal: mediatek: Add LVTS thermal controller definition for MT7987
From: Frank Wunderlich <[email protected]>
Add thermal controller definition for MT7987.
--- .../devicetree/bindings/thermal/mediatek,lvts-thermal.yaml | 1 + include/dt-bindings/thermal/mediatek,lvts-thermal.h | 3 +++ 2 files changed, 4 insertions(+)
Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml +1 -0
@@ -18,6 +18,7 @@ description: | properties: compatible: enum: + - mediatek,mt7987-lvts-ap - mediatek,mt7988-lvts-ap - mediatek,mt8186-lvts - mediatek,mt8188-lvts-ap
include/dt-bindings/thermal/mediatek,lvts-thermal.h +3 -0
@@ -7,6 +7,9 @@#ifndef __MEDIATEK_LVTS_DT_H#define __MEDIATEK_LVTS_DT_H +#define MT7987_CPU 0 +#define MT7987_ETH2P5G 1 +#define MT7988_CPU_0 0#define MT7988_CPU_1 1#define MT7988_ETH2P5G_0 2
Signature · 1 line
2.43.0
Re: [PATCH v2 1/2] dt-bindings: thermal: mediatek: Add LVTS thermal controller definition for MT7987
Hi,
just a friendly reminder for this series
regards Frank
Am 23.12.25 um 18:56 schrieb Frank Wunderlich:
Quoted 37 lines
From: Frank Wunderlich <[email protected]>
Add thermal controller definition for MT7987.
Signed-off-by Frank Wunderlich <[email protected]>--- .../devicetree/bindings/thermal/mediatek,lvts-thermal.yaml | 1 + include/dt-bindings/thermal/mediatek,lvts-thermal.h | 3 +++ 2 files changed, 4 insertions(+)Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml +1
-0@@ -18,6 +18,7 @@ description: | properties: compatible: enum: + - mediatek,mt7987-lvts-ap - mediatek,mt7988-lvts-ap - mediatek,mt8186-lvts - mediatek,mt8188-lvts-apinclude/dt-bindings/thermal/mediatek,lvts-thermal.h +3
-0@@ -7,6 +7,9 @@#ifndef __MEDIATEK_LVTS_DT_H#define __MEDIATEK_LVTS_DT_H +#define MT7987_CPU 0 +#define MT7987_ETH2P5G 1 +#define MT7988_CPU_0 0#define MT7988_CPU_1 1#define MT7988_ETH2P5G_0 2
PATCH v2 2/2 thermal/drivers/mediatek/lvts_thermal: Add mt7987 support
In reply to Frank WunderlichFrom: Frank Wunderlich <[email protected]>
Add support for MT7987.
---
v2:
- drop irq-enable member
- move mt7987 above mt7988
--- drivers/thermal/mediatek/lvts_thermal.c | 36 +++++++++++++++++++++++++ 1 file changed, 36 insertions(+)
drivers/thermal/mediatek/lvts_thermal.c +36 -0
@@ -85,6 +85,8 @@#define LVTS_GOLDEN_TEMP_DEFAULT 50#define LVTS_COEFF_A_MT8195 -250460#define LVTS_COEFF_B_MT8195 250460 +#define LVTS_COEFF_A_MT7987 -204650 +#define LVTS_COEFF_B_MT7987 204650#define LVTS_COEFF_A_MT7988 -204650#define LVTS_COEFF_B_MT7988 204650
@@ -1373,6 +1375,20 @@ static void lvts_remove(struct platform_device *pdev)lvts_ctrl_set_enable (&lvts_td->lvts_ctrl[i], false); } +static const struct lvts_ctrl_data mt7987_lvts_ap_data_ctrl[] = { + { + .lvts_sensor = { + { .dt_id =MT7987_CPU , + .cal_offsets = {0x04 ,0x05 ,0x06 } }, + { .dt_id =MT7987_ETH2P5G , + .cal_offsets = {0x08 ,0x09 ,0x0a } }, + }, +VALID_SENSOR_MAP (1 ,1 ,0 ,0 ), + .offset =0x0 , + .mode =LVTS_MSR_FILTERED_MODE , + }, +}; +static const struct lvts_ctrl_data mt7988_lvts_ap_data_ctrl[] = { { .lvts_sensor = {
@@ -1455,6 +1471,12 @@ static const u32 default_init_cmds[] = {0xC10300FC ,0xC103009D ,0xC10300F1 ,0xC10300E1 }; +static const u32 mt7987_init_cmds[] = { +0xC1030300 ,0xC1030420 ,0xC1030500 ,0xC10307A6 ,0xC10308C7 , +0xC103098D ,0xC1030C7C ,0xC1030AA8 ,0xC10308CE ,0xC10308C7 , +0xC1030B04 ,0xC1030E01 ,0xC10306B8 +}; +static const u32 mt7988_init_cmds[] = {0xC1030300 ,0xC1030420 ,0xC1030500 ,0xC10307A6 ,0xC1030CFC , 0xC1030A8C, 0xC103098D, 0xC10308F1, 0xC1030B04, 0xC1030E01,
@@ -1753,6 +1775,19 @@ static const struct lvts_ctrl_data mt8195_lvts_ap_data_ctrl[] = { } }; +static const struct lvts_data mt7987_lvts_ap_data = { + .lvts_ctrl = mt7987_lvts_ap_data_ctrl, + .num_lvts_ctrl =ARRAY_SIZE (mt7987_lvts_ap_data_ctrl), + .conn_cmd = mt7988_conn_cmds, + .init_cmd = mt7987_init_cmds, + .num_conn_cmd =ARRAY_SIZE (mt7988_conn_cmds), + .num_init_cmd =ARRAY_SIZE (mt7987_init_cmds), + .temp_factor =LVTS_COEFF_A_MT7987 , + .temp_offset =LVTS_COEFF_B_MT7987 , + .gt_calib_bit_offset =32 , + .def_calibration =19380 , +}; +static const struct lvts_data mt7988_lvts_ap_data = { .lvts_ctrl = mt7988_lvts_ap_data_ctrl, .conn_cmd = mt7988_conn_cmds,
@@ -1857,6 +1892,7 @@ static const struct lvts_data mt8195_lvts_ap_data = { };static const struct of_device_id lvts_of_match[] = { + { .compatible ="mediatek,mt7987-lvts-ap" , .data = &mt7987_lvts_ap_data }, { .compatible ="mediatek,mt7988-lvts-ap" , .data = &mt7988_lvts_ap_data }, { .compatible ="mediatek,mt8186-lvts" , .data = &mt8186_lvts_data }, { .compatible ="mediatek,mt8188-lvts-mcu" , .data = &mt8188_lvts_mcu_data },
Signature · 1 line
2.43.0