firmware: Initialize stack guard via Zkr
PATCH v3 1/1 firmware: Initialize stack guard via Zkr
Try to initialize stack protection guard via the zkr extension.
Signed-off-by Xiang W <[email protected]>
--- firmware/fw_base.S | 24 ++++++++++++++++++++++++ include/sbi/riscv_encoding.h | 10 ++++++++++ 2 files changed, 34 insertions(+)
firmware/fw_base.S +24 -0
@@ -107,6 +107,30 @@ _bss_zero: add s4, s4, __SIZEOF_POINTER__ blt s4, s5, _bss_zero + /* Trying to initialize the stack guard via the Zkr extension */ + lla t0, __stack_chk_guard_done + csrw CSR_MTVEC, t0 + li t0, 0 + li t3, SEED_OPTS_ES16 + li t4, SEED_ENTROPY_MASK + li t5, __SIZEOF_POINTER__ +__stack_chk_guard_loop: + csrrw t1, CSR_SEED, x0 + li t2, SEED_OPTS_MASK + andi t2, t2, t1 + bgtu t2, t3, __stack_chk_guard_done + bltu t2, t3, __stack_chk_guard_loop + and t1, t1, t4 + slli t0, t0, 16 + or t0, t0, t1 + addi t5, t5, -2 + bgtz t5, __stack_chk_guard_loop + lla t1, __stack_chk_guard + REG_S t0, 0(t1) + j __stack_chk_guard_done + .align 3 +__stack_chk_guard_done: + /* Setup temporary trap handler */ lla s4, _start_hang csrw CSR_MTVEC, s4
include/sbi/riscv_encoding.h +10 -0
@@ -261,6 +261,16 @@#define CSR_FRM 0x002#define CSR_FCSR 0x003 +/* User entropy source */ +#define CSR_SEED 0x015 +#define SEED_OPTS_SHIFT 30 +#define SEED_OPTS_MASK (_UL(3) << SEED_OPTS_SHIFT) +#define SEED_OPTS_BIST (_UL(0) << SEED_OPTS_SHIFT) +#define SEED_OPTS_WAIT (_UL(1) << SEED_OPTS_SHIFT) +#define SEED_OPTS_ES16 (_UL(2) << SEED_OPTS_SHIFT) +#define SEED_OPTS_DEAD (_UL(3) << SEED_OPTS_SHIFT) +#define SEED_ENTROPY_MASK 0xffff +/* User Counters/Timers */ #define CSR_CYCLE 0xc00#define CSR_TIME 0xc01
Signature · 7 lines
2.47.3 -- opensbi mailing list [email protected] http://lists.infradead.org/mailman/listinfo/opensbi
Quoted 17 lines · 在 2026-01-04日的 12:07 +0800，Xiang W写道：
Try to initialize stack protection guard via the zkr extension.
Signed-off-by Xiang W <[email protected]>---
firmware/fw_base.S | 24 ++++++++++++++++++++++++include/sbi/riscv_encoding.h| 10 ++++++++++2 files changed, 34 insertions(+)firmware/fw_base.S +0
-0@@ -107,6 +107,30 @@ _bss_zero:add s4, s4,
__SIZEOF_POINTER__
blt s4, s5,_bss_zerofirmware/fw_base.S +1
-0+ /* Trying to initialize the stack guard via the Zkr extension */
firmware/fw_base.S _bss_zero: · line 120
Quoted 10 lines
firmware/fw_base.S +10
-0+ lla t0, __stack_chk_guard_done + csrw CSR_MTVEC, t0 + li t0, 0 + li t3, SEED_OPTS_ES16 + li t4, SEED_ENTROPY_MASK + li t5, __SIZEOF_POINTER__ +__stack_chk_guard_loop: + csrrw t1, CSR_SEED, x0 + li t2, SEED_OPTS_MASK + andi t2, t2, t1
s/addi/add/
new patch at https://lists.infradead.org/pipermail/opensbi/2026-January/009303.html
Regards,
Xiang W
Quoted 40 lines
firmware/fw_base.S +13
-0+ bgtu t2, t3, __stack_chk_guard_done + bltu t2, t3, __stack_chk_guard_loop + and t1, t1, t4 + slli t0, t0, 16 + or t0, t0, t1 + addi t5, t5, -2 + bgtz t5, __stack_chk_guard_loop + lla t1, __stack_chk_guard + REG_S t0, 0(t1) + j __stack_chk_guard_done + .align 3 +__stack_chk_guard_done: +/* Setup temporary trap handler */
lla s4,_start_hang
csrwCSR_MTVEC, s4include/sbi/riscv_encoding.h +0
-0@@ -261,6 +261,16 @@ #define CSR_FRM 0x002 #define CSR_FCSR 0x003include/sbi/riscv_encoding.h +10
-0+/* User entropy source */ +#define CSR_SEED 0x015 +#define SEED_OPTS_SHIFT 30 +#define SEED_OPTS_MASK (_UL(3) << SEED_OPTS_SHIFT) +#define SEED_OPTS_BIST (_UL(0) << SEED_OPTS_SHIFT) +#define SEED_OPTS_WAIT (_UL(1) << SEED_OPTS_SHIFT) +#define SEED_OPTS_ES16 (_UL(2) << SEED_OPTS_SHIFT) +#define SEED_OPTS_DEAD (_UL(3) << SEED_OPTS_SHIFT) +#define SEED_ENTROPY_MASK 0xffff +/* User Counters/Timers */
#defineCSR_CYCLE0xc00
#defineCSR_TIME0xc01Signature · 1 line
2.47.3
Signature · 3 lines
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