gpio: brcmstb: Bug fixes and wake-up interrupt improvements
Florian Fainelli
maintainerv2 cover gpio: brcmstb: Bug fixes and wake-up interrupt improvements
This patch series corrects the HW interrupt to the bank mapping logic to be more robust and do not assume any particular order.
The last two patches improve the handling of early wake-up conditions and makes it more robust so we can use those during "s2idle".
Changes in v2:
- corrected the patch implementing irq_mask_ack to write properly to the STAT register, this was not the case
- create a separate helper to write to the IMASK register to make the code more readable
- remove unnecessary cast of unsigned long to u32
Doug Berger (3):
gpio: brcmstb: correct hwirq to bank map
gpio: brcmstb: implement irq_mask_ack
gpio: brcmstb: allow parent_irq to wake
drivers/gpio/gpio-brcmstb.c | 127 +++++++++++++++++++++++++----------- 1 file changed, 89 insertions(+), 38 deletions(-)
Signature · 1 line
2.43.0
Florian Fainelli
maintainerPATCH v2 1/3 gpio: brcmstb: correct hwirq to bank map
From: Doug Berger <[email protected]>
The brcmstb_gpio_hwirq_to_bank() function was designed to accommodate the downward numbering of dynamic GPIOs by traversing the bank list in the reverse order. However, the dynamic numbering has changed to increment upward which can produce an incorrect mapping.
The function is modified to no longer assume an ordering of the list to accommodate either option.
--- drivers/gpio/gpio-brcmstb.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-)
drivers/gpio/gpio-brcmstb.c +3 -5
@@ -301,12 +301,10 @@ static struct brcmstb_gpio_bank *brcmstb_gpio_hwirq_to_bank( struct brcmstb_gpio_priv *priv, irq_hw_number_t hwirq) {struct brcmstb_gpio_bank *bank; -int i =0 ; -/* banks are in descending order */ -list_for_each_entry_reverse (bank, &priv->bank_list, node) { - i += bank->chip.gc.ngpio; -if (hwirq < i) +list_for_each_entry (bank, &priv->bank_list, node) { +if (hwirq >= bank->chip.gc.offset && + hwirq < (bank->chip.gc.offset + bank->chip.gc.ngpio))return bank; }return NULL ;
Signature · 1 line
2.43.0
Re: [PATCH v2 1/3] gpio: brcmstb: correct hwirq to bank map
Quoted 8 lines · Florian Fainelli
From: Doug Berger <[email protected]>
The
brcmstb_gpio_hwirq_to_bank()function was designed to accommodate the downward numbering of dynamic GPIOs by traversing the bank list in the reverse order. However, the dynamic numbering has changed to increment upward which can produce an incorrect mapping.
Quoted 6 lines
The function is modified to no longer assume an ordering of the list to accommodate either option.
Fixes 7b61212f2a07 ("gpiolib: Get rid of ARCH_NR_GPIOS")Signed-off-by Doug Berger <[email protected]>Signed-off-by Florian Fainelli <[email protected]>
This looks right.
Yours,
Linus Walleij
Florian Fainelli
maintainerPATCH v2 2/3 gpio: brcmstb: implement irq_mask_ack
In reply to Florian FainelliFrom: Doug Berger <[email protected]>
The irq_mask_ack operation is slightly more efficient than doing irq_mask and irq_ack separately.
More importantly for this driver it bypasses the check of irqd_irq_masked ensuring a previously masked but still active interrupt gets remasked if unmasked at the hardware level. This allows the driver to more efficiently unmask the wake capable interrupts when quiescing without needing to enable the irqs individually to clear the irqd_irq_masked state.
--- drivers/gpio/gpio-brcmstb.c | 29 ++++++++++++++++++++++++----- 1 file changed, 24 insertions(+), 5 deletions(-)
drivers/gpio/gpio-brcmstb.c +24 -5
@@ -1,5 +1,5 @@// SPDX-License-Identifier: GPL-2.0-only -// Copyright (C) 2015-2017 Broadcom +// Copyright (C) 2015-2017, 2026 Broadcom #include <linux/bitops.h> #include <linux/gpio/driver.h>
@@ -95,15 +95,13 @@ static int brcmstb_gpio_hwirq_to_offset(irq_hw_number_t hwirq,return hwirq - bank->chip.gc.offset; } -static void brcmstb_gpio_set_imask (struct brcmstb_gpio_bank *bank, -unsigned int hwirq,bool enable) +static void __brcmstb_gpio_set_imask (struct brcmstb_gpio_bank *bank, +unsigned int hwirq,bool enable) {struct brcmstb_gpio_priv *priv = bank->parent_priv;u32 mask =BIT (brcmstb_gpio_hwirq_to_offset (hwirq, bank));u32 imask; -guard (gpio_generic_lock_irqsave)(&bank->chip); - imask =gpio_generic_read_reg (&bank->chip, priv->reg_base +GIO_MASK (bank->id));if (enable)
@@ -114,6 +112,13 @@ static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank, priv->reg_base + GIO_MASK(bank->id), imask); } +static void brcmstb_gpio_set_imask (struct brcmstb_gpio_bank *bank, +unsigned int hwirq,bool enable) +{ +guard (gpio_generic_lock_irqsave)(&bank->chip); +__brcmstb_gpio_set_imask (bank, hwirq, enable); +} +static int brcmstb_gpio_to_irq (struct gpio_chip *gc,unsigned offset) {struct brcmstb_gpio_priv *priv =brcmstb_gpio_gc_to_priv (gc);
@@ -135,6 +140,19 @@ static void brcmstb_gpio_irq_mask(struct irq_data *d)brcmstb_gpio_set_imask (bank, d->hwirq, false); } +static void brcmstb_gpio_irq_mask_ack (struct irq_data *d) +{ +struct gpio_chip *gc =irq_data_get_irq_chip_data (d); +struct brcmstb_gpio_bank *bank =gpiochip_get_data (gc); +struct brcmstb_gpio_priv *priv = bank->parent_priv; +u32 mask =BIT (brcmstb_gpio_hwirq_to_offset (d->hwirq, bank)); + +guard (gpio_generic_lock_irqsave)(&bank->chip); +__brcmstb_gpio_set_imask (bank, d->hwirq, false); +gpio_generic_write_reg (&bank->chip, + priv->reg_base +GIO_STAT (bank->id), mask); +} +static void brcmstb_gpio_irq_unmask (struct irq_data *d) {struct gpio_chip *gc =irq_data_get_irq_chip_data (d);
@@ -471,6 +489,7 @@ static int brcmstb_gpio_irq_setup(struct platform_device *pdev, priv->irq_chip.name =dev_name (dev); priv->irq_chip.irq_disable = brcmstb_gpio_irq_mask; priv->irq_chip.irq_mask = brcmstb_gpio_irq_mask; + priv->irq_chip.irq_mask_ack = brcmstb_gpio_irq_mask_ack; priv->irq_chip.irq_unmask = brcmstb_gpio_irq_unmask; priv->irq_chip.irq_ack = brcmstb_gpio_irq_ack; priv->irq_chip.irq_set_type = brcmstb_gpio_irq_set_type;
Signature · 1 line
2.43.0
Re: [PATCH v2 2/3] gpio: brcmstb: implement irq_mask_ack
Quoted 12 lines · Florian Fainelli
From: Doug Berger <[email protected]>
The
irq_mask_ackoperation is slightly more efficient than doingirq_maskandirq_ackseparately.More importantly for this driver it bypasses the check of
irqd_irq_maskedensuring a previously masked but still active interrupt gets remasked if unmasked at the hardware level. This allows the driver to more efficiently unmask the wake capable interrupts when quiescing without needing to enable the irqs individually to clear theirqd_irq_maskedstate.
Quoted 3 lines
Signed-off-by Doug Berger <[email protected]>Co-developed-by Florian Fainelli <[email protected]>Signed-off-by Florian Fainelli <[email protected]>
Yours,
Linus Walleij
Florian Fainelli
maintainerPATCH v2 3/3 gpio: brcmstb: allow parent_irq to wake
In reply to Florian FainelliFrom: Doug Berger <[email protected]>
The classic parent_wake_irq can only occur after the system has been placed into a hardware managed power management state. This prevents its use for waking from software managed suspend states like s2idle.
By allowing the parent_irq to be enabled for wake enabled GPIO during suspend, these GPIO can now be used to wake from these states. The 'suspended' boolean is introduced to support wake event accounting.
--- drivers/gpio/gpio-brcmstb.c | 90 +++++++++++++++++++++++++------------ 1 file changed, 62 insertions(+), 28 deletions(-)
drivers/gpio/gpio-brcmstb.c +62 -28
@@ -54,6 +54,7 @@ struct brcmstb_gpio_priv {int parent_irq;int num_gpios;int parent_wake_irq; +bool suspended; };#define MAX_GPIO_PER_BANK 32
@@ -239,6 +240,9 @@ static int brcmstb_gpio_priv_set_wake(struct brcmstb_gpio_priv *priv, {int ret =0 ; +if (priv->parent_wake_irq == priv->parent_irq) +return ret; +if (enable) ret =enable_irq_wake (priv->parent_wake_irq);else
@@ -289,6 +293,11 @@ static void brcmstb_gpio_irq_bank_handler(struct brcmstb_gpio_bank *bank)while ((status =brcmstb_gpio_get_active_irqs (bank))) {unsigned int offset; +if (priv->suspended && bank->wake_active & status) { + priv->suspended = false; +pm_wakeup_event (&priv->pdev->dev,0 ); + } +for_each_set_bit (offset, &status,32 ) {if (offset >= bank->width) dev_warn(&priv->pdev->dev,
@@ -462,18 +471,18 @@ static int brcmstb_gpio_irq_setup(struct platform_device *pdev, }if (of_property_read_bool (np,"wakeup-source" )) { +/* +* Set wakeup capability so we can process boot-time +* "wakeups" (e.g., from S5 cold boot) +*/ +device_set_wakeup_capable (dev, true); +device_wakeup_enable (dev); priv->parent_wake_irq =platform_get_irq (pdev,1 );if (priv->parent_wake_irq <0 ) { - priv->parent_wake_irq =0 ; + priv->parent_wake_irq = priv->parent_irq;dev_warn (dev,"Couldn't get wake IRQ - GPIOs will not be able to wake from sleep" ); }else { -/* -* Set wakeup capability so we can process boot-time -* "wakeups" (e.g., from S5 cold boot) -*/ -device_set_wakeup_capable (dev, true); -device_wakeup_enable (dev); err = devm_request_irq(dev, priv->parent_wake_irq, brcmstb_gpio_wake_irq_handler, IRQF_SHARED,
@@ -484,6 +493,7 @@ static int brcmstb_gpio_irq_setup(struct platform_device *pdev, goto out_free_domain; } } + priv->irq_chip.irq_set_wake = brcmstb_gpio_irq_set_wake; } priv->irq_chip.name =dev_name (dev);
@@ -494,9 +504,6 @@ static int brcmstb_gpio_irq_setup(struct platform_device *pdev, priv->irq_chip.irq_ack = brcmstb_gpio_irq_ack; priv->irq_chip.irq_set_type = brcmstb_gpio_irq_set_type; -if (priv->parent_wake_irq) - priv->irq_chip.irq_set_wake = brcmstb_gpio_irq_set_wake; -irq_set_chained_handler_and_data (priv->parent_irq, brcmstb_gpio_irq_handler, priv);irq_set_status_flags (priv->parent_irq,IRQ_DISABLE_UNLAZY );
@@ -519,16 +526,11 @@ static void brcmstb_gpio_bank_save(struct brcmstb_gpio_priv *priv, priv->reg_base + GIO_BANK_OFF(bank->id, i)); } -static void brcmstb_gpio_quiesce (struct device *dev,bool save) +static void brcmstb_gpio_quiesce (struct brcmstb_gpio_priv *priv,bool save) { -struct brcmstb_gpio_priv *priv =dev_get_drvdata (dev);struct brcmstb_gpio_bank *bank;u32 imask; -/* disable non-wake interrupt */ -if (priv->parent_irq >=0 ) -disable_irq (priv->parent_irq); -list_for_each_entry (bank, &priv->bank_list, node) {if (save)brcmstb_gpio_bank_save (priv, bank);
@@ -546,8 +548,14 @@ static void brcmstb_gpio_quiesce(struct device *dev, bool save)static void brcmstb_gpio_shutdown (struct platform_device *pdev) { +struct brcmstb_gpio_priv *priv =dev_get_drvdata (&pdev->dev); + +/* disable interrupts */ +if (priv->parent_irq >0 ) +disable_irq (priv->parent_irq); +/* Enable GPIO for S5 cold boot */ -brcmstb_gpio_quiesce (&pdev->dev, false); +brcmstb_gpio_quiesce (priv, false); } static void brcmstb_gpio_bank_restore(struct brcmstb_gpio_priv *priv,
@@ -563,7 +571,32 @@ static void brcmstb_gpio_bank_restore(struct brcmstb_gpio_priv *priv,static int brcmstb_gpio_suspend (struct device *dev) { -brcmstb_gpio_quiesce (dev, true); +struct brcmstb_gpio_priv *priv =dev_get_drvdata (dev); + +if (priv->parent_irq >0 ) + priv->suspended = true; + +return 0 ; +} + +static int brcmstb_gpio_suspend_noirq (struct device *dev) +{ +struct brcmstb_gpio_priv *priv =dev_get_drvdata (dev); + +/* Catch any wakeup sources occurring between suspend and noirq */ +if (!priv->suspended) +return -EBUSY ; + +/* disable interrupts while we save the masks */ +if (priv->parent_irq >0 ) +disable_irq (priv->parent_irq); + +brcmstb_gpio_quiesce (priv, true); + +/* Now that the masks have been saved re-enable interrupts */ +if (priv->parent_wake_irq) +enable_irq (priv->parent_irq); +return 0 ; }
@@ -571,25 +604,26 @@ static int brcmstb_gpio_resume(struct device *dev) {struct brcmstb_gpio_priv *priv =dev_get_drvdata (dev);struct brcmstb_gpio_bank *bank; -bool need_wakeup_event = false; -list_for_each_entry (bank, &priv->bank_list, node) { - need_wakeup_event |= !!__brcmstb_gpio_get_active_irqs (bank); -brcmstb_gpio_bank_restore (priv, bank); - } +/* disable interrupts while we restore the masks */ +if (priv->parent_wake_irq) +disable_irq (priv->parent_irq); -if (priv->parent_wake_irq && need_wakeup_event) -pm_wakeup_event (dev,0 ); + priv->suspended = false; + +list_for_each_entry (bank, &priv->bank_list, node) +brcmstb_gpio_bank_restore (priv, bank); -/* enable non-wake interrupt */ -if (priv->parent_irq >=0 ) +/* re-enable interrupts */ +if (priv->parent_irq >0 )enable_irq (priv->parent_irq);return 0 ; }static const struct dev_pm_ops brcmstb_gpio_pm_ops = { - .suspend_noirq =pm_sleep_ptr (brcmstb_gpio_suspend), + .suspend =pm_sleep_ptr (brcmstb_gpio_suspend), + .suspend_noirq =pm_sleep_ptr (brcmstb_gpio_suspend_noirq), .resume_noirq =pm_sleep_ptr (brcmstb_gpio_resume), };
Signature · 1 line
2.43.0
Re: [PATCH v2 3/3] gpio: brcmstb: allow parent_irq to wake
Quoted 9 lines · Florian Fainelli
The classic
parent_wake_irqcan only occur after the system has been placed into a hardware managed power management state. This prevents its use for waking from software managed suspend states like s2idle.By allowing the
parent_irqto be enabled for wake enabled GPIO during suspend, these GPIO can now be used to wake from these states. The 'suspended' boolean is introduced to support wake event accounting.
...
drivers/gpio/gpio-brcmstb.c static int brcmstb_gpio_irq_setup(struct platform_device *pdev, · line 476
Quoted 4 lines
if (of_property_read_bool(np, "wakeup-source")) {drivers/gpio/gpio-brcmstb.c +3
-0+/* +* Set wakeup capability so we can process boot-time +* "wakeups" (e.g., from S5 cold boot)
While at it, add a period at the end.
Quoted 5 lines
drivers/gpio/gpio-brcmstb.c +3
-0+*/ +device_set_wakeup_capable (dev, true); +device_wakeup_enable (dev); }
...
Quoted 1 line
+ /* disable interrupts */
Still the comment is useless.
Review
Quoted 2 lines
(quoted diff) +2
-0+ if (priv->parent_irq > 0) + disable_irq(priv->parent_irq);
And looking more at this, I don't see why we even need the check. Does the code WARNs or so when there is no parent_irq available?
*Yes, I saw this is the original code, perhaps can be addressed in a follow up.
...
drivers/gpio/gpio-brcmstb.c static void brcmstb_gpio_bank_restore(struct brcmstb_gpio_priv *priv,
Quoted 3 lines
drivers/gpio/gpio-brcmstb.c +2
-0+/* disable interrupts while we save the masks */ +if (priv->parent_irq >0 )
Ditto.
Quoted 1 line
+
disable_irq(priv->parent_irq);
...
drivers/gpio/gpio-brcmstb.c static int brcmstb_gpio_resume(struct device *dev) · line 609
Quoted 2 lines
drivers/gpio/gpio-brcmstb.c +2
-0+/* disable interrupts while we restore the masks */ +if (priv->parent_wake_irq)
Ditto.
Quoted 1 line
+
disable_irq(priv->parent_irq);
...
drivers/gpio/gpio-brcmstb.c static int brcmstb_gpio_resume(struct device *dev) · line 618
Quoted 2 lines
drivers/gpio/gpio-brcmstb.c +2
-0+/* re-enable interrupts */ +if (priv->parent_irq >0 )
Same here.
Quoted 1 line
enable_irq(priv->parent_irq);
...
All we are diving into is the 2 questions:
- is 0 on the particular platform an IRQ number and there is no sparse tree enabled?
- is maple tree implementation clever enough to not crash (or have side effects) when we ask for a non-existing index?
Anyway, this can be done later on.
--
With Best Regards,
Andy Shevchenko
Florian Fainelli
maintainerRe: [PATCH v2 3/3] gpio: brcmstb: allow parent_irq to wake
Quoted 72 lines · Andy Shevchenko
Quoted 9 lines · Florian Fainelli
The classic
parent_wake_irqcan only occur after the system has been placed into a hardware managed power management state. This prevents its use for waking from software managed suspend states like s2idle.By allowing the
parent_irqto be enabled for wake enabled GPIO during suspend, these GPIO can now be used to wake from these states. The 'suspended' boolean is introduced to support wake event accounting....
drivers/gpio/gpio-brcmstb.c static int brcmstb_gpio_irq_setup(struct platform_device *pdev, · line 476
Quoted 4 lines
if (of_property_read_bool(np, "wakeup-source")) {drivers/gpio/gpio-brcmstb.c +3
-0+/* +* Set wakeup capability so we can process boot-time +* "wakeups" (e.g., from S5 cold boot) While at it, add a period at the end.
Quoted 5 lines
drivers/gpio/gpio-brcmstb.c +3
-0+*/ +device_set_wakeup_capable (dev, true); +device_wakeup_enable (dev); }...
Quoted 1 line
+ /* disable interrupts */
Still the comment is useless.
Review
Quoted 2 lines
(quoted diff) +2
-0+ if (priv->parent_irq > 0) + disable_irq(priv->parent_irq);And looking more at this, I don't see why we even need the check. Does the code WARNs or so when there is no
parent_irqavailable?*Yes, I saw this is the original code, perhaps can be addressed in a follow up.
...
drivers/gpio/gpio-brcmstb.c static void brcmstb_gpio_bank_restore(struct brcmstb_gpio_priv *priv,
Quoted 3 lines
drivers/gpio/gpio-brcmstb.c +2
-0+/* disable interrupts while we save the masks */ +if (priv->parent_irq >0 )Ditto.
Quoted 1 line
+
disable_irq(priv->parent_irq);...
drivers/gpio/gpio-brcmstb.c static int brcmstb_gpio_resume(struct device *dev) · line 609
Quoted 2 lines
drivers/gpio/gpio-brcmstb.c +2
-0+/* disable interrupts while we restore the masks */ +if (priv->parent_wake_irq)Ditto.
Quoted 1 line
+
disable_irq(priv->parent_irq);...
drivers/gpio/gpio-brcmstb.c static int brcmstb_gpio_resume(struct device *dev) · line 618
Quoted 2 lines
drivers/gpio/gpio-brcmstb.c +2
-0+/* re-enable interrupts */ +if (priv->parent_irq >0 )Same here.
Quoted 1 line
enable_irq(priv->parent_irq);...
Quoted 7 lines
All we are diving into is the 2 questions:
- is 0 on the particular platform an IRQ number and there is no sparse tree enabled?
- is maple tree implementation clever enough to not crash (or have side effects) when we ask for a non-existing index?Anyway, this can be done later on.
OK, I will remove the superfluous comments, add punctuation where necessary and respin (removing patch #1 since it was applied already).
Thank you!
Signature · 1 line
Florian
Re: (subset) [PATCH v2 0/3] gpio: brcmstb: Bug fixes and wake-up interrupt improvements
In reply to Florian FainelliQuoted 9 lines · Florian Fainelli
This patch series corrects the HW interrupt to the bank mapping logic to be more robust and do not assume any particular order.
The last two patches improve the handling of early wake-up conditions and makes it more robust so we can use those during "s2idle".
Changes in v2:
[...]
I queued this up for fixes, the rest can wait until v7.0-rc1.
[1/3] gpio: brcmstb: correct hwirq to bank map
https://git.kernel.org/brgl/c/b2cf569ed81e7574d4287eaf3b2c38690a934d34
Best regards,
Signature · 1 line
Bartosz Golaszewski <[email protected]>
Quoted 6 lines · Florian Fainelli
This patch series corrects the HW interrupt to the bank mapping logic to be more robust and do not assume any particular order.
The last two patches improve the handling of early wake-up conditions and makes it more robust so we can use those during "s2idle".
Signature · 2 lines
With Best Regards, Andy Shevchenko