drm/i915/dp: Fix pipe BPP clamping due to HDR
PATCH 1/2 drm/i915/dp: Fix pipe BPP clamping due to HDR
The pipe BPP value shouldn't be set outside of the source's / sink's valid pipe BPP range, ensure this when increasing the minimum pipe BPP value to 30 due to HDR.
--- drivers/gpu/drm/i915/display/intel_dp.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-)
drivers/gpu/drm/i915/display/intel_dp.c +12 -2
@@ -2697,6 +2697,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,bool dsc, struct link_config_limits *limits) { + struct intel_display *display = to_intel_display(intel_dp);bool is_mst =intel_crtc_has_type (crtc_state,INTEL_OUTPUT_DP_MST );struct intel_connector *connector =to_intel_connector (conn_state->connector);
@@ -2709,8 +2710,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, limits->min_lane_count =intel_dp_min_lane_count (intel_dp); limits->max_lane_count =intel_dp_max_lane_count (intel_dp); - limits->pipe.min_bpp =intel_dp_in_hdr_mode (conn_state) ?30 : -intel_dp_min_bpp (crtc_state->output_format); + limits->pipe.min_bpp =intel_dp_min_bpp (crtc_state->output_format);if (is_mst) {/* * FIXME: If all the streams can't fit into the link with their
@@ -2726,6 +2726,16 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, respect_downstream_limits); } +if (intel_dp_in_hdr_mode (conn_state)) { +if (limits->pipe.min_bpp <=30 && limits->pipe.max_bpp >=30 ) + limits->pipe.min_bpp =30 ; +else +drm_dbg_kms (display->drm, +"[CONNECTOR:%d:%s] HDR min 30 bpp outside of valid pipe bpp range (%d-%d)\n" , + connector->base.base.id, connector->base.name, + limits->pipe.min_bpp, limits->pipe.max_bpp); + } +if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits (connector, limits))return false;
Signature · 1 line
2.49.1
PATCH 2/2 drm/i915/dp: Verify valid pipe BPP range
Ensure that the pipe BPP range is valid after calculating the minimum and maximum pipe BPP values separately.
--- drivers/gpu/drm/i915/display/intel_dp.c | 9 +++++++++ 1 file changed, 9 insertions(+)
drivers/gpu/drm/i915/display/intel_dp.c +9 -0
@@ -2736,6 +2736,15 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, limits->pipe.min_bpp, limits->pipe.max_bpp); } +if (limits->pipe.min_bpp <=0 || + limits->pipe.min_bpp > limits->pipe.max_bpp) { +drm_dbg_kms (display->drm,"[CONNECTOR:%d:%s] Invalid pipe bpp range: %d-%d\n" , + connector->base.base.id, connector->base.name, + limits->pipe.min_bpp, limits->pipe.max_bpp); + +return false; + } +if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits (connector, limits))return false;
Signature · 1 line
2.49.1
Re: [PATCH 2/2] drm/i915/dp: Verify valid pipe BPP range
Quoted 4 lines · Imre Deak
Ensure that the pipe BPP range is valid after calculating the minimum and maximum pipe BPP values separately.
Signed-off-by Imre Deak <[email protected]>
Quoted 24 lines
--- drivers/gpu/drm/i915/display/intel_dp.c | 9 +++++++++ 1 file changed, 9 insertions(+)drivers/gpu/drm/i915/display/intel_dp.c +9
-0@@ -2736,6 +2736,15 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, limits->pipe.min_bpp, limits->pipe.max_bpp); } +if (limits->pipe.min_bpp <=0 || + limits->pipe.min_bpp > limits->pipe.max_bpp) { +drm_dbg_kms (display->drm,"[CONNECTOR:%d:%s] Invalid pipe bpp range: %d-%d\n" , + connector->base.base.id, connector->base.name, + limits->pipe.min_bpp, limits->pipe.max_bpp); + +return false; + } +if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits (connector, limits))return false;
Patchwork
CI✓ CI.KUnit: success for series starting with [1/2] drm/i915/dp: Fix pipe BPP clamping due to HDR
In reply to Imre Deak== Series Details ==
== Series Details ==
Series: series starting with [1/2] drm/i915/dp: Fix pipe BPP clamping due to HDR
URL : https://patchwork.freedesktop.org/series/161265/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig [10:48:26] Configuring KUnit Kernel ...
Generating .config ...
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$ make ARCH=um O=.kunit olddefconfig [10:48:30] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [10:49:02] Starting KUnit Kernel (1/1)... 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pf_negotiate_base_next [10:49:03] [SKIPPED] pf_negotiate_base_older [10:49:03] [PASSED] pf_negotiate_base_prev [10:49:03] [PASSED] pf_negotiate_latest_match [10:49:03] [PASSED] pf_negotiate_latest_newer [10:49:03] [PASSED] pf_negotiate_latest_next [10:49:03] [SKIPPED] pf_negotiate_latest_older [10:49:03] [SKIPPED] pf_negotiate_latest_prev [10:49:03] =================== [PASSED] pf_service ==================== [10:49:03] ================= xe_guc_g2g (2 subtests) ================== [10:49:03] ============== xe_live_guc_g2g_kunit_default ============== [10:49:03] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ========== [10:49:03] ============== xe_live_guc_g2g_kunit_allmem =============== [10:49:03] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ========== [10:49:03] =================== [SKIPPED] xe_guc_g2g =================== [10:49:03] =================== xe_mocs (2 subtests) =================== [10:49:03] ================ xe_live_mocs_kernel_kunit ================ [10:49:03] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============ [10:49:03] ================ xe_live_mocs_reset_kunit ================= [10:49:03] ============ [SKIPPED] xe_live_mocs_reset_kunit ============ [10:49:03] ==================== [SKIPPED] xe_mocs ===================== [10:49:03] ================= xe_migrate (2 subtests) ================== [10:49:03] ================= xe_migrate_sanity_kunit ================= [10:49:03] ============ [SKIPPED] xe_migrate_sanity_kunit ============= [10:49:03] ================== xe_validate_ccs_kunit ================== [10:49:03] ============= [SKIPPED] xe_validate_ccs_kunit ============== [10:49:03] =================== [SKIPPED] xe_migrate =================== [10:49:03] ================== xe_dma_buf (1 subtest) ================== [10:49:03] ==================== xe_dma_buf_kunit ===================== [10:49:03] ================ [SKIPPED] xe_dma_buf_kunit ================ [10:49:03] =================== [SKIPPED] xe_dma_buf =================== [10:49:03] ================= xe_bo_shrink (1 subtest) ================= [10:49:03] =================== xe_bo_shrink_kunit ==================== [10:49:03] =============== [SKIPPED] xe_bo_shrink_kunit =============== [10:49:03] ================== [SKIPPED] xe_bo_shrink ================== [10:49:03] ==================== xe_bo (2 subtests) ==================== [10:49:03] ================== xe_ccs_migrate_kunit =================== [10:49:03] ============== [SKIPPED] xe_ccs_migrate_kunit ============== [10:49:03] ==================== xe_bo_evict_kunit ==================== [10:49:03] =============== [SKIPPED] xe_bo_evict_kunit ================ [10:49:03] ===================== [SKIPPED] xe_bo ====================== [10:49:03] ==================== args (13 subtests) ==================== [10:49:03] [PASSED] count_args_test [10:49:03] [PASSED] call_args_example [10:49:03] [PASSED] call_args_test [10:49:03] [PASSED] drop_first_arg_example [10:49:03] [PASSED] drop_first_arg_test [10:49:03] [PASSED] first_arg_example [10:49:03] [PASSED] first_arg_test [10:49:03] [PASSED] last_arg_example [10:49:03] [PASSED] last_arg_test [10:49:03] [PASSED] pick_arg_example [10:49:03] [PASSED] if_args_example [10:49:03] [PASSED] if_args_test [10:49:03] [PASSED] sep_comma_example [10:49:03] ====================== [PASSED] args ======================= [10:49:03] =================== xe_pci (3 subtests) ==================== [10:49:03] ==================== check_graphics_ip ==================== [10:49:03] [PASSED] 12.00 Xe_LP [10:49:03] [PASSED] 12.10 Xe_LP+ [10:49:03] [PASSED] 12.55 Xe_HPG [10:49:03] [PASSED] 12.60 Xe_HPC [10:49:03] [PASSED] 12.70 Xe_LPG [10:49:03] [PASSED] 12.71 Xe_LPG [10:49:03] [PASSED] 12.74 Xe_LPG+ [10:49:03] [PASSED] 20.01 Xe2_HPG [10:49:03] [PASSED] 20.02 Xe2_HPG [10:49:03] [PASSED] 20.04 Xe2_LPG [10:49:03] [PASSED] 30.00 Xe3_LPG [10:49:03] [PASSED] 30.01 Xe3_LPG [10:49:03] [PASSED] 30.03 Xe3_LPG [10:49:03] [PASSED] 30.04 Xe3_LPG [10:49:03] [PASSED] 30.05 Xe3_LPG [10:49:03] [PASSED] 35.11 Xe3p_XPC [10:49:03] ================ [PASSED] check_graphics_ip ================ [10:49:03] ===================== check_media_ip ====================== [10:49:03] [PASSED] 12.00 Xe_M [10:49:03] [PASSED] 12.55 Xe_HPM [10:49:03] [PASSED] 13.00 Xe_LPM+ [10:49:03] [PASSED] 13.01 Xe2_HPM [10:49:03] [PASSED] 20.00 Xe2_LPM [10:49:03] [PASSED] 30.00 Xe3_LPM [10:49:03] [PASSED] 30.02 Xe3_LPM [10:49:03] [PASSED] 35.00 Xe3p_LPM [10:49:03] [PASSED] 35.03 Xe3p_HPM [10:49:03] ================= [PASSED] check_media_ip ================== [10:49:03] =================== check_platform_desc =================== [10:49:03] [PASSED] 0x9A60 (TIGERLAKE) [10:49:03] [PASSED] 0x9A68 (TIGERLAKE) [10:49:03] [PASSED] 0x9A70 (TIGERLAKE) [10:49:03] [PASSED] 0x9A40 (TIGERLAKE) [10:49:03] [PASSED] 0x9A49 (TIGERLAKE) [10:49:03] [PASSED] 0x9A59 (TIGERLAKE) [10:49:03] [PASSED] 0x9A78 (TIGERLAKE) [10:49:03] [PASSED] 0x9AC0 (TIGERLAKE) [10:49:03] [PASSED] 0x9AC9 (TIGERLAKE) [10:49:03] [PASSED] 0x9AD9 (TIGERLAKE) [10:49:03] [PASSED] 0x9AF8 (TIGERLAKE) [10:49:03] [PASSED] 0x4C80 (ROCKETLAKE) [10:49:03] [PASSED] 0x4C8A (ROCKETLAKE) [10:49:03] [PASSED] 0x4C8B (ROCKETLAKE) [10:49:03] [PASSED] 0x4C8C (ROCKETLAKE) [10:49:03] [PASSED] 0x4C90 (ROCKETLAKE) [10:49:03] [PASSED] 0x4C9A (ROCKETLAKE) [10:49:03] [PASSED] 0x4680 (ALDERLAKE_S) [10:49:03] [PASSED] 0x4682 (ALDERLAKE_S) [10:49:03] [PASSED] 0x4688 (ALDERLAKE_S) [10:49:03] [PASSED] 0x468A (ALDERLAKE_S) [10:49:03] [PASSED] 0x468B (ALDERLAKE_S) [10:49:03] [PASSED] 0x4690 (ALDERLAKE_S) [10:49:03] [PASSED] 0x4692 (ALDERLAKE_S) [10:49:03] [PASSED] 0x4693 (ALDERLAKE_S) [10:49:03] [PASSED] 0x46A0 (ALDERLAKE_P) [10:49:03] [PASSED] 0x46A1 (ALDERLAKE_P) [10:49:03] [PASSED] 0x46A2 (ALDERLAKE_P) [10:49:03] [PASSED] 0x46A3 (ALDERLAKE_P) [10:49:03] [PASSED] 0x46A6 (ALDERLAKE_P) [10:49:03] [PASSED] 0x46A8 (ALDERLAKE_P) [10:49:03] [PASSED] 0x46AA (ALDERLAKE_P) [10:49:03] [PASSED] 0x462A (ALDERLAKE_P) [10:49:03] [PASSED] 0x4626 (ALDERLAKE_P) [10:49:03] [PASSED] 0x4628 (ALDERLAKE_P) stty: 'standard input': Inappropriate ioctl for device [10:49:03] [PASSED] 0x46B0 (ALDERLAKE_P) [10:49:03] [PASSED] 0x46B1 (ALDERLAKE_P) [10:49:03] [PASSED] 0x46B2 (ALDERLAKE_P) [10:49:03] [PASSED] 0x46B3 (ALDERLAKE_P) [10:49:03] [PASSED] 0x46C0 (ALDERLAKE_P) [10:49:03] [PASSED] 0x46C1 (ALDERLAKE_P) [10:49:03] [PASSED] 0x46C2 (ALDERLAKE_P) [10:49:03] [PASSED] 0x46C3 (ALDERLAKE_P) [10:49:03] [PASSED] 0x46D0 (ALDERLAKE_N) [10:49:03] [PASSED] 0x46D1 (ALDERLAKE_N) [10:49:03] [PASSED] 0x46D2 (ALDERLAKE_N) [10:49:03] [PASSED] 0x46D3 (ALDERLAKE_N) [10:49:03] [PASSED] 0x46D4 (ALDERLAKE_N) [10:49:03] [PASSED] 0xA721 (ALDERLAKE_P) [10:49:03] [PASSED] 0xA7A1 (ALDERLAKE_P) [10:49:03] [PASSED] 0xA7A9 (ALDERLAKE_P) [10:49:03] [PASSED] 0xA7AC (ALDERLAKE_P) [10:49:03] [PASSED] 0xA7AD (ALDERLAKE_P) [10:49:03] [PASSED] 0xA720 (ALDERLAKE_P) [10:49:03] [PASSED] 0xA7A0 (ALDERLAKE_P) [10:49:03] [PASSED] 0xA7A8 (ALDERLAKE_P) [10:49:03] [PASSED] 0xA7AA (ALDERLAKE_P) [10:49:03] [PASSED] 0xA7AB (ALDERLAKE_P) [10:49:03] [PASSED] 0xA780 (ALDERLAKE_S) [10:49:03] [PASSED] 0xA781 (ALDERLAKE_S) [10:49:03] [PASSED] 0xA782 (ALDERLAKE_S) [10:49:03] [PASSED] 0xA783 (ALDERLAKE_S) [10:49:03] [PASSED] 0xA788 (ALDERLAKE_S) [10:49:03] [PASSED] 0xA789 (ALDERLAKE_S) [10:49:03] [PASSED] 0xA78A (ALDERLAKE_S) [10:49:03] [PASSED] 0xA78B (ALDERLAKE_S) [10:49:03] [PASSED] 0x4905 (DG1) [10:49:03] [PASSED] 0x4906 (DG1) [10:49:03] [PASSED] 0x4907 (DG1) [10:49:03] [PASSED] 0x4908 (DG1) [10:49:03] [PASSED] 0x4909 (DG1) [10:49:03] [PASSED] 0x56C0 (DG2) [10:49:03] [PASSED] 0x56C2 (DG2) [10:49:03] [PASSED] 0x56C1 (DG2) [10:49:03] [PASSED] 0x7D51 (METEORLAKE) [10:49:03] [PASSED] 0x7DD1 (METEORLAKE) [10:49:03] [PASSED] 0x7D41 (METEORLAKE) [10:49:03] [PASSED] 0x7D67 (METEORLAKE) [10:49:03] [PASSED] 0xB640 (METEORLAKE) [10:49:03] [PASSED] 0x56A0 (DG2) [10:49:03] [PASSED] 0x56A1 (DG2) [10:49:03] [PASSED] 0x56A2 (DG2) [10:49:03] [PASSED] 0x56BE (DG2) [10:49:03] [PASSED] 0x56BF (DG2) [10:49:03] [PASSED] 0x5690 (DG2) [10:49:03] [PASSED] 0x5691 (DG2) [10:49:03] [PASSED] 0x5692 (DG2) [10:49:03] [PASSED] 0x56A5 (DG2) [10:49:03] [PASSED] 0x56A6 (DG2) [10:49:03] [PASSED] 0x56B0 (DG2) [10:49:03] [PASSED] 0x56B1 (DG2) [10:49:03] [PASSED] 0x56BA (DG2) [10:49:03] [PASSED] 0x56BB (DG2) [10:49:03] [PASSED] 0x56BC (DG2) [10:49:03] [PASSED] 0x56BD (DG2) [10:49:03] [PASSED] 0x5693 (DG2) [10:49:03] [PASSED] 0x5694 (DG2) [10:49:03] [PASSED] 0x5695 (DG2) [10:49:03] [PASSED] 0x56A3 (DG2) [10:49:03] [PASSED] 0x56A4 (DG2) [10:49:03] [PASSED] 0x56B2 (DG2) [10:49:03] [PASSED] 0x56B3 (DG2) [10:49:03] [PASSED] 0x5696 (DG2) [10:49:03] [PASSED] 0x5697 (DG2) [10:49:03] [PASSED] 0xB69 (PVC) [10:49:03] [PASSED] 0xB6E (PVC) [10:49:03] [PASSED] 0xBD4 (PVC) [10:49:03] [PASSED] 0xBD5 (PVC) [10:49:03] [PASSED] 0xBD6 (PVC) [10:49:03] [PASSED] 0xBD7 (PVC) [10:49:03] [PASSED] 0xBD8 (PVC) [10:49:03] [PASSED] 0xBD9 (PVC) [10:49:03] [PASSED] 0xBDA (PVC) [10:49:03] [PASSED] 0xBDB (PVC) [10:49:03] [PASSED] 0xBE0 (PVC) [10:49:03] [PASSED] 0xBE1 (PVC) [10:49:03] [PASSED] 0xBE5 (PVC) [10:49:03] [PASSED] 0x7D40 (METEORLAKE) [10:49:03] [PASSED] 0x7D45 (METEORLAKE) [10:49:03] [PASSED] 0x7D55 (METEORLAKE) [10:49:03] [PASSED] 0x7D60 (METEORLAKE) [10:49:03] [PASSED] 0x7DD5 (METEORLAKE) [10:49:03] [PASSED] 0x6420 (LUNARLAKE) [10:49:03] [PASSED] 0x64A0 (LUNARLAKE) [10:49:03] [PASSED] 0x64B0 (LUNARLAKE) [10:49:03] [PASSED] 0xE202 (BATTLEMAGE) [10:49:03] [PASSED] 0xE209 (BATTLEMAGE) [10:49:03] [PASSED] 0xE20B (BATTLEMAGE) [10:49:03] [PASSED] 0xE20C (BATTLEMAGE) [10:49:03] [PASSED] 0xE20D (BATTLEMAGE) [10:49:03] [PASSED] 0xE210 (BATTLEMAGE) [10:49:03] [PASSED] 0xE211 (BATTLEMAGE) [10:49:03] [PASSED] 0xE212 (BATTLEMAGE) [10:49:03] [PASSED] 0xE216 (BATTLEMAGE) [10:49:03] [PASSED] 0xE220 (BATTLEMAGE) [10:49:03] [PASSED] 0xE221 (BATTLEMAGE) [10:49:03] [PASSED] 0xE222 (BATTLEMAGE) [10:49:03] [PASSED] 0xE223 (BATTLEMAGE) [10:49:03] [PASSED] 0xB080 (PANTHERLAKE) [10:49:03] [PASSED] 0xB081 (PANTHERLAKE) [10:49:03] [PASSED] 0xB082 (PANTHERLAKE) [10:49:03] [PASSED] 0xB083 (PANTHERLAKE) [10:49:03] [PASSED] 0xB084 (PANTHERLAKE) [10:49:03] [PASSED] 0xB085 (PANTHERLAKE) [10:49:03] [PASSED] 0xB086 (PANTHERLAKE) [10:49:03] [PASSED] 0xB087 (PANTHERLAKE) [10:49:03] [PASSED] 0xB08F (PANTHERLAKE) [10:49:03] [PASSED] 0xB090 (PANTHERLAKE) [10:49:03] [PASSED] 0xB0A0 (PANTHERLAKE) [10:49:03] [PASSED] 0xB0B0 (PANTHERLAKE) [10:49:03] [PASSED] 0xFD80 (PANTHERLAKE) [10:49:03] [PASSED] 0xFD81 (PANTHERLAKE) [10:49:03] [PASSED] 0xD740 (NOVALAKE_S) [10:49:03] [PASSED] 0xD741 (NOVALAKE_S) [10:49:03] [PASSED] 0xD742 (NOVALAKE_S) [10:49:03] [PASSED] 0xD743 (NOVALAKE_S) [10:49:03] [PASSED] 0xD744 (NOVALAKE_S) [10:49:03] [PASSED] 0xD745 (NOVALAKE_S) [10:49:03] [PASSED] 0x674C (CRESCENTISLAND) [10:49:03] =============== [PASSED] check_platform_desc =============== [10:49:03] ===================== [PASSED] xe_pci ====================== [10:49:03] =================== xe_rtp (2 subtests) ==================== [10:49:03] =============== xe_rtp_process_to_sr_tests ================ [10:49:03] [PASSED] coalesce-same-reg [10:49:03] [PASSED] no-match-no-add [10:49:03] [PASSED] match-or [10:49:03] [PASSED] match-or-xfail [10:49:03] [PASSED] no-match-no-add-multiple-rules [10:49:03] [PASSED] two-regs-two-entries [10:49:03] [PASSED] clr-one-set-other [10:49:03] [PASSED] set-field [10:49:03] [PASSED] conflict-duplicate [10:49:03] [PASSED] conflict-not-disjoint [10:49:03] [PASSED] conflict-reg-type [10:49:03] =========== [PASSED] xe_rtp_process_to_sr_tests ============ [10:49:03] ================== xe_rtp_process_tests =================== [10:49:03] [PASSED] active1 [10:49:03] [PASSED] active2 [10:49:03] [PASSED] active-inactive [10:49:03] [PASSED] inactive-active [10:49:03] [PASSED] inactive-1st_or_active-inactive [10:49:03] [PASSED] inactive-2nd_or_active-inactive [10:49:03] [PASSED] inactive-last_or_active-inactive [10:49:03] [PASSED] inactive-no_or_active-inactive [10:49:03] ============== [PASSED] xe_rtp_process_tests =============== [10:49:03] ===================== [PASSED] xe_rtp ====================== [10:49:03] ==================== xe_wa (1 subtest) ===================== [10:49:03] ======================== xe_wa_gt ========================= [10:49:03] [PASSED] TIGERLAKE B0 [10:49:03] [PASSED] DG1 A0 [10:49:03] [PASSED] DG1 B0 [10:49:03] [PASSED] ALDERLAKE_S A0 [10:49:03] [PASSED] ALDERLAKE_S B0 [10:49:03] [PASSED] ALDERLAKE_S C0 [10:49:03] [PASSED] ALDERLAKE_S D0 [10:49:03] [PASSED] ALDERLAKE_P A0 [10:49:03] [PASSED] ALDERLAKE_P B0 [10:49:03] [PASSED] ALDERLAKE_P C0 [10:49:03] [PASSED] ALDERLAKE_S RPLS D0 [10:49:03] [PASSED] ALDERLAKE_P RPLU E0 [10:49:03] [PASSED] DG2 G10 C0 [10:49:03] [PASSED] DG2 G11 B1 [10:49:03] [PASSED] DG2 G12 A1 [10:49:03] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0 [10:49:03] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0 [10:49:03] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0 [10:49:03] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0 [10:49:03] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0 [10:49:03] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1 [10:49:03] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0 [10:49:03] ==================== [PASSED] xe_wa_gt ===================== [10:49:03] ====================== [PASSED] xe_wa ====================== [10:49:03] ============================================================ [10:49:03] Testing complete. Ran 512 tests: passed: 494, skipped: 18 [10:49:03] Elapsed time: 36.491s total, 4.292s configuring, 31.682s building, 0.473s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig [10:49:03] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig [10:49:04] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [10:49:30] Starting KUnit Kernel (1/1)... [10:49:30] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [10:49:30] ============ drm_test_pick_cmdline (2 subtests) ============ [10:49:30] [PASSED] drm_test_pick_cmdline_res_1920_1080_60 [10:49:30] =============== drm_test_pick_cmdline_named =============== [10:49:30] [PASSED] NTSC [10:49:30] [PASSED] NTSC-J [10:49:30] [PASSED] PAL [10:49:30] [PASSED] PAL-M [10:49:30] =========== [PASSED] drm_test_pick_cmdline_named =========== [10:49:30] ============== [PASSED] drm_test_pick_cmdline ============== [10:49:30] == drm_test_atomic_get_connector_for_encoder (1 subtest) === [10:49:30] [PASSED] drm_test_drm_atomic_get_connector_for_encoder [10:49:30] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ==== [10:49:30] =========== drm_validate_clone_mode (2 subtests) =========== [10:49:30] ============== drm_test_check_in_clone_mode =============== [10:49:30] [PASSED] in_clone_mode [10:49:30] [PASSED] not_in_clone_mode [10:49:30] ========== [PASSED] drm_test_check_in_clone_mode =========== [10:49:30] =============== drm_test_check_valid_clones =============== [10:49:30] [PASSED] not_in_clone_mode [10:49:30] [PASSED] valid_clone [10:49:30] [PASSED] invalid_clone [10:49:30] =========== [PASSED] drm_test_check_valid_clones =========== [10:49:30] ============= [PASSED] drm_validate_clone_mode ============= [10:49:30] ============= drm_validate_modeset (1 subtest) ============= [10:49:30] [PASSED] drm_test_check_connector_changed_modeset [10:49:30] ============== [PASSED] drm_validate_modeset =============== [10:49:30] ====== drm_test_bridge_get_current_state (2 subtests) ====== [10:49:30] [PASSED] drm_test_drm_bridge_get_current_state_atomic [10:49:30] [PASSED] drm_test_drm_bridge_get_current_state_legacy [10:49:30] ======== [PASSED] drm_test_bridge_get_current_state ======== [10:49:30] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ====== [10:49:30] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic [10:49:30] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled [10:49:30] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy [10:49:30] ======== [PASSED] drm_test_bridge_helper_reset_crtc ======== [10:49:30] ============== drm_bridge_alloc (2 subtests) =============== [10:49:30] [PASSED] drm_test_drm_bridge_alloc_basic [10:49:30] [PASSED] drm_test_drm_bridge_alloc_get_put [10:49:30] ================ [PASSED] drm_bridge_alloc ================= [10:49:30] ============= drm_cmdline_parser (40 subtests) ============= [10:49:30] [PASSED] drm_test_cmdline_force_d_only [10:49:30] [PASSED] drm_test_cmdline_force_D_only_dvi [10:49:30] [PASSED] drm_test_cmdline_force_D_only_hdmi [10:49:30] [PASSED] drm_test_cmdline_force_D_only_not_digital [10:49:30] [PASSED] drm_test_cmdline_force_e_only [10:49:30] [PASSED] drm_test_cmdline_res [10:49:30] [PASSED] drm_test_cmdline_res_vesa [10:49:30] [PASSED] drm_test_cmdline_res_vesa_rblank [10:49:30] [PASSED] drm_test_cmdline_res_rblank [10:49:30] [PASSED] drm_test_cmdline_res_bpp [10:49:30] [PASSED] drm_test_cmdline_res_refresh [10:49:30] [PASSED] drm_test_cmdline_res_bpp_refresh [10:49:30] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced [10:49:30] [PASSED] drm_test_cmdline_res_bpp_refresh_margins [10:49:30] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off [10:49:30] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on [10:49:30] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog [10:49:30] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital [10:49:30] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on [10:49:30] [PASSED] drm_test_cmdline_res_margins_force_on [10:49:30] [PASSED] drm_test_cmdline_res_vesa_margins [10:49:30] [PASSED] drm_test_cmdline_name [10:49:30] [PASSED] drm_test_cmdline_name_bpp [10:49:30] [PASSED] drm_test_cmdline_name_option [10:49:30] [PASSED] drm_test_cmdline_name_bpp_option [10:49:30] [PASSED] drm_test_cmdline_rotate_0 [10:49:30] [PASSED] drm_test_cmdline_rotate_90 [10:49:30] [PASSED] drm_test_cmdline_rotate_180 [10:49:30] [PASSED] drm_test_cmdline_rotate_270 [10:49:30] [PASSED] drm_test_cmdline_hmirror [10:49:30] [PASSED] drm_test_cmdline_vmirror [10:49:30] [PASSED] drm_test_cmdline_margin_options [10:49:30] [PASSED] drm_test_cmdline_multiple_options [10:49:30] [PASSED] drm_test_cmdline_bpp_extra_and_option [10:49:30] [PASSED] drm_test_cmdline_extra_and_option [10:49:30] [PASSED] drm_test_cmdline_freestanding_options [10:49:30] [PASSED] drm_test_cmdline_freestanding_force_e_and_options [10:49:30] [PASSED] drm_test_cmdline_panel_orientation [10:49:30] ================ drm_test_cmdline_invalid ================= [10:49:30] [PASSED] margin_only [10:49:30] [PASSED] interlace_only [10:49:30] [PASSED] res_missing_x [10:49:30] [PASSED] res_missing_y [10:49:30] [PASSED] res_bad_y [10:49:30] [PASSED] res_missing_y_bpp [10:49:30] [PASSED] res_bad_bpp [10:49:30] [PASSED] res_bad_refresh [10:49:30] [PASSED] res_bpp_refresh_force_on_off [10:49:30] [PASSED] res_invalid_mode [10:49:30] [PASSED] res_bpp_wrong_place_mode [10:49:30] [PASSED] name_bpp_refresh [10:49:30] [PASSED] name_refresh [10:49:30] [PASSED] name_refresh_wrong_mode [10:49:30] [PASSED] name_refresh_invalid_mode [10:49:30] [PASSED] rotate_multiple [10:49:30] [PASSED] rotate_invalid_val [10:49:30] [PASSED] rotate_truncated [10:49:30] [PASSED] invalid_option [10:49:30] [PASSED] invalid_tv_option [10:49:30] [PASSED] truncated_tv_option [10:49:30] ============ [PASSED] drm_test_cmdline_invalid ============= [10:49:30] =============== drm_test_cmdline_tv_options =============== [10:49:30] [PASSED] NTSC [10:49:30] [PASSED] NTSC_443 [10:49:30] [PASSED] NTSC_J [10:49:30] [PASSED] PAL [10:49:30] [PASSED] PAL_M [10:49:30] [PASSED] PAL_N [10:49:30] [PASSED] SECAM [10:49:30] [PASSED] MONO_525 [10:49:30] [PASSED] MONO_625 [10:49:30] =========== [PASSED] drm_test_cmdline_tv_options =========== [10:49:30] =============== [PASSED] drm_cmdline_parser ================ [10:49:30] ========== drmm_connector_hdmi_init (20 subtests) ========== [10:49:30] [PASSED] drm_test_connector_hdmi_init_valid [10:49:30] [PASSED] drm_test_connector_hdmi_init_bpc_8 [10:49:30] [PASSED] drm_test_connector_hdmi_init_bpc_10 [10:49:30] [PASSED] drm_test_connector_hdmi_init_bpc_12 [10:49:30] [PASSED] drm_test_connector_hdmi_init_bpc_invalid [10:49:30] [PASSED] drm_test_connector_hdmi_init_bpc_null [10:49:30] [PASSED] drm_test_connector_hdmi_init_formats_empty [10:49:30] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb [10:49:30] === drm_test_connector_hdmi_init_formats_yuv420_allowed === [10:49:30] [PASSED] supported_formats=0x9 yuv420_allowed=1 [10:49:30] [PASSED] supported_formats=0x9 yuv420_allowed=0 [10:49:30] [PASSED] supported_formats=0x3 yuv420_allowed=1 [10:49:30] [PASSED] supported_formats=0x3 yuv420_allowed=0 [10:49:30] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed === [10:49:30] [PASSED] drm_test_connector_hdmi_init_null_ddc [10:49:30] [PASSED] drm_test_connector_hdmi_init_null_product [10:49:30] [PASSED] drm_test_connector_hdmi_init_null_vendor [10:49:30] [PASSED] drm_test_connector_hdmi_init_product_length_exact [10:49:30] [PASSED] drm_test_connector_hdmi_init_product_length_too_long [10:49:30] [PASSED] drm_test_connector_hdmi_init_product_valid [10:49:30] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact [10:49:30] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long [10:49:30] [PASSED] drm_test_connector_hdmi_init_vendor_valid [10:49:30] ========= drm_test_connector_hdmi_init_type_valid ========= [10:49:30] [PASSED] HDMI-A [10:49:30] [PASSED] HDMI-B [10:49:30] ===== [PASSED] drm_test_connector_hdmi_init_type_valid ===== [10:49:30] ======== drm_test_connector_hdmi_init_type_invalid ======== [10:49:30] [PASSED] Unknown [10:49:30] [PASSED] VGA [10:49:30] [PASSED] DVI-I [10:49:30] [PASSED] DVI-D [10:49:30] [PASSED] DVI-A [10:49:30] [PASSED] Composite [10:49:30] [PASSED] SVIDEO [10:49:30] [PASSED] LVDS [10:49:30] [PASSED] Component [10:49:30] [PASSED] DIN [10:49:30] [PASSED] DP [10:49:30] [PASSED] TV [10:49:30] [PASSED] eDP [10:49:30] [PASSED] Virtual [10:49:30] [PASSED] DSI [10:49:30] [PASSED] DPI [10:49:30] [PASSED] Writeback [10:49:30] [PASSED] SPI [10:49:30] [PASSED] USB [10:49:30] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ==== [10:49:30] ============ [PASSED] drmm_connector_hdmi_init ============= [10:49:30] ============= drmm_connector_init (3 subtests) ============= [10:49:30] [PASSED] drm_test_drmm_connector_init [10:49:30] [PASSED] drm_test_drmm_connector_init_null_ddc [10:49:30] ========= drm_test_drmm_connector_init_type_valid ========= [10:49:30] [PASSED] Unknown [10:49:30] [PASSED] VGA [10:49:30] [PASSED] DVI-I [10:49:30] [PASSED] DVI-D [10:49:30] [PASSED] DVI-A [10:49:30] [PASSED] Composite [10:49:30] [PASSED] SVIDEO [10:49:30] [PASSED] LVDS [10:49:30] [PASSED] Component [10:49:30] [PASSED] DIN [10:49:30] [PASSED] DP [10:49:30] [PASSED] HDMI-A [10:49:30] [PASSED] HDMI-B [10:49:30] [PASSED] TV [10:49:30] [PASSED] eDP [10:49:30] [PASSED] Virtual [10:49:30] [PASSED] DSI [10:49:30] [PASSED] DPI [10:49:30] [PASSED] Writeback [10:49:30] [PASSED] SPI [10:49:30] [PASSED] USB [10:49:30] ===== [PASSED] drm_test_drmm_connector_init_type_valid ===== [10:49:30] =============== [PASSED] drmm_connector_init =============== [10:49:30] ========= drm_connector_dynamic_init (6 subtests) ========== [10:49:30] [PASSED] drm_test_drm_connector_dynamic_init [10:49:30] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc [10:49:30] [PASSED] drm_test_drm_connector_dynamic_init_not_added [10:49:30] [PASSED] drm_test_drm_connector_dynamic_init_properties [10:49:30] ===== drm_test_drm_connector_dynamic_init_type_valid ====== [10:49:30] [PASSED] Unknown [10:49:30] [PASSED] VGA [10:49:30] [PASSED] DVI-I [10:49:30] [PASSED] DVI-D [10:49:30] [PASSED] DVI-A [10:49:30] [PASSED] Composite [10:49:30] [PASSED] SVIDEO [10:49:30] [PASSED] LVDS [10:49:30] [PASSED] Component [10:49:30] [PASSED] DIN [10:49:30] [PASSED] DP [10:49:30] [PASSED] HDMI-A [10:49:30] [PASSED] HDMI-B [10:49:30] [PASSED] TV [10:49:30] [PASSED] eDP [10:49:30] [PASSED] Virtual [10:49:30] [PASSED] DSI [10:49:30] [PASSED] DPI [10:49:30] [PASSED] Writeback [10:49:30] [PASSED] SPI [10:49:30] [PASSED] USB [10:49:30] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid == [10:49:30] ======== drm_test_drm_connector_dynamic_init_name ========= [10:49:30] [PASSED] Unknown [10:49:30] [PASSED] VGA [10:49:30] [PASSED] DVI-I [10:49:30] [PASSED] DVI-D [10:49:30] [PASSED] DVI-A [10:49:30] [PASSED] Composite [10:49:30] [PASSED] SVIDEO [10:49:30] [PASSED] LVDS [10:49:30] [PASSED] Component [10:49:30] [PASSED] DIN [10:49:30] [PASSED] DP [10:49:30] [PASSED] HDMI-A [10:49:30] [PASSED] HDMI-B [10:49:30] [PASSED] TV [10:49:30] [PASSED] eDP [10:49:30] [PASSED] Virtual [10:49:30] [PASSED] DSI [10:49:30] [PASSED] DPI [10:49:30] [PASSED] Writeback [10:49:30] [PASSED] SPI [10:49:30] [PASSED] USB [10:49:30] ==== [PASSED] drm_test_drm_connector_dynamic_init_name ===== [10:49:30] =========== [PASSED] drm_connector_dynamic_init ============ [10:49:30] ==== drm_connector_dynamic_register_early (4 subtests) ===== [10:49:30] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list [10:49:30] [PASSED] drm_test_drm_connector_dynamic_register_early_defer [10:49:30] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init [10:49:30] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object [10:49:30] ====== [PASSED] drm_connector_dynamic_register_early ======= [10:49:30] ======= drm_connector_dynamic_register (7 subtests) ======== [10:49:30] [PASSED] drm_test_drm_connector_dynamic_register_on_list [10:49:30] [PASSED] drm_test_drm_connector_dynamic_register_no_defer [10:49:30] [PASSED] drm_test_drm_connector_dynamic_register_no_init [10:49:30] [PASSED] drm_test_drm_connector_dynamic_register_mode_object [10:49:30] [PASSED] drm_test_drm_connector_dynamic_register_sysfs [10:49:30] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name [10:49:30] [PASSED] drm_test_drm_connector_dynamic_register_debugfs [10:49:30] ========= [PASSED] drm_connector_dynamic_register ========== [10:49:30] = drm_connector_attach_broadcast_rgb_property (2 subtests) = [10:49:30] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property [10:49:30] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector [10:49:30] === [PASSED] drm_connector_attach_broadcast_rgb_property === [10:49:30] ========== drm_get_tv_mode_from_name (2 subtests) ========== [10:49:30] ========== drm_test_get_tv_mode_from_name_valid =========== [10:49:30] [PASSED] NTSC [10:49:30] [PASSED] NTSC-443 [10:49:30] [PASSED] NTSC-J [10:49:30] [PASSED] PAL [10:49:30] [PASSED] PAL-M [10:49:30] [PASSED] PAL-N [10:49:30] [PASSED] SECAM [10:49:30] [PASSED] Mono [10:49:30] ====== [PASSED] drm_test_get_tv_mode_from_name_valid ======= [10:49:30] [PASSED] drm_test_get_tv_mode_from_name_truncated [10:49:30] ============ [PASSED] drm_get_tv_mode_from_name ============ [10:49:30] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) = [10:49:30] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb [10:49:30] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc [10:49:30] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1 [10:49:30] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc [10:49:30] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1 [10:49:30] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double [10:49:30] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid = [10:49:30] [PASSED] VIC 96 [10:49:30] [PASSED] VIC 97 [10:49:30] [PASSED] VIC 101 [10:49:30] [PASSED] VIC 102 [10:49:30] [PASSED] VIC 106 [10:49:30] [PASSED] VIC 107 [10:49:30] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid === [10:49:30] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc [10:49:30] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc [10:49:30] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc [10:49:30] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc [10:49:30] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc [10:49:30] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ==== [10:49:30] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) == [10:49:30] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ==== [10:49:30] [PASSED] Automatic [10:49:30] [PASSED] Full [10:49:30] [PASSED] Limited 16:235 [10:49:30] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name === [10:49:30] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid [10:49:30] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ==== [10:49:30] == drm_hdmi_connector_get_output_format_name (2 subtests) == [10:49:30] === drm_test_drm_hdmi_connector_get_output_format_name ==== [10:49:30] [PASSED] RGB [10:49:30] [PASSED] YUV 4:2:0 [10:49:30] [PASSED] YUV 4:2:2 [10:49:30] [PASSED] YUV 4:4:4 [10:49:30] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name === [10:49:30] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid [10:49:30] ==== [PASSED] drm_hdmi_connector_get_output_format_name ==== [10:49:30] ============= drm_damage_helper (21 subtests) ============== [10:49:30] [PASSED] drm_test_damage_iter_no_damage [10:49:30] [PASSED] drm_test_damage_iter_no_damage_fractional_src [10:49:30] [PASSED] drm_test_damage_iter_no_damage_src_moved [10:49:30] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved [10:49:30] [PASSED] drm_test_damage_iter_no_damage_not_visible [10:49:30] [PASSED] drm_test_damage_iter_no_damage_no_crtc [10:49:30] [PASSED] drm_test_damage_iter_no_damage_no_fb [10:49:30] [PASSED] drm_test_damage_iter_simple_damage [10:49:30] [PASSED] drm_test_damage_iter_single_damage [10:49:30] [PASSED] drm_test_damage_iter_single_damage_intersect_src [10:49:30] [PASSED] drm_test_damage_iter_single_damage_outside_src [10:49:30] [PASSED] drm_test_damage_iter_single_damage_fractional_src [10:49:30] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src [10:49:30] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src [10:49:30] [PASSED] drm_test_damage_iter_single_damage_src_moved [10:49:30] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved [10:49:30] [PASSED] drm_test_damage_iter_damage [10:49:30] [PASSED] drm_test_damage_iter_damage_one_intersect [10:49:30] [PASSED] drm_test_damage_iter_damage_one_outside [10:49:30] [PASSED] drm_test_damage_iter_damage_src_moved [10:49:30] [PASSED] drm_test_damage_iter_damage_not_visible [10:49:30] ================ [PASSED] drm_damage_helper ================ [10:49:30] ============== drm_dp_mst_helper (3 subtests) ============== [10:49:30] ============== drm_test_dp_mst_calc_pbn_mode ============== [10:49:30] [PASSED] Clock 154000 BPP 30 DSC disabled [10:49:30] [PASSED] Clock 234000 BPP 30 DSC disabled [10:49:30] [PASSED] Clock 297000 BPP 24 DSC disabled [10:49:30] [PASSED] Clock 332880 BPP 24 DSC enabled [10:49:30] [PASSED] Clock 324540 BPP 24 DSC enabled [10:49:30] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ========== [10:49:30] ============== drm_test_dp_mst_calc_pbn_div =============== [10:49:30] [PASSED] Link rate 2000000 lane count 4 [10:49:30] [PASSED] Link rate 2000000 lane count 2 [10:49:30] [PASSED] Link rate 2000000 lane count 1 [10:49:30] [PASSED] Link rate 1350000 lane count 4 [10:49:30] [PASSED] Link rate 1350000 lane count 2 [10:49:30] [PASSED] Link rate 1350000 lane count 1 [10:49:30] [PASSED] Link rate 1000000 lane count 4 [10:49:30] [PASSED] Link rate 1000000 lane count 2 [10:49:30] [PASSED] Link rate 1000000 lane count 1 [10:49:30] [PASSED] Link rate 810000 lane count 4 [10:49:30] [PASSED] Link rate 810000 lane count 2 [10:49:30] [PASSED] Link rate 810000 lane count 1 [10:49:30] [PASSED] Link rate 540000 lane count 4 [10:49:30] [PASSED] Link rate 540000 lane count 2 [10:49:30] [PASSED] Link rate 540000 lane count 1 [10:49:30] [PASSED] Link rate 270000 lane count 4 [10:49:30] [PASSED] Link rate 270000 lane count 2 [10:49:30] [PASSED] Link rate 270000 lane count 1 [10:49:30] [PASSED] Link rate 162000 lane count 4 [10:49:30] [PASSED] Link rate 162000 lane count 2 [10:49:30] [PASSED] Link rate 162000 lane count 1 [10:49:30] ========== [PASSED] drm_test_dp_mst_calc_pbn_div =========== [10:49:30] ========= drm_test_dp_mst_sideband_msg_req_decode ========= [10:49:30] [PASSED] DP_ENUM_PATH_RESOURCES with port number [10:49:30] [PASSED] DP_POWER_UP_PHY with port number [10:49:30] [PASSED] DP_POWER_DOWN_PHY with port number [10:49:30] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks [10:49:30] [PASSED] DP_ALLOCATE_PAYLOAD with port number [10:49:30] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI [10:49:30] [PASSED] DP_ALLOCATE_PAYLOAD with PBN [10:49:30] [PASSED] DP_QUERY_PAYLOAD with port number [10:49:30] [PASSED] DP_QUERY_PAYLOAD with VCPI [10:49:30] [PASSED] DP_REMOTE_DPCD_READ with port number [10:49:30] [PASSED] DP_REMOTE_DPCD_READ with DPCD address [10:49:30] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes [10:49:30] [PASSED] DP_REMOTE_DPCD_WRITE with port number [10:49:30] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address [10:49:30] [PASSED] DP_REMOTE_DPCD_WRITE with data array [10:49:30] [PASSED] DP_REMOTE_I2C_READ with port number [10:49:30] [PASSED] DP_REMOTE_I2C_READ with I2C device ID [10:49:30] [PASSED] DP_REMOTE_I2C_READ with transactions array [10:49:30] [PASSED] DP_REMOTE_I2C_WRITE with port number [10:49:30] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID [10:49:30] [PASSED] DP_REMOTE_I2C_WRITE with data array [10:49:30] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID [10:49:30] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID [10:49:30] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event [10:49:30] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event [10:49:30] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior [10:49:30] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior [10:49:30] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode ===== [10:49:30] ================ [PASSED] drm_dp_mst_helper ================ [10:49:30] ================== drm_exec (7 subtests) =================== [10:49:30] [PASSED] sanitycheck [10:49:30] [PASSED] test_lock [10:49:30] [PASSED] test_lock_unlock [10:49:30] [PASSED] test_duplicates [10:49:30] [PASSED] test_prepare [10:49:30] [PASSED] test_prepare_array [10:49:30] [PASSED] test_multiple_loops [10:49:30] ==================== [PASSED] drm_exec ===================== [10:49:30] =========== drm_format_helper_test (17 subtests) =========== [10:49:30] ============== drm_test_fb_xrgb8888_to_gray8 ============== [10:49:30] [PASSED] single_pixel_source_buffer [10:49:30] [PASSED] single_pixel_clip_rectangle [10:49:30] [PASSED] well_known_colors [10:49:30] [PASSED] destination_pitch [10:49:30] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ========== [10:49:30] ============= drm_test_fb_xrgb8888_to_rgb332 ============== [10:49:30] [PASSED] single_pixel_source_buffer [10:49:30] [PASSED] single_pixel_clip_rectangle [10:49:30] [PASSED] well_known_colors [10:49:30] [PASSED] destination_pitch [10:49:30] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ========== [10:49:30] ============= drm_test_fb_xrgb8888_to_rgb565 ============== [10:49:30] [PASSED] single_pixel_source_buffer [10:49:30] [PASSED] single_pixel_clip_rectangle [10:49:30] [PASSED] well_known_colors [10:49:30] [PASSED] destination_pitch [10:49:30] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ========== [10:49:30] ============ drm_test_fb_xrgb8888_to_xrgb1555 ============= [10:49:30] [PASSED] single_pixel_source_buffer [10:49:30] [PASSED] single_pixel_clip_rectangle [10:49:30] [PASSED] well_known_colors [10:49:30] [PASSED] destination_pitch [10:49:30] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 ========= [10:49:30] ============ drm_test_fb_xrgb8888_to_argb1555 ============= [10:49:30] [PASSED] single_pixel_source_buffer [10:49:30] [PASSED] single_pixel_clip_rectangle [10:49:30] [PASSED] well_known_colors [10:49:30] [PASSED] destination_pitch [10:49:30] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 ========= [10:49:30] ============ drm_test_fb_xrgb8888_to_rgba5551 ============= [10:49:30] [PASSED] single_pixel_source_buffer [10:49:30] [PASSED] single_pixel_clip_rectangle [10:49:30] [PASSED] well_known_colors [10:49:30] [PASSED] destination_pitch [10:49:30] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 ========= [10:49:30] ============= drm_test_fb_xrgb8888_to_rgb888 ============== [10:49:30] [PASSED] single_pixel_source_buffer [10:49:30] [PASSED] single_pixel_clip_rectangle [10:49:30] [PASSED] well_known_colors [10:49:30] [PASSED] destination_pitch [10:49:30] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ========== [10:49:30] ============= drm_test_fb_xrgb8888_to_bgr888 ============== [10:49:30] [PASSED] single_pixel_source_buffer [10:49:30] [PASSED] single_pixel_clip_rectangle [10:49:30] [PASSED] well_known_colors [10:49:30] [PASSED] destination_pitch [10:49:30] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ========== [10:49:30] ============ drm_test_fb_xrgb8888_to_argb8888 ============= [10:49:30] [PASSED] single_pixel_source_buffer [10:49:30] [PASSED] single_pixel_clip_rectangle [10:49:30] [PASSED] well_known_colors [10:49:30] [PASSED] destination_pitch [10:49:30] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 ========= [10:49:30] =========== drm_test_fb_xrgb8888_to_xrgb2101010 =========== [10:49:30] [PASSED] single_pixel_source_buffer [10:49:30] [PASSED] single_pixel_clip_rectangle [10:49:30] [PASSED] well_known_colors [10:49:30] [PASSED] destination_pitch [10:49:30] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 ======= [10:49:30] =========== drm_test_fb_xrgb8888_to_argb2101010 =========== [10:49:30] [PASSED] single_pixel_source_buffer [10:49:30] [PASSED] single_pixel_clip_rectangle [10:49:30] [PASSED] well_known_colors [10:49:30] [PASSED] destination_pitch [10:49:30] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 ======= [10:49:30] ============== drm_test_fb_xrgb8888_to_mono =============== [10:49:30] [PASSED] single_pixel_source_buffer [10:49:30] [PASSED] single_pixel_clip_rectangle [10:49:30] [PASSED] well_known_colors [10:49:30] [PASSED] destination_pitch [10:49:30] ========== [PASSED] drm_test_fb_xrgb8888_to_mono =========== [10:49:30] ==================== drm_test_fb_swab ===================== [10:49:30] [PASSED] single_pixel_source_buffer [10:49:30] [PASSED] single_pixel_clip_rectangle [10:49:30] [PASSED] well_known_colors [10:49:30] [PASSED] destination_pitch [10:49:30] ================ [PASSED] drm_test_fb_swab ================= [10:49:30] ============ drm_test_fb_xrgb8888_to_xbgr8888 ============= [10:49:30] [PASSED] single_pixel_source_buffer [10:49:30] [PASSED] single_pixel_clip_rectangle [10:49:30] [PASSED] well_known_colors [10:49:30] [PASSED] destination_pitch [10:49:30] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 ========= [10:49:30] ============ drm_test_fb_xrgb8888_to_abgr8888 ============= [10:49:30] [PASSED] single_pixel_source_buffer [10:49:30] [PASSED] single_pixel_clip_rectangle [10:49:30] [PASSED] well_known_colors [10:49:30] [PASSED] destination_pitch [10:49:30] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 ========= [10:49:30] ================= drm_test_fb_clip_offset ================= [10:49:30] [PASSED] pass through [10:49:30] [PASSED] horizontal offset [10:49:30] [PASSED] vertical offset [10:49:30] [PASSED] horizontal and vertical offset [10:49:30] [PASSED] horizontal offset (custom pitch) [10:49:30] [PASSED] vertical offset (custom pitch) [10:49:30] [PASSED] horizontal and vertical offset (custom pitch) [10:49:30] ============= [PASSED] drm_test_fb_clip_offset ============= [10:49:30] =================== drm_test_fb_memcpy ==================== [10:49:30] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258) [10:49:30] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258) [10:49:30] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559) [10:49:30] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258) [10:49:30] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258) [10:49:30] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559) [10:49:30] [PASSED] well_known_colors: XB24 little-endian (0x34324258) [10:49:30] [PASSED] well_known_colors: XRA8 little-endian (0x38415258) [10:49:30] [PASSED] well_known_colors: YU24 little-endian (0x34325559) [10:49:30] [PASSED] destination_pitch: XB24 little-endian (0x34324258) [10:49:30] [PASSED] destination_pitch: XRA8 little-endian (0x38415258) [10:49:30] [PASSED] destination_pitch: YU24 little-endian (0x34325559) [10:49:30] =============== [PASSED] drm_test_fb_memcpy ================ [10:49:30] ============= [PASSED] drm_format_helper_test ============== [10:49:30] ================= drm_format (18 subtests) ================= [10:49:30] [PASSED] drm_test_format_block_width_invalid [10:49:30] [PASSED] drm_test_format_block_width_one_plane [10:49:30] [PASSED] drm_test_format_block_width_two_plane [10:49:30] [PASSED] drm_test_format_block_width_three_plane [10:49:30] [PASSED] drm_test_format_block_width_tiled [10:49:30] [PASSED] drm_test_format_block_height_invalid [10:49:30] [PASSED] drm_test_format_block_height_one_plane [10:49:30] [PASSED] drm_test_format_block_height_two_plane [10:49:30] [PASSED] drm_test_format_block_height_three_plane [10:49:30] [PASSED] drm_test_format_block_height_tiled [10:49:30] [PASSED] drm_test_format_min_pitch_invalid [10:49:30] [PASSED] drm_test_format_min_pitch_one_plane_8bpp [10:49:30] [PASSED] drm_test_format_min_pitch_one_plane_16bpp [10:49:30] [PASSED] drm_test_format_min_pitch_one_plane_24bpp [10:49:30] [PASSED] drm_test_format_min_pitch_one_plane_32bpp [10:49:30] [PASSED] drm_test_format_min_pitch_two_plane [10:49:30] [PASSED] drm_test_format_min_pitch_three_plane_8bpp [10:49:30] [PASSED] drm_test_format_min_pitch_tiled [10:49:30] =================== [PASSED] drm_format ==================== [10:49:30] ============== drm_framebuffer (10 subtests) =============== [10:49:30] ========== drm_test_framebuffer_check_src_coords ========== [10:49:30] [PASSED] Success: source fits into fb [10:49:30] [PASSED] Fail: overflowing fb with x-axis coordinate [10:49:30] [PASSED] Fail: overflowing fb with y-axis coordinate [10:49:30] [PASSED] Fail: overflowing fb with source width [10:49:30] [PASSED] Fail: overflowing fb with source height [10:49:30] ====== [PASSED] drm_test_framebuffer_check_src_coords ====== [10:49:30] [PASSED] drm_test_framebuffer_cleanup [10:49:30] =============== drm_test_framebuffer_create =============== [10:49:30] [PASSED] ABGR8888 normal sizes [10:49:30] [PASSED] ABGR8888 max sizes [10:49:30] [PASSED] ABGR8888 pitch greater than min required [10:49:30] [PASSED] ABGR8888 pitch less than min required [10:49:30] [PASSED] ABGR8888 Invalid width [10:49:30] [PASSED] ABGR8888 Invalid buffer handle [10:49:30] [PASSED] No pixel format [10:49:30] [PASSED] ABGR8888 Width 0 [10:49:30] [PASSED] ABGR8888 Height 0 [10:49:30] [PASSED] ABGR8888 Out of bound height * pitch combination [10:49:30] [PASSED] ABGR8888 Large buffer offset [10:49:30] [PASSED] ABGR8888 Buffer offset for inexistent plane [10:49:30] [PASSED] ABGR8888 Invalid flag [10:49:30] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers [10:49:30] [PASSED] ABGR8888 Valid buffer modifier [10:49:30] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE) [10:49:30] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS [10:49:30] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS [10:49:30] [PASSED] NV12 Normal sizes [10:49:30] [PASSED] NV12 Max sizes [10:49:30] [PASSED] NV12 Invalid pitch [10:49:30] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag [10:49:30] [PASSED] NV12 different modifier per-plane [10:49:30] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE [10:49:30] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS [10:49:30] [PASSED] NV12 Modifier for inexistent plane [10:49:30] [PASSED] NV12 Handle for inexistent plane [10:49:30] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS [10:49:30] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier [10:49:30] [PASSED] YVU420 Normal sizes [10:49:30] [PASSED] YVU420 Max sizes [10:49:30] [PASSED] YVU420 Invalid pitch [10:49:30] [PASSED] YVU420 Different pitches [10:49:30] [PASSED] YVU420 Different buffer offsets/pitches [10:49:30] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS [10:49:30] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS [10:49:30] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS [10:49:30] [PASSED] YVU420 Valid modifier [10:49:30] [PASSED] YVU420 Different modifiers per plane [10:49:30] [PASSED] YVU420 Modifier for inexistent plane [10:49:30] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR) [10:49:30] [PASSED] X0L2 Normal sizes [10:49:30] [PASSED] X0L2 Max sizes [10:49:30] [PASSED] X0L2 Invalid pitch [10:49:30] [PASSED] X0L2 Pitch greater than minimum required [10:49:30] [PASSED] X0L2 Handle for inexistent plane [10:49:30] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set [10:49:30] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set [10:49:30] [PASSED] X0L2 Valid modifier [10:49:30] [PASSED] X0L2 Modifier for inexistent plane [10:49:30] =========== [PASSED] drm_test_framebuffer_create =========== [10:49:30] [PASSED] drm_test_framebuffer_free [10:49:30] [PASSED] drm_test_framebuffer_init [10:49:30] [PASSED] drm_test_framebuffer_init_bad_format [10:49:30] [PASSED] drm_test_framebuffer_init_dev_mismatch [10:49:30] [PASSED] drm_test_framebuffer_lookup [10:49:30] [PASSED] drm_test_framebuffer_lookup_inexistent [10:49:30] [PASSED] drm_test_framebuffer_modifiers_not_supported [10:49:30] ================= [PASSED] drm_framebuffer ================= [10:49:30] ================ drm_gem_shmem (8 subtests) ================ [10:49:30] [PASSED] drm_gem_shmem_test_obj_create [10:49:30] [PASSED] drm_gem_shmem_test_obj_create_private [10:49:30] [PASSED] drm_gem_shmem_test_pin_pages [10:49:30] [PASSED] drm_gem_shmem_test_vmap [10:49:30] [PASSED] drm_gem_shmem_test_get_sg_table [10:49:30] [PASSED] drm_gem_shmem_test_get_pages_sgt [10:49:30] [PASSED] drm_gem_shmem_test_madvise [10:49:30] [PASSED] drm_gem_shmem_test_purge [10:49:30] ================== [PASSED] drm_gem_shmem ================== [10:49:30] === drm_atomic_helper_connector_hdmi_check (27 subtests) === [10:49:30] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode [10:49:30] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1 [10:49:30] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode [10:49:30] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1 [10:49:30] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode [10:49:30] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1 [10:49:30] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 ======= [10:49:30] [PASSED] Automatic [10:49:30] [PASSED] Full [10:49:30] [PASSED] Limited 16:235 [10:49:30] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 === [10:49:30] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed [10:49:30] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed [10:49:30] [PASSED] drm_test_check_disable_connector [10:49:30] [PASSED] drm_test_check_hdmi_funcs_reject_rate [10:49:30] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb [10:49:30] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420 [10:49:30] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422 [10:49:30] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420 [10:49:30] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420 [10:49:30] [PASSED] drm_test_check_output_bpc_crtc_mode_changed [10:49:30] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed [10:49:30] [PASSED] drm_test_check_output_bpc_dvi [10:49:30] [PASSED] drm_test_check_output_bpc_format_vic_1 [10:49:30] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only [10:49:30] [PASSED] drm_test_check_output_bpc_format_display_rgb_only [10:49:30] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only [10:49:30] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only [10:49:30] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc [10:49:30] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc [10:49:30] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc [10:49:30] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ====== [10:49:30] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ==== [10:49:30] [PASSED] drm_test_check_broadcast_rgb_value [10:49:30] [PASSED] drm_test_check_bpc_8_value [10:49:30] [PASSED] drm_test_check_bpc_10_value [10:49:30] [PASSED] drm_test_check_bpc_12_value [10:49:30] [PASSED] drm_test_check_format_value [10:49:30] [PASSED] drm_test_check_tmds_char_value [10:49:30] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ====== [10:49:30] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) = [10:49:30] [PASSED] drm_test_check_mode_valid [10:49:30] [PASSED] drm_test_check_mode_valid_reject [10:49:30] [PASSED] drm_test_check_mode_valid_reject_rate [10:49:30] [PASSED] drm_test_check_mode_valid_reject_max_clock [10:49:30] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid === [10:49:30] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) = [10:49:30] [PASSED] drm_test_check_infoframes [10:49:30] [PASSED] drm_test_check_reject_avi_infoframe [10:49:30] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8 [10:49:30] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10 [10:49:30] [PASSED] drm_test_check_reject_audio_infoframe [10:49:30] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes === [10:49:30] ================= drm_managed (2 subtests) ================= [10:49:30] [PASSED] drm_test_managed_release_action [10:49:30] [PASSED] drm_test_managed_run_action [10:49:30] =================== [PASSED] drm_managed =================== [10:49:30] =================== drm_mm (6 subtests) ==================== [10:49:30] [PASSED] drm_test_mm_init [10:49:30] [PASSED] drm_test_mm_debug [10:49:30] [PASSED] drm_test_mm_align32 [10:49:30] [PASSED] drm_test_mm_align64 [10:49:30] [PASSED] drm_test_mm_lowest [10:49:30] [PASSED] drm_test_mm_highest [10:49:30] ===================== [PASSED] drm_mm ====================== [10:49:30] ============= drm_modes_analog_tv (5 subtests) ============= [10:49:30] [PASSED] drm_test_modes_analog_tv_mono_576i [10:49:30] [PASSED] drm_test_modes_analog_tv_ntsc_480i [10:49:30] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined [10:49:30] [PASSED] drm_test_modes_analog_tv_pal_576i [10:49:30] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined [10:49:30] =============== [PASSED] drm_modes_analog_tv =============== [10:49:30] ============== drm_plane_helper (2 subtests) =============== [10:49:30] =============== drm_test_check_plane_state ================ [10:49:30] [PASSED] clipping_simple [10:49:30] [PASSED] clipping_rotate_reflect [10:49:30] [PASSED] positioning_simple [10:49:30] [PASSED] upscaling [10:49:30] [PASSED] downscaling [10:49:30] [PASSED] rounding1 [10:49:30] [PASSED] rounding2 [10:49:30] [PASSED] rounding3 [10:49:30] [PASSED] rounding4 [10:49:30] =========== [PASSED] drm_test_check_plane_state ============ [10:49:30] =========== drm_test_check_invalid_plane_state ============ [10:49:30] [PASSED] positioning_invalid [10:49:30] [PASSED] upscaling_invalid [10:49:30] [PASSED] downscaling_invalid [10:49:30] ======= [PASSED] drm_test_check_invalid_plane_state ======== [10:49:30] ================ [PASSED] drm_plane_helper ================= [10:49:30] ====== drm_connector_helper_tv_get_modes (1 subtest) ======= [10:49:30] ====== drm_test_connector_helper_tv_get_modes_check ======= [10:49:30] [PASSED] None [10:49:30] [PASSED] PAL [10:49:30] [PASSED] NTSC [10:49:30] [PASSED] Both, NTSC Default [10:49:30] [PASSED] Both, PAL Default [10:49:30] [PASSED] Both, NTSC Default, with PAL on command-line [10:49:30] [PASSED] Both, PAL Default, with NTSC on command-line [10:49:30] == [PASSED] drm_test_connector_helper_tv_get_modes_check === [10:49:30] ======== [PASSED] drm_connector_helper_tv_get_modes ======== [10:49:30] ================== drm_rect (9 subtests) =================== [10:49:30] [PASSED] drm_test_rect_clip_scaled_div_by_zero [10:49:30] [PASSED] drm_test_rect_clip_scaled_not_clipped [10:49:30] [PASSED] drm_test_rect_clip_scaled_clipped [10:49:30] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned [10:49:30] ================= drm_test_rect_intersect ================= [10:49:30] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0 [10:49:30] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1 [10:49:30] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0 [10:49:30] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1 [10:49:30] [PASSED] right x left: 2x1+0+0 x 3x1+1+0 [10:49:30] [PASSED] left x right: 3x1+1+0 x 2x1+0+0 [10:49:30] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1 [10:49:30] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0 [10:49:30] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1 [10:49:30] [PASSED] touching side: 1x1+0+0 x 1x1+1+0 [10:49:30] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0 [10:49:30] [PASSED] inside another: 2x2+0+0 x 1x1+1+1 [10:49:30] [PASSED] far away: 1x1+0+0 x 1x1+3+6 [10:49:30] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10 [10:49:30] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10 [10:49:30] ============= [PASSED] drm_test_rect_intersect ============= [10:49:30] ================ drm_test_rect_calc_hscale ================ [10:49:30] [PASSED] normal use [10:49:30] [PASSED] out of max range [10:49:30] [PASSED] out of min range [10:49:30] [PASSED] zero dst [10:49:30] [PASSED] negative src [10:49:30] [PASSED] negative dst [10:49:30] ============ [PASSED] drm_test_rect_calc_hscale ============ [10:49:30] ================ drm_test_rect_calc_vscale ================ [10:49:30] [PASSED] normal use [10:49:30] [PASSED] out of max range [10:49:30] [PASSED] out of min range [10:49:30] [PASSED] zero dst [10:49:30] [PASSED] negative src [10:49:30] [PASSED] negative dst stty: 'standard input': Inappropriate ioctl for device [10:49:30] ============ [PASSED] drm_test_rect_calc_vscale ============ [10:49:30] ================== drm_test_rect_rotate =================== [10:49:30] [PASSED] reflect-x [10:49:30] [PASSED] reflect-y [10:49:30] [PASSED] rotate-0 [10:49:30] [PASSED] rotate-90 [10:49:30] [PASSED] rotate-180 [10:49:30] [PASSED] rotate-270 [10:49:30] ============== [PASSED] drm_test_rect_rotate =============== [10:49:30] ================ drm_test_rect_rotate_inv ================= [10:49:30] [PASSED] reflect-x [10:49:30] [PASSED] reflect-y [10:49:30] [PASSED] rotate-0 [10:49:30] [PASSED] rotate-90 [10:49:30] [PASSED] rotate-180 [10:49:30] [PASSED] rotate-270 [10:49:30] ============ [PASSED] drm_test_rect_rotate_inv ============= [10:49:30] ==================== [PASSED] drm_rect ===================== [10:49:30] ============ drm_sysfb_modeset_test (1 subtest) ============ [10:49:30] ============ drm_test_sysfb_build_fourcc_list ============= [10:49:30] [PASSED] no native formats [10:49:30] [PASSED] XRGB8888 as native format [10:49:30] [PASSED] remove duplicates [10:49:30] [PASSED] convert alpha formats [10:49:30] [PASSED] random formats [10:49:30] ======== [PASSED] drm_test_sysfb_build_fourcc_list ========= [10:49:30] ============= [PASSED] drm_sysfb_modeset_test ============== [10:49:30] ================== drm_fixp (2 subtests) =================== [10:49:30] [PASSED] drm_test_int2fixp [10:49:30] [PASSED] drm_test_sm2fixp [10:49:30] ==================== [PASSED] drm_fixp ===================== [10:49:30] ============================================================ [10:49:30] Testing complete. Ran 621 tests: passed: 621 [10:49:30] Elapsed time: 27.396s total, 1.626s configuring, 25.551s building, 0.180s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig [10:49:30] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig [10:49:32] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [10:49:42] Starting KUnit Kernel (1/1)... [10:49:42] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [10:49:42] ================= ttm_device (5 subtests) ================== [10:49:42] [PASSED] ttm_device_init_basic [10:49:42] [PASSED] ttm_device_init_multiple [10:49:42] [PASSED] ttm_device_fini_basic [10:49:42] [PASSED] ttm_device_init_no_vma_man [10:49:42] ================== ttm_device_init_pools ================== [10:49:42] [PASSED] No DMA allocations, no DMA32 required [10:49:42] [PASSED] DMA allocations, DMA32 required [10:49:42] [PASSED] No DMA allocations, DMA32 required [10:49:42] [PASSED] DMA allocations, no DMA32 required [10:49:42] ============== [PASSED] ttm_device_init_pools ============== [10:49:42] =================== [PASSED] ttm_device ==================== [10:49:42] ================== ttm_pool (8 subtests) =================== [10:49:42] ================== ttm_pool_alloc_basic =================== [10:49:42] [PASSED] One page [10:49:42] [PASSED] More than one page [10:49:42] [PASSED] Above the allocation limit [10:49:42] [PASSED] One page, with coherent DMA mappings enabled [10:49:42] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [10:49:42] ============== [PASSED] ttm_pool_alloc_basic =============== [10:49:42] ============== ttm_pool_alloc_basic_dma_addr ============== [10:49:42] [PASSED] One page [10:49:42] [PASSED] More than one page [10:49:42] [PASSED] Above the allocation limit [10:49:42] [PASSED] One page, with coherent DMA mappings enabled [10:49:42] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [10:49:42] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ========== [10:49:42] [PASSED] ttm_pool_alloc_order_caching_match [10:49:42] [PASSED] ttm_pool_alloc_caching_mismatch [10:49:42] [PASSED] ttm_pool_alloc_order_mismatch [10:49:42] [PASSED] ttm_pool_free_dma_alloc [10:49:42] [PASSED] ttm_pool_free_no_dma_alloc [10:49:42] [PASSED] ttm_pool_fini_basic [10:49:42] ==================== [PASSED] ttm_pool ===================== [10:49:42] ================ ttm_resource (8 subtests) ================= [10:49:42] ================= ttm_resource_init_basic ================= [10:49:42] [PASSED] Init resource in TTM_PL_SYSTEM [10:49:42] [PASSED] Init resource in TTM_PL_VRAM [10:49:42] [PASSED] Init resource in a private placement [10:49:42] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags [10:49:42] ============= [PASSED] ttm_resource_init_basic ============= [10:49:42] [PASSED] ttm_resource_init_pinned [10:49:42] [PASSED] ttm_resource_fini_basic [10:49:42] [PASSED] ttm_resource_manager_init_basic [10:49:42] [PASSED] ttm_resource_manager_usage_basic [10:49:42] [PASSED] ttm_resource_manager_set_used_basic [10:49:42] [PASSED] ttm_sys_man_alloc_basic [10:49:42] [PASSED] ttm_sys_man_free_basic [10:49:42] ================== [PASSED] ttm_resource =================== [10:49:42] =================== ttm_tt (15 subtests) =================== [10:49:42] ==================== ttm_tt_init_basic ==================== [10:49:42] [PASSED] Page-aligned size [10:49:42] [PASSED] Extra pages requested [10:49:42] ================ [PASSED] ttm_tt_init_basic ================ [10:49:42] [PASSED] ttm_tt_init_misaligned [10:49:42] [PASSED] ttm_tt_fini_basic [10:49:42] [PASSED] ttm_tt_fini_sg [10:49:42] [PASSED] ttm_tt_fini_shmem [10:49:42] [PASSED] ttm_tt_create_basic [10:49:42] [PASSED] ttm_tt_create_invalid_bo_type [10:49:42] [PASSED] ttm_tt_create_ttm_exists [10:49:42] [PASSED] ttm_tt_create_failed [10:49:42] [PASSED] ttm_tt_destroy_basic [10:49:42] [PASSED] ttm_tt_populate_null_ttm [10:49:42] [PASSED] ttm_tt_populate_populated_ttm [10:49:42] [PASSED] ttm_tt_unpopulate_basic [10:49:42] [PASSED] ttm_tt_unpopulate_empty_ttm [10:49:42] [PASSED] ttm_tt_swapin_basic [10:49:42] ===================== [PASSED] ttm_tt ====================== [10:49:42] =================== ttm_bo (14 subtests) =================== [10:49:42] =========== ttm_bo_reserve_optimistic_no_ticket =========== [10:49:42] [PASSED] Cannot be interrupted and sleeps [10:49:42] [PASSED] Cannot be interrupted, locks straight away [10:49:42] [PASSED] Can be interrupted, sleeps [10:49:42] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket ======= [10:49:42] [PASSED] ttm_bo_reserve_locked_no_sleep [10:49:42] [PASSED] ttm_bo_reserve_no_wait_ticket [10:49:42] [PASSED] ttm_bo_reserve_double_resv [10:49:42] [PASSED] ttm_bo_reserve_interrupted [10:49:42] [PASSED] ttm_bo_reserve_deadlock [10:49:42] [PASSED] ttm_bo_unreserve_basic [10:49:42] [PASSED] ttm_bo_unreserve_pinned [10:49:42] [PASSED] ttm_bo_unreserve_bulk [10:49:42] [PASSED] ttm_bo_fini_basic [10:49:42] [PASSED] ttm_bo_fini_shared_resv [10:49:42] [PASSED] ttm_bo_pin_basic [10:49:42] [PASSED] ttm_bo_pin_unpin_resource [10:49:42] [PASSED] ttm_bo_multiple_pin_one_unpin [10:49:42] ===================== [PASSED] ttm_bo ====================== [10:49:42] ============== ttm_bo_validate (21 subtests) =============== [10:49:42] ============== ttm_bo_init_reserved_sys_man =============== [10:49:42] [PASSED] Buffer object for userspace [10:49:42] [PASSED] Kernel buffer object [10:49:42] [PASSED] Shared buffer object [10:49:42] ========== [PASSED] ttm_bo_init_reserved_sys_man =========== [10:49:42] ============== ttm_bo_init_reserved_mock_man ============== [10:49:42] [PASSED] Buffer object for userspace [10:49:42] [PASSED] Kernel buffer object [10:49:42] [PASSED] Shared buffer object [10:49:42] ========== [PASSED] ttm_bo_init_reserved_mock_man ========== [10:49:42] [PASSED] ttm_bo_init_reserved_resv [10:49:42] ================== ttm_bo_validate_basic ================== [10:49:42] [PASSED] Buffer object for userspace [10:49:42] [PASSED] Kernel buffer object [10:49:42] [PASSED] Shared buffer object [10:49:42] ============== [PASSED] ttm_bo_validate_basic ============== [10:49:42] [PASSED] ttm_bo_validate_invalid_placement [10:49:42] ============= ttm_bo_validate_same_placement ============== [10:49:42] [PASSED] System manager [10:49:42] [PASSED] VRAM manager [10:49:42] ========= [PASSED] ttm_bo_validate_same_placement ========== [10:49:42] [PASSED] ttm_bo_validate_failed_alloc [10:49:42] [PASSED] ttm_bo_validate_pinned [10:49:42] [PASSED] ttm_bo_validate_busy_placement [10:49:42] ================ ttm_bo_validate_multihop ================= [10:49:42] [PASSED] Buffer object for userspace [10:49:42] [PASSED] Kernel buffer object [10:49:42] [PASSED] Shared buffer object [10:49:42] ============ [PASSED] ttm_bo_validate_multihop ============= [10:49:42] ========== ttm_bo_validate_no_placement_signaled ========== [10:49:42] [PASSED] Buffer object in system domain, no page vector [10:49:42] [PASSED] Buffer object in system domain with an existing page vector [10:49:42] ====== [PASSED] ttm_bo_validate_no_placement_signaled ====== [10:49:42] ======== ttm_bo_validate_no_placement_not_signaled ======== [10:49:42] [PASSED] Buffer object for userspace [10:49:42] [PASSED] Kernel buffer object [10:49:42] [PASSED] Shared buffer object [10:49:42] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ==== [10:49:42] [PASSED] ttm_bo_validate_move_fence_signaled [10:49:42] ========= ttm_bo_validate_move_fence_not_signaled ========= [10:49:42] [PASSED] Waits for GPU [10:49:42] [PASSED] Tries to lock straight away [10:49:42] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled ===== [10:49:42] [PASSED] ttm_bo_validate_happy_evict [10:49:42] [PASSED] ttm_bo_validate_all_pinned_evict [10:49:42] [PASSED] ttm_bo_validate_allowed_only_evict [10:49:42] [PASSED] ttm_bo_validate_deleted_evict [10:49:42] [PASSED] ttm_bo_validate_busy_domain_evict [10:49:42] [PASSED] ttm_bo_validate_evict_gutting [10:49:42] [PASSED] ttm_bo_validate_recrusive_evict stty: 'standard input': Inappropriate ioctl for device [10:49:42] ================= [PASSED] ttm_bo_validate ================= [10:49:42] ============================================================ [10:49:42] Testing complete. Ran 101 tests: passed: 101 [10:49:42] Elapsed time: 11.477s total, 1.713s configuring, 9.548s building, 0.181s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
Patchwork
CI✓ Xe.CI.BAT: success for series starting with [1/2] drm/i915/dp: Fix pipe BPP clamping due to HDR
In reply to Imre Deak== Series Details ==
== Series Details ==
Series: series starting with [1/2] drm/i915/dp: Fix pipe BPP clamping due to HDR
URL : https://patchwork.freedesktop.org/series/161265/
State : success
== Summary ==
CI Bug Log - changes from xe-4518-0082025812a31eda451fb14f13f52683ed375c49_BAT -> xe-pw-161265v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (12 -> 12)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-161265v1_BAT that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@xe_waitfence@abstime:
- bat-dg2-oem2: [TIMEOUT][1] ([Intel XE#6506]) -> [PASS][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/bat-dg2-oem2/igt@[email protected]
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/bat-dg2-oem2/igt@[email protected]
[Intel XE#6506]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6506
Build changes
-------------
* Linux: xe-4518-0082025812a31eda451fb14f13f52683ed375c49 -> xe-pw-161265v1
IGT_8740: 36ebdc56b434bf330c44e96205f1fcefcf598651 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4518-0082025812a31eda451fb14f13f52683ed375c49: 0082025812a31eda451fb14f13f52683ed375c49
xe-pw-161265v1: 161265v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/index.html
Patchwork
CI✓ i915.CI.BAT: success for series starting with [1/2] drm/i915/dp: Fix pipe BPP clamping due to HDR
In reply to Imre Deak== Series Details ==
== Series Details ==
Series: series starting with [1/2] drm/i915/dp: Fix pipe BPP clamping due to HDR
URL : https://patchwork.freedesktop.org/series/161264/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_17951 -> Patchwork_161264v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/index.html
Participating hosts (43 -> 41)
------------------------------
Missing (2): bat-dg2-13 fi-snb-2520m
Known issues
------------
Here are the changes found in Patchwork_161264v1 that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@i915_selftest@live:
- bat-mtlp-8: [DMESG-FAIL][1] ([i915#12061]) -> [PASS][2] +1 other test pass
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/bat-mtlp-8/igt@[email protected]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/bat-mtlp-8/igt@[email protected]
* igt@i915_selftest@live@workarounds:
- bat-mtlp-9: [DMESG-FAIL][3] ([i915#12061]) -> [PASS][4] +1 other test pass
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/bat-mtlp-9/igt@i915_selftest@[email protected]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/bat-mtlp-9/igt@i915_selftest@[email protected]
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
Build changes
-------------
* Linux: CI_DRM_17951 -> Patchwork_161264v1
CI-20190529: 20190529
CI_DRM_17951: d9124a6be3c7bdaeb14c3629013dde27929dbf04 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8740: 36ebdc56b434bf330c44e96205f1fcefcf598651 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_161264v1: d9124a6be3c7bdaeb14c3629013dde27929dbf04 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/index.html
Quoted 36 lines · Imre Deak
The pipe BPP value shouldn't be set outside of the source's / sink's valid pipe BPP range, ensure this when increasing the minimum pipe BPP value to 30 due to HDR.
Fixes ba49a4643cf53 ("drm/i915/dp: Set min_bpp limit to 30 in HDR mode")Cc Chaitanya Kumar Borah <[email protected]>Cc <[email protected]> # v6.18+Signed-off-by Imre Deak <[email protected]>--- drivers/gpu/drm/i915/display/intel_dp.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-)drivers/gpu/drm/i915/display/intel_dp.c +2
-2@@ -2697,6 +2697,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,bool dsc, struct link_config_limits *limits) { + struct intel_display *display = to_intel_display(intel_dp);bool is_mst =intel_crtc_has_type (crtc_state,INTEL_OUTPUT_DP_MST );struct intel_connector *connector =to_intel_connector (conn_state->connector);@@ -2709,8 +2710,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, limits->min_lane_count =intel_dp_min_lane_count (intel_dp); limits->max_lane_count =intel_dp_max_lane_count (intel_dp); - limits->pipe.min_bpp =intel_dp_in_hdr_mode (conn_state) ?30 : -intel_dp_min_bpp (crtc_state->output_format); + limits->pipe.min_bpp =intel_dp_min_bpp (crtc_state->output_format);if (is_mst) {/* * FIXME: If all the streams can't fit into the link with their @@ -2726,6 +2726,16 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, respect_downstream_limits);
drivers/gpu/drm/i915/display/intel_dp.c intel_dp_compute_config_limits(struct intel_dp *intel_dp, · line 2736
Quoted 10 lines
drivers/gpu/drm/i915/display/intel_dp.c +8
-0} +if (intel_dp_in_hdr_mode (conn_state)) { +if (limits->pipe.min_bpp <=30 && limits->pipe.max_bpp >=30 ) + limits->pipe.min_bpp =30 ; +else +drm_dbg_kms (display->drm, +"[CONNECTOR:%d:%s] HDR min 30 bpp outside of valid pipe bpp range (%d-%d)\n" , + connector->base.base.id, connector->base.name, + limits->pipe.min_bpp, limits->pipe.max_bpp);
pipe.max_bpp < 30 will be either due to the max_bpc property set to less than 10, or perhaps when the panel itself does not support 10 bpc (limited by EDID or VBT). With these constraints doesn't make sense to enable HDR and send HDR metadata.
However, as we see in some reported issues [1] [2], in practice some compositor seems to enable HDR by default and with the hard limit set, they report blankout. So it does make sense to raise the min bpp limit only if its inside the supported range.
[1] https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/7052
[2] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969#note_3248404
Quoted 5 lines
drivers/gpu/drm/i915/display/intel_dp.c +2
-0+ } +if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits (connector, limits))return false;
Quoted 57 lines · Ankit K
Quoted 38 lines · Imre Deak
The pipe BPP value shouldn't be set outside of the source's / sink's valid pipe BPP range, ensure this when increasing the minimum pipe BPP value to 30 due to HDR.
Fixes ba49a4643cf53 ("drm/i915/dp: Set min_bpp limit to 30 in HDR mode")Cc Chaitanya Kumar Borah <[email protected]>Cc <[email protected]> # v6.18+Signed-off-by Imre Deak <[email protected]>---
drivers/gpu/drm/i915/display/intel_dp.c| 14 ++++++++++++--1 file changed, 12 insertions(+), 2 deletions(-)drivers/gpu/drm/i915/display/intel_dp.c +1
-0@@ -2697,6 +2697,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, bool dsc, struct link_config_limits *limits) { + struct intel_display *display = to_intel_display(intel_dp); bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST);struct
intel_connector*connector =to_intel_connector(conn_state->connector);drivers/gpu/drm/i915/display/intel_dp.c +1
-2@@ -2709,8 +2710,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, limits->min_lane_count = intel_dp_min_lane_count(intel_dp); limits->max_lane_count = intel_dp_max_lane_count(intel_dp); - limits->pipe.min_bpp = intel_dp_in_hdr_mode(conn_state) ? 30 : - intel_dp_min_bpp(crtc_state->output_format); + limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format); if (is_mst) { /** FIXME: If all the streams can't fit into the link with their @@ -2726,6 +2726,16 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, respect_downstream_limits);drivers/gpu/drm/i915/display/intel_dp.c intel_dp_compute_config_limits(struct intel_dp · line 2737
Quoted 10 lines
drivers/gpu/drm/i915/display/intel_dp.c +8
-0} + if (intel_dp_in_hdr_mode(conn_state)) { + if (limits->pipe.min_bpp <= 30 && limits->pipe.max_bpp >= 30) + limits->pipe.min_bpp = 30; + else + drm_dbg_kms(display->drm, + "[CONNECTOR:%d:%s] HDR min 30 bpp outside of valid pipe bpp range (%d-%d)\n", + connector->base.base.id, connector->base.name, + limits->pipe.min_bpp, limits->pipe.max_bpp);pipe.max_bpp < 30 will be either due to the
max_bpcproperty set to less than 10, or perhaps when the panel itself does not support 10 bpc (limited by EDID or VBT). With these constraints doesn't make sense to enable HDR and send HDR metadata.
However, as we see in some reported issues [1] [2], in practice some compositor seems to enable HDR by default and with the hard limit set, they report blankout. So it does make sense to raise the min bpp limit only if its inside the supported range.
Quoted 6 lines
Reviewed-by Ankit Nautiyal <[email protected]>[1] https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/7052
[2] https://gitlab.freedesktop.org/drm/i915/kernel/-/ issues/5969#note_3248404
I am not sure if this patch would help with the above gitlabs. For example in case of #7052 pipe max bpp is 30 and the commit still fails. However, I need to look deeper.
I am thinking of relaxing this restriction all together because the earlier assumption that a panel advertising HDR will support atleast 10bpc in all it's mode turns out to be false.
Currently, I am inclined on the following policy.
- If DSC is not available, fall back to normal bandwidth calculations and select the highest bpp the link can support. (Also preferred by Kwin)
- If DSC is available, prefer falling back to DSC and attempt the highest bpp allowed by bandwidth constraints.
I am working on a patch for this and should be able to float something soon. Imre, if you agree with this policy, would you please wait for the patch. That should make it easier to send out fix for stable kernels.
==
Chaitanya
Quoted 4 lines
Quoted 4 lines
drivers/gpu/drm/i915/display/intel_dp.c +2
-0+ } + if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits)) return false;
Quoted 70 lines · Chaitanya Kumar
Quoted 67 lines · Ankit K
Quoted 39 lines · Imre Deak
The pipe BPP value shouldn't be set outside of the source's / sink's valid pipe BPP range, ensure this when increasing the minimum pipe BPP value to 30 due to HDR.
Fixes ba49a4643cf53 ("drm/i915/dp: Set min_bpp limit to 30 in HDR mode")Cc Chaitanya Kumar Borah <[email protected]>Cc <[email protected]> # v6.18+Signed-off-by Imre Deak <[email protected]>---
drivers/gpu/drm/i915/display/intel_dp.c| 14 ++++++++++++--1 file changed, 12 insertions(+), 2 deletions(-)drivers/gpu/ renamed from drivers/gpu/drm/i915/display/intel_dp.c +0
-0
drm/i915/display/intel_dp.c
index2b8f43e211741..4d8f480cf803f100644drivers/gpu/drm/i915/display/intel_dp.c +1
-0@@ -2697,6 +2697,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, bool dsc, struct link_config_limits *limits) { + struct intel_display *display = to_intel_display(intel_dp); bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST);struct
intel_connector*connector =to_intel_connector(conn_state->connector);drivers/gpu/drm/i915/display/intel_dp.c +1
-2@@ -2709,8 +2710,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, limits->min_lane_count = intel_dp_min_lane_count(intel_dp); limits->max_lane_count = intel_dp_max_lane_count(intel_dp); - limits->pipe.min_bpp = intel_dp_in_hdr_mode(conn_state) ? 30 : - intel_dp_min_bpp(crtc_state->output_format); + limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format); if (is_mst) { /** FIXME: If all the streams can't fit into the link with their @@ -2726,6 +2726,16 @@ intel_dp_compute_config_limits(structintel_dp *intel_dp, respect_downstream_limits);drivers/gpu/drm/i915/display/intel_dp.c intel_dp_compute_config_limits(struct · line 2737
Quoted 10 lines
drivers/gpu/drm/i915/display/intel_dp.c +8
-0} + if (intel_dp_in_hdr_mode(conn_state)) { + if (limits->pipe.min_bpp <= 30 && limits->pipe.max_bpp >= 30) + limits->pipe.min_bpp = 30; + else + drm_dbg_kms(display->drm, + "[CONNECTOR:%d:%s] HDR min 30 bpp outside of valid pipe bpp range (%d-%d)\n", + connector->base.base.id, connector->base.name, + limits->pipe.min_bpp, limits->pipe.max_bpp);pipe.max_bpp < 30 will be either due to the
max_bpcproperty set to less than 10, or perhaps when the panel itself does not support 10 bpc (limited by EDID or VBT).
With these constraints doesn't make sense to enable HDR and send HDR metadata.
However, as we see in some reported issues [1] [2], in practice some compositor seems to enable HDR by default and with the hard limit set, they report blankout.
So it does make sense to raise the min bpp limit only if its inside the supported range.Reviewed-by Ankit Nautiyal <[email protected]>
Quoted 7 lines
Quoted 4 lines
[1] https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/7052
[2] https://gitlab.freedesktop.org/drm/i915/kernel/-/
issues/5969#note_3248404I am not sure if this patch would help with the above gitlabs. For example in case of #7052 pipe max bpp is 30 and the commit still fails.
It does fix though reported cases where the sink does not support 10 BPC at all. Yes the monitor in #7052 is still a problem, since it supports 10 BPC only with lower resolution, where the link BW would allow this and he monitor doesn't have DSC either.
Quoted 6 lines
However, I need to look deeper.
I am thinking of relaxing this restriction all together because the earlier assumption that a panel advertising HDR will support atleast 10bpc in all it's mode turns out to be false.
Quoted 7 lines
Currently, I am inclined on the following policy.
- If DSC is not available, fall back to normal bandwidth calculations and select the highest bpp the link can support. (Also preferred by Kwin)
- If DSC is available, prefer falling back to DSC and attempt the highest bpp allowed by bandwidth constraints.
The patch does the above, except for not handling the case where the monitor doesn't support DSC. The attach patch handles that too and so fixes #7052 as well, are you ok with it?
Quoted 4 lines
I am working on a patch for this and should be able to float something soon. Imre, if you agree with this policy, would you please wait for the patch. That should make it easier to send out fix for stable kernels.
Quoted 9 lines
==
ChaitanyaQuoted 5 lines
Quoted 5 lines
drivers/gpu/drm/i915/display/intel_dp.c +2
-0+ } + if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))return false;
From 550f8de76d0b5a497d36a24dee6988d07a634588 Mon Sep 17 00:00:00 2001
From: Imre Deak <[email protected]>
Date: Thu, 5 Feb 2026 16:49:03 +0200
Subject: [PATCH] drm/i915/dp: Fix pipe BPP clamping due to HDR
The pipe BPP value shouldn't be set outside of the source's / sink's valid pipe BPP range, ensure this when increasing the minimum pipe BPP value to 30 due to HDR.
--- drivers/gpu/drm/i915/display/intel_dp.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-)
drivers/gpu/drm/i915/display/intel_dp.c +13 -2
@@ -2703,6 +2703,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,bool dsc, struct link_config_limits *limits) { + struct intel_display *display = to_intel_display(intel_dp);bool is_mst =intel_crtc_has_type (crtc_state,INTEL_OUTPUT_DP_MST );struct intel_connector *connector =to_intel_connector (conn_state->connector);
@@ -2715,8 +2716,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, limits->min_lane_count =intel_dp_min_lane_count (intel_dp); limits->max_lane_count =intel_dp_max_lane_count (intel_dp); - limits->pipe.min_bpp =intel_dp_in_hdr_mode (conn_state) ?30 : -intel_dp_min_bpp (crtc_state->output_format); + limits->pipe.min_bpp =intel_dp_min_bpp (crtc_state->output_format);if (is_mst) {/* * FIXME: If all the streams can't fit into the link with their
@@ -2732,6 +2732,17 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, respect_downstream_limits); } +if (intel_dp_in_hdr_mode (conn_state) && +intel_dp_supports_dsc (intel_dp, connector, crtc_state)) { +if (limits->pipe.min_bpp <=30 && limits->pipe.max_bpp >=30 ) + limits->pipe.min_bpp =30 ; +else +drm_dbg_kms (display->drm, +"[CONNECTOR:%d:%s] HDR min 30 bpp outside of valid pipe bpp range (%d-%d)\n" , + connector->base.base.id, connector->base.name, + limits->pipe.min_bpp, limits->pipe.max_bpp); + } +if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits (connector, limits))return false;
Signature · 1 line
2.49.1
Quoted 95 lines · Imre Deak
Quoted 70 lines · Chaitanya Kumar
Quoted 67 lines · Ankit K
Quoted 39 lines · Imre Deak
The pipe BPP value shouldn't be set outside of the source's / sink's valid pipe BPP range, ensure this when increasing the minimum pipe BPP value to 30 due to HDR.
Fixes ba49a4643cf53 ("drm/i915/dp: Set min_bpp limit to 30 in HDR mode")Cc Chaitanya Kumar Borah <[email protected]>Cc <[email protected]> # v6.18+Signed-off-by Imre Deak <[email protected]>--- drivers/gpu/drm/i915/display/intel_dp.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-)drivers/gpu/ renamed from drivers/gpu/drm/i915/display/intel_dp.c +0
-0
drm/i915/display/intel_dp.c
index2b8f43e211741..4d8f480cf803f100644drivers/gpu/drm/i915/display/intel_dp.c +1
-0@@ -2697,6 +2697,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, bool dsc, struct link_config_limits *limits) { + struct intel_display *display = to_intel_display(intel_dp); bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST); struct intel_connector *connector =
to_intel_connector(conn_state->connector);drivers/gpu/drm/i915/display/intel_dp.c +1
-2@@ -2709,8 +2710,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, limits->min_lane_count = intel_dp_min_lane_count(intel_dp); limits->max_lane_count = intel_dp_max_lane_count(intel_dp); - limits->pipe.min_bpp = intel_dp_in_hdr_mode(conn_state) ? 30 : - intel_dp_min_bpp(crtc_state->output_format); + limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format); if (is_mst) { /** FIXME: If all the streams can't fit into the link with their @@ -2726,6 +2726,16 @@ intel_dp_compute_config_limits(structintel_dp *intel_dp, respect_downstream_limits);drivers/gpu/drm/i915/display/intel_dp.c intel_dp_compute_config_limits(struct · line 2737
Quoted 10 lines
drivers/gpu/drm/i915/display/intel_dp.c +8
-0} + if (intel_dp_in_hdr_mode(conn_state)) { + if (limits->pipe.min_bpp <= 30 && limits->pipe.max_bpp >= 30) + limits->pipe.min_bpp = 30; + else + drm_dbg_kms(display->drm, + "[CONNECTOR:%d:%s] HDR min 30 bpp outside of valid pipe bpp range (%d-%d)\n", + connector->base.base.id, connector->base.name, + limits->pipe.min_bpp, limits->pipe.max_bpp);pipe.max_bpp < 30 will be either due to the
max_bpcproperty set to less than 10, or perhaps when the panel itself does not support 10 bpc (limited by EDID or VBT).
With these constraints doesn't make sense to enable HDR and send HDR metadata.
However, as we see in some reported issues [1] [2], in practice some compositor seems to enable HDR by default and with the hard limit set, they report blankout.
So it does make sense to raise the min bpp limit only if its inside the supported range.Reviewed-by Ankit Nautiyal <[email protected]>Quoted 7 lines
Quoted 4 lines
[1] https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/7052
[2] https://gitlab.freedesktop.org/drm/i915/kernel/-/
issues/5969#note_3248404I am not sure if this patch would help with the above gitlabs. For example in case of #7052 pipe max bpp is 30 and the commit still fails.
It does fix though reported cases where the sink does not support 10 BPC at all. Yes the monitor in #7052 is still a problem, since it supports 10 BPC only with lower resolution, where the link BW would allow this and he monitor doesn't have DSC either.
Quoted 11 lines
However, I need to look deeper.
I am thinking of relaxing this restriction all together because the earlier assumption that a panel advertising HDR will support atleast 10bpc in all it's mode turns out to be false.
Currently, I am inclined on the following policy.
- If DSC is not available, fall back to normal bandwidth calculations and select the highest bpp the link can support. (Also preferred by Kwin)
Quoted 6 lines
Quoted 2 lines
- If DSC is available, prefer falling back to DSC and attempt the highest bpp allowed by bandwidth constraints.
The patch does the above, except for not handling the case where the monitor doesn't support DSC. The attach patch handles that too and so fixes #7052 as well, are you ok with it?
This should work since [1] did.
There is one more (theoritical) scenario that I think is still not covered. What happens in a case where 30bpp doesnot fit into DSC bandwidth? As I understand, the min bpp limit of 30bpp would become a bottle-neck even then?
[1] https://github.com/ckborah/drm-tip-sandbox/commit/5dd10a763ae6e651a0ab494ab1ad0c9d81c2de47
Quoted 14 lines
Quoted 14 lines
I am working on a patch for this and should be able to float something soon. Imre, if you agree with this policy, would you please wait for the patch. That should make it easier to send out fix for stable kernels.
==
ChaitanyaQuoted 5 lines
Quoted 5 lines
drivers/gpu/drm/i915/display/intel_dp.c +2
-0+ } + if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))return false;
Quoted 98 lines · Chaitanya Kumar
Quoted 95 lines · Imre Deak
Quoted 70 lines · Chaitanya Kumar
Quoted 67 lines · Ankit K
Quoted 39 lines · Imre Deak
The pipe BPP value shouldn't be set outside of the source's / sink's valid pipe BPP range, ensure this when increasing the minimum pipe BPP value to 30 due to HDR.
Fixes ba49a4643cf53 ("drm/i915/dp: Set min_bpp limit to 30 in HDR mode")Cc Chaitanya Kumar Borah <[email protected]>Cc <[email protected]> # v6.18+Signed-off-by Imre Deak <[email protected]>--- drivers/gpu/drm/i915/display/intel_dp.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-)drivers/gpu/ renamed from drivers/gpu/drm/i915/display/intel_dp.c +0
-0
drm/i915/display/intel_dp.c
index2b8f43e211741..4d8f480cf803f100644drivers/gpu/drm/i915/display/intel_dp.c +1
-0@@ -2697,6 +2697,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, bool dsc, struct link_config_limits *limits) { + struct intel_display *display = to_intel_display(intel_dp); bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST); struct intel_connector *connector =
to_intel_connector(conn_state->connector);drivers/gpu/drm/i915/display/intel_dp.c +1
-2@@ -2709,8 +2710,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, limits->min_lane_count = intel_dp_min_lane_count(intel_dp); limits->max_lane_count = intel_dp_max_lane_count(intel_dp); - limits->pipe.min_bpp = intel_dp_in_hdr_mode(conn_state) ? 30 : - intel_dp_min_bpp(crtc_state->output_format); + limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format); if (is_mst) { /** FIXME: If all the streams can't fit into the link with their @@ -2726,6 +2726,16 @@ intel_dp_compute_config_limits(structintel_dp *intel_dp, respect_downstream_limits);drivers/gpu/drm/i915/display/intel_dp.c intel_dp_compute_config_limits(struct · line 2737
Quoted 10 lines
drivers/gpu/drm/i915/display/intel_dp.c +8
-0} + if (intel_dp_in_hdr_mode(conn_state)) { + if (limits->pipe.min_bpp <= 30 && limits->pipe.max_bpp >= 30) + limits->pipe.min_bpp = 30; + else + drm_dbg_kms(display->drm, + "[CONNECTOR:%d:%s] HDR min 30 bpp outside of valid pipe bpp range (%d-%d)\n", + connector->base.base.id, connector->base.name, + limits->pipe.min_bpp, limits->pipe.max_bpp);pipe.max_bpp < 30 will be either due to the
max_bpcproperty set to less than 10, or perhaps when the panel itself does not support 10 bpc (limited by EDID or VBT).
With these constraints doesn't make sense to enable HDR and send HDR metadata.
However, as we see in some reported issues [1] [2], in practice some compositor seems to enable HDR by default and with the hard limit set, they report blankout.
So it does make sense to raise the min bpp limit only if its inside the supported range.Reviewed-by Ankit Nautiyal <[email protected]>Quoted 7 lines
Quoted 4 lines
[1] https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/7052
[2] https://gitlab.freedesktop.org/drm/i915/kernel/-/
issues/5969#note_3248404I am not sure if this patch would help with the above gitlabs. For example in case of #7052 pipe max bpp is 30 and the commit still fails.
It does fix though reported cases where the sink does not support 10 BPC at all. Yes the monitor in #7052 is still a problem, since it supports 10 BPC only with lower resolution, where the link BW would allow this and he monitor doesn't have DSC either.
Quoted 11 lines
However, I need to look deeper.
I am thinking of relaxing this restriction all together because the earlier assumption that a panel advertising HDR will support atleast 10bpc in all it's mode turns out to be false.
Currently, I am inclined on the following policy.
- If DSC is not available, fall back to normal bandwidth calculations and select the highest bpp the link can support. (Also preferred by Kwin)
Quoted 8 lines
Quoted 6 lines
Quoted 2 lines
- If DSC is available, prefer falling back to DSC and attempt the highest bpp allowed by bandwidth constraints.
The patch does the above, except for not handling the case where the monitor doesn't support DSC. The attach patch handles that too and so fixes #7052 as well, are you ok with it?
This should work since [1] did.
I think the sink / source support for 10 BPC should be still checked as in this patch.
Quoted 4 lines
There is one more (theoritical) scenario that I think is still not covered. What happens in a case where 30bpp doesnot fit into DSC bandwidth? As I understand, the min bpp limit of 30bpp would become a bottle-neck even then?
No, the link BW requirement is determined by the link BPP, not the pipe BPP for which the minimum is set. The link BPP in DSC mode can be lowered below that, based on the sink's minimum compressed BPP support. So in the fallback case, where 30 BPP uncompressed mode is not supported by the sink due to a BW limit, DSC is used instead lowering the compressed link BPP as required.
Quoted 17 lines
[1] https://github.com/ckborah/drm-tip-sandbox/commit/5dd10a763ae6e651a0ab494ab1ad0c9d81c2de47
Quoted 14 lines
Quoted 14 lines
I am working on a patch for this and should be able to float something soon. Imre, if you agree with this policy, would you please wait for the patch. That should make it easier to send out fix for stable kernels.
==
ChaitanyaQuoted 5 lines
Quoted 5 lines
drivers/gpu/drm/i915/display/intel_dp.c +2
-0+ } + if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))return false;
Quoted 116 lines · Imre Deak
Quoted 98 lines · Chaitanya Kumar
Quoted 95 lines · Imre Deak
Quoted 70 lines · Chaitanya Kumar
Quoted 67 lines · Ankit K
Quoted 39 lines · Imre Deak
The pipe BPP value shouldn't be set outside of the source's / sink's valid pipe BPP range, ensure this when increasing the minimum pipe BPP value to 30 due to HDR.
Fixes ba49a4643cf53 ("drm/i915/dp: Set min_bpp limit to 30 in HDR mode")Cc Chaitanya Kumar Borah <[email protected]>Cc <[email protected]> # v6.18+Signed-off-by Imre Deak <[email protected]>--- drivers/gpu/drm/i915/display/intel_dp.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-)drivers/gpu/ renamed from drivers/gpu/drm/i915/display/intel_dp.c +0
-0
drm/i915/display/intel_dp.c
index2b8f43e211741..4d8f480cf803f100644drivers/gpu/drm/i915/display/intel_dp.c +1
-0@@ -2697,6 +2697,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, bool dsc, struct link_config_limits *limits) { + struct intel_display *display = to_intel_display(intel_dp); bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST); struct intel_connector *connector =
to_intel_connector(conn_state->connector);drivers/gpu/drm/i915/display/intel_dp.c +1
-2@@ -2709,8 +2710,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, limits->min_lane_count = intel_dp_min_lane_count(intel_dp); limits->max_lane_count = intel_dp_max_lane_count(intel_dp); - limits->pipe.min_bpp = intel_dp_in_hdr_mode(conn_state) ? 30 : - intel_dp_min_bpp(crtc_state->output_format); + limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format); if (is_mst) { /** FIXME: If all the streams can't fit into the link with their @@ -2726,6 +2726,16 @@ intel_dp_compute_config_limits(structintel_dp *intel_dp, respect_downstream_limits);drivers/gpu/drm/i915/display/intel_dp.c intel_dp_compute_config_limits(struct · line 2737
Quoted 10 lines
drivers/gpu/drm/i915/display/intel_dp.c +8
-0} + if (intel_dp_in_hdr_mode(conn_state)) { + if (limits->pipe.min_bpp <= 30 && limits->pipe.max_bpp >= 30) + limits->pipe.min_bpp = 30; + else + drm_dbg_kms(display->drm, + "[CONNECTOR:%d:%s] HDR min 30 bpp outside of valid pipe bpp range (%d-%d)\n", + connector->base.base.id, connector->base.name, + limits->pipe.min_bpp, limits->pipe.max_bpp);pipe.max_bpp < 30 will be either due to the
max_bpcproperty set to less than 10, or perhaps when the panel itself does not support 10 bpc (limited by EDID or VBT).
With these constraints doesn't make sense to enable HDR and send HDR metadata.
However, as we see in some reported issues [1] [2], in practice some compositor seems to enable HDR by default and with the hard limit set, they report blankout.
So it does make sense to raise the min bpp limit only if its inside the supported range.Reviewed-by Ankit Nautiyal <[email protected]>Quoted 7 lines
Quoted 4 lines
[1] https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/7052
[2] https://gitlab.freedesktop.org/drm/i915/kernel/-/
issues/5969#note_3248404I am not sure if this patch would help with the above gitlabs. For example in case of #7052 pipe max bpp is 30 and the commit still fails.
It does fix though reported cases where the sink does not support 10 BPC at all. Yes the monitor in #7052 is still a problem, since it supports 10 BPC only with lower resolution, where the link BW would allow this and he monitor doesn't have DSC either.
Quoted 11 lines
However, I need to look deeper.
I am thinking of relaxing this restriction all together because the earlier assumption that a panel advertising HDR will support atleast 10bpc in all it's mode turns out to be false.
Currently, I am inclined on the following policy.
- If DSC is not available, fall back to normal bandwidth calculations and select the highest bpp the link can support. (Also preferred by Kwin)
Quoted 8 lines
Quoted 6 lines
Quoted 2 lines
- If DSC is available, prefer falling back to DSC and attempt the highest bpp allowed by bandwidth constraints.
The patch does the above, except for not handling the case where the monitor doesn't support DSC. The attach patch handles that too and so fixes #7052 as well, are you ok with it?
This should work since [1] did.
I think the sink / source support for 10 BPC should be still checked as in this patch.
Quoted 4 lines
There is one more (theoritical) scenario that I think is still not covered. What happens in a case where 30bpp doesnot fit into DSC bandwidth? As I understand, the min bpp limit of 30bpp would become a bottle-neck even then?
Quoted 6 lines
No, the link BW requirement is determined by the link BPP, not the pipe BPP for which the minimum is set. The link BPP in DSC mode can be lowered below that, based on the sink's minimum compressed BPP support. So in the fallback case, where 30 BPP uncompressed mode is not supported by the sink due to a BW limit, DSC is used instead lowering the compressed link BPP as required.
Although, it's still possible that the sink wouldn't support the minimum pipe BPP set here as a DSC input BPP. Setting a minimum (pipe/input) BPP in DSC mode isn't actually needed, since the highest possible BPP will be selected there anyway. So I think the actual condition for setting pipe.min_bpp = 30 above should be:
if (intel_dp_in_hdr_mode(conn_state) &&
intel_dp_supports_dsc(intel_dp, connector, crtc_state) &&
!dsc) {
...Quoted 17 lines
Quoted 17 lines
[1] https://github.com/ckborah/drm-tip-sandbox/commit/5dd10a763ae6e651a0ab494ab1ad0c9d81c2de47
Quoted 14 lines
Quoted 14 lines
I am working on a patch for this and should be able to float something soon. Imre, if you agree with this policy, would you please wait for the patch. That should make it easier to send out fix for stable kernels.
==
ChaitanyaQuoted 5 lines
Quoted 5 lines
drivers/gpu/drm/i915/display/intel_dp.c +2
-0+ } + if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))return false;
Quoted 119 lines · Imre Deak
Quoted 106 lines · Imre Deak
Quoted 92 lines · Chaitanya Kumar
Quoted 90 lines · Imre Deak
Quoted 67 lines · Chaitanya Kumar
Quoted 65 lines · Ankit K
Quoted 39 lines · Imre Deak
The pipe BPP value shouldn't be set outside of the source's / sink's valid pipe BPP range, ensure this when increasing the minimum pipe BPP value to 30 due to HDR.
Fixes ba49a4643cf53 ("drm/i915/dp: Set min_bpp limit to 30 in HDR mode")Cc Chaitanya Kumar Borah <[email protected]>Cc <[email protected]> # v6.18+Signed-off-by Imre Deak <[email protected]>--- drivers/gpu/drm/i915/display/intel_dp.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-)drivers/gpu/ renamed from drivers/gpu/drm/i915/display/intel_dp.c +0
-0
drm/i915/display/intel_dp.c
index2b8f43e211741..4d8f480cf803f100644drivers/gpu/drm/i915/display/intel_dp.c +1
-0@@ -2697,6 +2697,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, bool dsc, struct link_config_limits *limits) { + struct intel_display *display = to_intel_display(intel_dp); bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST); struct intel_connector *connector =to_intel_connector(conn_state->connector);drivers/gpu/drm/i915/display/intel_dp.c +1
-2@@ -2709,8 +2710,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, limits->min_lane_count = intel_dp_min_lane_count(intel_dp); limits->max_lane_count = intel_dp_max_lane_count(intel_dp); - limits->pipe.min_bpp = intel_dp_in_hdr_mode(conn_state) ? 30 : - intel_dp_min_bpp(crtc_state->output_format); + limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format); if (is_mst) { /** FIXME: If all the streams can't fit into the link with their @@ -2726,6 +2726,16 @@ intel_dp_compute_config_limits(structintel_dp *intel_dp, respect_downstream_limits);drivers/gpu/drm/i915/display/intel_dp.c intel_dp_compute_config_limits(struct · line 2737
Quoted 10 lines
drivers/gpu/drm/i915/display/intel_dp.c +8
-0} + if (intel_dp_in_hdr_mode(conn_state)) { + if (limits->pipe.min_bpp <= 30 && limits->pipe.max_bpp >= 30) + limits->pipe.min_bpp = 30; + else + drm_dbg_kms(display->drm, + "[CONNECTOR:%d:%s] HDR min 30 bpp outside of valid pipe bpp range (%d-%d)\n", + connector->base.base.id, connector->base.name, + limits->pipe.min_bpp, limits->pipe.max_bpp);pipe.max_bpp < 30 will be either due to the
max_bpcproperty set to less than 10, or perhaps when the panel itself does not support 10 bpc (limited by EDID or VBT).
With these constraints doesn't make sense to enable HDR and send HDR metadata.
However, as we see in some reported issues [1] [2], in practice some compositor seems to enable HDR by default and with the hard limit set, they report blankout.
So it does make sense to raise the min bpp limit only if its inside the supported range.Reviewed-by Ankit Nautiyal <[email protected]>Quoted 6 lines
Quoted 4 lines
[1] https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/7052
[2] https://gitlab.freedesktop.org/drm/i915/kernel/-/
issues/5969#note_3248404I am not sure if this patch would help with the above gitlabs. For example in case of #7052 pipe max bpp is 30 and the commit still fails.
It does fix though reported cases where the sink does not support 10 BPC at all. Yes the monitor in #7052 is still a problem, since it supports 10 BPC only with lower resolution, where the link BW would allow this and he monitor doesn't have DSC either.
Quoted 11 lines
However, I need to look deeper.
I am thinking of relaxing this restriction all together because the earlier assumption that a panel advertising HDR will support atleast 10bpc in all it's mode turns out to be false.
Currently, I am inclined on the following policy.
- If DSC is not available, fall back to normal bandwidth calculations and select the highest bpp the link can support. (Also preferred by Kwin)
Quoted 6 lines
Quoted 5 lines
Quoted 2 lines
- If DSC is available, prefer falling back to DSC and attempt the highest bpp allowed by bandwidth constraints.
The patch does the above, except for not handling the case where the monitor doesn't support DSC. The attach patch handles that too and so fixes #7052 as well, are you ok with it?
This should work since [1] did.
I think the sink / source support for 10 BPC should be still checked as in this patch.
Quoted 4 lines
There is one more (theoritical) scenario that I think is still not covered. What happens in a case where 30bpp doesnot fit into DSC bandwidth? As I understand, the min bpp limit of 30bpp would become a bottle-neck even then?
Quoted 6 lines
No, the link BW requirement is determined by the link BPP, not the pipe BPP for which the minimum is set. The link BPP in DSC mode can be lowered below that, based on the sink's minimum compressed BPP support. So in the fallback case, where 30 BPP uncompressed mode is not supported by the sink due to a BW limit, DSC is used instead lowering the compressed link BPP as required.
Although, it's still possible that the sink wouldn't support the minimum pipe BPP set here as a DSC input BPP. Setting a minimum (pipe/input) BPP in DSC mode isn't actually needed, since the highest possible BPP will be selected there anyway. So I think the actual condition for setting pipe.min_bpp = 30 above should be:
Quoted 4 lines
if (intel_dp_in_hdr_mode(conn_state) &&
intel_dp_supports_dsc(intel_dp, connector, crtc_state) &&
!dsc) {
...Hmm makes sense.
Perhaps we should also add a debug message right after pipe_bpp is finalized (and before the full link config dump) to make it clear when HDR is selected but the chosen input/pipe bpp ends up below 30 bpp.
Something like below, in intel_dp_compute_link_for_joined_pipes() before the link config dump:
if (intel_dp_in_hdr_mode(conn_state) && pipe_config->pipe_bpp < 30) drm_dbg_kms(display->drm,
"HDR mode selected but pipe bpp is limited to %d\n", pipe_config->pipe_bpp);
This will help flag out the cases where HDR is enabled but the pipe can’t reach 10bpc due to sink or bandwidth limits.
Regards,
Ankit
Quoted 14 lines
Quoted 14 lines
Quoted 14 lines
[1] https://github.com/ckborah/drm-tip-sandbox/commit/5dd10a763ae6e651a0ab494ab1ad0c9d81c2de47
Quoted 12 lines
Quoted 12 lines
I am working on a patch for this and should be able to float something soon. Imre, if you agree with this policy, would you please wait for the patch. That should make it easier to send out fix for stable kernels.
==
ChaitanyaQuoted 5 lines
Quoted 5 lines
drivers/gpu/drm/i915/display/intel_dp.c +2
-0+ } + if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))return false;
Quoted 135 lines · Ankit K
Quoted 119 lines · Imre Deak
Quoted 106 lines · Imre Deak
Quoted 92 lines · Chaitanya Kumar
Quoted 90 lines · Imre Deak
Quoted 67 lines · Chaitanya Kumar
Quoted 65 lines · Ankit K
Quoted 39 lines · Imre Deak
The pipe BPP value shouldn't be set outside of the source's / sink's valid pipe BPP range, ensure this when increasing the minimum pipe BPP value to 30 due to HDR.
Fixes ba49a4643cf53 ("drm/i915/dp: Set min_bpp limit to 30 in HDR mode")Cc Chaitanya Kumar Borah <[email protected]>Cc <[email protected]> # v6.18+Signed-off-by Imre Deak <[email protected]>--- drivers/gpu/drm/i915/display/intel_dp.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-)drivers/gpu/ renamed from drivers/gpu/drm/i915/display/intel_dp.c +0
-0
drm/i915/display/intel_dp.c
index2b8f43e211741..4d8f480cf803f100644drivers/gpu/drm/i915/display/intel_dp.c +1
-0@@ -2697,6 +2697,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, bool dsc, struct link_config_limits *limits) { + struct intel_display *display = to_intel_display(intel_dp); bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST); struct intel_connector *connector =to_intel_connector(conn_state->connector);drivers/gpu/drm/i915/display/intel_dp.c +1
-2@@ -2709,8 +2710,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, limits->min_lane_count = intel_dp_min_lane_count(intel_dp); limits->max_lane_count = intel_dp_max_lane_count(intel_dp); - limits->pipe.min_bpp = intel_dp_in_hdr_mode(conn_state) ? 30 : - intel_dp_min_bpp(crtc_state->output_format); + limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format); if (is_mst) { /** FIXME: If all the streams can't fit into the link with their @@ -2726,6 +2726,16 @@ intel_dp_compute_config_limits(structintel_dp *intel_dp, respect_downstream_limits);drivers/gpu/drm/i915/display/intel_dp.c intel_dp_compute_config_limits(struct · line 2737
Quoted 10 lines
drivers/gpu/drm/i915/display/intel_dp.c +8
-0} + if (intel_dp_in_hdr_mode(conn_state)) { + if (limits->pipe.min_bpp <= 30 && limits->pipe.max_bpp >= 30) + limits->pipe.min_bpp = 30; + else + drm_dbg_kms(display->drm, + "[CONNECTOR:%d:%s] HDR min 30 bpp outside of valid pipe bpp range (%d-%d)\n", + connector->base.base.id, connector->base.name, + limits->pipe.min_bpp, limits->pipe.max_bpp);pipe.max_bpp < 30 will be either due to the
max_bpcproperty set to less than 10, or perhaps when the panel itself does not support 10 bpc (limited by EDID or VBT).
With these constraints doesn't make sense to enable HDR and send HDR metadata.
However, as we see in some reported issues [1] [2], in practice some compositor seems to enable HDR by default and with the hard limit set, they report blankout.
So it does make sense to raise the min bpp limit only if its inside the supported range.Reviewed-by Ankit Nautiyal <[email protected]>Quoted 6 lines
Quoted 4 lines
[1] https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/7052
[2] https://gitlab.freedesktop.org/drm/i915/kernel/-/
issues/5969#note_3248404I am not sure if this patch would help with the above gitlabs. For example in case of #7052 pipe max bpp is 30 and the commit still fails.
It does fix though reported cases where the sink does not support 10 BPC at all. Yes the monitor in #7052 is still a problem, since it supports 10 BPC only with lower resolution, where the link BW would allow this and he monitor doesn't have DSC either.
Quoted 11 lines
However, I need to look deeper.
I am thinking of relaxing this restriction all together because the earlier assumption that a panel advertising HDR will support atleast 10bpc in all it's mode turns out to be false.
Currently, I am inclined on the following policy.
- If DSC is not available, fall back to normal bandwidth calculations and select the highest bpp the link can support. (Also preferred by Kwin)
Quoted 6 lines
Quoted 5 lines
Quoted 2 lines
- If DSC is available, prefer falling back to DSC and attempt the highest bpp allowed by bandwidth constraints.
The patch does the above, except for not handling the case where the monitor doesn't support DSC. The attach patch handles that too and so fixes #7052 as well, are you ok with it?
This should work since [1] did.
I think the sink / source support for 10 BPC should be still checked as in this patch.
Quoted 4 lines
There is one more (theoritical) scenario that I think is still not covered. What happens in a case where 30bpp doesnot fit into DSC bandwidth? As I understand, the min bpp limit of 30bpp would become a bottle-neck even then?
Quoted 6 lines
No, the link BW requirement is determined by the link BPP, not the pipe BPP for which the minimum is set. The link BPP in DSC mode can be lowered below that, based on the sink's minimum compressed BPP support. So in the fallback case, where 30 BPP uncompressed mode is not supported by the sink due to a BW limit, DSC is used instead lowering the compressed link BPP as required.
Although, it's still possible that the sink wouldn't support the minimum pipe BPP set here as a DSC input BPP. Setting a minimum (pipe/input) BPP in DSC mode isn't actually needed, since the highest possible BPP will be selected there anyway. So I think the actual condition for setting pipe.min_bpp = 30 above should be:
Quoted 4 lines
if (intel_dp_in_hdr_mode(conn_state) && intel_dp_supports_dsc(intel_dp, connector, crtc_state) && !dsc) { ...Hmm makes sense.
Perhaps we should also add a debug message right after
pipe_bppis finalized (and before the full link config dump) to make it clear when HDR is selected but the chosen input/pipe bpp ends up below 30 bpp.Something like below, in
intel_dp_compute_link_for_joined_pipes()before the link config dump:
Quoted 7 lines
if (
intel_dp_in_hdr_mode(conn_state)&&pipe_config->pipe_bpp< 30) drm_dbg_kms(display->drm,
"HDR mode selected but pipe bpp is limited to %d\n",pipe_config->pipe_bpp);This will help flag out the cases where HDR is enabled but the pipe can’t reach 10bpc due to sink or bandwidth limits.
Ok, can also debug print the connector's HDR mode, like
DP lane count ... bpp input x compressed y HDR-sink yes/no ...
at the end of intel_dp_compute_link_for_joined_pipes().
Quoted 20 lines
Regards,
Ankit
Quoted 14 lines
Quoted 14 lines
Quoted 14 lines
[1] https://github.com/ckborah/drm-tip-sandbox/commit/5dd10a763ae6e651a0ab494ab1ad0c9d81c2de47
Quoted 12 lines
Quoted 12 lines
I am working on a patch for this and should be able to float something soon. Imre, if you agree with this policy, would you please wait for the patch. That should make it easier to send out fix for stable kernels.
==
ChaitanyaQuoted 5 lines
Quoted 5 lines
drivers/gpu/drm/i915/display/intel_dp.c +2
-0+ } + if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))return false;
Quoted 136 lines · Imre Deak
Quoted 135 lines · Ankit K
Quoted 116 lines · Imre Deak
Quoted 103 lines · Imre Deak
Quoted 89 lines · Chaitanya Kumar
Quoted 88 lines · Imre Deak
Quoted 65 lines · Chaitanya Kumar
Quoted 64 lines · Ankit K
Quoted 39 lines · Imre Deak
The pipe BPP value shouldn't be set outside of the source's / sink's valid pipe BPP range, ensure this when increasing the minimum pipe BPP value to 30 due to HDR.
Fixes ba49a4643cf53 ("drm/i915/dp: Set min_bpp limit to 30 in HDR mode")Cc Chaitanya Kumar Borah <[email protected]>Cc <[email protected]> # v6.18+Signed-off-by Imre Deak <[email protected]>--- drivers/gpu/drm/i915/display/intel_dp.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-)drivers/gpu/ renamed from drivers/gpu/drm/i915/display/intel_dp.c +0
-0
drm/i915/display/intel_dp.c
index2b8f43e211741..4d8f480cf803f100644drivers/gpu/drm/i915/display/intel_dp.c +1
-0@@ -2697,6 +2697,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, bool dsc, struct link_config_limits *limits) { + struct intel_display *display = to_intel_display(intel_dp); bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST); struct intel_connector *connector =to_intel_connector(conn_state->connector);drivers/gpu/drm/i915/display/intel_dp.c +1
-2@@ -2709,8 +2710,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, limits->min_lane_count = intel_dp_min_lane_count(intel_dp); limits->max_lane_count = intel_dp_max_lane_count(intel_dp); - limits->pipe.min_bpp = intel_dp_in_hdr_mode(conn_state) ? 30 : - intel_dp_min_bpp(crtc_state->output_format); + limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format); if (is_mst) { /** FIXME: If all the streams can't fit into the link with their @@ -2726,6 +2726,16 @@ intel_dp_compute_config_limits(structintel_dp *intel_dp, respect_downstream_limits);drivers/gpu/drm/i915/display/intel_dp.c intel_dp_compute_config_limits(struct · line 2737
Quoted 10 lines
drivers/gpu/drm/i915/display/intel_dp.c +8
-0} + if (intel_dp_in_hdr_mode(conn_state)) { + if (limits->pipe.min_bpp <= 30 && limits->pipe.max_bpp >= 30) + limits->pipe.min_bpp = 30; + else + drm_dbg_kms(display->drm, + "[CONNECTOR:%d:%s] HDR min 30 bpp outside of valid pipe bpp range (%d-%d)\n", + connector->base.base.id, connector->base.name, + limits->pipe.min_bpp, limits->pipe.max_bpp);pipe.max_bpp < 30 will be either due to the
max_bpcproperty set to less than 10, or perhaps when the panel itself does not support 10 bpc (limited by EDID or VBT).
With these constraints doesn't make sense to enable HDR and send HDR metadata.
However, as we see in some reported issues [1] [2], in practice some compositor seems to enable HDR by default and with the hard limit set, they report blankout.
So it does make sense to raise the min bpp limit only if its inside the supported range.Reviewed-by Ankit Nautiyal <[email protected]>Quoted 6 lines
Quoted 4 lines
[1] https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/7052
[2] https://gitlab.freedesktop.org/drm/i915/kernel/-/
issues/5969#note_3248404I am not sure if this patch would help with the above gitlabs. For example in case of #7052 pipe max bpp is 30 and the commit still fails.
It does fix though reported cases where the sink does not support 10 BPC at all. Yes the monitor in #7052 is still a problem, since it supports 10 BPC only with lower resolution, where the link BW would allow this and he monitor doesn't have DSC either.
Quoted 11 lines
However, I need to look deeper.
I am thinking of relaxing this restriction all together because the earlier assumption that a panel advertising HDR will support atleast 10bpc in all it's mode turns out to be false.
Currently, I am inclined on the following policy.
- If DSC is not available, fall back to normal bandwidth calculations and select the highest bpp the link can support. (Also preferred by Kwin)
Quoted 6 lines
Quoted 5 lines
Quoted 2 lines
- If DSC is available, prefer falling back to DSC and attempt the highest bpp allowed by bandwidth constraints.
The patch does the above, except for not handling the case where the monitor doesn't support DSC. The attach patch handles that too and so fixes #7052 as well, are you ok with it?
This should work since [1] did.
I think the sink / source support for 10 BPC should be still checked as in this patch.
Quoted 4 lines
There is one more (theoritical) scenario that I think is still not covered. What happens in a case where 30bpp doesnot fit into DSC bandwidth? As I understand, the min bpp limit of 30bpp would become a bottle-neck even then?
Quoted 6 lines
No, the link BW requirement is determined by the link BPP, not the pipe BPP for which the minimum is set. The link BPP in DSC mode can be lowered below that, based on the sink's minimum compressed BPP support. So in the fallback case, where 30 BPP uncompressed mode is not supported by the sink due to a BW limit, DSC is used instead lowering the compressed link BPP as required.
Although, it's still possible that the sink wouldn't support the minimum pipe BPP set here as a DSC input BPP. Setting a minimum (pipe/input) BPP in DSC mode isn't actually needed, since the highest possible BPP will be selected there anyway. So I think the actual condition for setting pipe.min_bpp = 30 above should be:
Quoted 4 lines
if (intel_dp_in_hdr_mode(conn_state) && intel_dp_supports_dsc(intel_dp, connector, crtc_state) && !dsc) { ...Hmm makes sense.
Perhaps we should also add a debug message right after
pipe_bppis finalized (and before the full link config dump) to make it clear when HDR is selected but the chosen input/pipe bpp ends up below 30 bpp.Something like below, in
intel_dp_compute_link_for_joined_pipes()before the link config dump:if (
intel_dp_in_hdr_mode(conn_state)&&pipe_config->pipe_bpp< 30)
drm_dbg_kms(display->drm,
"HDR mode selected but pipe bpp is limited to %d\n",pipe_config->pipe_bpp);
Quoted 7 lines
Quoted 2 lines
This will help flag out the cases where HDR is enabled but the pipe can’t reach 10bpc due to sink or bandwidth limits.
Ok, can also debug print the connector's HDR mode, like
DP lane count ... bpp input x compressed y HDR-sink yes/no ...
at the end of
intel_dp_compute_link_for_joined_pipes().
That sounds good. IMHO, let's just drop '-sink' and just have HDR yes/no (HDR-sink might imply HDR capability of the sink)
Regards,
Ankit
Quoted 20 lines
Quoted 20 lines
Regards,
Ankit
Quoted 14 lines
Quoted 14 lines
Quoted 14 lines
[1] https://github.com/ckborah/drm-tip-sandbox/commit/5dd10a763ae6e651a0ab494ab1ad0c9d81c2de47
Quoted 12 lines
Quoted 12 lines
I am working on a patch for this and should be able to float something soon. Imre, if you agree with this policy, would you please wait for the patch. That should make it easier to send out fix for stable kernels.
==
ChaitanyaQuoted 5 lines
Quoted 5 lines
drivers/gpu/drm/i915/display/intel_dp.c +2
-0+ } + if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))return false;
Quoted 140 lines · Ankit K
Quoted 138 lines · Imre Deak
Quoted 137 lines · Ankit K
Quoted 116 lines · Imre Deak
Quoted 103 lines · Imre Deak
Quoted 89 lines · Chaitanya Kumar
Quoted 88 lines · Imre Deak
Quoted 65 lines · Chaitanya Kumar
Quoted 64 lines · Ankit K
Quoted 39 lines · Imre Deak
The pipe BPP value shouldn't be set outside of the source's / sink's valid pipe BPP range, ensure this when increasing the minimum pipe BPP value to 30 due to HDR.
Fixes ba49a4643cf53 ("drm/i915/dp: Set min_bpp limit to 30 in HDR mode")Cc Chaitanya Kumar Borah <[email protected]>Cc <[email protected]> # v6.18+Signed-off-by Imre Deak <[email protected]>--- drivers/gpu/drm/i915/display/intel_dp.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-)drivers/gpu/ renamed from drivers/gpu/drm/i915/display/intel_dp.c +0
-0
drm/i915/display/intel_dp.c
index2b8f43e211741..4d8f480cf803f100644drivers/gpu/drm/i915/display/intel_dp.c +1
-0@@ -2697,6 +2697,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, bool dsc, struct link_config_limits *limits) { + struct intel_display *display = to_intel_display(intel_dp); bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST); struct intel_connector *connector =to_intel_connector(conn_state->connector);drivers/gpu/drm/i915/display/intel_dp.c +1
-2@@ -2709,8 +2710,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, limits->min_lane_count = intel_dp_min_lane_count(intel_dp); limits->max_lane_count = intel_dp_max_lane_count(intel_dp); - limits->pipe.min_bpp = intel_dp_in_hdr_mode(conn_state) ? 30 : - intel_dp_min_bpp(crtc_state->output_format); + limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format); if (is_mst) { /** FIXME: If all the streams can't fit into the link with their @@ -2726,6 +2726,16 @@ intel_dp_compute_config_limits(structintel_dp *intel_dp, respect_downstream_limits);drivers/gpu/drm/i915/display/intel_dp.c intel_dp_compute_config_limits(struct · line 2737
Quoted 10 lines
drivers/gpu/drm/i915/display/intel_dp.c +8
-0} + if (intel_dp_in_hdr_mode(conn_state)) { + if (limits->pipe.min_bpp <= 30 && limits->pipe.max_bpp >= 30) + limits->pipe.min_bpp = 30; + else + drm_dbg_kms(display->drm, + "[CONNECTOR:%d:%s] HDR min 30 bpp outside of valid pipe bpp range (%d-%d)\n", + connector->base.base.id, connector->base.name, + limits->pipe.min_bpp, limits->pipe.max_bpp);pipe.max_bpp < 30 will be either due to the
max_bpcproperty set to less than 10, or perhaps when the panel itself does not support 10 bpc (limited by EDID or VBT).
With these constraints doesn't make sense to enable HDR and send HDR metadata.
However, as we see in some reported issues [1] [2], in practice some compositor seems to enable HDR by default and with the hard limit set, they report blankout.
So it does make sense to raise the min bpp limit only if its inside the supported range.Reviewed-by Ankit Nautiyal <[email protected]>Quoted 6 lines
Quoted 4 lines
[1] https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/7052
[2] https://gitlab.freedesktop.org/drm/i915/kernel/-/
issues/5969#note_3248404I am not sure if this patch would help with the above gitlabs. For example in case of #7052 pipe max bpp is 30 and the commit still fails.
It does fix though reported cases where the sink does not support 10 BPC at all. Yes the monitor in #7052 is still a problem, since it supports 10 BPC only with lower resolution, where the link BW would allow this and he monitor doesn't have DSC either.
Quoted 11 lines
However, I need to look deeper.
I am thinking of relaxing this restriction all together because the earlier assumption that a panel advertising HDR will support atleast 10bpc in all it's mode turns out to be false.
Currently, I am inclined on the following policy.
- If DSC is not available, fall back to normal bandwidth calculations and select the highest bpp the link can support. (Also preferred by Kwin)
Quoted 6 lines
Quoted 5 lines
Quoted 2 lines
- If DSC is available, prefer falling back to DSC and attempt the highest bpp allowed by bandwidth constraints.
The patch does the above, except for not handling the case where the monitor doesn't support DSC. The attach patch handles that too and so fixes #7052 as well, are you ok with it?
This should work since [1] did.
I think the sink / source support for 10 BPC should be still checked as in this patch.
Quoted 4 lines
There is one more (theoritical) scenario that I think is still not covered. What happens in a case where 30bpp doesnot fit into DSC bandwidth? As I understand, the min bpp limit of 30bpp would become a bottle-neck even then?
Quoted 6 lines
No, the link BW requirement is determined by the link BPP, not the pipe BPP for which the minimum is set. The link BPP in DSC mode can be lowered below that, based on the sink's minimum compressed BPP support. So in the fallback case, where 30 BPP uncompressed mode is not supported by the sink due to a BW limit, DSC is used instead lowering the compressed link BPP as required.
Although, it's still possible that the sink wouldn't support the minimum pipe BPP set here as a DSC input BPP. Setting a minimum (pipe/input) BPP in DSC mode isn't actually needed, since the highest possible BPP will be selected there anyway. So I think the actual condition for setting pipe.min_bpp = 30 above should be:
Quoted 4 lines
if (intel_dp_in_hdr_mode(conn_state) && intel_dp_supports_dsc(intel_dp, connector, crtc_state) && !dsc) { ...Hmm makes sense.
Perhaps we should also add a debug message right after
pipe_bppis finalized (and before the full link config dump) to make it clear when HDR is selected but the chosen input/pipe bpp ends up below 30 bpp.Something like below, in
intel_dp_compute_link_for_joined_pipes()before the link config dump:if (
intel_dp_in_hdr_mode(conn_state)&&pipe_config->pipe_bpp< 30)
drm_dbg_kms(display->drm,
"HDR mode selected but pipe bpp is limited to %d\n",pipe_config->pipe_bpp);This will help flag out the cases where HDR is enabled but the pipe can’t reach 10bpc due to sink or bandwidth limits.
Quoted 8 lines
Quoted 5 lines
Ok, can also debug print the connector's HDR mode, like
DP lane count ... bpp input x compressed y HDR-sink yes/no ...
at the end of
intel_dp_compute_link_for_joined_pipes().That sounds good. IMHO, let's just drop '-sink' and just have HDR yes/no (HDR-sink might imply HDR capability of the sink)
Ok.
Quoted 24 lines
Regards,
Ankit
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Regards,
Ankit
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[1] https://github.com/ckborah/drm-tip-sandbox/commit/5dd10a763ae6e651a0ab494ab1ad0c9d81c2de47
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I am working on a patch for this and should be able to float something soon. Imre, if you agree with this policy, would you please wait for the patch. That should make it easier to send out fix for stable kernels.
==
ChaitanyaQuoted 5 lines
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drivers/gpu/drm/i915/display/intel_dp.c +2
-0+ } + if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))return false;
Quoted 103 lines · Imre Deak
Quoted 102 lines · Imre Deak
Quoted 101 lines · Chaitanya Kumar
Quoted 98 lines · Imre Deak
Quoted 70 lines · Chaitanya Kumar
Quoted 67 lines · Ankit K
Quoted 39 lines · Imre Deak
The pipe BPP value shouldn't be set outside of the source's / sink's valid pipe BPP range, ensure this when increasing the minimum pipe BPP value to 30 due to HDR.
Fixes ba49a4643cf53 ("drm/i915/dp: Set min_bpp limit to 30 in HDR mode")Cc Chaitanya Kumar Borah <[email protected]>Cc <[email protected]> # v6.18+Signed-off-by Imre Deak <[email protected]>--- drivers/gpu/drm/i915/display/intel_dp.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-)drivers/gpu/ renamed from drivers/gpu/drm/i915/display/intel_dp.c +0
-0
drm/i915/display/intel_dp.c
index2b8f43e211741..4d8f480cf803f100644drivers/gpu/drm/i915/display/intel_dp.c +1
-0@@ -2697,6 +2697,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, bool dsc, struct link_config_limits *limits) { + struct intel_display *display = to_intel_display(intel_dp); bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST); struct intel_connector *connector =to_intel_connector(conn_state->connector);drivers/gpu/drm/i915/display/intel_dp.c +1
-2@@ -2709,8 +2710,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp, limits->min_lane_count = intel_dp_min_lane_count(intel_dp); limits->max_lane_count = intel_dp_max_lane_count(intel_dp); - limits->pipe.min_bpp = intel_dp_in_hdr_mode(conn_state) ? 30 : - intel_dp_min_bpp(crtc_state->output_format); + limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format); if (is_mst) { /** FIXME: If all the streams can't fit into the link with their @@ -2726,6 +2726,16 @@ intel_dp_compute_config_limits(structintel_dp *intel_dp, respect_downstream_limits);drivers/gpu/drm/i915/display/intel_dp.c intel_dp_compute_config_limits(struct · line 2737
Quoted 10 lines
drivers/gpu/drm/i915/display/intel_dp.c +8
-0} + if (intel_dp_in_hdr_mode(conn_state)) { + if (limits->pipe.min_bpp <= 30 && limits->pipe.max_bpp >= 30) + limits->pipe.min_bpp = 30; + else + drm_dbg_kms(display->drm, + "[CONNECTOR:%d:%s] HDR min 30 bpp outside of valid pipe bpp range (%d-%d)\n", + connector->base.base.id, connector->base.name, + limits->pipe.min_bpp, limits->pipe.max_bpp);pipe.max_bpp < 30 will be either due to the
max_bpcproperty set to less than 10, or perhaps when the panel itself does not support 10 bpc (limited by EDID or VBT).
With these constraints doesn't make sense to enable HDR and send HDR metadata.
However, as we see in some reported issues [1] [2], in practice some compositor seems to enable HDR by default and with the hard limit set, they report blankout.
So it does make sense to raise the min bpp limit only if its inside the supported range.Reviewed-by Ankit Nautiyal <[email protected]>Quoted 7 lines
Quoted 4 lines
[1] https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/7052
[2] https://gitlab.freedesktop.org/drm/i915/kernel/-/
issues/5969#note_3248404I am not sure if this patch would help with the above gitlabs. For example in case of #7052 pipe max bpp is 30 and the commit still fails.
It does fix though reported cases where the sink does not support 10 BPC at all. Yes the monitor in #7052 is still a problem, since it supports 10 BPC only with lower resolution, where the link BW would allow this and he monitor doesn't have DSC either.
Quoted 13 lines
However, I need to look deeper.
I am thinking of relaxing this restriction all together because the earlier assumption that a panel advertising HDR will support atleast 10bpc in all it's mode turns out to be false.
Currently, I am inclined on the following policy.
- If DSC is not available, fall back to normal bandwidth calculations and select the highest bpp the link can support. (Also preferred by Kwin)
- If DSC is available, prefer falling back to DSC and attempt the highest bpp allowed by bandwidth constraints.
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The patch does the above, except for not handling the case where the monitor doesn't support DSC. The attach patch handles that too and so fixes #7052 as well, are you ok with it?
This should work since [1] did.
I think the sink / source support for 10 BPC should be still checked as in this patch.
Agreed.
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There is one more (theoritical) scenario that I think is still not covered. What happens in a case where 30bpp doesnot fit into DSC bandwidth? As I understand, the min bpp limit of 30bpp would become a bottle-neck even then?
Quoted 6 lines
No, the link BW requirement is determined by the link BPP, not the pipe BPP for which the minimum is set. The link BPP in DSC mode can be lowered below that, based on the sink's minimum compressed BPP support. So in the fallback case, where 30 BPP uncompressed mode is not supported by the sink due to a BW limit, DSC is used instead lowering the compressed link BPP as required.
Although, it's still possible that the sink wouldn't support the minimum pipe BPP set here as a DSC input BPP. Setting a minimum (pipe/input) BPP in DSC mode isn't actually needed, since the highest possible BPP will be selected there anyway. So I think the actual condition for setting pipe.min_bpp = 30 above should be:
Quoted 5 lines
if (intel_dp_in_hdr_mode(conn_state) &&
intel_dp_supports_dsc(intel_dp, connector, crtc_state) &&
!dsc) {
...I was trying to make it work within intel_dp_compute_link_config_wide() but this works too.
==
Chaitanya
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[1] https://github.com/ckborah/drm-tip-sandbox/commit/5dd10a763ae6e651a0ab494ab1ad0c9d81c2de47
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I am working on a patch for this and should be able to float something soon. Imre, if you agree with this policy, would you please wait for the patch. That should make it easier to send out fix for stable kernels.
==
ChaitanyaQuoted 5 lines
Quoted 5 lines
drivers/gpu/drm/i915/display/intel_dp.c +2
-0+ } + if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))return false;
Patchwork
CI✗ i915.CI.Full: failure for series starting with [1/2] drm/i915/dp: Fix pipe BPP clamping due to HDR
In reply to Imre Deak== Series Details ==
== Series Details ==
Series: series starting with [1/2] drm/i915/dp: Fix pipe BPP clamping due to HDR
URL : https://patchwork.freedesktop.org/series/161264/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_17951_full -> Patchwork_161264v1_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_161264v1_full absolutely need to be verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_161264v1_full, please notify your bug team ([email protected]) to allow them to document this new failure mode, which will reduce false positives in CI.
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_161264v1_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_hdmi_inject@inject-audio:
- shard-mtlp: [PASS][1] -> [SKIP][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-mtlp-3/igt@[email protected]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-mtlp-1/igt@[email protected]
New tests
---------
New tests have been introduced between CI_DRM_17951_full and Patchwork_161264v1_full:
### New IGT tests (1) ###
* igt@kms_rmfb@rmfb-ioctl@pipe-a-dp-3:
- Statuses : 1 pass(s)
- Exec time: [0.15] s
Known issues
------------
Here are the changes found in Patchwork_161264v1_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@crc32:
- shard-rkl: NOTRUN -> [SKIP][3] ([i915#6230])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
- shard-tglu: NOTRUN -> [SKIP][4] ([i915#6230])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@[email protected]
* igt@device_reset@unbind-cold-reset-rebind:
- shard-tglu-1: NOTRUN -> [SKIP][5] ([i915#11078])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@gem_ccs@block-copy-compressed:
- shard-rkl: NOTRUN -> [SKIP][6] ([i915#3555] / [i915#9323])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
- shard-tglu: NOTRUN -> [SKIP][7] ([i915#3555] / [i915#9323])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@[email protected]
* igt@gem_ccs@suspend-resume:
- shard-rkl: NOTRUN -> [SKIP][8] ([i915#9323])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
- shard-tglu: NOTRUN -> [SKIP][9] ([i915#9323]) +1 other test skip
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@[email protected]
* igt@gem_close_race@multigpu-basic-threads:
- shard-rkl: NOTRUN -> [SKIP][10] ([i915#7697])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@gem_create@create-ext-cpu-access-sanity-check:
- shard-tglu: NOTRUN -> [SKIP][11] ([i915#6335])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-8/igt@[email protected]
* igt@gem_ctx_sseu@invalid-args:
- shard-tglu: NOTRUN -> [SKIP][12] ([i915#280])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-8/igt@[email protected]
* igt@gem_exec_balancer@bonded-false-hang:
- shard-dg1: NOTRUN -> [SKIP][13] ([i915#4812]) +1 other test skip
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@gem_exec_balancer@parallel-balancer:
- shard-rkl: NOTRUN -> [SKIP][14] ([i915#4525]) +1 other test skip
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@gem_exec_balancer@parallel-contexts:
- shard-tglu: NOTRUN -> [SKIP][15] ([i915#4525])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@[email protected]
* igt@gem_exec_capture@capture-recoverable:
- shard-tglu-1: NOTRUN -> [SKIP][16] ([i915#6344])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@gem_exec_flush@basic-batch-kernel-default-wb:
- shard-dg1: NOTRUN -> [SKIP][17] ([i915#3539] / [i915#4852])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@gem_exec_reloc@basic-cpu-noreloc:
- shard-dg2: NOTRUN -> [SKIP][18] ([i915#3281])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-7/igt@[email protected]
* igt@gem_exec_reloc@basic-cpu-read-active:
- shard-rkl: NOTRUN -> [SKIP][19] ([i915#3281]) +1 other test skip
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
- shard-mtlp: NOTRUN -> [SKIP][20] ([i915#3281])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-mtlp-4/igt@[email protected]
* igt@gem_exec_reloc@basic-gtt:
- shard-dg1: NOTRUN -> [SKIP][21] ([i915#3281]) +2 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@gem_lmem_swapping@heavy-verify-multi-ccs:
- shard-glk: NOTRUN -> [SKIP][22] ([i915#4613])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-glk1/igt@[email protected]
- shard-tglu-1: NOTRUN -> [SKIP][23] ([i915#4613]) +1 other test skip
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@gem_lmem_swapping@parallel-multi:
- shard-tglu: NOTRUN -> [SKIP][24] ([i915#4613]) +2 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@[email protected]
* igt@gem_lmem_swapping@random-engines:
- shard-rkl: NOTRUN -> [SKIP][25] ([i915#4613]) +1 other test skip
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@gem_madvise@dontneed-before-pwrite:
- shard-dg1: NOTRUN -> [SKIP][26] ([i915#3282])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@gem_mmap_gtt@basic-small-copy:
- shard-dg1: NOTRUN -> [SKIP][27] ([i915#4077])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@gem_mmap_wc@write-read:
- shard-dg2: NOTRUN -> [SKIP][28] ([i915#4083])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-7/igt@[email protected]
* igt@gem_partial_pwrite_pread@writes-after-reads:
- shard-rkl: NOTRUN -> [SKIP][29] ([i915#3282]) +1 other test skip
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@gem_pxp@reject-modify-context-protection-off-3:
- shard-dg1: NOTRUN -> [SKIP][30] ([i915#4270]) +1 other test skip
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@gem_render_copy@y-tiled-ccs-to-y-tiled-ccs:
- shard-dg2: NOTRUN -> [SKIP][31] ([i915#5190] / [i915#8428]) +1 other test skip
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-7/igt@[email protected]
* igt@gem_render_copy@y-tiled-mc-ccs-to-yf-tiled-ccs:
- shard-mtlp: NOTRUN -> [SKIP][32] ([i915#8428])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-mtlp-4/igt@[email protected]
* igt@gem_set_tiling_vs_blt@tiled-to-tiled:
- shard-dg1: NOTRUN -> [SKIP][33] ([i915#4079])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@gem_softpin@noreloc-s3:
- shard-glk10: NOTRUN -> [INCOMPLETE][34] ([i915#13809])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-glk10/igt@[email protected]
* igt@gem_userptr_blits@dmabuf-sync:
- shard-rkl: NOTRUN -> [SKIP][35] ([i915#3297] / [i915#3323])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@gem_userptr_blits@invalid-mmap-offset-unsync:
- shard-dg1: NOTRUN -> [SKIP][36] ([i915#3297])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@gem_workarounds@suspend-resume-fd:
- shard-rkl: [PASS][37] -> [INCOMPLETE][38] ([i915#13356])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-5/igt@[email protected]
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-4/igt@[email protected]
* igt@gen9_exec_parse@bb-chained:
- shard-tglu: NOTRUN -> [SKIP][39] ([i915#2527] / [i915#2856]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@[email protected]
* igt@gen9_exec_parse@bb-oversize:
- shard-dg2: NOTRUN -> [SKIP][40] ([i915#2856])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-7/igt@[email protected]
* igt@gen9_exec_parse@bb-secure:
- shard-rkl: NOTRUN -> [SKIP][41] ([i915#2527])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@gen9_exec_parse@bb-start-cmd:
- shard-tglu-1: NOTRUN -> [SKIP][42] ([i915#2527] / [i915#2856])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@i915_drm_fdinfo@virtual-busy-idle:
- shard-dg1: NOTRUN -> [SKIP][43] ([i915#14118]) +1 other test skip
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@i915_module_load@fault-injection@intel_connector_register:
- shard-tglu: NOTRUN -> [ABORT][44] ([i915#15342]) +1 other test abort
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@i915_module_load@fault-injection@intel_connector_register.html
- shard-glk: NOTRUN -> [ABORT][45] ([i915#15342]) +1 other test abort
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-glk1/igt@i915_module_load@fault-injection@intel_connector_register.html
* igt@i915_module_load@fault-injection@uc_fw_rsa_data_create:
- shard-tglu: NOTRUN -> [SKIP][46] ([i915#15479]) +4 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@i915_module_load@fault-injection@uc_fw_rsa_data_create.html
* igt@i915_pm_sseu@full-enable:
- shard-dg1: NOTRUN -> [SKIP][47] ([i915#4387])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@i915_query@hwconfig_table:
- shard-tglu-1: NOTRUN -> [SKIP][48] ([i915#6245])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@i915_query@hwconfig_table.html
* igt@i915_selftest@live@workarounds:
- shard-dg2: [PASS][49] -> [DMESG-FAIL][50] ([i915#12061]) +1 other test dmesg-fail
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-dg2-1/igt@i915_selftest@[email protected]
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-5/igt@i915_selftest@[email protected]
* igt@kms_addfb_basic@addfb25-x-tiled-legacy:
- shard-dg1: NOTRUN -> [SKIP][51] ([i915#4212])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@kms_addfb_basic@bo-too-small-due-to-tiling:
- shard-dg2: NOTRUN -> [SKIP][52] ([i915#4212])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-7/igt@[email protected]
* igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
- shard-tglu: NOTRUN -> [SKIP][53] ([i915#12454] / [i915#12712])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-8/igt@[email protected]
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
- shard-glk: NOTRUN -> [SKIP][54] ([i915#1769])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-glk9/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-rkl: NOTRUN -> [SKIP][55] ([i915#1769] / [i915#3555])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels@pipe-a-edp-1:
- shard-mtlp: [PASS][56] -> [FAIL][57] ([i915#5956]) +1 other test fail
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-mtlp-8/igt@kms_atomic_transition@[email protected]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-mtlp-4/igt@kms_atomic_transition@[email protected]
* igt@kms_big_fb@4-tiled-32bpp-rotate-0:
- shard-rkl: NOTRUN -> [SKIP][58] ([i915#5286]) +3 other tests skip
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-tglu-1: NOTRUN -> [SKIP][59] ([i915#5286]) +1 other test skip
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-dg1: NOTRUN -> [SKIP][60] ([i915#4538] / [i915#5286]) +1 other test skip
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-tglu: NOTRUN -> [SKIP][61] ([i915#5286]) +3 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip:
- shard-tglu: NOTRUN -> [SKIP][62] ([i915#3828])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-8/igt@[email protected]
* igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip:
- shard-dg1: NOTRUN -> [SKIP][63] ([i915#3828])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-0-hflip:
- shard-tglu-1: NOTRUN -> [SKIP][64] ([i915#3828])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@kms_big_fb@x-tiled-32bpp-rotate-90:
- shard-rkl: NOTRUN -> [SKIP][65] ([i915#3638])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_big_fb@x-tiled-8bpp-rotate-90:
- shard-dg2: NOTRUN -> [SKIP][66] +1 other test skip
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-7/igt@[email protected]
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-dg2: NOTRUN -> [SKIP][67] ([i915#4538] / [i915#5190])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-5/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
- shard-rkl: NOTRUN -> [SKIP][68] +5 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-dg1: NOTRUN -> [SKIP][69] ([i915#4538])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][70] ([i915#10307] / [i915#6095]) +129 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-7/igt@kms_ccs@[email protected]
* igt@kms_ccs@bad-rotation-90-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][71] ([i915#6095]) +52 other tests skip
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-7/igt@kms_ccs@[email protected]
* igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][72] ([i915#14098] / [i915#6095]) +29 other tests skip
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@kms_ccs@[email protected]
* igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][73] ([i915#10307] / [i915#10434] / [i915#6095]) +1 other test skip
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-4/igt@kms_ccs@[email protected]
* igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][74] ([i915#6095]) +29 other tests skip
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-8/igt@kms_ccs@[email protected]
* igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs:
- shard-dg1: NOTRUN -> [SKIP][75] ([i915#12313])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs:
- shard-tglu: NOTRUN -> [SKIP][76] ([i915#12313]) +1 other test skip
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@[email protected]
* igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-1:
- shard-glk: NOTRUN -> [SKIP][77] +105 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-glk1/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-1:
- shard-glk: NOTRUN -> [INCOMPLETE][78] ([i915#15582]) +1 other test incomplete
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-glk9/igt@kms_ccs@[email protected]
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
- shard-rkl: NOTRUN -> [SKIP][79] ([i915#12313]) +2 other tests skip
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_ccs@crc-sprite-planes-basic-yf-tiled-ccs@pipe-a-hdmi-a-1:
- shard-tglu-1: NOTRUN -> [SKIP][80] ([i915#6095]) +29 other tests skip
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@kms_ccs@[email protected]
* igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs:
- shard-tglu-1: NOTRUN -> [SKIP][81] ([i915#12313])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][82] ([i915#6095]) +49 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-4/igt@kms_ccs@[email protected]
* igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-a-hdmi-a-3:
- shard-dg1: NOTRUN -> [SKIP][83] ([i915#6095]) +146 other tests skip
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-12/igt@kms_ccs@[email protected]
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-tglu: NOTRUN -> [SKIP][84] ([i915#3742])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-8/igt@[email protected]
* igt@kms_cdclk@plane-scaling@pipe-c-dp-3:
- shard-dg2: NOTRUN -> [SKIP][85] ([i915#13783]) +3 other tests skip
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-11/igt@kms_cdclk@[email protected]
* igt@kms_chamelium_edid@hdmi-edid-read:
- shard-rkl: NOTRUN -> [SKIP][86] ([i915#11151] / [i915#7828]) +3 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_chamelium_edid@hdmi-mode-timings:
- shard-tglu: NOTRUN -> [SKIP][87] ([i915#11151] / [i915#7828]) +3 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@[email protected]
* igt@kms_chamelium_frames@hdmi-crc-multiple:
- shard-tglu-1: NOTRUN -> [SKIP][88] ([i915#11151] / [i915#7828]) +4 other tests skip
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@kms_chamelium_hpd@dp-hpd:
- shard-dg1: NOTRUN -> [SKIP][89] ([i915#11151] / [i915#7828]) +1 other test skip
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@kms_chamelium_hpd@vga-hpd-enable-disable-mode:
- shard-dg2: NOTRUN -> [SKIP][90] ([i915#11151] / [i915#7828]) +1 other test skip
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-7/igt@[email protected]
* igt@kms_color@deep-color:
- shard-rkl: NOTRUN -> [SKIP][91] ([i915#12655] / [i915#3555])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-tglu: NOTRUN -> [SKIP][92] ([i915#15330] / [i915#3116] / [i915#3299])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@[email protected]
* igt@kms_content_protection@dp-mst-lic-type-0-hdcp14:
- shard-dg1: NOTRUN -> [SKIP][93] ([i915#15330])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@kms_content_protection@legacy-hdcp14:
- shard-rkl: NOTRUN -> [SKIP][94] ([i915#6944])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
- shard-tglu: NOTRUN -> [SKIP][95] ([i915#6944])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-8/igt@[email protected]
* igt@kms_content_protection@lic-type-0-hdcp14:
- shard-tglu-1: NOTRUN -> [SKIP][96] ([i915#6944])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@kms_content_protection@mei-interface:
- shard-tglu-1: NOTRUN -> [SKIP][97] ([i915#6944] / [i915#9424])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@kms_content_protection@suspend-resume@pipe-a-dp-3:
- shard-dg2: NOTRUN -> [FAIL][98] ([i915#7173]) +1 other test fail
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-11/igt@kms_content_protection@[email protected]
* igt@kms_content_protection@uevent:
- shard-rkl: NOTRUN -> [SKIP][99] ([i915#6944] / [i915#7118] / [i915#9424])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_cursor_crc@cursor-sliding-128x42@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [FAIL][100] ([i915#13566])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@kms_cursor_crc@[email protected]
- shard-tglu: NOTRUN -> [FAIL][101] ([i915#13566]) +1 other test fail
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@kms_cursor_crc@[email protected]
* igt@kms_cursor_crc@cursor-sliding-256x85:
- shard-tglu: [PASS][102] -> [FAIL][103] ([i915#13566]) +1 other test fail
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-tglu-4/igt@[email protected]
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-10/igt@[email protected]
* igt@kms_cursor_crc@cursor-sliding-32x10:
- shard-tglu-1: NOTRUN -> [SKIP][104] ([i915#3555]) +3 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic:
- shard-dg2: NOTRUN -> [SKIP][105] ([i915#13046] / [i915#5354]) +1 other test skip
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-7/igt@[email protected]
* igt@kms_cursor_legacy@cursora-vs-flipb-legacy:
- shard-dg1: NOTRUN -> [SKIP][106] +12 other tests skip
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot:
- shard-tglu: NOTRUN -> [SKIP][107] ([i915#9067])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@[email protected]
* igt@kms_display_modes@extended-mode-basic:
- shard-tglu-1: NOTRUN -> [SKIP][108] ([i915#13691])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@kms_dp_linktrain_fallback@dp-fallback:
- shard-tglu-1: NOTRUN -> [SKIP][109] ([i915#13707])
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@kms_draw_crc@draw-method-mmap-gtt:
- shard-dg1: NOTRUN -> [SKIP][110] ([i915#8812])
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@kms_dsc@dsc-basic:
- shard-tglu: NOTRUN -> [SKIP][111] ([i915#3555] / [i915#3840])
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@[email protected]
* igt@kms_dsc@dsc-fractional-bpp-with-bpc:
- shard-tglu-1: NOTRUN -> [SKIP][112] ([i915#3840])
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@kms_dsc@dsc-with-output-formats-with-bpc:
- shard-rkl: NOTRUN -> [SKIP][113] ([i915#3840] / [i915#9053])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_fbcon_fbt@psr-suspend:
- shard-tglu-1: NOTRUN -> [SKIP][114] ([i915#3469]) +1 other test skip
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@kms_feature_discovery@display-3x:
- shard-tglu: NOTRUN -> [SKIP][115] ([i915#1839])
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-8/igt@[email protected]
* igt@kms_flip@2x-flip-vs-dpms:
- shard-tglu-1: NOTRUN -> [SKIP][116] ([i915#3637] / [i915#9934]) +3 other tests skip
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@kms_flip@2x-flip-vs-suspend@ab-vga1-hdmi-a1:
- shard-snb: [PASS][117] -> [TIMEOUT][118] ([i915#14033]) +1 other test timeout
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-snb7/igt@kms_flip@[email protected]
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-snb6/igt@kms_flip@[email protected]
* igt@kms_flip@2x-flip-vs-wf_vblank-interruptible:
- shard-rkl: NOTRUN -> [SKIP][119] ([i915#9934]) +2 other tests skip
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html
* igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
- shard-dg1: NOTRUN -> [SKIP][120] ([i915#9934]) +2 other tests skip
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@kms_flip@2x-wf_vblank-ts-check:
- shard-tglu: NOTRUN -> [SKIP][121] ([i915#3637] / [i915#9934]) +3 other tests skip
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@kms_flip@2x-wf_vblank-ts-check.html
* igt@kms_flip@plain-flip-interruptible:
- shard-dg1: [PASS][122] -> [DMESG-WARN][123] ([i915#4423])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-dg1-13/igt@[email protected]
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-13/igt@[email protected]
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
- shard-rkl: NOTRUN -> [SKIP][124] ([i915#15643])
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
- shard-tglu: NOTRUN -> [SKIP][125] ([i915#15643])
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-8/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
- shard-dg2: NOTRUN -> [SKIP][126] ([i915#15643] / [i915#5190])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling:
- shard-tglu-1: NOTRUN -> [SKIP][127] ([i915#15643]) +2 other tests skip
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling:
- shard-dg2: NOTRUN -> [SKIP][128] ([i915#15643])
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-7/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt:
- shard-dg2: [PASS][129] -> [FAIL][130] ([i915#15389] / [i915#6880])
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-dg2-3/igt@[email protected]
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-11/igt@[email protected]
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][131] ([i915#8708])
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-mtlp-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-fullscreen:
- shard-dg2: NOTRUN -> [SKIP][132] ([i915#5354]) +2 other tests skip
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][133] ([i915#8708]) +2 other tests skip
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-7/igt@[email protected]
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc:
- shard-dg1: NOTRUN -> [SKIP][134] ([i915#15104])
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
- shard-dg2: NOTRUN -> [SKIP][135] ([i915#15102] / [i915#3458]) +1 other test skip
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-dg1: NOTRUN -> [SKIP][136] ([i915#8708]) +5 other tests skip
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-rkl: NOTRUN -> [SKIP][137] ([i915#1825]) +16 other tests skip
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-msflip-blt:
- shard-mtlp: NOTRUN -> [SKIP][138] ([i915#1825])
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-mtlp-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-blt:
- shard-glk10: NOTRUN -> [SKIP][139] +233 other tests skip
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-glk10/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-fullscreen:
- shard-tglu: NOTRUN -> [SKIP][140] +32 other tests skip
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt:
- shard-rkl: NOTRUN -> [SKIP][141] ([i915#15102] / [i915#3023]) +5 other tests skip
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-4:
- shard-rkl: NOTRUN -> [SKIP][142] ([i915#5439])
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
- shard-tglu: NOTRUN -> [SKIP][143] ([i915#5439])
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@[email protected]
* igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-cpu:
- shard-tglu-1: NOTRUN -> [SKIP][144] ([i915#15102]) +10 other tests skip
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc:
- shard-tglu: NOTRUN -> [SKIP][145] ([i915#15102]) +7 other tests skip
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-cpu:
- shard-dg1: NOTRUN -> [SKIP][146] ([i915#15102] / [i915#3458]) +1 other test skip
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-cpu.html
* igt@kms_hdmi_inject@inject-audio:
- shard-tglu: [PASS][147] -> [SKIP][148] ([i915#13030])
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-tglu-5/igt@[email protected]
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-2/igt@[email protected]
* igt@kms_hdr@bpc-switch:
- shard-rkl: [PASS][149] -> [SKIP][150] ([i915#3555] / [i915#8228])
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@[email protected]
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
- shard-tglu: NOTRUN -> [SKIP][151] ([i915#3555] / [i915#8228]) +1 other test skip
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@[email protected]
* igt@kms_hdr@bpc-switch-dpms:
- shard-dg2: [PASS][152] -> [SKIP][153] ([i915#3555] / [i915#8228])
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-dg2-11/igt@[email protected]
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-3/igt@[email protected]
* igt@kms_hdr@brightness-with-hdr:
- shard-tglu-1: NOTRUN -> [SKIP][154] ([i915#12713])
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@kms_hdr@static-toggle-suspend:
- shard-rkl: NOTRUN -> [SKIP][155] ([i915#3555] / [i915#8228]) +1 other test skip
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_joiner@invalid-modeset-big-joiner:
- shard-tglu: NOTRUN -> [SKIP][156] ([i915#15460])
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-8/igt@[email protected]
* igt@kms_joiner@invalid-modeset-force-big-joiner:
- shard-tglu-1: NOTRUN -> [SKIP][157] ([i915#15459])
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@kms_panel_fitting@atomic-fastset:
- shard-tglu-1: NOTRUN -> [SKIP][158] ([i915#6301])
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes:
- shard-tglu-1: NOTRUN -> [SKIP][159] +26 other tests skip
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1:
- shard-glk: NOTRUN -> [INCOMPLETE][160] ([i915#12756] / [i915#13409] / [i915#13476]) +1 other test incomplete
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-glk9/igt@kms_pipe_crc_basic@[email protected]
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-2:
- shard-rkl: [PASS][161] -> [INCOMPLETE][162] ([i915#13476])
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-3/igt@kms_pipe_crc_basic@[email protected]
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-3/igt@kms_pipe_crc_basic@[email protected]
* igt@kms_plane@pixel-format-4-tiled-modifier@pipe-b-plane-3:
- shard-tglu-1: NOTRUN -> [SKIP][163] ([i915#15608]) +20 other tests skip
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@kms_plane@[email protected]
* igt@kms_plane@pixel-format-4-tiled-modifier@pipe-b-plane-7:
- shard-tglu-1: NOTRUN -> [SKIP][164] ([i915#15608] / [i915#8825]) +5 other tests skip
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@kms_plane@[email protected]
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier-source-clamping:
- shard-dg1: NOTRUN -> [SKIP][165] ([i915#15608] / [i915#15609] / [i915#8825])
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier-source-clamping.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier-source-clamping@pipe-a-plane-3:
- shard-dg1: NOTRUN -> [SKIP][166] ([i915#15608]) +5 other tests skip
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier-source-clamping@pipe-a-plane-3.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier-source-clamping@pipe-a-plane-7:
- shard-dg1: NOTRUN -> [SKIP][167] ([i915#15609])
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier-source-clamping@pipe-a-plane-7.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier-source-clamping@pipe-b-plane-7:
- shard-dg1: NOTRUN -> [SKIP][168] ([i915#15609] / [i915#8825])
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier-source-clamping@pipe-b-plane-7.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping:
- shard-rkl: NOTRUN -> [SKIP][169] ([i915#15608] / [i915#15609] / [i915#8825]) +1 other test skip
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping.html
- shard-tglu: NOTRUN -> [SKIP][170] ([i915#15608] / [i915#15609] / [i915#8825])
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-8/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping@pipe-a-plane-3:
- shard-tglu: NOTRUN -> [SKIP][171] ([i915#15608]) +5 other tests skip
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-8/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping@pipe-a-plane-3.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping@pipe-a-plane-7:
- shard-tglu: NOTRUN -> [SKIP][172] ([i915#15609])
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-8/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping@pipe-a-plane-7.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping@pipe-b-plane-5:
- shard-rkl: NOTRUN -> [SKIP][173] ([i915#15609] / [i915#8825]) +1 other test skip
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping@pipe-b-plane-5.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping@pipe-b-plane-7:
- shard-tglu: NOTRUN -> [SKIP][174] ([i915#15609] / [i915#8825])
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-8/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping@pipe-b-plane-7.html
* igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping@pipe-a-plane-0:
- shard-rkl: NOTRUN -> [SKIP][175] ([i915#15608]) +7 other tests skip
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping@pipe-a-plane-0.html
* igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping@pipe-a-plane-5:
- shard-rkl: NOTRUN -> [SKIP][176] ([i915#15609]) +1 other test skip
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping@pipe-a-plane-5.html
* igt@kms_plane_alpha_blend@alpha-basic:
- shard-glk10: NOTRUN -> [FAIL][177] ([i915#12178])
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-glk10/igt@[email protected]
* igt@kms_plane_alpha_blend@alpha-basic@pipe-c-hdmi-a-1:
- shard-glk10: NOTRUN -> [FAIL][178] ([i915#7862]) +1 other test fail
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-glk10/igt@kms_plane_alpha_blend@[email protected]
* igt@kms_plane_alpha_blend@alpha-opaque-fb:
- shard-glk10: NOTRUN -> [FAIL][179] ([i915#10647] / [i915#12169])
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-glk10/igt@[email protected]
* igt@kms_plane_alpha_blend@alpha-opaque-fb@pipe-c-hdmi-a-1:
- shard-glk10: NOTRUN -> [FAIL][180] ([i915#10647]) +1 other test fail
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-glk10/igt@kms_plane_alpha_blend@[email protected]
* igt@kms_plane_lowres@tiling-4:
- shard-tglu: NOTRUN -> [SKIP][181] ([i915#3555])
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@[email protected]
* igt@kms_plane_multiple@2x-tiling-none:
- shard-dg1: NOTRUN -> [SKIP][182] ([i915#13958])
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@kms_plane_multiple@2x-tiling-x:
- shard-rkl: NOTRUN -> [SKIP][183] ([i915#13958])
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_plane_scaling@plane-downscale-factor-0-5-with-modifiers:
- shard-mtlp: NOTRUN -> [SKIP][184] ([i915#15329]) +4 other tests skip
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-mtlp-4/igt@[email protected]
* igt@kms_plane_scaling@plane-downscale-factor-0-5-with-modifiers@pipe-b:
- shard-snb: NOTRUN -> [SKIP][185] +16 other tests skip
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-snb5/igt@kms_plane_scaling@[email protected]
* igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-c:
- shard-rkl: NOTRUN -> [SKIP][186] ([i915#15329]) +3 other tests skip
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@kms_plane_scaling@[email protected]
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-rkl: NOTRUN -> [SKIP][187] ([i915#12343])
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
- shard-tglu: NOTRUN -> [SKIP][188] ([i915#12343])
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@[email protected]
* igt@kms_pm_backlight@fade-with-suspend:
- shard-dg1: NOTRUN -> [SKIP][189] ([i915#5354]) +1 other test skip
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@kms_pm_dc@dc5-psr:
- shard-tglu: NOTRUN -> [SKIP][190] ([i915#9685])
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-8/igt@[email protected]
* igt@kms_pm_rpm@modeset-lpsp:
- shard-rkl: [PASS][191] -> [SKIP][192] ([i915#15073])
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-8/igt@[email protected]
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-4/igt@[email protected]
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-dg2: [PASS][193] -> [SKIP][194] ([i915#15073])
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-dg2-5/igt@[email protected]
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-4/igt@[email protected]
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-rkl: NOTRUN -> [SKIP][195] ([i915#15073])
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_pm_rpm@system-suspend-modeset:
- shard-glk: NOTRUN -> [INCOMPLETE][196] ([i915#10553])
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-glk5/igt@[email protected]
* igt@kms_prime@basic-modeset-hybrid:
- shard-dg1: NOTRUN -> [SKIP][197] ([i915#6524])
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf:
- shard-tglu: NOTRUN -> [SKIP][198] ([i915#11520]) +3 other tests skip
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@[email protected]
* igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf:
- shard-tglu-1: NOTRUN -> [SKIP][199] ([i915#11520]) +4 other tests skip
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-sf:
- shard-dg1: NOTRUN -> [SKIP][200] ([i915#11520])
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf:
- shard-glk: NOTRUN -> [SKIP][201] ([i915#11520]) +4 other tests skip
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-glk1/igt@[email protected]
* igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area-big-fb:
- shard-glk10: NOTRUN -> [SKIP][202] ([i915#11520]) +1 other test skip
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-glk10/igt@[email protected]
* igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf:
- shard-dg2: NOTRUN -> [SKIP][203] ([i915#11520])
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-7/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@psr2-cursor-plane-update-sf:
- shard-rkl: NOTRUN -> [SKIP][204] ([i915#11520]) +1 other test skip
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_psr@fbc-psr2-basic:
- shard-tglu: NOTRUN -> [SKIP][205] ([i915#9732]) +9 other tests skip
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-8/igt@[email protected]
* igt@kms_psr@fbc-psr2-suspend:
- shard-dg2: NOTRUN -> [SKIP][206] ([i915#1072] / [i915#9732]) +2 other tests skip
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-7/igt@[email protected]
* igt@kms_psr@pr-primary-render:
- shard-tglu-1: NOTRUN -> [SKIP][207] ([i915#9732]) +10 other tests skip
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@kms_psr@psr-sprite-plane-onoff:
- shard-rkl: NOTRUN -> [SKIP][208] ([i915#1072] / [i915#9732]) +9 other tests skip
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_psr@psr2-sprite-mmap-cpu:
- shard-dg1: NOTRUN -> [SKIP][209] ([i915#1072] / [i915#9732]) +4 other tests skip
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-tglu: NOTRUN -> [SKIP][210] ([i915#5289]) +1 other test skip
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@[email protected]
* igt@kms_scaling_modes@scaling-mode-center:
- shard-dg1: NOTRUN -> [SKIP][211] ([i915#3555]) +2 other tests skip
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@kms_setmode@basic@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [FAIL][212] ([i915#15106]) +2 other tests fail
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@kms_setmode@[email protected]
* igt@kms_tiled_display@basic-test-pattern:
- shard-tglu-1: NOTRUN -> [SKIP][213] ([i915#8623])
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
- shard-glk: NOTRUN -> [FAIL][214] ([i915#10959])
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-glk1/igt@[email protected]
* igt@kms_vrr@lobf:
- shard-tglu-1: NOTRUN -> [SKIP][215] ([i915#11920])
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-1/igt@[email protected]
* igt@kms_vrr@seamless-rr-switch-virtual:
- shard-rkl: NOTRUN -> [SKIP][216] ([i915#9906])
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@perf@gen8-unprivileged-single-ctx-counters:
- shard-rkl: NOTRUN -> [SKIP][217] ([i915#2436])
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@perf_pmu@busy-double-start@rcs0:
- shard-mtlp: [PASS][218] -> [FAIL][219] ([i915#4349])
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-mtlp-1/igt@perf_pmu@[email protected]
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-mtlp-7/igt@perf_pmu@[email protected]
* igt@perf_pmu@module-unload:
- shard-tglu: NOTRUN -> [FAIL][220] ([i915#14433])
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-8/igt@[email protected]
* igt@perf_pmu@rc6-all-gts:
- shard-tglu: NOTRUN -> [SKIP][221] ([i915#8516]) +1 other test skip
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@[email protected]
* igt@prime_vgem@basic-write:
- shard-rkl: NOTRUN -> [SKIP][222] ([i915#3291] / [i915#3708])
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all:
- shard-tglu: NOTRUN -> [FAIL][223] ([i915#12910])
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-3/igt@[email protected]
- shard-rkl: NOTRUN -> [SKIP][224] ([i915#9917])
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
#### Possible fixes ####
* igt@gem_ctx_isolation@preservation-s3:
- shard-rkl: [ABORT][225] ([i915#15131]) -> [PASS][226] +1 other test pass
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-1/igt@[email protected]
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@gem_exec_suspend@basic-s0:
- shard-dg2: [INCOMPLETE][227] ([i915#13356]) -> [PASS][228] +1 other test pass
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-dg2-4/igt@[email protected]
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-7/igt@[email protected]
* igt@gem_linear_blits@interruptible:
- shard-dg1: [FAIL][229] ([i915#15391]) -> [PASS][230]
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-dg1-14/igt@[email protected]
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-14/igt@[email protected]
* igt@gem_mmap_offset@clear-via-pagefault:
- shard-mtlp: [TIMEOUT][231] ([i915#15478]) -> [PASS][232] +1 other test pass
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-mtlp-5/igt@[email protected]
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-mtlp-6/igt@[email protected]
* igt@i915_pm_rps@reset:
- shard-snb: [INCOMPLETE][233] ([i915#13729] / [i915#13821]) -> [PASS][234]
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-snb7/igt@[email protected]
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-snb5/igt@[email protected]
* igt@i915_suspend@fence-restore-untiled:
- shard-rkl: [INCOMPLETE][235] ([i915#4817]) -> [PASS][236]
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@[email protected]
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_async_flips@async-flip-suspend-resume:
- shard-rkl: [INCOMPLETE][237] ([i915#12761]) -> [PASS][238] +1 other test pass
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-3/igt@[email protected]
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-3/igt@[email protected]
* igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-3:
- shard-dg2: [FAIL][239] ([i915#5956]) -> [PASS][240] +1 other test pass
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-dg2-3/igt@kms_atomic_transition@[email protected]
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-6/igt@kms_atomic_transition@[email protected]
* igt@kms_big_fb@x-tiled-8bpp-rotate-180:
- shard-dg1: [DMESG-WARN][241] ([i915#4423]) -> [PASS][242]
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-dg1-17/igt@[email protected]
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-18/igt@[email protected]
* igt@kms_cursor_crc@cursor-sliding-256x85:
- shard-rkl: [FAIL][243] ([i915#13566]) -> [PASS][244] +1 other test pass
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-8/igt@[email protected]
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-5/igt@[email protected]
* igt@kms_dp_linktrain_fallback@dp-fallback:
- shard-dg2: [SKIP][245] ([i915#13707]) -> [PASS][246]
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-dg2-3/igt@[email protected]
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-11/igt@[email protected]
* igt@kms_force_connector_basic@force-edid:
- shard-mtlp: [SKIP][247] -> [PASS][248]
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-mtlp-1/igt@[email protected]
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-mtlp-7/igt@[email protected]
* igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-render:
- shard-dg2: [FAIL][249] ([i915#15389]) -> [PASS][250]
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-dg2-5/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-render.html
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-1/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-render.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-rkl: [SKIP][251] ([i915#3555] / [i915#8228]) -> [PASS][252]
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-4/igt@[email protected]
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-1/igt@[email protected]
* igt@kms_hdr@static-swap:
- shard-dg2: [SKIP][253] ([i915#3555] / [i915#8228]) -> [PASS][254]
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-dg2-8/igt@[email protected]
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-11/igt@[email protected]
* igt@kms_setmode@basic:
- shard-dg1: [FAIL][255] ([i915#15106]) -> [PASS][256] +1 other test pass
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-dg1-14/igt@[email protected]
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg1-14/igt@[email protected]
- shard-tglu: [FAIL][257] ([i915#15106]) -> [PASS][258] +2 other tests pass
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-tglu-9/igt@[email protected]
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-tglu-9/igt@[email protected]
#### Warnings ####
* igt@gem_ccs@block-multicopy-compressed:
- shard-rkl: [SKIP][259] ([i915#9323]) -> [SKIP][260] ([i915#14544] / [i915#9323])
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@[email protected]
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@gem_eio@in-flight-suspend:
- shard-rkl: [INCOMPLETE][261] ([i915#13390]) -> [ABORT][262] ([i915#15131])
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-4/igt@[email protected]
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-1/igt@[email protected]
* igt@gem_exec_reloc@basic-cpu:
- shard-rkl: [SKIP][263] ([i915#14544] / [i915#3281]) -> [SKIP][264] ([i915#3281])
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@[email protected]
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@gem_exec_reloc@basic-gtt-read:
- shard-rkl: [SKIP][265] ([i915#3281]) -> [SKIP][266] ([i915#14544] / [i915#3281]) +2 other tests skip
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@[email protected]
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@gem_lmem_swapping@heavy-random:
- shard-rkl: [SKIP][267] ([i915#4613]) -> [SKIP][268] ([i915#14544] / [i915#4613])
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@[email protected]
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@gem_lmem_swapping@parallel-multi:
- shard-rkl: [SKIP][269] ([i915#14544] / [i915#4613]) -> [SKIP][270] ([i915#4613])
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@[email protected]
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@gem_partial_pwrite_pread@writes-after-reads-snoop:
- shard-rkl: [SKIP][271] ([i915#3282]) -> [SKIP][272] ([i915#14544] / [i915#3282])
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@[email protected]
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@gem_pwrite_snooped:
- shard-rkl: [SKIP][273] ([i915#14544] / [i915#3282]) -> [SKIP][274] ([i915#3282]) +2 other tests skip
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@gem_pwrite_snooped.html
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@gem_pwrite_snooped.html
* igt@gen9_exec_parse@bb-chained:
- shard-rkl: [SKIP][275] ([i915#14544] / [i915#2527]) -> [SKIP][276] ([i915#2527])
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@[email protected]
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@gen9_exec_parse@bb-large:
- shard-rkl: [SKIP][277] ([i915#2527]) -> [SKIP][278] ([i915#14544] / [i915#2527])
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@[email protected]
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@i915_pm_freq_api@freq-reset:
- shard-rkl: [SKIP][279] ([i915#8399]) -> [SKIP][280] ([i915#14544] / [i915#8399])
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-3/igt@[email protected]
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@i915_pm_rc6_residency@media-rc6-accuracy:
- shard-rkl: [SKIP][281] ([i915#14544]) -> [SKIP][282] +1 other test skip
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@[email protected]
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-rkl: [SKIP][283] ([i915#5286]) -> [SKIP][284] ([i915#14544] / [i915#5286])
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-rkl: [SKIP][285] ([i915#14544] / [i915#5286]) -> [SKIP][286] ([i915#5286])
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-rkl: [SKIP][287] -> [SKIP][288] ([i915#14544]) +4 other tests skip
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_ccs@bad-pixel-format-y-tiled-gen12-mc-ccs:
- shard-rkl: [SKIP][289] ([i915#14098] / [i915#6095]) -> [SKIP][290] ([i915#14098] / [i915#14544] / [i915#6095]) +9 other tests skip
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@[email protected]
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-2:
- shard-rkl: [SKIP][291] ([i915#6095]) -> [SKIP][292] ([i915#14544] / [i915#6095]) +8 other tests skip
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@kms_ccs@[email protected]
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@kms_ccs@[email protected]
* igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs:
- shard-rkl: [SKIP][293] ([i915#14098] / [i915#14544] / [i915#6095]) -> [SKIP][294] ([i915#14098] / [i915#6095]) +1 other test skip
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@[email protected]
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_cdclk@plane-scaling:
- shard-rkl: [SKIP][295] ([i915#3742]) -> [SKIP][296] ([i915#14544] / [i915#3742])
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@[email protected]
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@kms_chamelium_frames@hdmi-frame-dump:
- shard-rkl: [SKIP][297] ([i915#11151] / [i915#7828]) -> [SKIP][298] ([i915#11151] / [i915#14544] / [i915#7828]) +2 other tests skip
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@[email protected]
[298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@kms_chamelium_hpd@hdmi-hpd-after-suspend:
- shard-rkl: [SKIP][299] ([i915#11151] / [i915#14544] / [i915#7828]) -> [SKIP][300] ([i915#11151] / [i915#7828])
[299]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@[email protected]
[300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_content_protection@atomic:
- shard-dg2: [SKIP][301] ([i915#6944] / [i915#7118] / [i915#9424]) -> [FAIL][302] ([i915#7173])
[301]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-dg2-8/igt@[email protected]
[302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-11/igt@[email protected]
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-rkl: [SKIP][303] ([i915#14544] / [i915#15330] / [i915#3116]) -> [SKIP][304] ([i915#15330] / [i915#3116])
[303]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@[email protected]
[304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_content_protection@suspend-resume:
- shard-dg2: [SKIP][305] ([i915#6944]) -> [FAIL][306] ([i915#7173])
[305]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-dg2-3/igt@[email protected]
[306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-11/igt@[email protected]
- shard-rkl: [SKIP][307] ([i915#6944]) -> [SKIP][308] ([i915#14544] / [i915#6944])
[307]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@[email protected]
[308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@kms_content_protection@uevent-hdcp14:
- shard-dg2: [FAIL][309] ([i915#7173]) -> [SKIP][310] ([i915#6944]) +1 other test skip
[309]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-dg2-11/igt@[email protected]
[310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-3/igt@[email protected]
* igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot:
- shard-rkl: [SKIP][311] ([i915#14544] / [i915#9067]) -> [SKIP][312] ([i915#9067])
[311]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@[email protected]
[312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_dp_link_training@uhbr-mst:
- shard-rkl: [SKIP][313] ([i915#13748]) -> [SKIP][314] ([i915#13748] / [i915#14544])
[313]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@[email protected]
[314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@kms_dsc@dsc-basic:
- shard-rkl: [SKIP][315] ([i915#14544] / [i915#3555] / [i915#3840]) -> [SKIP][316] ([i915#3555] / [i915#3840])
[315]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@[email protected]
[316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_dsc@dsc-fractional-bpp:
- shard-rkl: [SKIP][317] ([i915#3840]) -> [SKIP][318] ([i915#14544] / [i915#3840])
[317]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@[email protected]
[318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@kms_feature_discovery@chamelium:
- shard-rkl: [SKIP][319] ([i915#4854]) -> [SKIP][320] ([i915#14544] / [i915#4854])
[319]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-3/igt@[email protected]
[320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@kms_flip@2x-modeset-vs-vblank-race:
- shard-rkl: [SKIP][321] ([i915#9934]) -> [SKIP][322] ([i915#14544] / [i915#9934]) +1 other test skip
[321]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@[email protected]
[322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@kms_flip@2x-wf_vblank-ts-check:
- shard-rkl: [SKIP][323] ([i915#14544] / [i915#9934]) -> [SKIP][324] ([i915#9934])
[323]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@kms_flip@2x-wf_vblank-ts-check.html
[324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@kms_flip@2x-wf_vblank-ts-check.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling:
- shard-rkl: [SKIP][325] ([i915#15643]) -> [SKIP][326] ([i915#14544] / [i915#15643])
[325]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
[326]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-pwrite:
- shard-rkl: [SKIP][327] ([i915#15102]) -> [SKIP][328] ([i915#14544] / [i915#15102])
[327]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-pwrite.html
[328]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu:
- shard-rkl: [SKIP][329] ([i915#14544] / [i915#15102] / [i915#3023]) -> [SKIP][330] ([i915#15102] / [i915#3023]) +1 other test skip
[329]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
[330]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt:
- shard-dg2: [SKIP][331] ([i915#15102] / [i915#3458]) -> [SKIP][332] ([i915#10433] / [i915#15102] / [i915#3458])
[331]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-dg2-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html
[332]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite:
- shard-dg2: [SKIP][333] ([i915#10433] / [i915#15102] / [i915#3458]) -> [SKIP][334] ([i915#15102] / [i915#3458]) +1 other test skip
[333]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite.html
[334]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt:
- shard-rkl: [SKIP][335] ([i915#1825]) -> [SKIP][336] ([i915#14544] / [i915#1825]) +15 other tests skip
[335]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html
[336]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt:
- shard-rkl: [SKIP][337] ([i915#15102] / [i915#3023]) -> [SKIP][338] ([i915#14544] / [i915#15102] / [i915#3023]) +7 other tests skip
[337]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-3/igt@[email protected]
[338]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt:
- shard-rkl: [SKIP][339] ([i915#14544] / [i915#1825]) -> [SKIP][340] ([i915#1825]) +6 other tests skip
[339]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@[email protected]
[340]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_hdr@brightness-with-hdr:
- shard-dg2: [SKIP][341] ([i915#12713]) -> [SKIP][342] ([i915#13331])
[341]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-dg2-3/igt@[email protected]
[342]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-dg2-11/igt@[email protected]
- shard-rkl: [SKIP][343] ([i915#12713]) -> [SKIP][344] ([i915#1187] / [i915#12713])
[343]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-4/igt@[email protected]
[344]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-3/igt@[email protected]
* igt@kms_joiner@basic-ultra-joiner:
- shard-rkl: [SKIP][345] ([i915#15458]) -> [SKIP][346] ([i915#14544] / [i915#15458])
[345]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@[email protected]
[346]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier:
- shard-rkl: [SKIP][347] ([i915#15608] / [i915#8825]) -> [SKIP][348] ([i915#14544] / [i915#15608] / [i915#8825]) +3 other tests skip
[347]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-3/igt@[email protected]
[348]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier@pipe-a-plane-0:
- shard-rkl: [SKIP][349] ([i915#15608]) -> [SKIP][350] ([i915#14544] / [i915#15608]) +1 other test skip
[349]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@kms_plane@[email protected]
[350]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@kms_plane@[email protected]
* igt@kms_plane_lowres@tiling-4:
- shard-rkl: [SKIP][351] ([i915#14544] / [i915#3555]) -> [SKIP][352] ([i915#3555])
[351]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@[email protected]
[352]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_plane_multiple@2x-tiling-4:
- shard-rkl: [SKIP][353] ([i915#13958]) -> [SKIP][354] ([i915#13958] / [i915#14544])
[353]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@[email protected]
[354]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation@pipe-b:
- shard-rkl: [SKIP][355] ([i915#15329]) -> [SKIP][356] ([i915#14544] / [i915#15329]) +3 other tests skip
[355]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@kms_plane_scaling@[email protected]
[356]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@kms_plane_scaling@[email protected]
* igt@kms_pm_lpsp@kms-lpsp:
- shard-rkl: [SKIP][357] ([i915#3828]) -> [SKIP][358] ([i915#9340])
[357]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-8/igt@[email protected]
[358]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-4/igt@[email protected]
* igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-sf:
- shard-rkl: [SKIP][359] ([i915#11520] / [i915#14544]) -> [SKIP][360] ([i915#11520])
[359]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@[email protected]
[360]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area:
- shard-rkl: [SKIP][361] ([i915#11520]) -> [SKIP][362] ([i915#11520] / [i915#14544]) +1 other test skip
[361]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@[email protected]
[362]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@kms_psr@fbc-pr-sprite-plane-move:
- shard-rkl: [SKIP][363] ([i915#1072] / [i915#14544] / [i915#9732]) -> [SKIP][364] ([i915#1072] / [i915#9732]) +2 other tests skip
[363]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@[email protected]
[364]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_psr@pr-cursor-mmap-cpu:
- shard-rkl: [SKIP][365] ([i915#1072] / [i915#9732]) -> [SKIP][366] ([i915#1072] / [i915#14544] / [i915#9732]) +6 other tests skip
[365]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@[email protected]
[366]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
- shard-rkl: [SKIP][367] ([i915#5289]) -> [SKIP][368] ([i915#14544] / [i915#5289])
[367]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-7/igt@[email protected]
[368]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-rkl: [SKIP][369] ([i915#14544] / [i915#5289]) -> [SKIP][370] ([i915#5289])
[369]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@[email protected]
[370]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@kms_vrr@negative-basic:
- shard-rkl: [SKIP][371] ([i915#3555] / [i915#9906]) -> [SKIP][372] ([i915#14544] / [i915#3555] / [i915#9906])
[371]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-3/igt@[email protected]
[372]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
* igt@perf_pmu@rc6-all-gts:
- shard-rkl: [SKIP][373] ([i915#14544] / [i915#8516]) -> [SKIP][374] ([i915#8516])
[373]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-6/igt@[email protected]
[374]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-2/igt@[email protected]
* igt@prime_vgem@fence-flip-hang:
- shard-rkl: [SKIP][375] ([i915#3708]) -> [SKIP][376] ([i915#14544] / [i915#3708])
[375]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17951/shard-rkl-3/igt@[email protected]
[376]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/shard-rkl-6/igt@[email protected]
[i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
[i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
[i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
[i915#10553]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10553
[i915#10647]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10647
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#10959]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10959
[i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
[i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
[i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
[i915#1187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1187
[i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#12169]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12169
[i915#12178]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12178
[i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
[i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343
[i915#12454]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12454
[i915#12655]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12655
[i915#12712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12712
[i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
[i915#12756]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12756
[i915#12761]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12761
[i915#12910]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12910
[i915#13030]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13030
[i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046
[i915#13331]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13331
[i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
[i915#13390]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13390
[i915#13409]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13409
[i915#13476]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13476
[i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
[i915#13691]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13691
[i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707
[i915#13729]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13729
[i915#13748]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13748
[i915#13783]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13783
[i915#13809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13809
[i915#13821]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13821
[i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
[i915#14033]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14033
[i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
[i915#14118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14118
[i915#14433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14433
[i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544
[i915#15073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15073
[i915#15102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15102
[i915#15104]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15104
[i915#15106]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15106
[i915#15131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15131
[i915#15329]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15329
[i915#15330]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15330
[i915#15342]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15342
[i915#15389]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15389
[i915#15391]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15391
[i915#15458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15458
[i915#15459]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15459
[i915#15460]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15460
[i915#15478]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15478
[i915#15479]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15479
[i915#15582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15582
[i915#15608]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15608
[i915#15609]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15609
[i915#15643]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15643
[i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
[i915#2436]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2436
[i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
[i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
[i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
[i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
[i915#3323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3323
[i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
[i915#3469]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3469
[i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
[i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
[i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
[i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
[i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
[i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
[i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349
[i915#4387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4387
[i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
[i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
[i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
[i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
[i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
[i915#4854]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4854
[i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
[i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
[i915#5956]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5956
[i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
[i915#6230]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6230
[i915#6245]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6245
[i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301
[i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
[i915#6344]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6344
[i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
[i915#6880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6880
[i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
[i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
[i915#7173]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7173
[i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
[i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
[i915#7862]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7862
[i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
[i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
[i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
[i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
[i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
[i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
[i915#8812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8812
[i915#8825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8825
[i915#9053]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9053
[i915#9067]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9067
[i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
[i915#9340]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9340
[i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
[i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
[i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
[i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
[i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934
Build changes
-------------
* Linux: CI_DRM_17951 -> Patchwork_161264v1
CI-20190529: 20190529
CI_DRM_17951: d9124a6be3c7bdaeb14c3629013dde27929dbf04 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8740: 36ebdc56b434bf330c44e96205f1fcefcf598651 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_161264v1: d9124a6be3c7bdaeb14c3629013dde27929dbf04 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161264v1/index.html
Patchwork
CI✗ Xe.CI.FULL: failure for series starting with [1/2] drm/i915/dp: Fix pipe BPP clamping due to HDR
In reply to Imre Deak== Series Details ==
== Series Details ==
Series: series starting with [1/2] drm/i915/dp: Fix pipe BPP clamping due to HDR
URL : https://patchwork.freedesktop.org/series/161265/
State : failure
== Summary ==
CI Bug Log - changes from xe-4518-0082025812a31eda451fb14f13f52683ed375c49_FULL -> xe-pw-161265v1_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-161265v1_FULL absolutely need to be verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-161265v1_FULL, please notify your bug team ([email protected]) to allow them to document this new failure mode, which will reduce false positives in CI.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-161265v1_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-c-edp-1:
- shard-lnl: NOTRUN -> [INCOMPLETE][1] +1 other test incomplete
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@kms_ccs@[email protected]
* igt@xe_exec_system_allocator@threads-many-new-bo-map-nomemset:
- shard-bmg: [PASS][2] -> [ABORT][3] +1 other test abort
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-10/igt@[email protected]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-2/igt@[email protected]
Known issues
------------
Here are the changes found in xe-pw-161265v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@intel_hwmon@hwmon-read:
- shard-lnl: NOTRUN -> [SKIP][4] ([Intel XE#1125])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@[email protected]
* igt@kms_async_flips@test-cursor-atomic:
- shard-lnl: NOTRUN -> [SKIP][5] ([Intel XE#664])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@[email protected]
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#2370])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-10/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#2327]) +2 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@kms_big_fb@x-tiled-64bpp-rotate-270:
- shard-lnl: NOTRUN -> [SKIP][8] ([Intel XE#1407])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@[email protected]
* igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#607])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@[email protected]
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#1124]) +2 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#2314] / [Intel XE#2894])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@[email protected]
- shard-lnl: NOTRUN -> [SKIP][12] ([Intel XE#1512])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@[email protected]
* igt@kms_bw@linear-tiling-3-displays-1920x1080p:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#367])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc:
- shard-lnl: NOTRUN -> [SKIP][14] ([Intel XE#2887]) +2 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@[email protected]
* igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#2887]) +5 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-hdmi-a-3:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#2652] / [Intel XE#787]) +8 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@kms_ccs@[email protected]
* igt@kms_ccs@crc-primary-suspend-y-tiled-ccs:
- shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#3432])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@kms_cdclk@plane-scaling:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#2724])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@[email protected]
* igt@kms_chamelium_color@ctm-max:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#2325])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@kms_chamelium_hpd@vga-hpd:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#2252]) +1 other test skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@[email protected]
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#6969]) +1 other test skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-4/igt@kms_color_pipeline@[email protected]
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-dp-2:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#6969] / [Intel XE#7006])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-4/igt@kms_color_pipeline@[email protected]
* igt@kms_content_protection@atomic-hdcp14@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][23] ([Intel XE#3304])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-8/igt@kms_content_protection@[email protected]
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-lnl: NOTRUN -> [SKIP][24] ([Intel XE#307] / [Intel XE#6974])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@[email protected]
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#2390] / [Intel XE#6974])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@[email protected]
* igt@kms_content_protection@dp-mst-type-0-hdcp14:
- shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#6974])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-10/igt@[email protected]
* igt@kms_content_protection@lic-type-0@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][27] ([Intel XE#1178] / [Intel XE#3304])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@kms_content_protection@[email protected]
* igt@kms_content_protection@lic-type-1:
- shard-lnl: NOTRUN -> [SKIP][28] ([Intel XE#3278])
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@[email protected]
- shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#2341])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@[email protected]
* igt@kms_content_protection@uevent@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][30] ([Intel XE#6707])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-2/igt@kms_content_protection@[email protected]
* igt@kms_cursor_crc@cursor-offscreen-512x512:
- shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#2321]) +1 other test skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@kms_cursor_crc@cursor-onscreen-128x42:
- shard-lnl: NOTRUN -> [SKIP][32] ([Intel XE#1424])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@[email protected]
* igt@kms_cursor_crc@cursor-sliding-64x21:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#2320]) +1 other test skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@[email protected]
* igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size:
- shard-bmg: [PASS][34] -> [SKIP][35] ([Intel XE#2291])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-4/igt@[email protected]
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-5/igt@[email protected]
* igt@kms_dp_link_training@non-uhbr-mst:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#4354])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@kms_flip@2x-absolute-wf_vblank-interruptible:
- shard-lnl: NOTRUN -> [SKIP][37] ([Intel XE#1421]) +1 other test skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html
* igt@kms_flip@2x-flip-vs-wf_vblank-interruptible:
- shard-bmg: [PASS][38] -> [SKIP][39] ([Intel XE#2316]) +4 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-3/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-5/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: [PASS][40] -> [FAIL][41] ([Intel XE#301] / [Intel XE#3149]) +1 other test fail
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-lnl-4/igt@[email protected]
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-3/igt@[email protected]
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1:
- shard-lnl: [PASS][42] -> [FAIL][43] ([Intel XE#301])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-lnl-4/igt@kms_flip@[email protected]
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-3/igt@kms_flip@[email protected]
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling:
- shard-lnl: NOTRUN -> [SKIP][44] ([Intel XE#7178])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html
- shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#7178])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html
* igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#7061]) +5 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#4141]) +3 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][48] ([Intel XE#2311]) +9 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-move:
- shard-lnl: NOTRUN -> [SKIP][49] ([Intel XE#651]) +1 other test skip
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@[email protected]
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][50] ([Intel XE#656]) +2 other tests skip
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt:
- shard-bmg: NOTRUN -> [SKIP][51] ([Intel XE#2313]) +11 other tests skip
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@[email protected]
* igt@kms_frontbuffer_tracking@psr-argb161616f-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][52] ([Intel XE#7061])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@[email protected]
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [PASS][53] -> [SKIP][54] ([Intel XE#1503]) +1 other test skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-5/igt@[email protected]
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-4/igt@[email protected]
* igt@kms_hdr@static-toggle-dpms:
- shard-lnl: NOTRUN -> [SKIP][55] ([Intel XE#1503])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@[email protected]
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-bmg: NOTRUN -> [SKIP][56] ([Intel XE#2501])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@[email protected]
* igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier-source-clamping:
- shard-bmg: NOTRUN -> [SKIP][57] ([Intel XE#7111] / [Intel XE#7130] / [Intel XE#7131])
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier-source-clamping.html
* igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier-source-clamping@pipe-a-plane-3:
- shard-bmg: NOTRUN -> [SKIP][58] ([Intel XE#7130]) +8 other tests skip
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier-source-clamping@pipe-a-plane-3.html
* igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier-source-clamping@pipe-a-plane-5:
- shard-bmg: NOTRUN -> [SKIP][59] ([Intel XE#7131])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier-source-clamping@pipe-a-plane-5.html
* igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier-source-clamping@pipe-b-plane-5:
- shard-bmg: NOTRUN -> [SKIP][60] ([Intel XE#7111] / [Intel XE#7131])
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier-source-clamping@pipe-b-plane-5.html
* igt@kms_plane@pixel-format-yf-tiled-ccs-modifier:
- shard-bmg: NOTRUN -> [SKIP][61] ([Intel XE#7111] / [Intel XE#7130]) +1 other test skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@kms_plane_cursor@primary:
- shard-bmg: [PASS][62] -> [ABORT][63] ([Intel XE#5545] / [Intel XE#6652]) +1 other test abort
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-7/igt@[email protected]
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-2/igt@[email protected]
* igt@kms_plane_cursor@primary@pipe-a-dp-2-size-256:
- shard-bmg: [PASS][64] -> [FAIL][65] ([Intel XE#7201])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-7/igt@kms_plane_cursor@[email protected]
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-2/igt@kms_plane_cursor@[email protected]
* igt@kms_plane_multiple@tiling-y:
- shard-bmg: NOTRUN -> [SKIP][66] ([Intel XE#5020])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-10/igt@[email protected]
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-a:
- shard-bmg: NOTRUN -> [SKIP][67] ([Intel XE#6886]) +4 other tests skip
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@kms_plane_scaling@[email protected]
* igt@kms_pm_dc@dc5-retention-flops:
- shard-bmg: NOTRUN -> [SKIP][68] ([Intel XE#3309])
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@[email protected]
* igt@kms_pm_rpm@dpms-lpsp:
- shard-bmg: NOTRUN -> [SKIP][69] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836]) +1 other test skip
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf:
- shard-bmg: NOTRUN -> [SKIP][70] ([Intel XE#1406] / [Intel XE#1489]) +2 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr@pr-dpms:
- shard-lnl: NOTRUN -> [SKIP][71] ([Intel XE#1406])
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@[email protected]
* igt@kms_psr@pr-primary-render:
- shard-bmg: NOTRUN -> [SKIP][72] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +4 other tests skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-bmg: NOTRUN -> [SKIP][73] ([Intel XE#1406] / [Intel XE#2414])
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@kms_vrr@max-min:
- shard-bmg: NOTRUN -> [SKIP][74] ([Intel XE#1499])
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@xe_eudebug@basic-exec-queues:
- shard-bmg: NOTRUN -> [SKIP][75] ([Intel XE#4837])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@xe_eudebug_online@interrupt-all-set-breakpoint:
- shard-bmg: NOTRUN -> [SKIP][76] ([Intel XE#4837] / [Intel XE#6665]) +1 other test skip
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@xe_evict@evict-cm-threads-large-multi-vm:
- shard-lnl: NOTRUN -> [SKIP][77] ([Intel XE#688])
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@[email protected]
* igt@xe_exec_basic@multigpu-no-exec-userptr:
- shard-bmg: NOTRUN -> [SKIP][78] ([Intel XE#2322]) +2 other tests skip
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@[email protected]
* igt@xe_exec_basic@multigpu-once-userptr-invalidate-race:
- shard-lnl: NOTRUN -> [SKIP][79] ([Intel XE#1392])
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@[email protected]
* igt@xe_exec_fault_mode@twice-multi-queue-userptr-rebind:
- shard-bmg: NOTRUN -> [SKIP][80] ([Intel XE#7136]) +8 other tests skip
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@xe_exec_multi_queue@max-queues-preempt-mode-basic-smem:
- shard-bmg: NOTRUN -> [SKIP][81] ([Intel XE#6874]) +12 other tests skip
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-10/igt@[email protected]
* igt@xe_exec_multi_queue@max-queues-preempt-mode-fault-priority:
- shard-lnl: NOTRUN -> [SKIP][82] ([Intel XE#6874])
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@[email protected]
* igt@xe_exec_system_allocator@many-64k-mmap-free-huge-nomemset:
- shard-bmg: NOTRUN -> [SKIP][83] ([Intel XE#5007])
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma:
- shard-lnl: [PASS][84] -> [FAIL][85] ([Intel XE#5625])
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-lnl-1/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html
* igt@xe_exec_system_allocator@threads-many-mmap-new-huge-nomemset:
- shard-bmg: NOTRUN -> [SKIP][86] ([Intel XE#4943]) +8 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@xe_exec_system_allocator@threads-many-mmap-new-huge-nomemset.html
* igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr:
- shard-bmg: NOTRUN -> [SKIP][87] ([Intel XE#7138]) +5 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@xe_exec_threads@threads-multi-queue-userptr:
- shard-lnl: NOTRUN -> [SKIP][88] ([Intel XE#7138])
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@[email protected]
* igt@xe_multigpu_svm@mgpu-concurrent-access-basic:
- shard-bmg: NOTRUN -> [SKIP][89] ([Intel XE#6964]) +1 other test skip
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-10/igt@[email protected]
* igt@xe_multigpu_svm@mgpu-latency-copy-prefetch:
- shard-lnl: NOTRUN -> [SKIP][90] ([Intel XE#6964])
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@[email protected]
* igt@xe_pm@d3cold-multiple-execs:
- shard-bmg: NOTRUN -> [SKIP][91] ([Intel XE#2284])
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@[email protected]
- shard-lnl: NOTRUN -> [SKIP][92] ([Intel XE#2284] / [Intel XE#366])
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-lnl-8/igt@[email protected]
* igt@xe_pm@d3hot-i2c:
- shard-bmg: NOTRUN -> [SKIP][93] ([Intel XE#5742])
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
* igt@xe_pxp@pxp-stale-bo-exec-post-rpm:
- shard-bmg: NOTRUN -> [SKIP][94] ([Intel XE#4733])
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@[email protected]
* igt@xe_query@multigpu-query-invalid-cs-cycles:
- shard-bmg: NOTRUN -> [SKIP][95] ([Intel XE#944])
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@[email protected]
#### Possible fixes ####
* igt@kms_big_fb@linear-16bpp-rotate-180:
- shard-bmg: [INCOMPLETE][96] ([Intel XE#5643]) -> [PASS][97]
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-7/igt@[email protected]
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@[email protected]
* igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p:
- shard-bmg: [SKIP][98] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][99]
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-5/igt@[email protected]
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-4/igt@[email protected]
* igt@kms_cursor_legacy@cursorb-vs-flipb-legacy:
- shard-bmg: [SKIP][100] ([Intel XE#2291]) -> [PASS][101] +7 other tests pass
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-5/igt@[email protected]
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-2/igt@[email protected]
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-bmg: [FAIL][102] ([Intel XE#4633]) -> [PASS][103]
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-1/igt@[email protected]
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-10/igt@[email protected]
* igt@kms_flip@2x-blocking-wf_vblank:
- shard-bmg: [SKIP][104] ([Intel XE#2316]) -> [PASS][105] +7 other tests pass
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-6/igt@kms_flip@2x-blocking-wf_vblank.html
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-7/igt@kms_flip@2x-blocking-wf_vblank.html
* igt@kms_flip@flip-vs-suspend@c-hdmi-a3:
- shard-bmg: [INCOMPLETE][106] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][107] +1 other test pass
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-9/igt@kms_flip@[email protected]
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-10/igt@kms_flip@[email protected]
* igt@kms_setmode@invalid-clone-single-crtc-stealing:
- shard-bmg: [SKIP][108] ([Intel XE#1435]) -> [PASS][109] +1 other test pass
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-6/igt@[email protected]
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-7/igt@[email protected]
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-bmg: [INCOMPLETE][110] ([Intel XE#6321]) -> [PASS][111]
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-2/igt@[email protected]
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-4/igt@[email protected]
* igt@xe_exec_system_allocator@many-mmap-remap:
- shard-bmg: [DMESG-FAIL][112] ([Intel XE#5213] / [Intel XE#5545] / [Intel XE#6652]) -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-2/igt@[email protected]
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-4/igt@[email protected]
* igt@xe_fault_injection@inject-fault-probe-function-xe_sriov_init:
- shard-bmg: [ABORT][114] -> [PASS][115]
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-3/igt@xe_fault_injection@inject-fault-probe-function-xe_sriov_init.html
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-9/igt@xe_fault_injection@inject-fault-probe-function-xe_sriov_init.html
* igt@xe_oa@polling:
- shard-bmg: [SKIP][116] ([Intel XE#6703]) -> [PASS][117] +7 other tests pass
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-2/igt@[email protected]
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-4/igt@[email protected]
#### Warnings ####
* igt@kms_chamelium_edid@dp-edid-stress-resolution-non-4k:
- shard-bmg: [SKIP][118] ([Intel XE#6703]) -> [SKIP][119] ([Intel XE#2252])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-2/igt@[email protected]
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-4/igt@[email protected]
* igt@kms_content_protection@atomic:
- shard-bmg: [FAIL][120] ([Intel XE#1178] / [Intel XE#3304]) -> [SKIP][121] ([Intel XE#2341]) +1 other test skip
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-1/igt@[email protected]
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-6/igt@[email protected]
* igt@kms_content_protection@atomic-hdcp14:
- shard-bmg: [SKIP][122] ([Intel XE#7194]) -> [FAIL][123] ([Intel XE#3304])
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-6/igt@[email protected]
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-8/igt@[email protected]
* igt@kms_content_protection@lic-type-0:
- shard-bmg: [SKIP][124] ([Intel XE#2341]) -> [FAIL][125] ([Intel XE#1178] / [Intel XE#3304])
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-6/igt@[email protected]
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-1/igt@[email protected]
* igt@kms_content_protection@uevent:
- shard-bmg: [SKIP][126] ([Intel XE#2341]) -> [FAIL][127] ([Intel XE#6707])
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-5/igt@[email protected]
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-2/igt@[email protected]
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][128] ([Intel XE#2312]) -> [SKIP][129] ([Intel XE#2311]) +18 other tests skip
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
- shard-bmg: [SKIP][130] ([Intel XE#2312]) -> [SKIP][131] ([Intel XE#4141]) +8 other tests skip
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
- shard-bmg: [SKIP][132] ([Intel XE#4141]) -> [SKIP][133] ([Intel XE#2312]) +7 other tests skip
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-1/igt@[email protected]
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-6/igt@[email protected]
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][134] ([Intel XE#2311]) -> [SKIP][135] ([Intel XE#2312]) +10 other tests skip
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-rte:
- shard-bmg: [SKIP][136] ([Intel XE#2313]) -> [SKIP][137] ([Intel XE#2312]) +8 other tests skip
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-3/igt@[email protected]
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-5/igt@[email protected]
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
- shard-bmg: [SKIP][138] ([Intel XE#2312]) -> [SKIP][139] ([Intel XE#2313]) +20 other tests skip
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-6/igt@[email protected]
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-8/igt@[email protected]
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-render:
- shard-bmg: [SKIP][140] ([Intel XE#6703]) -> [SKIP][141] ([Intel XE#2313])
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-render.html
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-render.html
* igt@kms_plane_multiple@2x-tiling-y:
- shard-bmg: [SKIP][142] ([Intel XE#5021]) -> [SKIP][143] ([Intel XE#4596])
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-1/igt@[email protected]
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-6/igt@[email protected]
* igt@kms_pm_dc@deep-pkgc:
- shard-bmg: [SKIP][144] ([Intel XE#6703]) -> [SKIP][145] ([Intel XE#2505])
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-2/igt@[email protected]
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-4/igt@[email protected]
* igt@xe_eudebug_online@writes-caching-vram-bb-vram-target-sram:
- shard-bmg: [SKIP][146] ([Intel XE#6703]) -> [SKIP][147] ([Intel XE#4837] / [Intel XE#6665])
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-2/igt@[email protected]
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-4/igt@[email protected]
* igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
- shard-bmg: [SKIP][148] ([Intel XE#6703]) -> [ABORT][149] ([Intel XE#5466])
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4518-0082025812a31eda451fb14f13f52683ed375c49/shard-bmg-2/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/shard-bmg-4/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1125]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1125
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
[Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
[Intel XE#2414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2414
[Intel XE#2501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2501
[Intel XE#2505]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2505
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3278
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4633]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4633
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
[Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
[Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
[Intel XE#5213]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5213
[Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
[Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
[Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
[Intel XE#5643]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5643
[Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
[Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#664]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/664
[Intel XE#6652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6652
[Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
[Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703
[Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
[Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
[Intel XE#7006]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7006
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7111]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7111
[Intel XE#7130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7130
[Intel XE#7131]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7131
[Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
[Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7194]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7194
[Intel XE#7201]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7201
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-4518-0082025812a31eda451fb14f13f52683ed375c49 -> xe-pw-161265v1
IGT_8740: 36ebdc56b434bf330c44e96205f1fcefcf598651 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4518-0082025812a31eda451fb14f13f52683ed375c49: 0082025812a31eda451fb14f13f52683ed375c49
xe-pw-161265v1: 161265v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161265v1/index.html
Patchwork
CI✗ Fi.CI.BUILD: failure for series starting with [1/2] drm/i915/dp: Fix pipe BPP clamping due to HDR (rev2)
In reply to Imre Deak== Series Details ==
== Series Details ==
Series: series starting with [1/2] drm/i915/dp: Fix pipe BPP clamping due to HDR (rev2)
URL : https://patchwork.freedesktop.org/series/161264/
State : failure
== Summary ==
Error: patch https://patchwork.freedesktop.org/api/1.0/series/161264/revisions/2/mbox/ not applied Patch is empty.
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To record the empty patch as an empty commit, run "git am --allow-empty".
To restore the original branch and stop patching, run "git am --abort".
Build failed, no error log produced