6.12 and below: amdgpu: fix panic with SI and DC

PATCH In review Rosen Penev 2 participants 12 messages Feb 21

Subsystems (4)

Stable branch DRM drivers Radeon and amdgpu DRM drivers AMD powerplay and SWSMU

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Rosen Penev

author

2026-02-21 03:44 UTC #1 lore raw

PATCH 1/2 Revert "drm/amd/pm: Disable MCLK switching on SI at high pixel clocks"

This reverts commit d033e8cf4e8f6395102cdbc3cb00dc7cb9542f53.

Cc Timur Kristóf <[email protected]>

Cc Alex Deucher <[email protected]>

Signed-off-by Rosen Penev <[email protected]>

---
 drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 5 -----
 1 file changed, 5 deletions(-)

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c +0 -5

index 29cecfab0704..05eaa06dfa34 100644
@@ -3486,11 +3486,6 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev,
 	 * for these GPUs to calculate bandwidth requirements.
 	 */
 	if (high_pixelclock_count) {
-		/* Work around flickering lines at the bottom edge
-		 * of the screen when using a single 4K 60Hz monitor.
-		 */
-		disable_mclk_switching = true;
-
 		/* On Oland, we observe some flickering when two 4K 60Hz
 		 * displays are connected, possibly because voltage is too low.
 		 * Raise the voltage by requiring a higher SCLK.

Signature · 1 line

2.53.0

Greg KH

maintainer

2026-02-21 05:40 UTC #2 lore raw

Re: [PATCH 1/2] Revert "drm/amd/pm: Disable MCLK switching on SI at high pixel clocks"

Quoted 1 line · Rosen Penev

This reverts commit d033e8cf4e8f6395102cdbc3cb00dc7cb9542f53.

Why? You need to explain why you do something, not just what you are doing.

And this is a 6.12.59 commit, explain, in detail why you aren't wanting it reverted anywhere else INCLUDING upstream.

thanks,

greg k-h

Rosen Penev

author

2026-02-21 05:54 UTC #3 lore raw

Re: [PATCH 1/2] Revert "drm/amd/pm: Disable MCLK switching on SI at high pixel clocks"

Quoted 6 lines · Greg KH

Quoted 1 line · Rosen Penev
This reverts commit d033e8cf4e8f6395102cdbc3cb00dc7cb9542f53.
Why? You need to explain why you do something, not just what you are doing.

Not sure how to specify that it's a requirement for the second patch so that git revert works without problems.

Quoted 7 lines

And this is a 6.12.59 commit, explain, in detail why you aren't wanting it reverted anywhere else INCLUDING upstream.
thanks,
greg k-h

Greg KH

maintainer

2026-02-21 06:33 UTC #4 lore raw

Re: [PATCH 1/2] Revert "drm/amd/pm: Disable MCLK switching on SI at high pixel clocks"

Quoted 9 lines · Rosen Penev

Quoted 6 lines · Greg KH
Quoted 1 line · Rosen Penev
This reverts commit d033e8cf4e8f6395102cdbc3cb00dc7cb9542f53.
Why? You need to explain why you do something, not just what you are doing.
Not sure how to specify that it's a requirement for the second patch so that git revert works without problems.

Just say so, nothing complex here, just describe the problem and what is needed to resolve it. This ends up in the changelog, your patch 0/2 does not.

thanks,

greg k-h

Rosen Penev

author

2026-02-21 03:44 UTC #5 lore raw

PATCH 2/2 Revert "drm/amd/pm: Disable SCLK switching on Oland with high pixel clocks (v3)"

In reply to Rosen Penev

This reverts commit 0bb91bed82d414447f2e56030d918def6383c026.

This commit breaks stable kernels older than 6.18 that are booted with radeon.si_support=0 amdgpu.si_support=1 amdgpu.dc=1

In 6.17, threre are further commits that are needed to get the DC codepath in amdgpu for Southern Islands GPUs working but they seem to be too much of a hastle to backport cleanly. The simplest solution is to revert this problematic commit

Cc Timur Kristóf <[email protected]>

Cc Alex Deucher <[email protected]>

Signed-off-by Rosen Penev <[email protected]>

---
 drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 31 ----------------------
 1 file changed, 31 deletions(-)

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c +0 ~~-31~~

index 05eaa06dfa34..c4386c86153b 100644
@@ -3426,14 +3426,12 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev,
 {
 	struct  si_ps *ps = si_get_ps(rps);
 	struct amdgpu_clock_and_voltage_limits *max_limits;
-	struct amdgpu_connector *conn;
 	bool disable_mclk_switching = false;
 	bool disable_sclk_switching = false;
 	u32 mclk, sclk;
 	u16 vddc, vddci, min_vce_voltage = 0;
 	u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
 	u32 max_sclk = 0, max_mclk = 0;
-	u32 high_pixelclock_count = 0;
 	int i;
 
 	if (adev->asic_type == CHIP_HAINAN) {

@@ -3466,35 +3464,6 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev,
 		}
 	}
 
-	/* We define "high pixelclock" for SI as higher than necessary for 4K 30Hz.
-	 * For example, 4K 60Hz and 1080p 144Hz fall into this category.
-	 * Find number of such displays connected.
-	 */
-	for (i = 0; i < adev->mode_info.num_crtc; i++) {
-		if (!(adev->pm.dpm.new_active_crtcs & (1 << i)) ||
-			!adev->mode_info.crtcs[i]->enabled)
-			continue;
-
-		conn = to_amdgpu_connector(adev->mode_info.crtcs[i]->connector);
-
-		if (conn->pixelclock_for_modeset > 297000)
-			high_pixelclock_count++;
-	}
-
-	/* These are some ad-hoc fixes to some issues observed with SI GPUs.
-	 * They are necessary because we don't have something like dce_calcs
-	 * for these GPUs to calculate bandwidth requirements.
-	 */
-	if (high_pixelclock_count) {
-		/* On Oland, we observe some flickering when two 4K 60Hz
-		 * displays are connected, possibly because voltage is too low.
-		 * Raise the voltage by requiring a higher SCLK.
-		 * (Voltage cannot be adjusted independently without also SCLK.)
-		 */
-		if (high_pixelclock_count > 1 && adev->asic_type == CHIP_OLAND)
-			disable_sclk_switching = true;
-	}
-
 	if (rps->vce_active) {
 		rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk;
 		rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk;

Signature · 1 line

2.53.0

Greg KH

maintainer

2026-02-21 05:41 UTC #6 lore raw

Re: [PATCH 2/2] Revert "drm/amd/pm: Disable SCLK switching on Oland with high pixel clocks (v3)"

Quoted 9 lines · Rosen Penev

This reverts commit 0bb91bed82d414447f2e56030d918def6383c026.
This commit breaks stable kernels older than 6.18 that are booted with radeon.si_support=0 amdgpu.si_support=1 amdgpu.dc=1
In 6.17, threre are further commits that are needed to get the DC codepath in amdgpu for Southern Islands GPUs working but they seem to be too much of a hastle to backport cleanly. The simplest solution is to revert this problematic commit

Ok, this is better, but still, this only applies to 6.12.y, right?

thanks,

greg k-h

Rosen Penev

author

2026-02-21 05:52 UTC #7 lore raw

Re: [PATCH 2/2] Revert "drm/amd/pm: Disable SCLK switching on Oland with high pixel clocks (v3)"

Quoted 7 lines · Greg KH

Quoted 5 lines · Rosen Penev
This reverts commit 0bb91bed82d414447f2e56030d918def6383c026.
This commit breaks stable kernels older than 6.18 that are booted with radeon.si_support=0 amdgpu.si_support=1 amdgpu.dc=1

Quoted 6 lines

Quoted 4 lines
In 6.17, threre are further commits that are needed to get the DC codepath in amdgpu for Southern Islands GPUs working but they seem to be too much of a hastle to backport cleanly. The simplest solution is to revert this problematic commit
Ok, this is better, but still, this only applies to 6.12.y, right?

The reverted commit (or rather the one from master) was backported to at least 6.12 and 6.6. I didn't check what other kernels include it.

Quoted 4 lines

thanks,
greg k-h

Greg KH

maintainer

2026-02-21 06:33 UTC #8 lore raw

Re: [PATCH 2/2] Revert "drm/amd/pm: Disable SCLK switching on Oland with high pixel clocks (v3)"

Quoted 8 lines · Rosen Penev

Quoted 7 lines · Greg KH
Quoted 5 lines · Rosen Penev
This reverts commit 0bb91bed82d414447f2e56030d918def6383c026.
This commit breaks stable kernels older than 6.18 that are booted with radeon.si_support=0 amdgpu.si_support=1 amdgpu.dc=1

Quoted 8 lines

Quoted 6 lines
Quoted 4 lines
In 6.17, threre are further commits that are needed to get the DC codepath in amdgpu for Southern Islands GPUs working but they seem to be too much of a hastle to backport cleanly. The simplest solution is to revert this problematic commit
Ok, this is better, but still, this only applies to 6.12.y, right?
The reverted commit (or rather the one from master) was backported to at least 6.12 and 6.6. I didn't check what other kernels include it.

I see it in the following kernel releases:

	6.1.156 6.6.112 6.12.53 6.17.3 6.18

All except 6.17.y is currently being supported.

thanks,

greg k-h

Rosen Penev

author

2026-02-21 08:48 UTC #9 lore raw

Re: [PATCH 2/2] Revert "drm/amd/pm: Disable SCLK switching on Oland with high pixel clocks (v3)"

Quoted 15 lines · Greg KH

Quoted 13 lines · Rosen Penev
Quoted 12 lines · Greg KH
Quoted 9 lines · Rosen Penev
This reverts commit 0bb91bed82d414447f2e56030d918def6383c026.
This commit breaks stable kernels older than 6.18 that are booted with radeon.si_support=0 amdgpu.si_support=1 amdgpu.dc=1
In 6.17, threre are further commits that are needed to get the DC codepath in amdgpu for Southern Islands GPUs working but they seem to be too much of a hastle to backport cleanly. The simplest solution is to revert this problematic commit

Quoted 8 lines

Quoted 3 lines
Quoted 1 line
Ok, this is better, but still, this only applies to 6.12.y, right?
The reverted commit (or rather the one from master) was backported to at least 6.12 and 6.6. I didn't check what other kernels include it.
I see it in the following kernel releases:
        6.1.156 6.6.112 6.12.53 6.17.3 6.18
All except 6.17.y is currently being supported.

Yes. I complained about 6.17 being broken at the time and luckily the proper fixes got backported to 6.17. There's no issue there.

Those fixes are too involved to be cleanly backported to older kernels, hence the revert being needed.

I'll mention 6.1 in v2.

Quoted 4 lines

thanks,
greg k-h

Greg KH

maintainer

2026-02-21 05:41 UTC #10 lore raw

In reply to Rosen Penev

Quoted 5 lines · Rosen Penev

The first commit is needed for the second one to be reverted cleanly.
The second breaks DC support on my AMD 7750. Kernel panics and I get a black screen on boot. With these two reverted, 6.12 is usable again.

Quoted 7 lines

Tried to git cherry-pick the fixes but that proved to be difficult to do cleanly.
I see 6.6 also has these two commits.
Not sure what the proper procedure is to request reverts on stable kernels.

Close, see my comments on the first patch.

thanks,

greg k-h

Rosen Penev

author

2026-02-21 05:56 UTC #11 lore raw

Quoted 10 lines · Greg KH

Quoted 8 lines · Rosen Penev
The first commit is needed for the second one to be reverted cleanly.
The second breaks DC support on my AMD 7750. Kernel panics and I get a black screen on boot. With these two reverted, 6.12 is usable again.
Tried to git cherry-pick the fixes but that proved to be difficult to do cleanly.

Quoted 6 lines

Quoted 4 lines
I see 6.6 also has these two commits.
Not sure what the proper procedure is to request reverts on stable kernels.
Close, see my comments on the first patch.

OK. I'll wait a bit before resubmitting.

Quoted 4 lines

thanks,
greg k-h