6.18.14-rc1 review
Subsystems (5)
Greg Kroah-Hartman
maintainerPATCH 106/641 platform/x86: int0002: Remove IRQF_ONESHOT from request_irq()
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Sebastian Andrzej Siewior <[email protected]>
[ Upstream commit f6bc712877f24dc89bdfd7bdbf1a32f3b9960b34 ]
Passing IRQF_ONESHOT ensures that the interrupt source is masked until the secondary (threaded) handler is done. If only a primary handler is used then the flag makes no sense because the interrupt cannot fire (again) while its handler is running.
The flag also prevents force-threading of the primary handler and the irq-core will warn about this.
The flag was added to match the flag on the shared handler which uses a threaded handler and therefore IRQF_ONESHOT. This is no longer needed because devm_request_irq() now passes IRQF_COND_ONESHOT for this case.
Revert adding IRQF_ONESHOT to irqflags.
--- drivers/platform/x86/intel/int0002_vgpio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/platform/x86/intel/int0002_vgpio.c +2 -2
@@ -206,8 +206,8 @@ static int int0002_probe(struct platform_device *pdev)* FIXME: augment this if we managed to pull handling of shared * IRQs into gpiolib. */ - ret =devm_request_irq (dev, irq, int0002_irq, -IRQF_ONESHOT |IRQF_SHARED ,"INT0002" , chip); + ret =devm_request_irq (dev, irq, int0002_irq,IRQF_SHARED ,"INT0002" , + chip);if (ret) {dev_err (dev,"Error requesting IRQ %d: %d\n" , irq, ret);return ret;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 107/641 iommu/amd: Use cores primary handler and set IRQF_ONESHOT
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Sebastian Andrzej Siewior <[email protected]>
[ Upstream commit 5bfcdccb4d18d3909b7f87942be67fd6bdc00c1d ]
request_threaded_irq() is invoked with a primary and a secondary handler and no flags are passed. The primary handler is the same as irq_default_primary_handler() so there is no need to have an identical copy.
The lack of the IRQF_ONESHOT can be dangerous because the interrupt source is not masked while the threaded handler is active. This means, especially on LEVEL typed interrupt lines, the interrupt can fire again before the threaded handler had a chance to run.
Use the default primary interrupt handler by specifying NULL and set IRQF_ONESHOT so the interrupt source is masked until the secondary handler is done.
--- drivers/iommu/amd/amd_iommu.h | 1 - drivers/iommu/amd/init.c | 12 ++++-------- drivers/iommu/amd/iommu.c | 5 ----- 3 files changed, 4 insertions(+), 14 deletions(-)
drivers/iommu/amd/amd_iommu.h +0 -1
@@ -15,7 +15,6 @@ irqreturn_t amd_iommu_int_thread(int irq, void *data);irqreturn_t amd_iommu_int_thread_evtlog (int irq,void *data);irqreturn_t amd_iommu_int_thread_pprlog (int irq,void *data);irqreturn_t amd_iommu_int_thread_galog (int irq,void *data); -irqreturn_t amd_iommu_int_handler (int irq,void *data);void amd_iommu_restart_log (struct amd_iommu *iommu,const char *evt_type,u8 cntrl_intr,u8 cntrl_log,u32 status_run_mask,u32 status_overflow_mask);
drivers/iommu/amd/init.c +4 -8
@@ -2355,12 +2355,8 @@ static int iommu_setup_msi(struct amd_iommu *iommu)if (r)return r; - r =request_threaded_irq (iommu->dev->irq, - amd_iommu_int_handler, - amd_iommu_int_thread, -0 ,"AMD-Vi" , - iommu); - + r =request_threaded_irq (iommu->dev->irq,NULL , amd_iommu_int_thread, +IRQF_ONESHOT ,"AMD-Vi" , iommu);if (r) {pci_disable_msi (iommu->dev);return r;
@@ -2534,8 +2530,8 @@ static int __iommu_setup_intcapxt(struct amd_iommu *iommu, const char *devname,return irq; } - ret =request_threaded_irq (irq, amd_iommu_int_handler, - thread_fn,0 , devname, iommu); + ret =request_threaded_irq (irq,NULL , thread_fn,IRQF_ONESHOT , devname, + iommu);if (ret) {irq_domain_free_irqs (irq,1 );irq_domain_remove (domain);
drivers/iommu/amd/iommu.c +0 -5
@@ -1146,11 +1146,6 @@ irqreturn_t amd_iommu_int_thread(int irq, void *data)return IRQ_HANDLED ; } -irqreturn_t amd_iommu_int_handler (int irq,void *data) -{ -return IRQ_WAKE_THREAD ; -} -/**************************************************************************** * * IOMMU command queuing functions
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 108/641 Bluetooth: btintel_pcie: Use IRQF_ONESHOT and default primary handler
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Sebastian Andrzej Siewior <[email protected]>
[ Upstream commit 28abed6569c87eab9071ab56c64433c2f0d9ce51 ]
There is no added value in btintel_pcie_msix_isr() compared to irq_default_primary_handler().
Using a threaded interrupt without a dedicated primary handler mandates the IRQF_ONESHOT flag to mask the interrupt source while the threaded handler is active. Otherwise the interrupt can fire again before the threaded handler had a chance to run.
Use the default primary interrupt handler by specifying NULL and set IRQF_ONESHOT so the interrupt source is masked until the secondary handler is done.
--- drivers/bluetooth/btintel_pcie.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-)
drivers/bluetooth/btintel_pcie.c +2 -7
@@ -1430,11 +1430,6 @@ static void btintel_pcie_msix_rx_handle(struct btintel_pcie_data *data) } } -static irqreturn_t btintel_pcie_msix_isr (int irq,void *data) -{ -return IRQ_WAKE_THREAD ; -} -static inline bool btintel_pcie_is_rxq_empty (struct btintel_pcie_data *data) {return data->ia.cr_hia[BTINTEL_PCIE_RXQ_NUM ] == data->ia.cr_tia[BTINTEL_PCIE_RXQ_NUM ];
@@ -1536,9 +1531,9 @@ static int btintel_pcie_setup_irq(struct btintel_pcie_data *data) err =devm_request_threaded_irq (&data->pdev->dev, msix_entry->vector, - btintel_pcie_msix_isr, +NULL , btintel_pcie_irq_msix_handler, -IRQF_SHARED , +IRQF_ONESHOT |IRQF_SHARED ,KBUILD_MODNAME , msix_entry);if (err) {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 109/641 scsi: efct: Use IRQF_ONESHOT and default primary handler
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Sebastian Andrzej Siewior <[email protected]>
[ Upstream commit bd81f07e9a27c341cd7e72be95eb0b7cf3910926 ]
There is no added value in efct_intr_msix() compared to irq_default_primary_handler().
Using a threaded interrupt without a dedicated primary handler mandates the IRQF_ONESHOT flag to mask the interrupt source while the threaded handler is active. Otherwise the interrupt can fire again before the threaded handler had a chance to run.
Use the default primary interrupt handler by specifying NULL and set IRQF_ONESHOT so the interrupt source is masked until the secondary handler is done.
--- drivers/scsi/elx/efct/efct_driver.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-)
drivers/scsi/elx/efct/efct_driver.c +1 -7
@@ -415,12 +415,6 @@ efct_intr_thread(int irq, void *handle)return IRQ_HANDLED ; } -static irqreturn_t -efct_intr_msix (int irq,void *handle) -{ -return IRQ_WAKE_THREAD ; -} -static int efct_setup_msix (struct efct *efct,u32 num_intrs) {
@@ -450,7 +444,7 @@ efct_setup_msix(struct efct *efct, u32 num_intrs) intr_ctx->index = i; rc =request_threaded_irq (pci_irq_vector (efct->pci, i), - efct_intr_msix, efct_intr_thread,0 , +NULL , efct_intr_thread,IRQF_ONESHOT ,EFCT_DRIVER_NAME , intr_ctx);if (rc) { dev_err(&efct->pci->dev,
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 110/641 EDAC/altera: Remove IRQF_ONESHOT
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Sebastian Andrzej Siewior <[email protected]>
[ Upstream commit 5c858d6c66304b4c7579582ec5235f02d43578ea ]
Passing IRQF_ONESHOT ensures that the interrupt source is masked until the secondary (threaded) handler is done. If only a primary handler is used then the flag makes no sense because the interrupt can not fire (again) while its handler is running.
The flag also prevents force-threading of the primary handler and the irq-core will warn about this.
Remove IRQF_ONESHOT from irqflags.
--- drivers/edac/altera_edac.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-)
drivers/edac/altera_edac.c +4 -7
@@ -1563,8 +1563,7 @@ static int altr_portb_setup(struct altr_edac_device_dev *device) goto err_release_group_1; } rc =devm_request_irq (&altdev->ddev, altdev->sb_irq, - prv->ecc_irq_handler, -IRQF_ONESHOT |IRQF_TRIGGER_HIGH , + prv->ecc_irq_handler,IRQF_TRIGGER_HIGH , ecc_name, altdev);if (rc) {edac_printk (KERN_ERR ,EDAC_DEVICE ,"PortB SBERR IRQ error\n" );
@@ -1587,8 +1586,7 @@ static int altr_portb_setup(struct altr_edac_device_dev *device) goto err_release_group_1; } rc =devm_request_irq (&altdev->ddev, altdev->db_irq, - prv->ecc_irq_handler, -IRQF_ONESHOT |IRQF_TRIGGER_HIGH , + prv->ecc_irq_handler,IRQF_TRIGGER_HIGH , ecc_name, altdev);if (rc) {edac_printk (KERN_ERR ,EDAC_DEVICE ,"PortB DBERR IRQ error\n" );
@@ -1970,8 +1968,7 @@ static int altr_edac_a10_device_add(struct altr_arria10_edac *edac, goto err_release_group1; } rc =devm_request_irq (edac->dev, altdev->sb_irq, prv->ecc_irq_handler, -IRQF_ONESHOT |IRQF_TRIGGER_HIGH , - ecc_name, altdev); +IRQF_TRIGGER_HIGH , ecc_name, altdev);if (rc) {edac_printk (KERN_ERR ,EDAC_DEVICE ,"No SBERR IRQ resource\n" ); goto err_release_group1;
@@ -1993,7 +1990,7 @@ static int altr_edac_a10_device_add(struct altr_arria10_edac *edac, goto err_release_group1; } rc =devm_request_irq (edac->dev, altdev->db_irq, prv->ecc_irq_handler, -IRQF_ONESHOT |IRQF_TRIGGER_HIGH , +IRQF_TRIGGER_HIGH , ecc_name, altdev);if (rc) {edac_printk (KERN_ERR ,EDAC_DEVICE ,"No DBERR IRQ resource\n" );
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 111/641 usb: typec: fusb302: Remove IRQF_ONESHOT
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Sebastian Andrzej Siewior <[email protected]>
[ Upstream commit a7fb84ea70aae9a92a842932206e70ed1b3c7007 ]
Passing IRQF_ONESHOT ensures that the interrupt source is masked until the secondary (threaded) handler is done. If only a primary handler is used then the flag makes no sense because the interrupt can not fire (again) while its handler is running.
The flag also prevents force-threading of the primary handler and the irq-core will warn about this.
Remove IRQF_ONESHOT from irqflags.
--- drivers/usb/typec/tcpm/fusb302.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)
drivers/usb/typec/tcpm/fusb302.c +1 -2
@@ -1756,8 +1756,7 @@ static int fusb302_probe(struct i2c_client *client) } ret =request_irq (chip->gpio_int_n_irq, fusb302_irq_intn, -IRQF_ONESHOT |IRQF_TRIGGER_LOW , -"fsc_interrupt_int_n" , chip); +IRQF_TRIGGER_LOW ,"fsc_interrupt_int_n" , chip);if (ret <0 ) {dev_err (dev,"cannot request IRQ for GPIO Int_N, ret=%d" , ret); goto tcpm_unregister_port;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 112/641 rtc: amlogic-a4: Remove IRQF_ONESHOT
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Sebastian Andrzej Siewior <[email protected]>
[ Upstream commit 18d28446231390e4ea3634fb16200865df2c6506 ]
Passing IRQF_ONESHOT ensures that the interrupt source is masked until the secondary (threaded) handler is done. If only a primary handler is used then the flag makes no sense because the interrupt can not fire (again) while its handler is running.
The flag also prevents force-threading of the primary handler and the irq-core will warn about this.
Remove IRQF_ONESHOT from irqflags.
--- drivers/rtc/rtc-amlogic-a4.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/rtc/rtc-amlogic-a4.c +1 -1
@@ -371,7 +371,7 @@ static int aml_rtc_probe(struct platform_device *pdev) } ret =devm_request_irq (dev, rtc->irq, aml_rtc_handler, -IRQF_ONESHOT ,"aml-rtc alarm" , rtc); +0 ,"aml-rtc alarm" , rtc);if (ret) {dev_err_probe (dev, ret,"IRQ%d request failed, ret = %d\n" , rtc->irq, ret);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 113/641 mfd: wm8350-core: Use IRQF_ONESHOT
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Sebastian Andrzej Siewior <[email protected]>
[ Upstream commit 553b4999cbe231b5011cb8db05a3092dec168aca ]
Using a threaded interrupt without a dedicated primary handler mandates the IRQF_ONESHOT flag to mask the interrupt source while the threaded handler is active. Otherwise the interrupt can fire again before the threaded handler had a chance to run.
Mark explained that this should not happen with this hardware since it is a slow irqchip which is behind an I2C/ SPI bus but the IRQ-core will refuse to accept such a handler.
Set IRQF_ONESHOT so the interrupt source is masked until the secondary handler is done.
--- include/linux/mfd/wm8350/core.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
include/linux/mfd/wm8350/core.h +1 -1
@@ -667,7 +667,7 @@ static inline int wm8350_register_irq(struct wm8350 *wm8350, int irq,return -ENODEV ;return request_threaded_irq (irq + wm8350->irq_base,NULL , - handler, flags, name, data); + handler, flags |IRQF_ONESHOT , name, data); }static inline void wm8350_free_irq (struct wm8350 *wm8350,int irq,void *data)
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 114/641 media: pci: mg4b: Use IRQF_NO_THREAD
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Sebastian Andrzej Siewior <[email protected]>
[ Upstream commit ef92b98f5f6758a049898b53aa30476010db04fa ]
The interrupt handler iio_trigger_generic_data_rdy_poll() will invoke other interrupt handlers and this supposed to happen from hard interrupt context.
Use IRQF_NO_THREAD to forbid forced-threading.
--- drivers/media/pci/mgb4/mgb4_trigger.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/media/pci/mgb4/mgb4_trigger.c +1 -1
@@ -114,7 +114,7 @@ static int probe_trigger(struct iio_dev *indio_dev, int irq)if (!st->trig)return -ENOMEM ; - ret =request_irq (irq, &iio_trigger_generic_data_rdy_poll,0 , + ret =request_irq (irq, &iio_trigger_generic_data_rdy_poll,IRQF_NO_THREAD ,"mgb4-trigger" , st->trig);if (ret) goto error_free_trig;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 115/641 sched/deadline: Clear the defer params
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Joel Fernandes <[email protected]>
[ Upstream commit 3cb3b27693bf30defb16aa096158a3b24583b8d2 ]
The defer params were not cleared in __dl_clear_params. Clear them.
Without this is some of my test cases are flaking and the DL timer is not starting correctly AFAICS.
--- kernel/sched/deadline.c | 3 +++ 1 file changed, 3 insertions(+)
kernel/sched/deadline.c +3 -0
@@ -3591,6 +3591,9 @@ static void __dl_clear_params(struct sched_dl_entity *dl_se) dl_se->dl_non_contending =0 ; dl_se->dl_overrun =0 ; dl_se->dl_server =0 ; + dl_se->dl_defer =0 ; + dl_se->dl_defer_running =0 ; + dl_se->dl_defer_armed =0 ;#ifdef CONFIG_RT_MUTEXES dl_se->pi_se = dl_se;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 116/641 sched/rt: Skip currently executing CPU in rto_next_cpu()
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Chen Jinghuang <[email protected]>
[ Upstream commit 94894c9c477e53bcea052e075c53f89df3d2a33e ]
CPU0 becomes overloaded when hosting a CPU-bound RT task, a non-CPU-bound RT task, and a CFS task stuck in kernel space. When other CPUs switch from RT to non-RT tasks, RT load balancing (LB) is triggered; with HAVE_RT_PUSH_IPI enabled, they send IPIs to CPU0 to drive the execution of rto_push_irq_work_func. During push_rt_task on CPU0,
if next_task->prio < rq->donor->prio, resched_curr() sets NEED_RESCHED and after the push operation completes, CPU0 calls rto_next_cpu(). Since only CPU0 is overloaded in this scenario, rto_next_cpu() should ideally return -1 (no further IPI needed).
However, multiple CPUs invoking tell_cpu_to_push() during LB increments rd->rto_loop_next. Even when rd->rto_cpu is set to -1, the mismatch between rd->rto_loop and rd->rto_loop_next forces rto_next_cpu() to restart its search from -1. With CPU0 remaining overloaded (satisfying rt_nr_migratory && rt_nr_total > 1), it gets reselected, causing CPU0 to queue irq_work to itself and send self-IPIs repeatedly. As long as CPU0 stays overloaded and other CPUs run pull_rt_tasks(), it falls into an infinite self-IPI loop, which triggers a CPU hardlockup due to continuous self-interrupts.
The trigging scenario is as follows:
cpu0 cpu1 cpu2
pull_rt_task
tell_cpu_to_push
<------------irq_work_queue_onrto_push_irq_work_func
push_rt_task
resched_curr(rq) pull_rt_task
rto_next_cpu tell_cpu_to_push
<-------------------------- atomic_inc(rto_loop_next)rd->rto_loop != next
rto_next_cpu
irq_work_queue_onrto_push_irq_work_func
Fix redundant self-IPI by filtering the initiating CPU in rto_next_cpu(). This solution has been verified to effectively eliminate spurious self-IPIs and prevent CPU hardlockup scenarios.
--- kernel/sched/rt.c | 5 +++++ 1 file changed, 5 insertions(+)
kernel/sched/rt.c +5 -0
@@ -2100,6 +2100,7 @@ static void push_rt_tasks(struct rq *rq)*/ static int rto_next_cpu (struct root_domain *rd) { +int this_cpu =smp_processor_id ();int next;int cpu;
@@ -2123,6 +2124,10 @@ static int rto_next_cpu(struct root_domain *rd) rd->rto_cpu = cpu; +/* Do not send IPI to self */ +if (cpu == this_cpu) +continue ; +if (cpu < nr_cpu_ids)return cpu;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 117/641 fs/tests: exec: drop duplicate bprm_stack_limits test vectors
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Titouan Ameline de Cadeville <[email protected]>
[ Upstream commit 46a03ea50b5f380bdb99178b8f90b39c6ba1f528 ]
Remove duplicate entries from the bprm_stack_limits KUnit test vector table. The duplicates do not add coverage and only increase test size.
--- fs/tests/exec_kunit.c | 6 ------ 1 file changed, 6 deletions(-)
fs/tests/exec_kunit.c +0 -6
@@ -87,9 +87,6 @@ static const struct bprm_stack_limits_result bprm_stack_limits_results[] = { .argc = 0, .envc = ARG_MAX / sizeof(void *) - 1 }, .expected_argmin = ULONG_MAX - sizeof(void *) },/* Raising rlim_stack / 4 to _STK_LIM / 4 * 3 will see more space. */ - { { .p = ULONG_MAX, .rlim_stack.rlim_cur = 4 * (_STK_LIM / 4 * 3), - .argc = 0, .envc = 0 }, - .expected_argmin = ULONG_MAX - (_STK_LIM / 4 * 3) + sizeof(void *) }, { { .p = ULONG_MAX, .rlim_stack.rlim_cur = 4 * (_STK_LIM / 4 * 3), .argc = 0, .envc = 0 }, .expected_argmin = ULONG_MAX - (_STK_LIM / 4 * 3) + sizeof(void *) },
@@ -103,9 +100,6 @@ static const struct bprm_stack_limits_result bprm_stack_limits_results[] = { { { .p = ULONG_MAX, .rlim_stack.rlim_cur = 4 * _STK_LIM, .argc = 0, .envc = 0 }, .expected_argmin = ULONG_MAX - (_STK_LIM / 4 * 3) + sizeof(void *) }, - { { .p = ULONG_MAX, .rlim_stack.rlim_cur = 4 * _STK_LIM, - .argc = 0, .envc = 0 }, - .expected_argmin = ULONG_MAX - (_STK_LIM / 4 * 3) + sizeof(void *) }, }; static void exec_test_bprm_stack_limits(struct kunit *test)
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 118/641 bpf: Limit bpf program signature size
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: KP Singh <[email protected]>
[ Upstream commit ea1535e28bb3773fc0b3cbd1f3842b808016990c ]
Practical BPF signatures are significantly smaller than KMALLOC_MAX_CACHE_SIZE
Allowing larger sizes opens the door for abuse by passing excessive size values and forcing the kernel into expensive allocation paths (via kmalloc_large or vmalloc).
--- kernel/bpf/syscall.c | 7 +++++++ 1 file changed, 7 insertions(+)
kernel/bpf/syscall.c +7 -0
@@ -2825,6 +2825,13 @@ static int bpf_prog_verify_signature(struct bpf_prog *prog, union bpf_attr *attrvoid *sig;int err =0 ; +/* +* Don't attempt to use kmalloc_large or vmalloc for signatures. +* Practical signature for BPF program should be below this limit. +*/ +if (attr->signature_size >KMALLOC_MAX_CACHE_SIZE ) +return -EINVAL ; +if (system_keyring_id_check (attr->keyring_id) ==0 ) key =bpf_lookup_system_key (attr->keyring_id);else
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 119/641 bpf: Require frozen map for calculating map hash
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: KP Singh <[email protected]>
[ Upstream commit a2c86aa621c22f2a7e26c654f936d65cfff0aa91 ]
Currently, bpf_map_get_info_by_fd calculates and caches the hash of the map regardless of the map's frozen state.
This leads to a TOCTOU bug where userspace can call BPF_OBJ_GET_INFO_BY_FD to cache the hash and then modify the map contents before freezing.
Therefore, a trusted loader can be tricked into verifying the stale hash while loading the modified contents.
Fix this by returning -EPERM if the map is not frozen when the hash is requested. This ensures the hash is only generated for the final, immutable state of the map.
--- kernel/bpf/syscall.c | 3 +++ 1 file changed, 3 insertions(+)
kernel/bpf/syscall.c +3 -0
@@ -5303,6 +5303,9 @@ static int bpf_map_get_info_by_fd(struct file *file,if (info.hash_size !=SHA256_DIGEST_SIZE )return -EINVAL ; +if (!READ_ONCE (map->frozen)) +return -EPERM ; + err = map->ops->map_get_hash (map,SHA256_DIGEST_SIZE , map->sha);if (err !=0 )return err;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 120/641 crypto: starfive - Fix memory leak in starfive_aes_aead_do_one_req()
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Zilin Guan <[email protected]>
[ Upstream commit ccb679fdae2e62ed92fd9acb25ed809c0226fcc6 ]
The starfive_aes_aead_do_one_req() function allocates rctx->adata with kzalloc() but fails to free it if sg_copy_to_buffer() or starfive_aes_hw_init() fails, which lead to memory leaks.
Since rctx->adata is unconditionally freed after the write_adata operations, ensure consistent cleanup by freeing the allocation in these earlier error paths as well.
Compile tested only. Issue found using a prototype static analysis tool and code review.
--- drivers/crypto/starfive/jh7110-aes.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)
drivers/crypto/starfive/jh7110-aes.c +7 -2
@@ -669,8 +669,10 @@ static int starfive_aes_aead_do_one_req(struct crypto_engine *engine, void *areqreturn -ENOMEM ;if (sg_copy_to_buffer (req->src,sg_nents_for_len (req->src, cryp->assoclen), - rctx->adata, cryp->assoclen) != cryp->assoclen) + rctx->adata, cryp->assoclen) != cryp->assoclen) { +kfree (rctx->adata);return -EINVAL ; + } }if (cryp->total_in)
@@ -681,8 +683,11 @@ static int starfive_aes_aead_do_one_req(struct crypto_engine *engine, void *areq ctx->rctx = rctx; ret =starfive_aes_hw_init (ctx); -if (ret) +if (ret) { +if (cryp->assoclen) +kfree (rctx->adata);return ret; + }if (!cryp->assoclen) goto write_text;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 121/641 hwrng: core - Allow runtime disabling of the HW RNG
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jonathan McDowell <[email protected]>
[ Upstream commit e74b96d77da9eb5ee1b603c937c2adab5134a04b ]
The HW RNG core allows for manual selection of which RNG device to use, but does not allow for no device to be enabled. It may be desirable to do this on systems with only a single suitable hardware RNG, where we need exclusive access to other functionality on this device. In particular when performing TPM firmware upgrades this lets us ensure the kernel does not try to access the device.
Before:
root@debian-qemu-efi:~# grep "" /sys/devices/virtual/misc/hw_random/rng_* /sys/devices/virtual/misc/hw_random/rng_available:tpm-rng-0 /sys/devices/virtual/misc/hw_random/rng_current:tpm-rng-0 /sys/devices/virtual/misc/hw_random/rng_quality:1024 /sys/devices/virtual/misc/hw_random/rng_selected:0
After:
root@debian-qemu-efi:~# grep "" /sys/devices/virtual/misc/hw_random/rng_* /sys/devices/virtual/misc/hw_random/rng_available:tpm-rng-0 none /sys/devices/virtual/misc/hw_random/rng_current:tpm-rng-0 /sys/devices/virtual/misc/hw_random/rng_quality:1024 /sys/devices/virtual/misc/hw_random/rng_selected:0
root@debian-qemu-efi:~# echo none > /sys/devices/virtual/misc/hw_random/rng_current root@debian-qemu-efi:~# grep "" /sys/devices/virtual/misc/hw_random/rng_* /sys/devices/virtual/misc/hw_random/rng_available:tpm-rng-0 none /sys/devices/virtual/misc/hw_random/rng_current:none grep: /sys/devices/virtual/misc/hw_random/rng_quality: No such device /sys/devices/virtual/misc/hw_random/rng_selected:1
(Observe using bpftrace no calls to TPM being made)
root@debian-qemu-efi:~# echo "" > /sys/devices/virtual/misc/hw_random/rng_current root@debian-qemu-efi:~# grep "" /sys/devices/virtual/misc/hw_random/rng_* /sys/devices/virtual/misc/hw_random/rng_available:tpm-rng-0 none /sys/devices/virtual/misc/hw_random/rng_current:tpm-rng-0 /sys/devices/virtual/misc/hw_random/rng_quality:1024 /sys/devices/virtual/misc/hw_random/rng_selected:0
(Observe using bpftrace that calls to the TPM resume)
Stable-dep-of: cc2f39d6ac48 ("hwrng: core - use RCU and work_struct to fix race condition")
--- drivers/char/hw_random/core.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-)
drivers/char/hw_random/core.c +6 -3
@@ -341,6 +341,9 @@ static ssize_t rng_current_store(struct device *dev,if (sysfs_streq (buf,"" )) { err =enable_best_rng (); + }else if (sysfs_streq (buf,"none" )) { + cur_rng_set_by_user =1 ; +drop_current_rng (); }else {list_for_each_entry (rng, &rng_list, list) {if (sysfs_streq (rng->name, buf)) {
@@ -392,7 +395,7 @@ static ssize_t rng_available_show(struct device *dev,strlcat (buf, rng->name,PAGE_SIZE );strlcat (buf," " ,PAGE_SIZE ); } -strlcat (buf,"\n" ,PAGE_SIZE ); +strlcat (buf,"none\n" ,PAGE_SIZE );mutex_unlock (&rng_mutex);return strlen (buf);
@@ -544,8 +547,8 @@ int hwrng_register(struct hwrng *rng)/* Adjust quality field to always have a proper value */ rng->quality =min_t (u16,min_t (u16, default_quality,1024 ), rng->quality ?:1024 ); -if (!current_rng || - (!cur_rng_set_by_user && rng->quality > current_rng->quality)) { +if (!cur_rng_set_by_user && + (!current_rng || rng->quality > current_rng->quality)) {/* * Set new rng as current as the new rng source * provides better entropy quality and was not
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 122/641 hwrng: core - use RCU and work_struct to fix race condition
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Lianjie Wang <[email protected]>
[ Upstream commit cc2f39d6ac48e6e3cb2d6240bc0d6df839dd0828 ]
Currently, hwrng_fill is not cleared until the hwrng_fillfn() thread exits. Since hwrng_unregister() reads hwrng_fill outside the rng_mutex lock, a concurrent hwrng_unregister() may call kthread_stop() again on the same task.
Additionally, if hwrng_unregister() is called immediately after hwrng_register(), the stopped thread may have never been executed. Thus, hwrng_fill remains dirty even after hwrng_unregister() returns. In this case, subsequent calls to hwrng_register() will fail to start new threads, and hwrng_unregister() will call kthread_stop() on the same freed task. In both cases, a use-after-free occurs:
refcount_t: addition on 0; use-after-free.
WARNING: ... at lib/refcount.c:25 refcount_warn_saturate+0xec/0x1c0
Call Trace: kthread_stop+0x181/0x360 hwrng_unregister+0x288/0x380 virtrng_remove+0xe3/0x200
This patch fixes the race by protecting the global hwrng_fill pointer inside the rng_mutex lock, so that hwrng_fillfn() thread is stopped only once, and calls to kthread_run() and kthread_stop() are serialized with the lock held.
To avoid deadlock in hwrng_fillfn() while being stopped with the lock held, we convert current_rng to RCU, so that get_current_rng() can read current_rng without holding the lock. To remove the lock from put_rng(), we also delay the actual cleanup into a work_struct.
Since get_current_rng() no longer returns ERR_PTR values, the IS_ERR() checks are removed from its callers.
With hwrng_fill protected by the rng_mutex lock, hwrng_fillfn() can no longer clear hwrng_fill itself. Therefore, if hwrng_fillfn() returns directly after current_rng is dropped, kthread_stop() would be called on a freed task_struct later. To fix this, hwrng_fillfn() calls schedule() now to keep the task alive until being stopped. The kthread_stop() call is also moved from hwrng_unregister() to drop_current_rng(), ensuring kthread_stop() is called on all possible paths where current_rng becomes NULL, so that the thread would not wait forever.
--- drivers/char/hw_random/core.c | 168 +++++++++++++++++++++------------- include/linux/hw_random.h | 2 + 2 files changed, 107 insertions(+), 63 deletions(-)
drivers/char/hw_random/core.c +105 -63
@@ -20,23 +20,25 @@#include <linux/miscdevice.h> #include <linux/module.h> #include <linux/random.h> +#include <linux/rcupdate.h> #include <linux/sched.h> #include <linux/sched/signal.h> #include <linux/slab.h> #include <linux/string.h> #include <linux/uaccess.h> +#include <linux/workqueue.h> #define RNG_MODULE_NAME "hw_random"#define RNG_BUFFER_SIZE (SMP_CACHE_BYTES < 32 ? 32 : SMP_CACHE_BYTES) -static struct hwrng *current_rng; +static struct hwrng __rcu *current_rng;/* the current rng has been explicitly chosen by user via sysfs */ static int cur_rng_set_by_user;static struct task_struct *hwrng_fill;/* list of registered rngs */ static LIST_HEAD (rng_list); -/* Protects rng_list and current_rng */ +/* Protects rng_list, hwrng_fill and updating on current_rng */ static DEFINE_MUTEX (rng_mutex);/* Protects rng read functions, data_avail, rng_buffer and rng_fillbuf */ static DEFINE_MUTEX (reading_mutex);
@@ -64,18 +66,39 @@ static size_t rng_buffer_size(void)return RNG_BUFFER_SIZE ; } -static inline void cleanup_rng (struct kref *kref) +static void cleanup_rng_work (struct work_struct *work) { - struct hwrng *rng = container_of(kref, struct hwrng, ref); + struct hwrng *rng = container_of(work, struct hwrng, cleanup_work); + +/* +* Hold rng_mutex here so we serialize in case they set_current_rng +* on rng again immediately. +*/ +mutex_lock (&rng_mutex); + +/* Skip if rng has been reinitialized. */ +if (kref_read (&rng->ref)) { +mutex_unlock (&rng_mutex); +return ; + }if (rng->cleanup) rng->cleanup (rng);complete (&rng->cleanup_done); +mutex_unlock (&rng_mutex); +} + +static inline void cleanup_rng (struct kref *kref) +{ + struct hwrng *rng = container_of(kref, struct hwrng, ref); + +schedule_work (&rng->cleanup_work); }static int set_current_rng (struct hwrng *rng) { +struct hwrng *old_rng;int err;BUG_ON (!mutex_is_locked (&rng_mutex));
@@ -84,8 +107,14 @@ static int set_current_rng(struct hwrng *rng)if (err)return err; -drop_current_rng (); - current_rng = rng; + old_rng =rcu_dereference_protected (current_rng, +lockdep_is_held (&rng_mutex)); +rcu_assign_pointer (current_rng, rng); + +if (old_rng) { +synchronize_rcu (); +kref_put (&old_rng->ref, cleanup_rng); + }/* if necessary, start hwrng thread */ if (!hwrng_fill) {
@@ -101,47 +130,56 @@ static int set_current_rng(struct hwrng *rng)static void drop_current_rng (void ) { -BUG_ON (!mutex_is_locked (&rng_mutex)); -if (!current_rng) +struct hwrng *rng; + + rng =rcu_dereference_protected (current_rng, +lockdep_is_held (&rng_mutex)); +if (!rng)return ; +RCU_INIT_POINTER (current_rng,NULL ); +synchronize_rcu (); + +if (hwrng_fill) { +kthread_stop (hwrng_fill); + hwrng_fill =NULL ; + } +/* decrease last reference for triggering the cleanup */ -kref_put (¤t_rng->ref, cleanup_rng); - current_rng =NULL ; +kref_put (&rng->ref, cleanup_rng); } -/* Returns ERR_PTR(), NULL or refcounted hwrng */ +/* Returns NULL or refcounted hwrng */ static struct hwrng *get_current_rng_nolock (void ) { -if (current_rng) -kref_get (¤t_rng->ref); +struct hwrng *rng; + + rng =rcu_dereference_protected (current_rng, +lockdep_is_held (&rng_mutex)); +if (rng) +kref_get (&rng->ref); -return current_rng; +return rng; }static struct hwrng *get_current_rng (void ) {struct hwrng *rng; -if (mutex_lock_interruptible (&rng_mutex)) -return ERR_PTR (-ERESTARTSYS ); +rcu_read_lock (); + rng =rcu_dereference (current_rng); +if (rng) +kref_get (&rng->ref); - rng =get_current_rng_nolock (); +rcu_read_unlock (); -mutex_unlock (&rng_mutex);return rng; }static void put_rng (struct hwrng *rng) { -/* -* Hold rng_mutex here so we serialize in case they set_current_rng -* on rng again immediately. -*/ -mutex_lock (&rng_mutex);if (rng)kref_put (&rng->ref, cleanup_rng); -mutex_unlock (&rng_mutex); }static int hwrng_init (struct hwrng *rng)
@@ -213,10 +251,6 @@ static ssize_t rng_dev_read(struct file *filp, char __user *buf,while (size) { rng =get_current_rng (); -if (IS_ERR (rng)) { - err =PTR_ERR (rng); - goto out; - }if (!rng) { err = -ENODEV ; goto out;
@@ -303,7 +337,7 @@ static struct miscdevice rng_miscdev = {static int enable_best_rng (void ) { -struct hwrng *rng, *new_rng =NULL ; +struct hwrng *rng, *cur_rng, *new_rng =NULL ;int ret = -ENODEV ;BUG_ON (!mutex_is_locked (&rng_mutex));
@@ -321,7 +355,9 @@ static int enable_best_rng(void) new_rng = rng; } - ret = ((new_rng == current_rng) ?0 :set_current_rng (new_rng)); + cur_rng =rcu_dereference_protected (current_rng, +lockdep_is_held (&rng_mutex)); + ret = ((new_rng == cur_rng) ?0 :set_current_rng (new_rng));if (!ret) cur_rng_set_by_user =0 ;
@@ -371,8 +407,6 @@ static ssize_t rng_current_show(struct device *dev,struct hwrng *rng; rng =get_current_rng (); -if (IS_ERR (rng)) -return PTR_ERR (rng); ret =sysfs_emit (buf,"%s\n" , rng ? rng->name :"none" );put_rng (rng);
@@ -416,8 +450,6 @@ static ssize_t rng_quality_show(struct device *dev,struct hwrng *rng; rng =get_current_rng (); -if (IS_ERR (rng)) -return PTR_ERR (rng);if (!rng)/* no need to put_rng */ return -ENODEV ;
@@ -432,6 +464,7 @@ static ssize_t rng_quality_store(struct device *dev,struct device_attribute *attr, const char *buf, size_t len) { + struct hwrng *rng;u16 quality;int ret = -EINVAL ;
@@ -448,12 +481,13 @@ static ssize_t rng_quality_store(struct device *dev, goto out; } -if (!current_rng) { + rng =rcu_dereference_protected (current_rng,lockdep_is_held (&rng_mutex)); +if (!rng) { ret = -ENODEV ; goto out; } - current_rng->quality = quality; + rng->quality = quality; current_quality = quality;/* obsolete */ /* the best available RNG may have changed */
@@ -489,8 +523,20 @@ static int hwrng_fillfn(void *unused)struct hwrng *rng; rng =get_current_rng (); -if (IS_ERR (rng) || !rng) +if (!rng) { +/* +* Keep the task_struct alive until kthread_stop() +* is called to avoid UAF in drop_current_rng(). +*/ +while (!kthread_should_stop ()) { +set_current_state (TASK_INTERRUPTIBLE ); +if (!kthread_should_stop ()) +schedule (); + } +set_current_state (TASK_RUNNING );break ; + } +mutex_lock (&reading_mutex); rc =rng_get_data (rng, rng_fillbuf,rng_buffer_size (),1 );
@@ -518,14 +564,13 @@ static int hwrng_fillfn(void *unused)add_hwgenerator_randomness ((void *)rng_fillbuf, rc, entropy >>10 , true); } - hwrng_fill =NULL ;return 0 ; }int hwrng_register (struct hwrng *rng) {int err = -EINVAL ; -struct hwrng *tmp; +struct hwrng *cur_rng, *tmp;if (!rng->name || (!rng->data_read && !rng->read)) goto out;
@@ -540,6 +585,7 @@ int hwrng_register(struct hwrng *rng) }list_add_tail (&rng->list, &rng_list); +INIT_WORK (&rng->cleanup_work, cleanup_rng_work);init_completion (&rng->cleanup_done);complete (&rng->cleanup_done);init_completion (&rng->dying);
@@ -547,16 +593,19 @@ int hwrng_register(struct hwrng *rng)/* Adjust quality field to always have a proper value */ rng->quality =min_t (u16,min_t (u16, default_quality,1024 ), rng->quality ?:1024 ); -if (!cur_rng_set_by_user && - (!current_rng || rng->quality > current_rng->quality)) { -/* -* Set new rng as current as the new rng source -* provides better entropy quality and was not -* chosen by userspace. -*/ - err =set_current_rng (rng); -if (err) - goto out_unlock; +if (!cur_rng_set_by_user) { + cur_rng =rcu_dereference_protected (current_rng, +lockdep_is_held (&rng_mutex)); +if (!cur_rng || rng->quality > cur_rng->quality) { +/* +* Set new rng as current as the new rng source +* provides better entropy quality and was not +* chosen by userspace. +*/ + err =set_current_rng (rng); +if (err) + goto out_unlock; + } }mutex_unlock (&rng_mutex);return 0 ;
@@ -569,14 +618,17 @@ EXPORT_SYMBOL_GPL(hwrng_register);void hwrng_unregister (struct hwrng *rng) { -struct hwrng *new_rng; +struct hwrng *cur_rng;int err;mutex_lock (&rng_mutex);list_del (&rng->list);complete_all (&rng->dying); -if (current_rng == rng) { + + cur_rng =rcu_dereference_protected (current_rng, +lockdep_is_held (&rng_mutex)); +if (cur_rng == rng) { err =enable_best_rng ();if (err) {drop_current_rng ();
@@ -584,17 +636,7 @@ void hwrng_unregister(struct hwrng *rng) } } - new_rng =get_current_rng_nolock (); -if (list_empty (&rng_list)) { -mutex_unlock (&rng_mutex); -if (hwrng_fill) -kthread_stop (hwrng_fill); - }else -mutex_unlock (&rng_mutex); - -if (new_rng) -put_rng (new_rng); - +mutex_unlock (&rng_mutex);wait_for_completion (&rng->cleanup_done); }EXPORT_SYMBOL_GPL (hwrng_unregister);
@@ -682,7 +724,7 @@ static int __init hwrng_modinit(void) static void __exit hwrng_modexit(void) {mutex_lock (&rng_mutex); -BUG_ON (current_rng); +WARN_ON (rcu_access_pointer (current_rng));kfree (rng_buffer);kfree (rng_fillbuf);mutex_unlock (&rng_mutex);
include/linux/hw_random.h +2 -0
@@ -15,6 +15,7 @@#include <linux/completion.h> #include <linux/kref.h> #include <linux/types.h> +#include <linux/workqueue_types.h> /** * struct hwrng - Hardware Random Number Generator driver
@@ -48,6 +49,7 @@ struct hwrng {/* internal. */ struct list_head list;struct kref ref; +struct work_struct cleanup_work;struct completion cleanup_done;struct completion dying; };
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 123/641 selftests/bpf: test_xsk: Split xskxceiver
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Bastien Curutchet (eBPF Foundation) <[email protected]>
[ Upstream commit 3ab77f35a75eb236956c1e8ba8494ef18a75eae0 ]
AF_XDP features are tested by the test_xsk.sh script but not by the test_progs framework. The tests used by the script are defined in xksxceiver.c which can't be integrated in the test_progs framework as is.
Extract these test definitions from xskxceiver{.c/.h} to put them in new test_xsk{.c/.h} files.
Keep the main() function and its unshared dependencies in xksxceiver to avoid impacting the test_xsk.sh script which is often used to test real hardware.
Move ksft_test_result_*() calls to xskxceiver.c to keep the kselftest's report valid
Stable-dep-of: 42e41b2a0afa ("selftests/xsk: properly handle batch ending in the middle of a packet")
--- tools/testing/selftests/bpf/Makefile | 2 +- tools/testing/selftests/bpf/test_xsk.c | 2420 ++++++++++++++++++++ tools/testing/selftests/bpf/test_xsk.h | 297 +++ tools/testing/selftests/bpf/xskxceiver.c | 2545 +--------------------- tools/testing/selftests/bpf/xskxceiver.h | 156 -- 5 files changed, 2762 insertions(+), 2658 deletions(-) create mode 100644 tools/testing/selftests/bpf/test_xsk.c create mode 100644 tools/testing/selftests/bpf/test_xsk.h
tools/testing/selftests/bpf/Makefile +1 -1
@@ -805,7 +805,7 @@ $(OUTPUT)/test_verifier: test_verifier.c verifier/tests.h $(BPFOBJ) | $(OUTPUT) # Include find_bit.c to compile xskxceiver. EXTRA_SRC := $(TOOLSDIR)/lib/find_bit.c -$(OUTPUT)/xskxceiver: $(EXTRA_SRC) xskxceiver.c xskxceiver.h $(OUTPUT)/network_helpers.o $(OUTPUT)/xsk.o $(OUTPUT)/xsk_xdp_progs.skel.h $(BPFOBJ) | $(OUTPUT) +$(OUTPUT)/xskxceiver: $(EXTRA_SRC) test_xsk.c test_xsk.h xskxceiver.c xskxceiver.h $(OUTPUT)/network_helpers.o $(OUTPUT)/xsk.o $(OUTPUT)/xsk_xdp_progs.skel.h $(BPFOBJ) | $(OUTPUT) $(call msg,BINARY,,$@) $(Q)$(CC) $(CFLAGS) $(filter %.a %.o %.c,$^) $(LDLIBS) -o $@
tools/testing/selftests/bpf/test_xsk.c new file +2420 -0
2,420 lines not on this page · raw message
tools/testing/selftests/bpf/test_xsk.h new file +297 -0
297 lines not on this page · raw message
tools/testing/selftests/bpf/xskxceiver.c +44 -2501
275 lines not on this page · raw message
tools/testing/selftests/bpf/xskxceiver.h +0 -156
156 lines not on this page · raw message
The rest of this diff is not shown. View the raw message.
Signature · 1 line
2.51.0
Part of the diff is not shown here. View the raw message.
Greg Kroah-Hartman
maintainerPATCH 124/641 selftests/xsk: properly handle batch ending in the middle of a packet
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Larysa Zaremba <[email protected]>
[ Upstream commit 42e41b2a0afa04ca49ee2725aadf90ccb058ed28 ]
Referenced commit reduced the scope of the variable pkt, so now it has to be reinitialized via pkt_stream_get_next_rx_pkt(), which also increments some counters. When the packet is interrupted by the batch ending, pkt stream therefore proceeds to the next packet, while xsk ring still contains the previous one, this results in a pkt_nb mismatch.
Decrement the affected counters when packet is interrupted.
--- tools/testing/selftests/bpf/test_xsk.c | 2 ++ 1 file changed, 2 insertions(+)
tools/testing/selftests/bpf/test_xsk.c +2 -0
@@ -1027,6 +1027,8 @@ static int __receive_pkts(struct test_spec *test, struct xsk_socket_info *xsk)xsk_ring_prod__cancel (&umem->fq, nb_frags); } frags_processed -= nb_frags; +pkt_stream_cancel (pkt_stream); + pkts_sent--; }if (ifobj->use_fill_ring)
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 125/641 selftests/xsk: fix number of Tx frags in invalid packet
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Larysa Zaremba <[email protected]>
[ Upstream commit 88af9fefed412e4bea9a1a771cbe6fe347fa3507 ]
The issue occurs in TOO_MANY_FRAGS test case when xdp_zc_max_segs is set to an odd number.
TOO_MANY_FRAGS test case contains an invalid packet consisting of (xdp_zc_max_segs) frags. Every frag, even the last one has XDP_PKT_CONTD flag set. This packet is expected to be dropped. After that, there is a valid linear packet, which is expected to be received back.
Once (xdp_zc_max_segs) is an odd number, the last packet cannot be received, if packet forwarding between Rx and Tx interfaces relies on the ethernet header, e.g. checks for ETH_P_LOOPBACK. Packet is malformed, if all traffic is looped.
Turns out, sending function processes multiple invalid frags as if they were in 2-frag packets. So once the invalid mbuf packet contains an odd number of those, the valid packet after gets paired with the previous invalid descriptor, and hence does not get an ethernet header generated, so it is either dropped or malformed.
Make invalid packets in verbatim mode always have only a single frag. For such packets, number of frags is otherwise meaningless, as descriptor flags are pre-configured in verbatim mode and packet data is not generated for invalid descriptors.
--- tools/testing/selftests/bpf/test_xsk.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
tools/testing/selftests/bpf/test_xsk.c +1 -1
@@ -431,7 +431,7 @@ static u32 pkt_nb_frags(u32 frame_size, struct pkt_stream *pkt_stream, struct pk }/* Search for the end of the packet in verbatim mode */ -if (!pkt_continues (pkt->options)) +if (!pkt_continues (pkt->options) || !pkt->valid)return nb_frags; next_frag = pkt_stream->current_pkt_nb;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 126/641 pstore/ram: fix buffer overflow in persistent_ram_save_old()
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Sai Ritvik Tanksalkar <[email protected]>
[ Upstream commit 5669645c052f235726a85f443769b6fc02f66762 ]
persistent_ram_save_old() can be called multiple times for the same persistent_ram_zone (e.g., via ramoops_pstore_read -> ramoops_get_next_prz for PSTORE_TYPE_DMESG records).
Currently, the function only allocates prz->old_log when it is NULL, but it unconditionally updates prz->old_log_size to the current buffer size and then performs memcpy_fromio() using this new size. If the buffer size has grown since the first allocation (which can happen across different kernel boot cycles), this leads to:
1. A heap buffer overflow (OOB write) in the memcpy_fromio() calls
2. A subsequent OOB read when ramoops_pstore_read() accesses the buffer using the incorrect (larger) old_log_size
The KASAN splat would look similar to:
BUG: KASAN: slab-out-of-bounds in ramoops_pstore_read+0x... Read of size N at addr ... by task ...
The conditions are likely extremely hard to hit:
0. Crash with a ramoops write of less-than-record-max-size bytes.
1. Reboot: ramoops registers, pstore_get_records(0) reads old crash, allocates old_log with size X
2. Crash handler registered, timer started (if pstore_update_ms >= 0)
3. Oops happens (non-fatal, system continues)
4. pstore_dump() writes oops via ramoops_pstore_write() size Y (>X)
5. pstore_new_entry = 1, pstore_timer_kick() called
6. System continues running (not a panic oops)
7. Timer fires after pstore_update_ms milliseconds
8. pstore_timefunc() → schedule_work() → pstore_dowork() → pstore_get_records(1)
9. ramoops_get_next_prz() → persistent_ram_save_old()
10. buffer_size() returns Y, but old_log is X bytes
11. Y > X: memcpy_fromio() overflows heap
Requirements:
- a prior crash record exists that did not fill the record size (almost impossible since the crash handler writes as much as it can possibly fit into the record, capped by max record size and the kmsg buffer almost always exceeds the max record size)
- pstore_update_ms >= 0 (disabled by default)
- Non-fatal oops (system survives)
Free and reallocate the buffer when the new size differs from the previously allocated size. This ensures old_log always has sufficient space for the data being copied.
--- fs/pstore/ram_core.c | 11 +++++++++++ 1 file changed, 11 insertions(+)
fs/pstore/ram_core.c +11 -0
@@ -298,6 +298,17 @@ void persistent_ram_save_old(struct persistent_ram_zone *prz)if (!size)return ; +/* +* If the existing buffer is differently sized, free it so a new +* one is allocated. This can happen when persistent_ram_save_old() +* is called early in boot and later for a timer-triggered +* survivable crash when the crash dumps don't match in size +* (which would be extremely unlikely given kmsg buffers usually +* exceed prz buffer sizes). +*/ +if (prz->old_log && prz->old_log_size != size) +persistent_ram_free_old (prz); +if (!prz->old_log) {persistent_ram_ecc_old (prz); prz->old_log =kvzalloc (size,GFP_KERNEL );
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 127/641 soc: qcom: smem: handle ENOMEM error during probe
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jorge Ramirez-Ortiz <[email protected]>
[ Upstream commit 0fe01a7955f4fef97e7cc6d14bfc5931c660402b ]
Fail the driver probe if the region can't be mapped
--- drivers/soc/qcom/smem.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
drivers/soc/qcom/smem.c +3 -1
@@ -1215,7 +1215,9 @@ static int qcom_smem_probe(struct platform_device *pdev) smem->item_count =qcom_smem_get_item_count (smem);break ;case SMEM_GLOBAL_HEAP_VERSION : -qcom_smem_map_global (smem, size); + ret =qcom_smem_map_global (smem, size); +if (ret <0 ) +return ret; smem->item_count =SMEM_ITEM_COUNT ;break ;default :
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 128/641 EDAC/i5000: Fix snprintf() size calculation in calculate_dimm_size()
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dan Carpenter <[email protected]>
[ Upstream commit 7b5c7e83ac405ff9ecbdd92b37a477f4288f8814 ]
The snprintf() can't really overflow because we're writing a max of 42 bytes to a PAGE_SIZE buffer. But the limit calculation doesn't take the first 11 bytes that we wrote into consideration so the limit is not correct. Just fix it for correctness even though it doesn't affect runtime.
--- drivers/edac/i5000_edac.c | 1 + 1 file changed, 1 insertion(+)
drivers/edac/i5000_edac.c +1 -0
@@ -1111,6 +1111,7 @@ static void calculate_dimm_size(struct i5000_pvt *pvt) n =snprintf (p, space," " ); p += n; + space -= n;for (branch =0 ; branch <MAX_BRANCHES ; branch++) { n =snprintf (p, space," branch %d | " , branch); p += n;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 129/641 EDAC/i5400: Fix snprintf() limit calculation in calculate_dimm_size()
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dan Carpenter <[email protected]>
[ Upstream commit 72f12683611344853ab030fe7d19b23970ed2bd8 ]
The snprintf() can't really overflow because we're writing a max of 42 bytes to a PAGE_SIZE buffer. But my static checker complains because the limit calculation doesn't take the first 11 space characters that we wrote into the buffer into consideration. Fix this for the sake of correctness even though it doesn't affect runtime.
Also delete an earlier "space -= n;" which was not used.
--- drivers/edac/i5400_edac.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/edac/i5400_edac.c +1 -1
@@ -1026,13 +1026,13 @@ static void calculate_dimm_size(struct i5400_pvt *pvt) space -= n; } - space -= n;edac_dbg (2 ,"%s\n" , mem_buffer); p = mem_buffer; space =PAGE_SIZE ; n =snprintf (p, space," " ); p += n; + space -= n;for (branch =0 ; branch <MAX_BRANCHES ; branch++) { n =snprintf (p, space," branch %d | " , branch); p += n;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 130/641 firmware: arm_ffa: Correct 32-bit response handling in NOTIFICATION_INFO_GET
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Sudeep Holla <[email protected]>
[ Upstream commit be4d4543f78074fbebd530ba5109d39a2a34e668 ]
The FF-A specification allows NOTIFICATION_INFO_GET to return either a 64-bit (FFA_FN64_SUCCESS) or a 32-bit (FFA_SUCCESS) response, depending on whether the firmware chooses the SMC64 or SMC32 calling convention.
The driver previously detected the response format by checking ret.a0, but still interpreted the returned ID lists (x3..x17 or w3..w7) as if they always followed the 64-bit SMC64 layout. In the SMC32 case, the upper 32 bits of each argument register are undefined by the calling convention, meaning the driver could read stale or garbage values when parsing notification IDs.
This resulted in incorrectly decoded partition/VCPU IDs whenever the FF-A firmware used an SMC32 return path.
Fix the issue by:
- Introducing logic to map list indices to the correct u16 offsets, depending on whether the response width matches the kernel word size or is a 32-bit response on a 64-bit kernel.
- Ensuring that the packed ID list is parsed using the proper layout, avoiding reads from undefined upper halves in the SMC32 case.
With this change, NOTIFICATION_INFO_GET now correctly interprets ID list entries regardless of the response width, aligning the driver with the FF-A specification.
Message-Id: <[email protected]>
--- drivers/firmware/arm_ffa/driver.c | 33 +++++++++++++++++++++++++++---- 1 file changed, 29 insertions(+), 4 deletions(-)
drivers/firmware/arm_ffa/driver.c +29 -4
@@ -981,10 +981,27 @@ static void __do_sched_recv_cb(u16 part_id, u16 vcpu, bool is_per_vcpu) } } +/* +* Map logical ID index to the u16 index within the packed ID list. +* +* For native responses (FF-A width == kernel word size), IDs are +* tightly packed: idx -> idx. +* +* For 32-bit responses on a 64-bit kernel, each 64-bit register +* contributes 4 x u16 values but only the lower 2 are defined; the +* upper 2 are garbage. This mapping skips those upper halves: +* 0,1,2,3,4,5,... -> 0,1,4,5,8,9,... +*/ +static int list_idx_to_u16_idx (int idx,bool is_native_resp) +{ +return is_native_resp ? idx : idx +2 * (idx >>1 ); +} +static void ffa_notification_info_get (void ) { -int idx, list, max_ids, lists_cnt, ids_processed, ids_count[MAX_IDS_64 ]; -bool is_64b_resp; +int ids_processed, ids_count[MAX_IDS_64 ]; +int idx, list, max_ids, lists_cnt; +bool is_64b_resp, is_native_resp;ffa_value_t ret;u64 id_list;
@@ -1001,6 +1018,7 @@ static void ffa_notification_info_get(void) } is_64b_resp = (ret.a0 ==FFA_FN64_SUCCESS ); + is_native_resp = (ret.a0 ==FFA_FN_NATIVE (SUCCESS )); ids_processed =0 ; lists_cnt =FIELD_GET (NOTIFICATION_INFO_GET_ID_COUNT , ret.a2);
@@ -1017,12 +1035,16 @@ static void ffa_notification_info_get(void)/* Process IDs */ for (list =0 ; list < lists_cnt; list++) { +int u16_idx;u16 vcpu_id, part_id, *packed_id_list = (u16 *)&ret.a3;if (ids_processed >= max_ids -1 )break ; - part_id = packed_id_list[ids_processed++]; + u16_idx =list_idx_to_u16_idx (ids_processed, + is_native_resp); + part_id = packed_id_list[u16_idx]; + ids_processed++;if (ids_count[list] ==1 ) {/* Global Notification */ __do_sched_recv_cb (part_id,0 , false);
@@ -1034,7 +1056,10 @@ static void ffa_notification_info_get(void)if (ids_processed >= max_ids -1 )break ; - vcpu_id = packed_id_list[ids_processed++]; + u16_idx =list_idx_to_u16_idx (ids_processed, + is_native_resp); + vcpu_id = packed_id_list[u16_idx]; + ids_processed++;__do_sched_recv_cb (part_id, vcpu_id, true); }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 131/641 arm64: dts: tqma8mpql-mba8mpxl: Fix HDMI CEC pad control settings
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Alexander Stein <[email protected]>
[ Upstream commit 8401527abb5e3a00c867b6597b8e1b29c80c9824 ]
As per datasheet of the HDMI protection IC the CEC_IC pin has been configured as open-drain.
--- arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts +1 -1
@@ -860,7 +860,7 @@ pinctrl_hdmi: hdmigrp { fsl,pins = <MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x400001c2>, <MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x400001c2>, <MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x40000010>, - <MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x40000010>; + <MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x40000030>; }; pinctrl_hoggpio2: hoggpio2grp {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 132/641 arm64: dts: tqma8mpql-mba8mp-ras314: Fix HDMI CEC pad control settings
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Alexander Stein <[email protected]>
[ Upstream commit 53a5c1d98d1155ece4c9446c0fea55e17d08774a ]
As per datasheet of the HDMI protection IC the CEC_IC pin has been configured as open-drain.
--- .../arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts +1 -1
@@ -704,7 +704,7 @@ pinctrl_hdmi: hdmigrp { fsl,pins = <MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x400001c2>, <MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x400001c2>, <MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x40000010>, - <MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x40000154>; + <MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x40000030>; }; pinctrl_gpt1: gpt1grp {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 133/641 clk: qcom: Return correct error code in qcom_cc_probe_by_index()
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Haotian Zhang <[email protected]>
[ Upstream commit 1e07ebe744fb522983bd52a4a6148601675330c7 ]
When devm_platform_ioremap_resource() fails, it returns various error codes. Returning a hardcoded -ENOMEM masks the actual failure reason.
Use PTR_ERR() to propagate the actual error code returned by devm_platform_ioremap_resource() instead of -ENOMEM.
--- drivers/clk/qcom/common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/clk/qcom/common.c +1 -1
@@ -454,7 +454,7 @@ int qcom_cc_probe_by_index(struct platform_device *pdev, int index, base =devm_platform_ioremap_resource (pdev, index);if (IS_ERR (base)) -return -ENOMEM ; +return PTR_ERR (base); regmap =devm_regmap_init_mmio (&pdev->dev, base, desc->config);if (IS_ERR (regmap))
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 134/641 arm64: dts: qcom: sdm630: fix gpu_speed_bin size
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dmitry Baryshkov <[email protected]>
[ Upstream commit e814796dfcae8905682ac3ac2dd57f512a9f6726 ]
Historically sdm630.dtsi has used 1 byte length for the gpu_speed_bin cell, although it spans two bytes (offset 5, size 7 bits). It was being accepted by the kernel because before the commit 7a06ef751077 ("nvmem:
core: fix bit offsets of more than one byte") the kernel didn't have length check. After this commit nvmem core rejects QFPROM on sdm630 / sdm660, making GPU and USB unusable on those platforms.
Set the size of the gpu_speed_bin cell to 2 bytes, fixing the parsing error. While we are at it, update the length to 8 bits as pointed out by Alexey Minnekhanov.
--- arch/arm64/boot/dts/qcom/sdm630.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/qcom/sdm630.dtsi +2 -2
@@ -598,8 +598,8 @@ qusb2_hstx_trim: hstx-trim@240 { }; gpu_speed_bin: gpu-speed-bin@41a0 { - reg = <0x41a2 0x1>; - bits = <5 7>; + reg = <0x41a2 0x2>; + bits = <5 8>; }; };
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 135/641 arm64: dts: qcom: sdm845-oneplus: Dont mark ts supply boot-on
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Casey Connolly <[email protected]>
[ Upstream commit c9b98b9dad9749bf2eb7336a6fca31a6af1039d7 ]
The touchscreen isn't enabled by bootloader and doesn't need to be enabled at boot, only when the driver probes, thus remove the regulator-boot-on property.
--- arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi | 1 - 1 file changed, 1 deletion(-)
arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi +0 -1
@@ -160,7 +160,6 @@ ts_1p8_supply: ts-1p8-regulator { gpio = <&tlmm 88 0>; enable-active-high; - regulator-boot-on; }; };
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 136/641 arm64: dts: qcom: sdm845-oneplus: Dont keep panel regulator always on
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Casey Connolly <[email protected]>
[ Upstream commit 45d1f42d3e84b5880cf9fab1eb24a7818320eeb7 ]
The panel regulator doesn't need to be always on, so remove this property.
--- arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi | 1 - 1 file changed, 1 deletion(-)
arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi +0 -1
@@ -256,7 +256,6 @@ vreg_l14a_1p88: ldo14 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - regulator-always-on; }; vreg_l17a_1p3: ldo17 {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 137/641 arm64: dts: qcom: sdm845-oneplus: Mark l14a regulator as boot-on
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Casey Connolly <[email protected]>
[ Upstream commit ad33ee060be46794a03d033894c9db3a9d6c1a0f ]
This regulator is used only for the display, which is enabled by the bootloader and left on for continuous splash. Mark it as such.
--- arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi | 1 + 1 file changed, 1 insertion(+)
arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi +1 -0
@@ -256,6 +256,7 @@ vreg_l14a_1p88: ldo14 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-boot-on; }; vreg_l17a_1p3: ldo17 {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 138/641 arm64: dts: qcom: x1e80100: Fix USB combo PHYs SS1 and SS2 ref clocks
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Abel Vesa <[email protected]>
[ Upstream commit 3af51501e2b8c87564b5cda43b0e5c316cf54717 ]
It seems the USB combo SS1 and SS2 ref clocks have another gate, unlike the SS0. These gates are part of the TCSR clock controller.
At least on Dell XPS 13 (9345), if the ref clock provided by the TCSR clock controller for SS1 PHY is disabled on the clk_disable_unused late initcall, the PHY fails to initialize. It doesn't happen on the SS0 PHY and the SS2 is not used on this device.
This doesn't seem to be a problem on CRD though. It might be that the RPMh has a vote for it from some other consumer and does not actually disable it when ther kernel drops its vote.
Either way, these TCSR provided clocks seem to be the correct ones for the SS1 and SS2, so use them instead.
--- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/qcom/x1e80100.dtsi +2 -2
@@ -2910,7 +2910,7 @@ usb_1_ss1_qmpphy: phy@fda000 { reg = <0 0x00fda000 0 0x4000>; clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, - <&rpmhcc RPMH_CXO_CLK>, + <&tcsr TCSR_USB4_1_CLKREF_EN>, <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>, <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; clock-names = "aux",
@@ -2981,7 +2981,7 @@ usb_1_ss2_qmpphy: phy@fdf000 { reg = <0 0x00fdf000 0 0x4000>; clocks = <&gcc GCC_USB3_TERT_PHY_AUX_CLK>, - <&rpmhcc RPMH_CXO_CLK>, + <&tcsr TCSR_USB4_2_CLKREF_EN>, <&gcc GCC_USB3_TERT_PHY_COM_AUX_CLK>, <&gcc GCC_USB3_TERT_PHY_PIPE_CLK>; clock-names = "aux",
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 139/641 arm64: dts: renesas: r9a09g047e57-smarc: Remove duplicate SW_LCD_EN
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Geert Uytterhoeven <[email protected]>
[ Upstream commit 44cfd102ce28e749a07bb0f1668cf932077b1175 ]
SW_LCD_EN is defined twice.
--- arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts | 1 - 1 file changed, 1 deletion(-)
arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts +0 -1
@@ -8,7 +8,6 @@ /dts-v1/; /* Switch selection settings */ -#define SW_LCD_EN 0 #define SW_GPIO8_CAN0_STB 0 #define SW_GPIO9_CAN1_STB 0 #define SW_LCD_EN 0
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 140/641 arm64: dts: qcom: msm8994-octagon: Fix Analog Devices vendor prefix of AD7147
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Vladimir Zapolskiy <[email protected]>
[ Upstream commit 7db5fbe508deedec6c183d5056cf3c504c027f40 ]
Trivial change, Analog Devices vendor prefix is "adi", but there is a valid "ad" vendor prefix of another company, this may explain why the issue hasn't been discovered by the automatic tests.
A problem of not described compatible value is out of this change scope.
--- arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi +1 -1
@@ -378,7 +378,7 @@ &blsp2_i2c1 { status = "okay"; sideinteraction: touch@2c { - compatible = "ad,ad7147_captouch"; + compatible = "adi,ad7147_captouch"; reg = <0x2c>; pinctrl-names = "default", "sleep";
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 141/641 ARM: dts: allwinner: sun5i-a13-utoo-p66: delete "power-gpios" property
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Chen-Yu Tsai <[email protected]>
[ Upstream commit 0b2761eb1287bd9f62367cccf6626eb3107cef6f ]
The P66's device tree includes the reference design dtsi files, which defines a node and properties for the touchpanel in the common design. The P66 dts file then overrides all the properties to match its own design, but as the touchpanel model is different, a different schema is matched. This other schema uses a different name for the GPIO.
The original submission added the correct GPIO property, but did not delete the one inherited from the reference design, causing validation errors.
Explicitly delete the incorrect GPIO property.
--- arch/arm/boot/dts/allwinner/sun5i-a13-utoo-p66.dts | 1 + 1 file changed, 1 insertion(+)
arch/arm/boot/dts/allwinner/sun5i-a13-utoo-p66.dts +1 -0
@@ -102,6 +102,7 @@ &touchscreen { /* The P66 uses a different EINT then the reference design */ interrupts = <6 9 IRQ_TYPE_EDGE_FALLING>; /* EINT9 (PG9) */ /* The icn8318 binding expects wake-gpios instead of power-gpios */ + /delete-property/ power-gpios; wake-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */ touchscreen-size-x = <800>; touchscreen-size-y = <480>;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 142/641 powerpc/uaccess: Move barrier_nospec() out of allow_read_{from/write}_user()
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Christophe Leroy <[email protected]>
[ Upstream commit 5fbc09eb0b4f4b1a4b33abebacbeee0d29f195e9 ]
Commit 74e19ef0ff80 ("uaccess: Add speculation barrier to copy_from_user()") added a redundant barrier_nospec() in copy_from_user(), because powerpc is already calling barrier_nospec() in allow_read_from_user() and allow_read_write_user(). But on other architectures that call to barrier_nospec() was missing. So change powerpc instead of reverting the above commit and having to fix other architectures one by one. This is now possible because barrier_nospec() has also been added in copy_from_user_iter().
Move barrier_nospec() out of allow_read_from_user() and allow_read_write_user(). This will also allow reuse of those functions when implementing masked user access which doesn't require barrier_nospec().
Don't add it back in raw_copy_from_user() as it is already called by copy_from_user() and copy_from_user_iter().
--- arch/powerpc/include/asm/kup.h | 2 -- arch/powerpc/include/asm/uaccess.h | 4 ++++ 2 files changed, 4 insertions(+), 2 deletions(-)
arch/powerpc/include/asm/kup.h +0 -2
@@ -134,7 +134,6 @@ static __always_inline void kuap_assert_locked(void) static __always_inline void allow_read_from_user(const void __user *from, unsigned long size) { -barrier_nospec ();allow_user_access (NULL , from, size,KUAP_READ ); }
@@ -146,7 +145,6 @@ static __always_inline void allow_write_to_user(void __user *to, unsigned long s static __always_inline void allow_read_write_user(void __user *to, const void __user *from,unsigned long size) { -barrier_nospec ();allow_user_access (to, from, size,KUAP_READ_WRITE ); }
arch/powerpc/include/asm/uaccess.h +4 -0
@@ -301,6 +301,7 @@ do { \__typeof__ (sizeof(*(ptr ))) __gu_size =sizeof (*(ptr)); \ \might_fault (); \ +barrier_nospec (); \allow_read_from_user (__gu_addr, __gu_size); \__get_user_size_allowed (__gu_val, __gu_addr, __gu_size, __gu_err); \prevent_read_from_user (__gu_addr, __gu_size); \
@@ -329,6 +330,7 @@ raw_copy_in_user(void __user *to, const void __user *from, unsigned long n) {unsigned long ret; +barrier_nospec ();allow_read_write_user (to, from, n); ret =__copy_tofrom_user (to, from, n);prevent_read_write_user (to, from, n);
@@ -415,6 +417,7 @@ static __must_check __always_inline bool user_access_begin(const void __user *ptmight_fault (); +barrier_nospec ();allow_read_write_user ((void __user *)ptr, ptr, len);return true; }
@@ -431,6 +434,7 @@ user_read_access_begin(const void __user *ptr, size_t len)might_fault (); +barrier_nospec ();allow_read_from_user (ptr, len);return true; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 143/641 soc: qcom: cmd-db: Use devm_memremap() to fix memory leak in cmd_db_dev_probe
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Haotian Zhang <[email protected]>
[ Upstream commit 0da7824734d8d83e6a844dd0207f071cb0c50cf4 ]
If cmd_db_magic_matches() fails after memremap() succeeds, the function returns -EINVAL without unmapping the memory region, causing a potential resource leak.
Switch to devm_memremap to automatically manage the map resource.
--- drivers/soc/qcom/cmd-db.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)
drivers/soc/qcom/cmd-db.c +4 -3
@@ -349,15 +349,16 @@ static int cmd_db_dev_probe(struct platform_device *pdev)return -EINVAL ; } - cmd_db_header =memremap (rmem->base, rmem->size,MEMREMAP_WC ); -if (!cmd_db_header) { - ret = -ENOMEM ; + cmd_db_header =devm_memremap (&pdev->dev, rmem->base, rmem->size,MEMREMAP_WC ); +if (IS_ERR (cmd_db_header)) { + ret =PTR_ERR (cmd_db_header); cmd_db_header =NULL ;return ret; }if (!cmd_db_magic_matches (cmd_db_header)) {dev_err (&pdev->dev,"Invalid Command DB Magic\n" ); + cmd_db_header =NULL ;return -EINVAL ; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 144/641 soc: mediatek: svs: Fix memory leak in svs_enable_debug_write()
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Zilin Guan <[email protected]>
[ Upstream commit 6259094ee806fb813ca95894c65fb80e2ec98bf1 ]
In svs_enable_debug_write(), the buf allocated by memdup_user_nul() is leaked if kstrtoint() fails.
Fix this by using __free(kfree) to automatically free buf, eliminating the need for explicit kfree() calls and preventing leaks.
--- drivers/soc/mediatek/mtk-svs.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)
drivers/soc/mediatek/mtk-svs.c +2 -3
@@ -9,6 +9,7 @@#include <linux/bits.h> #include <linux/clk.h> #include <linux/completion.h> +#include <linux/cleanup.h> #include <linux/cpu.h> #include <linux/cpuidle.h> #include <linux/debugfs.h>
@@ -789,7 +790,7 @@ static ssize_t svs_enable_debug_write(struct file *filp,struct svs_bank *svsb =file_inode (filp)->i_private;struct svs_platform *svsp =dev_get_drvdata (svsb->dev);int enabled, ret; -char *buf =NULL ; + char *buf __free(kfree) = NULL;if (count >=PAGE_SIZE )return -EINVAL ;
@@ -807,8 +808,6 @@ static ssize_t svs_enable_debug_write(struct file *filp, svsb->mode_support =SVSB_MODE_ALL_DISABLE ; } -kfree (buf); -return count; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 145/641 powerpc/eeh: fix recursive pci_lock_rescan_remove locking in EEH event handling
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Narayana Murty N <[email protected]>
[ Upstream commit 815a8d2feb5615ae7f0b5befd206af0b0160614c ]
The recent commit 1010b4c012b0 ("powerpc/eeh: Make EEH driver device hotplug safe") restructured the EEH driver to improve synchronization with the PCI hotplug layer.
However, it inadvertently moved pci_lock_rescan_remove() outside its intended scope in eeh_handle_normal_event(), leading to broken PCI error reporting and improper EEH event triggering. Specifically, eeh_handle_normal_event() acquired pci_lock_rescan_remove() before calling eeh_pe_bus_get(), but eeh_pe_bus_get() itself attempts to acquire the same lock internally, causing nested locking and disrupting normal EEH event handling paths.
This patch adds a boolean parameter do_lock to _eeh_pe_bus_get(), with two public wrappers:
eeh_pe_bus_get() with locking enabled. eeh_pe_bus_get_nolock() that skips locking.
Callers that already hold pci_lock_rescan_remove() now use eeh_pe_bus_get_nolock() to avoid recursive lock acquisition.
Additionally, pci_lock_rescan_remove() calls are restored to the correct position—after eeh_pe_bus_get() and immediately before iterating affected PEs and devices. This ensures EEH-triggered PCI removes occur under proper bus rescan locking without recursive lock contention.
The eeh_pe_loc_get() function has been split into two functions:
eeh_pe_loc_get(struct eeh_pe *pe) which retrieves the loc for given PE. eeh_pe_loc_get_bus(struct pci_bus *bus) which retrieves the location code for given bus.
This resolves lockdep warnings such as:
<snip>
[ 84.964298] [ T928] ============================================
[ 84.964304] [ T928] WARNING: possible recursive locking detected
[ 84.964311] [ T928] 6.18.0-rc3 #51 Not tainted
[ 84.964315] [ T928] --------------------------------------------
[ 84.964320] [ T928] eehd/928 is trying to acquire lock:
[ 84.964324] [ T928] c000000003b29d58 (pci_rescan_remove_lock){+.+.}-{3:3}, at: pci_lock_rescan_remove+0x28/0x40
[ 84.964342] [ T928]
but task is already holding lock:
[ 84.964347] [ T928] c000000003b29d58 (pci_rescan_remove_lock){+.+.}-{3:3}, at: pci_lock_rescan_remove+0x28/0x40
[ 84.964357] [ T928]
other info that might help us debug this:
[ 84.964363] [ T928] Possible unsafe locking scenario:[ 84.964367] [ T928] CPU0
[ 84.964370] [ T928] ----
[ 84.964373] [ T928] lock(pci_rescan_remove_lock);
[ 84.964378] [ T928] lock(pci_rescan_remove_lock);
[ 84.964383] [ T928]
*** DEADLOCK ***[ 84.964388] [ T928] May be due to missing lock nesting notation
[ 84.964393] [ T928] 1 lock held by eehd/928:
[ 84.964397] [ T928] #0: c000000003b29d58 (pci_rescan_remove_lock){+.+.}-{3:3}, at: pci_lock_rescan_remove+0x28/0x40
[ 84.964408] [ T928]
stack backtrace:
[ 84.964414] [ T928] CPU: 2 UID: 0 PID: 928 Comm: eehd Not tainted 6.18.0-rc3 #51 VOLUNTARY
[ 84.964417] [ T928] Hardware name: IBM,9080-HEX POWER10 (architected) 0x800200 0xf000006 of:IBM,FW1060.00 (NH1060_022) hv:phyp pSeries
[ 84.964419] [ T928] Call Trace:
[ 84.964420] [ T928] [c0000011a7157990] [c000000001705de4] dump_stack_lvl+0xc8/0x130 (unreliable)
[ 84.964424] [ T928] [c0000011a71579d0] [c0000000002f66e0] print_deadlock_bug+0x430/0x440
[ 84.964428] [ T928] [c0000011a7157a70] [c0000000002fd0c0] __lock_acquire+0x1530/0x2d80
[ 84.964431] [ T928] [c0000011a7157ba0] [c0000000002fea54] lock_acquire+0x144/0x410
[ 84.964433] [ T928] [c0000011a7157cb0] [c0000011a7157cb0] __mutex_lock+0xf4/0x1050
[ 84.964436] [ T928] [c0000011a7157e00] [c000000000de21d8] pci_lock_rescan_remove+0x28/0x40
[ 84.964439] [ T928] [c0000011a7157e20] [c00000000004ed98] eeh_pe_bus_get+0x48/0xc0
[ 84.964442] [ T928] [c0000011a7157e50] [c000000000050434] eeh_handle_normal_event+0x64/0xa60
[ 84.964446] [ T928] [c0000011a7157f30] [c000000000051de8] eeh_event_handler+0xf8/0x190
[ 84.964450] [ T928] [c0000011a7157f90] [c0000000002747ac] kthread+0x16c/0x180
[ 84.964453] [ T928] [c0000011a7157fe0] [c00000000000ded8] start_kernel_thread+0x14/0x18</snip>
--- arch/powerpc/include/asm/eeh.h | 2 + arch/powerpc/kernel/eeh_driver.c | 11 ++--- arch/powerpc/kernel/eeh_pe.c | 74 ++++++++++++++++++++++++++++++-- 3 files changed, 78 insertions(+), 9 deletions(-)
arch/powerpc/include/asm/eeh.h +2 -0
@@ -289,6 +289,8 @@ void eeh_pe_dev_traverse(struct eeh_pe *root,void eeh_pe_restore_bars (struct eeh_pe *pe);const char *eeh_pe_loc_get (struct eeh_pe *pe);struct pci_bus *eeh_pe_bus_get (struct eeh_pe *pe); +const char *eeh_pe_loc_get_bus (struct pci_bus *bus); +struct pci_bus *eeh_pe_bus_get_nolock (struct eeh_pe *pe);void eeh_show_enabled (void );int __init eeh_init (struct eeh_ops *ops);
arch/powerpc/kernel/eeh_driver.c +6 -5
@@ -846,7 +846,7 @@ void eeh_handle_normal_event(struct eeh_pe *pe)pci_lock_rescan_remove (); - bus =eeh_pe_bus_get (pe); + bus =eeh_pe_bus_get_nolock (pe);if (!bus) {pr_err ("%s: Cannot find PCI bus for PHB#%x-PE#%x\n" , __func__, pe->phb->global_number, pe->addr);
@@ -886,14 +886,15 @@ void eeh_handle_normal_event(struct eeh_pe *pe)/* Log the event */ if (pe->type &EEH_PE_PHB ) {pr_err ("EEH: Recovering PHB#%x, location: %s\n" , - pe->phb->global_number,eeh_pe_loc_get (pe)); + pe->phb->global_number,eeh_pe_loc_get_bus (bus)); }else {struct eeh_pe *phb_pe =eeh_phb_pe_get (pe->phb);pr_err ("EEH: Recovering PHB#%x-PE#%x\n" , pe->phb->global_number, pe->addr);pr_err ("EEH: PE location: %s, PHB location: %s\n" , -eeh_pe_loc_get (pe),eeh_pe_loc_get (phb_pe)); +eeh_pe_loc_get_bus (bus), +eeh_pe_loc_get_bus (eeh_pe_bus_get_nolock (phb_pe))); }#ifdef CONFIG_STACKTRACE
@@ -1098,7 +1099,7 @@ void eeh_handle_normal_event(struct eeh_pe *pe)eeh_pe_state_clear (pe,EEH_PE_PRI_BUS , true);eeh_pe_dev_mode_mark (pe,EEH_DEV_REMOVED ); - bus =eeh_pe_bus_get (pe); + bus =eeh_pe_bus_get_nolock (pe);if (bus)pci_hp_remove_devices (bus);else
@@ -1222,7 +1223,7 @@ void eeh_handle_special_event(void) (phb_pe->state & EEH_PE_RECOVERING))continue ; - bus =eeh_pe_bus_get (phb_pe); + bus =eeh_pe_bus_get_nolock (phb_pe);if (!bus) { pr_err("%s: Cannot find PCI bus for " "PHB#%x-PE#%x\n",
arch/powerpc/kernel/eeh_pe.c +70 -4
102 lines not on this page · raw message
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 146/641 arm64: dts: renesas: rzt2h-n2h-evk-common: Use GPIO for SD0 write protect
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Lad Prabhakar <[email protected]>
[ Upstream commit a1b1ee0348f889ec262482e16e9ff670617db7b0 ]
Switch SD0 write-protect detection to a GPIO on the RZ/T2H and RZ/N2H EVKs. Both boards use a full-size SD card slot on the SD0 channel with a dedicated WP pin.
The RZ/T2H and RZ/N2H SoCs use of_data_rcar_gen3, which sets MMC_CAP2_NO_WRITE_PROTECT and causes the core to ignore the WP signal unless a wp-gpios property is provided. Describe the WP pin as a GPIO to allow the MMC core to evaluate the write-protect status correctly.
--- arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi +2 -2
@@ -154,8 +154,7 @@ data-pins { ctrl-pins { pinmux = <RZT2H_PORT_PINMUX(12, 0, 0x29)>, /* SD0_CLK */ <RZT2H_PORT_PINMUX(12, 1, 0x29)>, /* SD0_CMD */ - <RZT2H_PORT_PINMUX(22, 5, 0x29)>, /* SD0_CD */ - <RZT2H_PORT_PINMUX(22, 6, 0x29)>; /* SD0_WP */ + <RZT2H_PORT_PINMUX(22, 5, 0x29)>; /* SD0_CD */ }; };
@@ -212,6 +211,7 @@ &sdhi0 { pinctrl-names = "default", "state_uhs"; vmmc-supply = <®_3p3v>; vqmmc-supply = <&vqmmc_sdhi0>; + wp-gpios = <&pinctrl RZT2H_GPIO(22, 6) GPIO_ACTIVE_HIGH>; bus-width = <4>; sd-uhs-sdr50; sd-uhs-sdr104;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 147/641 arm: dts: lpc32xx: add clocks property to Motor Control PWM device tree node
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Vladimir Zapolskiy <[email protected]>
[ Upstream commit 71630e581a0e34c03757f5c1706f57c853b92555 ]
Motor Control PWM depends on its own supply clock, the clock gate control is present in TIMCLK_CTRL1 register.
--- arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi | 1 + 1 file changed, 1 insertion(+)
arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi +1 -0
@@ -302,6 +302,7 @@ i2c2: i2c@400a8000 { mpwm: pwm@400e8000 { compatible = "nxp,lpc3220-motor-pwm"; reg = <0x400e8000 0x78>; + clocks = <&clk LPC32XX_CLK_MCPWM>; #pwm-cells = <3>; status = "disabled"; };
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 148/641 arm64: dts: mediatek: mt8183-jacuzzi-pico6: Fix typo in pinmux node
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: AngeloGioacchino Del Regno <[email protected]>
[ Upstream commit b1fc81a986c9b8089db31e21a372cc8b6514e900 ]
Rename "piins-bt-wakeup" to "pins-bt-wakeup" to fix a dtbs_check warning happening due to this typo.
--- arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-pico6.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-pico6.dts +1 -1
@@ -91,7 +91,7 @@ bluetooth@2 { &pio { bt_pins_wakeup: bt-pins-wakeup { - piins-bt-wakeup { + pins-bt-wakeup { pinmux = <PINMUX_GPIO42__FUNC_GPIO42>; input-enable; };
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 149/641 arm64: dts: amlogic: s4: assign mmc b clock to 24MHz
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jerome Brunet <[email protected]>
[ Upstream commit 86124a8becb43eed3103f2459399daee8af2c99d ]
The amlogic MMC driver operate with the assumption that MMC clock is configured to provide 24MHz. It uses this path for low rates such as 400kHz.
This assumption did hold true until but it now, but it is apparently not the case with s4. The clock has been reported to provide 1GHz instead. This is most likely due to how the bootloader is using the MMC clock on this platform.
Regardless of why the MMC clock rate is 1GHz, if the MMC driver expects 24MHz, the clock should be properly assigned, so assign it.
--- arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 3 +++ 1 file changed, 3 insertions(+)
arch/arm64/boot/dts/amlogic/meson-s4.dtsi +3 -0
@@ -838,6 +838,9 @@ sd: mmc@fe08a000 { clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_B>; status = "disabled"; + + assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_B>; + assigned-clock-rates = <24000000>; }; emmc: mmc@fe08c000 {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 150/641 arm64: dts: amlogic: s4: fix mmc clock assignment
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jerome Brunet <[email protected]>
[ Upstream commit 3a115d42922cffc91b303992eadf220111d66c31 ]
MMC A and C are mis-represented as having their "clkin0" input connected to xtal while it is actually connected to the MMC clock, probably in an attempt to provide 24MHz to the device on this input.
Fix this and assign the clock to 24MHz to actually provide the required rate.
--- arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/amlogic/meson-s4.dtsi +8 -2
@@ -819,13 +819,16 @@ sdio: mmc@fe088000 { reg = <0x0 0xfe088000 0x0 0x800>; interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clkc_periphs CLKID_SDEMMC_A>, - <&xtal>, + <&clkc_periphs CLKID_SD_EMMC_A>, <&clkc_pll CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_A>; cap-sdio-irq; keep-power-in-suspend; status = "disabled"; + + assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_A>; + assigned-clock-rates = <24000000>; }; sd: mmc@fe08a000 {
@@ -848,13 +851,16 @@ emmc: mmc@fe08c000 { reg = <0x0 0xfe08c000 0x0 0x800>; interrupts = <GIC_SPI 178 IRQ_TYPE_EDGE_RISING>; clocks = <&clkc_periphs CLKID_NAND>, - <&xtal>, + <&clkc_periphs CLKID_SD_EMMC_C>, <&clkc_pll CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_NAND_EMMC>; no-sdio; no-sd; status = "disabled"; + + assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_C>; + assigned-clock-rates = <24000000>; }; }; };
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 151/641 arm64: dts: ti: k3-j784s4-main.dtsi: Move c71_3 node to appropriate order
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Abhash Kumar Jha <[email protected]>
[ Upstream commit 24c9d5fb8bbf5e8c9e6fc2beffeb80ac2da83de4 ]
The device tree nodes should be ordered by unit addresses in ascending order.
Correct the order by moving the c71_3 DSP node at the end as it has a higher unit address.
Stable-dep-of: 61acc4428a7f ("arm64: dts: ti: k3-j784s4-j742s2-main-common.dtsi: Refactor watchdog instances for j784s4")
--- arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 26 +++++++++++----------- 1 file changed, 13 insertions(+), 13 deletions(-)
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +13 -13
@@ -6,19 +6,6 @@ */ &cbass_main { - c71_3: dsp@67800000 { - compatible = "ti,j721s2-c71-dsp"; - reg = <0x00 0x67800000 0x00 0x00080000>, - <0x00 0x67e00000 0x00 0x0000c000>; - reg-names = "l2sram", "l1dram"; - resets = <&k3_reset 40 1>; - firmware-name = "j784s4-c71_3-fw"; - ti,sci = <&sms>; - ti,sci-dev-id = <40>; - ti,sci-proc-ids = <0x33 0xff>; - status = "disabled"; - }; - pcie2_rc: pcie@2920000 { compatible = "ti,j784s4-pcie-host"; reg = <0x00 0x02920000 0x00 0x1000>,
@@ -113,6 +100,19 @@ serdes2: serdes@5020000 { status = "disabled"; }; }; + + c71_3: dsp@67800000 { + compatible = "ti,j721s2-c71-dsp"; + reg = <0x00 0x67800000 0x00 0x00080000>, + <0x00 0x67e00000 0x00 0x0000c000>; + reg-names = "l2sram", "l1dram"; + resets = <&k3_reset 40 1>; + firmware-name = "j784s4-c71_3-fw"; + ti,sci = <&sms>; + ti,sci-dev-id = <40>; + ti,sci-proc-ids = <0x33 0xff>; + status = "disabled"; + }; }; &scm_conf {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 152/641 arm64: dts: ti: k3-j784s4-j742s2-main-common.dtsi: Refactor watchdog instances for j784s4
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Abhash Kumar Jha <[email protected]>
[ Upstream commit 61acc4428a7f52e0a13e226ba76f2ce2ca66c065 ]
Each A72 core has one watchdog instance associated with it. Since j742s2 has 4 A72 cores, the common file should not define 8 watchdog instances.
Refactor the last 4 extra watchdogs from the common file to j784s4 specific file, as j784s4 has 8 A72 cores and thus hardware description requires 8 watchdog instances.
--- .../dts/ti/k3-j784s4-j742s2-main-common.dtsi | 36 ------------------- arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 36 +++++++++++++++++++ 2 files changed, 36 insertions(+), 36 deletions(-)
arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi +0 -36
@@ -2378,42 +2378,6 @@ watchdog3: watchdog@2230000 { assigned-clock-parents = <&k3_clks 351 4>; }; - watchdog4: watchdog@2240000 { - compatible = "ti,j7-rti-wdt"; - reg = <0x00 0x2240000 0x00 0x100>; - clocks = <&k3_clks 352 0>; - power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>; - assigned-clocks = <&k3_clks 352 0>; - assigned-clock-parents = <&k3_clks 352 4>; - }; - - watchdog5: watchdog@2250000 { - compatible = "ti,j7-rti-wdt"; - reg = <0x00 0x2250000 0x00 0x100>; - clocks = <&k3_clks 353 0>; - power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>; - assigned-clocks = <&k3_clks 353 0>; - assigned-clock-parents = <&k3_clks 353 4>; - }; - - watchdog6: watchdog@2260000 { - compatible = "ti,j7-rti-wdt"; - reg = <0x00 0x2260000 0x00 0x100>; - clocks = <&k3_clks 354 0>; - power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>; - assigned-clocks = <&k3_clks 354 0>; - assigned-clock-parents = <&k3_clks 354 4>; - }; - - watchdog7: watchdog@2270000 { - compatible = "ti,j7-rti-wdt"; - reg = <0x00 0x2270000 0x00 0x100>; - clocks = <&k3_clks 355 0>; - power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>; - assigned-clocks = <&k3_clks 355 0>; - assigned-clock-parents = <&k3_clks 355 4>; - }; - /* * The following RTI instances are coupled with MCU R5Fs, c7x and * GPU so keeping them reserved as these will be used by their
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +36 -0
@@ -6,6 +6,42 @@ */ &cbass_main { + watchdog4: watchdog@2240000 { + compatible = "ti,j7-rti-wdt"; + reg = <0x00 0x2240000 0x00 0x100>; + clocks = <&k3_clks 352 0>; + power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks = <&k3_clks 352 0>; + assigned-clock-parents = <&k3_clks 352 4>; + }; + + watchdog5: watchdog@2250000 { + compatible = "ti,j7-rti-wdt"; + reg = <0x00 0x2250000 0x00 0x100>; + clocks = <&k3_clks 353 0>; + power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks = <&k3_clks 353 0>; + assigned-clock-parents = <&k3_clks 353 4>; + }; + + watchdog6: watchdog@2260000 { + compatible = "ti,j7-rti-wdt"; + reg = <0x00 0x2260000 0x00 0x100>; + clocks = <&k3_clks 354 0>; + power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks = <&k3_clks 354 0>; + assigned-clock-parents = <&k3_clks 354 4>; + }; + + watchdog7: watchdog@2270000 { + compatible = "ti,j7-rti-wdt"; + reg = <0x00 0x2270000 0x00 0x100>; + clocks = <&k3_clks 355 0>; + power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks = <&k3_clks 355 0>; + assigned-clock-parents = <&k3_clks 355 4>; + }; + pcie2_rc: pcie@2920000 { compatible = "ti,j784s4-pcie-host"; reg = <0x00 0x02920000 0x00 0x1000>,
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 153/641 soc: qcom: ubwc: add missing include
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dmitry Baryshkov <[email protected]>
[ Upstream commit ccef4b2703ff5b0de0b1bda30a0de3026d52eb19 ]
The header has a function which calls pr_err(). Don't require users of the header to include <linux/printk.h> and include it here.
--- include/linux/soc/qcom/ubwc.h | 1 + 1 file changed, 1 insertion(+)
include/linux/soc/qcom/ubwc.h +1 -0
@@ -8,6 +8,7 @@#define __QCOM_UBWC_H__#include <linux/bits.h> +#include <linux/printk.h> #include <linux/types.h> struct qcom_ubwc_cfg_data {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 154/641 hwspinlock: omap: Handle devm_pm_runtime_enable() errors
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Haotian Zhang <[email protected]>
[ Upstream commit 3bd4edd67b034f8e1f61c86e0eb098de6179e3f2 ]
Although unlikely, devm_pm_runtime_enable() can fail due to memory allocations. Without proper error handling, the subsequent pm_runtime_resume_and_get() call may operate on incorrectly initialized runtime PM state.
Add error handling to check the return value ofdevm_pm_runtime_enable() and return on failure.
--- drivers/hwspinlock/omap_hwspinlock.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
drivers/hwspinlock/omap_hwspinlock.c +3 -1
@@ -88,7 +88,9 @@ static int omap_hwspinlock_probe(struct platform_device *pdev)* make sure the module is enabled and clocked before reading * the module SYSSTATUS register */ -devm_pm_runtime_enable (&pdev->dev); + ret =devm_pm_runtime_enable (&pdev->dev); +if (ret) +return ret; ret =pm_runtime_resume_and_get (&pdev->dev);if (ret <0 )return ret;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 155/641 arm64: dts: amlogic: c3: assign the MMC signal clocks
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jerome Brunet <[email protected]>
[ Upstream commit 69330fd2368371c4eb47d60ace6bca09763d24a0 ]
The amlogic MMC driver operate with the assumption that MMC clock is configured to provide 24MHz. It uses this path for low rates such as 400kHz.
Assign the clocks to make sure they are properly configured
--- arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)
arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi +7 -0
@@ -969,6 +969,10 @@ sdio: mmc@88000 { no-sd; resets = <&reset RESET_SD_EMMC_A>; status = "disabled"; + + assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_A>; + assigned-clock-rates = <24000000>; + }; sd: mmc@8a000 {
@@ -984,6 +988,9 @@ sd: mmc@8a000 { no-sdio; resets = <&reset RESET_SD_EMMC_B>; status = "disabled"; + + assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_B>; + assigned-clock-rates = <24000000>; }; nand: nand-controller@8d000 {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 156/641 arm64: dts: amlogic: axg: assign the MMC signal clocks
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jerome Brunet <[email protected]>
[ Upstream commit 13d3fe2318ef6e46d6fcfe13bc373827fdf2aeac ]
The amlogic MMC driver operate with the assumption that MMC clock is configured to provide 24MHz. It uses this path for low rates such as 400kHz.
Assign the clocks to make sure they are properly configured
--- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6 ++++++ 1 file changed, 6 insertions(+)
arch/arm64/boot/dts/amlogic/meson-axg.dtsi +6 -0
@@ -1960,6 +1960,9 @@ sd_emmc_b: mmc@5000 { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_B>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_B_CLK0>; + assigned-clock-rates = <24000000>; }; sd_emmc_c: mmc@7000 {
@@ -1972,6 +1975,9 @@ sd_emmc_c: mmc@7000 { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_C>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_C_CLK0>; + assigned-clock-rates = <24000000>; }; nfc: nand-controller@7800 {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 157/641 arm64: dts: amlogic: gx: assign the MMC signal clocks
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jerome Brunet <[email protected]>
[ Upstream commit 406706559046eebc09a31e8ae5e78620bfd746fe ]
The amlogic MMC driver operate with the assumption that MMC clock is configured to provide 24MHz. It uses this path for low rates such as 400kHz.
Assign the clocks to make sure they are properly configured
--- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 9 +++++++++ arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 9 +++++++++ 2 files changed, 18 insertions(+)
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +9 -0
@@ -824,6 +824,9 @@ &sd_emmc_a { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_A>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_A_CLK0>; + assigned-clock-rates = <24000000>; }; &sd_emmc_b {
@@ -832,6 +835,9 @@ &sd_emmc_b { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_B>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_B_CLK0>; + assigned-clock-rates = <24000000>; }; &sd_emmc_c {
@@ -840,6 +846,9 @@ &sd_emmc_c { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_C>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_C_CLK0>; + assigned-clock-rates = <24000000>; }; &simplefb_hdmi {
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +9 -0
@@ -894,6 +894,9 @@ &sd_emmc_a { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_A>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_A_CLK0>; + assigned-clock-rates = <24000000>; }; &sd_emmc_b {
@@ -902,6 +905,9 @@ &sd_emmc_b { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_B>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_B_CLK0>; + assigned-clock-rates = <24000000>; }; &sd_emmc_c {
@@ -910,6 +916,9 @@ &sd_emmc_c { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_C>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_C_CLK0>; + assigned-clock-rates = <24000000>; }; &simplefb_hdmi {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 158/641 arm64: dts: amlogic: g12: assign the MMC B and C signal clocks
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jerome Brunet <[email protected]>
[ Upstream commit be2ff5fdb0e83e32d4ec4e68a69875cec0d14621 ]
The amlogic MMC driver operate with the assumption that MMC clock is configured to provide 24MHz. It uses this path for low rates such as 400kHz.
Assign the clocks to make sure they are properly configured
--- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 6 ++++++ 1 file changed, 6 insertions(+)
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +6 -0
@@ -2443,6 +2443,9 @@ sd_emmc_b: mmc@ffe05000 { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_B>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_B_CLK0>; + assigned-clock-rates = <24000000>; }; sd_emmc_c: mmc@ffe07000 {
@@ -2455,6 +2458,9 @@ sd_emmc_c: mmc@ffe07000 { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_C>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_C_CLK0>; + assigned-clock-rates = <24000000>; }; usb: usb@ffe09000 {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 159/641 arm64: dts: amlogic: g12: assign the MMC A signal clock
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jerome Brunet <[email protected]>
[ Upstream commit 3c941feaa363f1573a501452391ddf513394c84b ]
The amlogic MMC driver operate with the assumption that MMC clock is configured to provide 24MHz. It uses this path for low rates such as 400kHz.
Assign the clock to make sure it is properly configured
--- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 3 +++ 1 file changed, 3 insertions(+)
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +3 -0
@@ -2431,6 +2431,9 @@ sd_emmc_a: mmc@ffe03000 { <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; resets = <&reset RESET_SD_EMMC_A>; + + assigned-clocks = <&clkc CLKID_SD_EMMC_A_CLK0>; + assigned-clock-rates = <24000000>; }; sd_emmc_b: mmc@ffe05000 {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 160/641 arm64: dts: qcom: qrb4210-rb2: Fix UART3 wakeup IRQ storm
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dmitry Baryshkov <[email protected]>
[ Upstream commit c5dc4812f6bf397b82290c540085e9ec98b47b30 ]
Follow commit 9c92d36b0b1e ("arm64: dts: qcom: qrb2210-rb1: Fix UART3 wakeup IRQ storm") and apply the similar fix to the RB2 platform.
Having RX / TX pins as pull up and wakup interrupt as high-level triggered generates an interrupt storm when trying to suspend the device. Avoid the storm by using the falling edge trigger (as all other platforms do).
--- arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +1 -1
@@ -694,7 +694,7 @@ sdc2_card_det_n: sd-card-det-n-state { &uart3 { interrupts-extended = <&intc GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, - <&tlmm 11 IRQ_TYPE_LEVEL_HIGH>; + <&tlmm 11 IRQ_TYPE_EDGE_FALLING>; pinctrl-0 = <&uart3_default>; pinctrl-1 = <&uart3_sleep>; pinctrl-names = "default", "sleep";
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 161/641 arm64: dts: qcom: sdm845-db845c: drop CS from SPIO0
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dmitry Baryshkov <[email protected]>
[ Upstream commit 8bfb696ccdc5bcfad7a45b84c2c8a36757070e19 ]
On SDM845 SPI uses hardware-provided chip select, while specifying cs-gpio makes the driver request GPIO pin, which on DB845c conflicts with the normal host controllers pinctrl entry.
Drop the cs-gpios property to restore SPI functionality.
--- arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 1 - 1 file changed, 1 deletion(-)
arch/arm64/boot/dts/qcom/sdm845-db845c.dts +0 -1
@@ -850,7 +850,6 @@ &spi0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&qup_spi0_default>; - cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; can@0 { compatible = "microchip,mcp2517fd";
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 162/641 arm64: dts: qcom: sdm845-db845c: specify power for WiFi CH1
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dmitry Baryshkov <[email protected]>
[ Upstream commit c303e89f7f17c29981d09f8beaaf60937ae8b1f2 ]
Specify power supply for the second chain / antenna output of the onboard WiFi chip.
--- arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 7 +++++++ 1 file changed, 7 insertions(+)
arch/arm64/boot/dts/qcom/sdm845-db845c.dts +7 -0
@@ -379,6 +379,12 @@ vreg_l21a_2p95: ldo21 { regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; }; + vreg_l23a_3p3: ldo23 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3312000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + vreg_l24a_3p075: ldo24 { regulator-min-microvolt = <3088000>; regulator-max-microvolt = <3088000>;
@@ -1155,6 +1161,7 @@ &wifi { vdd-1.8-xo-supply = <&vreg_l7a_1p8>; vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; + vdd-3.3-ch1-supply = <&vreg_l23a_3p3>; qcom,snoc-host-cap-8bit-quirk; qcom,calibration-variant = "Thundercomm_DB845C";
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 163/641 arm64: dts: qcom: x1e: bus is 40-bits (fix 64GB models)
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jonathan Marek <[email protected]>
[ Upstream commit b38dd256e11a4c8bd5a893e11fc42d493939c907 ]
Unlike the phone SoCs this was copied from, x1e has a 40-bit physical bus. The upper address space is used to support more than 32GB of memory.
This fixes issues when DMA buffers are allocated outside the 36-bit range.
--- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/qcom/x1e80100.dtsi +2 -2
@@ -791,8 +791,8 @@ soc: soc@0 { #address-cells = <2>; #size-cells = <2>; - dma-ranges = <0 0 0 0 0x10 0>; - ranges = <0 0 0 0 0x10 0>; + dma-ranges = <0 0 0 0 0x100 0>; + ranges = <0 0 0 0 0x100 0>; gcc: clock-controller@100000 { compatible = "qcom,x1e80100-gcc";
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 164/641 arm64: dts: qcom: talos: Drop opp-shared from QUP OPP table
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Viken Dadhaniya <[email protected]>
[ Upstream commit dda4bdd325326dd67ae4401f4f3d35b9cf781e3f ]
QUP devices are currently marked with opp-shared in their OPP table, causing the kernel to treat them as part of a shared OPP domain. This leads to the qcom_geni_serial driver failing to probe with error -EBUSY (-16).
Remove the opp-shared property to ensure the OPP framework treats the QUP OPP table as device-specific, allowing the serial driver to probe successfully
--- arch/arm64/boot/dts/qcom/sm6150.dtsi | 1 - 1 file changed, 1 deletion(-)
arch/arm64/boot/dts/qcom/sm6150.dtsi +0 -1
@@ -398,7 +398,6 @@ cdsp_smp2p_in: slave-kernel { qup_opp_table: opp-table-qup { compatible = "operating-points-v2"; - opp-shared; opp-75000000 { opp-hz = /bits/ 64 <75000000>;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 165/641 arm64: dts: qcom: agatti: Add CX_MEM/DBGC GPU regions
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Konrad Dybcio <[email protected]>
[ Upstream commit 0fdcc948929a6d673bd0f90631dd6e42090c3dbd ]
Describe the GPU register regions, with the former existing but not being used much if at all on this silicon, and the latter containing various debugging levers generally related to dumping the state of the IP upon a crash.
--- arch/arm64/boot/dts/qcom/qcm2290.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/qcom/qcm2290.dtsi +6 -2
@@ -1503,8 +1503,12 @@ usb_dwc3_ss: endpoint { gpu: gpu@5900000 { compatible = "qcom,adreno-07000200", "qcom,adreno"; - reg = <0x0 0x05900000 0x0 0x40000>; - reg-names = "kgsl_3d0_reg_memory"; + reg = <0x0 0x05900000 0x0 0x40000>, + <0x0 0x0599e000 0x0 0x1000>, + <0x0 0x05961000 0x0 0x800>; + reg-names = "kgsl_3d0_reg_memory", + "cx_mem", + "cx_dbgc"; interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 166/641 arm64: dts: qcom: sm6115: Add CX_MEM/DBGC GPU regions
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Konrad Dybcio <[email protected]>
[ Upstream commit 78c13dac18cf0e6f6cbc6ea85d4f967e6cca9562 ]
Describe the GPU register regions, with the former existing but not being used much if at all on this silicon, and the latter containing various debugging levers generally related to dumping the state of the IP upon a crash.
--- arch/arm64/boot/dts/qcom/sm6115.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/qcom/sm6115.dtsi +6 -2
@@ -1715,8 +1715,12 @@ usb_dwc3_ss: endpoint { gpu: gpu@5900000 { compatible = "qcom,adreno-610.0", "qcom,adreno"; - reg = <0x0 0x05900000 0x0 0x40000>; - reg-names = "kgsl_3d0_reg_memory"; + reg = <0x0 0x05900000 0x0 0x40000>, + <0x0 0x0599e000 0x0 0x1000>, + <0x0 0x05961000 0x0 0x800>; + reg-names = "kgsl_3d0_reg_memory", + "cx_mem", + "cx_dbgc"; /* There's no (real) GMU, so we have to handle quite a bunch of clocks! */ clocks = <&gpucc GPU_CC_GX_GFX3D_CLK>,
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 167/641 reset: canaan: k230: drop OF dependency and enable by default
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Junhui Liu <[email protected]>
[ Upstream commit c7a5e01e229d21e0560d78bd645b4f7398667ce4 ]
The driver doesn't use any symbols depending on CONFIG_OF, so drop the dependency. Also, enable it by default when ARCH_CANAAN is selected.
--- drivers/reset/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/reset/Kconfig +1 -1
@@ -150,7 +150,7 @@ config RESET_K210 config RESET_K230 tristate "Reset controller driver for Canaan Kendryte K230 SoC" depends on ARCH_CANAAN || COMPILE_TEST - depends on OF + default ARCH_CANAAN help Support for the Canaan Kendryte K230 RISC-V SoC reset controller. Say Y if you want to control reset signals provided by this
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 168/641 drm/panthor: Recover from panthor_gpu_flush_caches() failures
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Boris Brezillon <[email protected]>
[ Upstream commit 3c0a60195b37af83bbbaf223cd3a78945bace49e ]
We have seen a few cases where the whole memory subsystem is blocked and flush operations never complete. When that happens, we want to:
- schedule a reset, so we can recover from this situation
- in the reset path, we need to reset the pending_reqs so we can send new commands after the reset
- if more panthor_gpu_flush_caches() operations are queued after the timeout, we skip them and return -EIO directly to avoid needless waits (the memory block won't miraculously work again)
Note that we drop the WARN_ON()s because these hangs can be triggered with buggy GPU jobs created by the UMD, and there's no way we can prevent it. We do keep the error messages though.
v2:
- New patch
v3:
- Collect R-b
- Explicitly mention the fact we dropped the WARN_ON()s in the commit message
v4:
- No changes
--- drivers/gpu/drm/panthor/panthor_gpu.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-)
drivers/gpu/drm/panthor/panthor_gpu.c +12 -7
@@ -259,38 +259,42 @@ int panthor_gpu_l2_power_on(struct panthor_device *ptdev)int panthor_gpu_flush_caches (struct panthor_device *ptdev,u32 l2,u32 lsc,u32 other) { -bool timedout = false;unsigned long flags; +int ret =0 ;/* Serialize cache flush operations. */ guard (mutex)(&ptdev->gpu->cache_flush_lock);spin_lock_irqsave (&ptdev->gpu->reqs_lock, flags); -if (!drm_WARN_ON (&ptdev->base, - ptdev->gpu->pending_reqs &GPU_IRQ_CLEAN_CACHES_COMPLETED )) { +if (!(ptdev->gpu->pending_reqs &GPU_IRQ_CLEAN_CACHES_COMPLETED )) { ptdev->gpu->pending_reqs |=GPU_IRQ_CLEAN_CACHES_COMPLETED ;gpu_write (ptdev,GPU_CMD ,GPU_FLUSH_CACHES (l2, lsc, other)); + }else { + ret = -EIO ; }spin_unlock_irqrestore (&ptdev->gpu->reqs_lock, flags); +if (ret) +return ret; +if (!wait_event_timeout (ptdev->gpu->reqs_acked, !(ptdev->gpu->pending_reqs &GPU_IRQ_CLEAN_CACHES_COMPLETED ),msecs_to_jiffies (100 ))) {spin_lock_irqsave (&ptdev->gpu->reqs_lock, flags);if ((ptdev->gpu->pending_reqs &GPU_IRQ_CLEAN_CACHES_COMPLETED ) !=0 && !(gpu_read (ptdev,GPU_INT_RAWSTAT ) &GPU_IRQ_CLEAN_CACHES_COMPLETED )) - timedout = true; + ret = -ETIMEDOUT ;else ptdev->gpu->pending_reqs &= ~GPU_IRQ_CLEAN_CACHES_COMPLETED ;spin_unlock_irqrestore (&ptdev->gpu->reqs_lock, flags); } -if (timedout) { +if (ret) { +panthor_device_schedule_reset (ptdev);drm_err (&ptdev->base,"Flush caches timeout" ); -return -ETIMEDOUT ; } -return 0 ; +return ret; }/**
@@ -330,6 +334,7 @@ int panthor_gpu_soft_reset(struct panthor_device *ptdev)return -ETIMEDOUT ; } + ptdev->gpu->pending_reqs =0 ;return 0 ; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 169/641 drm/panthor: Fix the full_tick check
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Boris Brezillon <[email protected]>
[ Upstream commit a3c2d0b40b108bd45d44f6c1dfa33c39d577adcd ]
We have a full tick when the remaining time to the next tick is zero, not the other way around. Declare a full_tick variable so we don't get that test wrong in other places.
v2:
- Add R-b
v3:
- Collect R-b
--- drivers/gpu/drm/panthor/panthor_sched.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)
drivers/gpu/drm/panthor/panthor_sched.c +5 -2
@@ -2387,6 +2387,7 @@ static void tick_work(struct work_struct *work)u64 remaining_jiffies =0 , resched_delay;u64 now =get_jiffies_64 ();int prio, ret, cookie; +bool full_tick;if (!drm_dev_enter (&ptdev->base, &cookie))return ;
@@ -2398,15 +2399,17 @@ static void tick_work(struct work_struct *work)if (time_before64 (now, sched->resched_target)) remaining_jiffies = sched->resched_target - now; + full_tick = remaining_jiffies ==0 ; +mutex_lock (&sched->lock);if (panthor_device_reset_is_pending (sched->ptdev)) goto out_unlock; -tick_ctx_init (sched, &ctx, remaining_jiffies !=0 ); +tick_ctx_init (sched, &ctx, full_tick);if (ctx.csg_upd_failed_mask) goto out_cleanup_ctx; -if (remaining_jiffies) { +if (!full_tick) {/* Scheduling forced in the middle of a tick. Only RT groups * can preempt non-RT ones. Currently running RT groups can't be * preempted.
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 170/641 drm/panthor: Fix the group priority rotation logic
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Boris Brezillon <[email protected]>
[ Upstream commit 55429c51d5db3db24c2ad561944c6a0ca922d476 ]
When rotating group priorities, we want the group with the highest priority to go back to the end of the queue, and all other active groups to get their priority bumped, otherwise some groups will never get a chance to run with the highest priority. This implies moving the rotation itself to tick_work(), and only dealing with old group ordering in tick_ctx_insert_old_group().
v2:
- Add R-b
- Fix the commit message
v3:
- Drop the full_tick argument in tick_ctx_init()
- Collect R-b
--- drivers/gpu/drm/panthor/panthor_sched.c | 52 +++++++++++++++---------- 1 file changed, 31 insertions(+), 21 deletions(-)
drivers/gpu/drm/panthor/panthor_sched.c +31 -21
@@ -1989,31 +1989,22 @@ tick_ctx_pick_groups_from_list(const struct panthor_scheduler *sched,static void tick_ctx_insert_old_group (struct panthor_scheduler *sched,struct panthor_sched_tick_ctx *ctx, -struct panthor_group *group, -bool full_tick) +struct panthor_group *group) {struct panthor_csg_slot *csg_slot = &sched->csg_slots[group->csg_id];struct panthor_group *other_group; -if (!full_tick) { -list_add_tail (&group->run_node, &ctx->old_groups[group->priority]); -return ; - } - -/* Rotate to make sure groups with lower CSG slot -* priorities have a chance to get a higher CSG slot -* priority next time they get picked. This priority -* has an impact on resource request ordering, so it's -* important to make sure we don't let one group starve -* all other groups with the same group priority. -*/ +/* Class groups in descending priority order so we can easily rotate. */ list_for_each_entry (other_group, &ctx->old_groups[csg_slot->group->priority], run_node) {struct panthor_csg_slot *other_csg_slot = &sched->csg_slots[other_group->csg_id]; -if (other_csg_slot->priority > csg_slot->priority) { -list_add_tail (&csg_slot->group->run_node, &other_group->run_node); +/* Our group has a higher prio than the one we're testing against, +* place it just before. +*/ +if (csg_slot->priority > other_csg_slot->priority) { +list_add_tail (&group->run_node, &other_group->run_node);return ; } }
@@ -2023,8 +2014,7 @@ tick_ctx_insert_old_group(struct panthor_scheduler *sched,static void tick_ctx_init (struct panthor_scheduler *sched, -struct panthor_sched_tick_ctx *ctx, -bool full_tick) +struct panthor_sched_tick_ctx *ctx) {struct panthor_device *ptdev = sched->ptdev;struct panthor_csg_slots_upd_ctx upd_ctx;
@@ -2062,7 +2052,7 @@ tick_ctx_init(struct panthor_scheduler *sched, group->fatal_queues |=GENMASK (group->queue_count -1 ,0 ); } -tick_ctx_insert_old_group (sched, ctx, group, full_tick); +tick_ctx_insert_old_group (sched, ctx, group);csgs_upd_ctx_queue_reqs (ptdev, &upd_ctx, i, csg_iface->output->ack ^CSG_STATUS_UPDATE ,CSG_STATUS_UPDATE );
@@ -2405,7 +2395,7 @@ static void tick_work(struct work_struct *work)if (panthor_device_reset_is_pending (sched->ptdev)) goto out_unlock; -tick_ctx_init (sched, &ctx, full_tick); +tick_ctx_init (sched, &ctx);if (ctx.csg_upd_failed_mask) goto out_cleanup_ctx;
@@ -2431,9 +2421,29 @@ static void tick_work(struct work_struct *work)for (prio =PANTHOR_CSG_PRIORITY_COUNT -1 ; prio >=0 && !tick_ctx_is_full (sched, &ctx); prio--) { +struct panthor_group *old_highest_prio_group = +list_first_entry_or_null (&ctx.old_groups[prio], + struct panthor_group, run_node); + +/* Pull out the group with the highest prio for rotation. */ +if (old_highest_prio_group) +list_del (&old_highest_prio_group->run_node); + +/* Re-insert old active groups so they get a chance to run with higher prio. */ +tick_ctx_pick_groups_from_list (sched, &ctx, &ctx.old_groups[prio], true, true); + +/* Fill the remaining slots with runnable groups. */ tick_ctx_pick_groups_from_list (sched, &ctx, &sched->groups.runnable[prio], true, false); -tick_ctx_pick_groups_from_list (sched, &ctx, &ctx.old_groups[prio], true, true); + +/* Re-insert the old group with the highest prio, and give it a chance to be +* scheduled again (but with a lower prio) if there's room left. +*/ +if (old_highest_prio_group) { +list_add_tail (&old_highest_prio_group->run_node, &ctx.old_groups[prio]); +tick_ctx_pick_groups_from_list (sched, &ctx, &ctx.old_groups[prio], + true, true); + } }/* If we have free CSG slots left, pick idle groups */
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 171/641 drm/panthor: Fix immediate ticking on a disabled tick
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Boris Brezillon <[email protected]>
[ Upstream commit 4356d21994f4ff5c87305b874939b359f16f6677 ]
We have a few paths where we schedule the tick work immediately without changing the resched_target. If the tick was stopped, this would lead to a remaining_jiffies that's always > 0, and it wouldn't force a full tick in that case. Add extra checks to cover that case properly.
v2:
- Fix typo
- Simplify the code as suggested by Steve
v3:
- Collect R-b
--- drivers/gpu/drm/panthor/panthor_sched.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)
drivers/gpu/drm/panthor/panthor_sched.c +7 -2
@@ -2374,6 +2374,7 @@ static void tick_work(struct work_struct *work) tick_work.work);struct panthor_device *ptdev = sched->ptdev;struct panthor_sched_tick_ctx ctx; +u64 resched_target = sched->resched_target;u64 remaining_jiffies =0 , resched_delay;u64 now =get_jiffies_64 ();int prio, ret, cookie;
@@ -2386,8 +2387,12 @@ static void tick_work(struct work_struct *work)if (drm_WARN_ON (&ptdev->base, ret)) goto out_dev_exit; -if (time_before64 (now, sched->resched_target)) - remaining_jiffies = sched->resched_target - now; +/* If the tick is stopped, calculate when the next tick would be */ +if (resched_target ==U64_MAX ) + resched_target = sched->last_tick + sched->tick_period; + +if (time_before64 (now, resched_target)) + remaining_jiffies = resched_target - now; full_tick = remaining_jiffies ==0 ;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 172/641 drm/panthor: Fix the logic that decides when to stop ticking
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Boris Brezillon <[email protected]>
[ Upstream commit 61d9a43d70dc3e1709ecd14a34f6d5f01e21dfc9 ]
When we have multiple active groups with the same priority, we need to keep ticking for the priority rotation to take place. If we don't do that, we might starve slots with lower priorities.
It's annoying to deal with that in tick_ctx_update_resched_target(), so let's add a ::stop_tick field to the tick context which is initialized to true, and downgraded to false as soon as we detect something that requires to tick to happen. This way we can complement the current logic with extra conditions if needed.
v2:
- Add R-b
v3:
- Drop panthor_sched_tick_ctx::min_priority (no longer relevant)
- Collect R-b
--- drivers/gpu/drm/panthor/panthor_sched.c | 44 ++++++++++--------------- 1 file changed, 17 insertions(+), 27 deletions(-)
drivers/gpu/drm/panthor/panthor_sched.c +17 -27
@@ -1902,10 +1902,10 @@ struct panthor_sched_tick_ctx {struct list_head groups[PANTHOR_CSG_PRIORITY_COUNT ];u32 idle_group_count;u32 group_count; -enum panthor_csg_priority min_priority;struct panthor_vm *vms[MAX_CS_PER_CSG ];u32 as_count;bool immediate_tick; +bool stop_tick;u32 csg_upd_failed_mask; };
@@ -1970,17 +1970,21 @@ tick_ctx_pick_groups_from_list(const struct panthor_scheduler *sched,if (!owned_by_tick_ctx)group_get (group); -list_move_tail (&group->run_node, &ctx->groups[group->priority]); ctx->group_count++; + +/* If we have more than one active group with the same priority, +* we need to keep ticking to rotate the CSG priority. +*/ if (group_is_idle (group)) ctx->idle_group_count++; +else if (!list_empty (&ctx->groups[group->priority])) + ctx->stop_tick = false; + +list_move_tail (&group->run_node, &ctx->groups[group->priority]);if (i == ctx->as_count) ctx->vms[ctx->as_count++] = group->vm; -if (ctx->min_priority > group->priority) - ctx->min_priority = group->priority; -if (tick_ctx_is_full (sched, ctx))return ; }
@@ -2024,7 +2028,7 @@ tick_ctx_init(struct panthor_scheduler *sched,memset (ctx,0 ,sizeof (*ctx));csgs_upd_ctx_init (&upd_ctx); - ctx->min_priority =PANTHOR_CSG_PRIORITY_COUNT ; + ctx->stop_tick = true;for (i =0 ; i <ARRAY_SIZE (ctx->groups); i++) {INIT_LIST_HEAD (&ctx->groups[i]);INIT_LIST_HEAD (&ctx->old_groups[i]);
@@ -2336,32 +2340,18 @@ static u64 tick_ctx_update_resched_target(struct panthor_scheduler *sched, const struct panthor_sched_tick_ctx *ctx) { -/* We had space left, no need to reschedule until some external event happens. */ -if (!tick_ctx_is_full (sched, ctx)) - goto no_tick; - -/* If idle groups were scheduled, no need to wake up until some external -* event happens (group unblocked, new job submitted, ...). -*/ -if (ctx->idle_group_count) - goto no_tick; + u64 resched_target; -if (drm_WARN_ON (&sched->ptdev->base, ctx->min_priority >=PANTHOR_CSG_PRIORITY_COUNT )) +if (ctx->stop_tick) goto no_tick; -/* If there are groups of the same priority waiting, we need to -* keep the scheduler ticking, otherwise, we'll just wait for -* new groups with higher priority to be queued. -*/ -if (!list_empty (&sched->groups.runnable[ctx->min_priority])) { -u64 resched_target = sched->last_tick + sched->tick_period; + resched_target = sched->last_tick + sched->tick_period; -if (time_before64 (sched->resched_target, sched->last_tick) || -time_before64 (resched_target, sched->resched_target)) - sched->resched_target = resched_target; +if (time_before64 (sched->resched_target, sched->last_tick) || +time_before64 (resched_target, sched->resched_target)) + sched->resched_target = resched_target; -return sched->resched_target - sched->last_tick; - } +return sched->resched_target - sched->last_tick; no_tick: sched->resched_target =U64_MAX ;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 173/641 drm/panthor: Make sure we resume the tick when new jobs are submitted
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Boris Brezillon <[email protected]>
[ Upstream commit 99820b4b7e50d9651f01d2d55b6b9ba92dcc5b99 ]
If the group is already assigned a slot but was idle before this job submission, we need to make sure the priority rotation happens in the future. Extract the existing logic living in group_schedule_locked() and call this new sched_resume_tick() helper from the "group is assigned a slot" path.
v2:
- Add R-b
v3:
- Re-use queue_mask to clear the bit
- Collect R-b
--- drivers/gpu/drm/panthor/panthor_sched.c | 43 +++++++++++++++++++------ 1 file changed, 34 insertions(+), 9 deletions(-)
drivers/gpu/drm/panthor/panthor_sched.c +34 -9
@@ -2563,14 +2563,33 @@ static void sync_upd_work(struct work_struct *work)sched_queue_delayed_work (sched, tick,0 ); } +static void sched_resume_tick (struct panthor_device *ptdev) +{ +struct panthor_scheduler *sched = ptdev->scheduler; +u64 delay_jiffies, now; + +drm_WARN_ON (&ptdev->base, sched->resched_target !=U64_MAX ); + +/* Scheduler tick was off, recalculate the resched_target based on the +* last tick event, and queue the scheduler work. +*/ + now =get_jiffies_64 (); + sched->resched_target = sched->last_tick + sched->tick_period; +if (sched->used_csg_slot_count == sched->csg_slot_count && +time_before64 (now, sched->resched_target)) + delay_jiffies = min_t(unsigned long, sched->resched_target - now, ULONG_MAX); +else + delay_jiffies =0 ; + +sched_queue_delayed_work (sched, tick, delay_jiffies); +} +static void group_schedule_locked (struct panthor_group *group,u32 queue_mask) {struct panthor_device *ptdev = group->ptdev;struct panthor_scheduler *sched = ptdev->scheduler;struct list_head *queue = &sched->groups.runnable[group->priority]; -u64 delay_jiffies =0 ;bool was_idle; -u64 now;if (!group_can_run (group))return ;
@@ -2615,13 +2634,7 @@ static void group_schedule_locked(struct panthor_group *group, u32 queue_mask)/* Scheduler tick was off, recalculate the resched_target based on the * last tick event, and queue the scheduler work. */ - now =get_jiffies_64 (); - sched->resched_target = sched->last_tick + sched->tick_period; -if (sched->used_csg_slot_count == sched->csg_slot_count && -time_before64 (now, sched->resched_target)) - delay_jiffies = min_t(unsigned long, sched->resched_target - now, ULONG_MAX); - -sched_queue_delayed_work (sched, tick, delay_jiffies); +sched_resume_tick (ptdev); } static void queue_stop(struct panthor_queue *queue,
@@ -3222,6 +3235,18 @@ queue_run_job(struct drm_sched_job *sched_job)group_schedule_locked (group,BIT (job->queue_idx)); }else { +u32 queue_mask =BIT (job->queue_idx); +bool resume_tick =group_is_idle (group) && + (group->idle_queues & queue_mask) && + !(group->blocked_queues & queue_mask) && + sched->resched_target ==U64_MAX ; + +/* We just added something to the queue, so it's no longer idle. */ + group->idle_queues &= ~queue_mask; + +if (resume_tick) +sched_resume_tick (ptdev); +gpu_write (ptdev,CSF_DOORBELL (queue->doorbell_id),1 );if (!sched->pm.has_ref && !(group->blocked_queues &BIT (job->queue_idx))) {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 174/641 workqueue: Factor out assign_rescuer_work()
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Lai Jiangshan <[email protected]>
[ Upstream commit 99ed6f62a46e91dc796b785618d646eeded1b230 ]
Move the code to assign work to rescuer and assign_rescuer_work().
Stable-dep-of: e5a30c303b07 ("workqueue: Process rescuer work items one-by-one using a cursor")
--- kernel/workqueue.c | 29 ++++++++++++++++++----------- 1 file changed, 18 insertions(+), 11 deletions(-)
kernel/workqueue.c +18 -11
@@ -3443,6 +3443,23 @@ static int worker_thread(void *__worker) goto woke_up; } +static bool assign_rescuer_work (struct pool_workqueue *pwq,struct worker *rescuer) +{ +struct worker_pool *pool = pwq->pool; +struct work_struct *work, *n; + +/* +* Slurp in all works issued via this workqueue and +* process'em. +*/ +list_for_each_entry_safe (work, n, &pool->worklist, entry) { +if (get_work_pwq (work) == pwq &&assign_work (work, rescuer, &n)) + pwq->stats[PWQ_STAT_RESCUED ]++; + } + +return !list_empty (&rescuer->scheduled); +} +/** * rescuer_thread - the rescuer thread function * @__rescuer: self
@@ -3497,7 +3514,6 @@ static int rescuer_thread(void *__rescuer)struct pool_workqueue *pwq =list_first_entry (&wq->maydays, struct pool_workqueue, mayday_node);struct worker_pool *pool = pwq->pool; -struct work_struct *work, *n;__set_current_state (TASK_RUNNING );list_del_init (&pwq->mayday_node);
@@ -3508,18 +3524,9 @@ static int rescuer_thread(void *__rescuer)raw_spin_lock_irq (&pool->lock); -/* -* Slurp in all works issued via this workqueue and -* process'em. -*/ WARN_ON_ONCE (!list_empty (&rescuer->scheduled)); -list_for_each_entry_safe (work, n, &pool->worklist, entry) { -if (get_work_pwq (work) == pwq && -assign_work (work, rescuer, &n)) - pwq->stats[PWQ_STAT_RESCUED ]++; - } -if (!list_empty (&rescuer->scheduled)) { +if (assign_rescuer_work (pwq, rescuer)) {process_scheduled_works (rescuer);/*
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 175/641 workqueue: Only assign rescuer work when really needed
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Lai Jiangshan <[email protected]>
[ Upstream commit 7b05c90b3302cf3d830dfa6f8961376bcaf43b94 ]
If the pwq does not need rescue (normal workers have been created or become available), the rescuer can immediately move on to other stalled pwqs.
Stable-dep-of: e5a30c303b07 ("workqueue: Process rescuer work items one-by-one using a cursor")
--- kernel/workqueue.c | 4 ++++ 1 file changed, 4 insertions(+)
kernel/workqueue.c +4 -0
@@ -3448,6 +3448,10 @@ static bool assign_rescuer_work(struct pool_workqueue *pwq, struct worker *rescustruct worker_pool *pool = pwq->pool;struct work_struct *work, *n; +/* need rescue? */ +if (!pwq->nr_active || !need_to_create_worker (pool)) +return false; +/* * Slurp in all works issued via this workqueue and * process'em.
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 176/641 workqueue: Process rescuer work items one-by-one using a cursor
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Lai Jiangshan <[email protected]>
[ Upstream commit e5a30c303b07a4d6083e0f7f051b53add6d93c5d ]
Previously, the rescuer scanned for all matching work items at once and processed them within a single rescuer thread, which could cause one blocking work item to stall all others.
Make the rescuer process work items one-by-one instead of slurping all matches in a single pass.
Break the rescuer loop after finding and processing the first matching work item, then restart the search to pick up the next. This gives normal worker threads a chance to process other items which gives them the opportunity to be processed instead of waiting on the rescuer's queue and prevents a blocking work item from stalling the rest once memory pressure is relieved.
Introduce a dummy cursor work item to avoid potentially O(N^2) rescans of the work list. The marker records the resume position for the next scan, eliminating redundant traversals.
Also introduce RESCUER_BATCH to control the maximum number of work items the rescuer processes in each turn, and move on to other PWQs when the limit is reached.
--- kernel/workqueue.c | 75 ++++++++++++++++++++++++++++++++++++---------- 1 file changed, 59 insertions(+), 16 deletions(-)
kernel/workqueue.c +59 -16
@@ -117,6 +117,8 @@ enum wq_internal_consts {MAYDAY_INTERVAL =HZ /10 ,/* and then every 100ms */ CREATE_COOLDOWN =HZ ,/* time to breath after fail */ +RESCUER_BATCH =16 ,/* process items per turn */ +/* * Rescue workers are used only on emergencies and shared by * all cpus. Give MIN_NICE.
@@ -286,6 +288,7 @@ struct pool_workqueue {struct list_head pending_node;/* LN: node on wq_node_nr_active->pending_pwqs */ struct list_head pwqs_node;/* WR: node on wq->pwqs */ struct list_head mayday_node;/* MD: node on wq->maydays */ +struct work_struct mayday_cursor;/* L: cursor on pool->worklist */ u64 stats[PWQ_NR_STATS ];
@@ -1126,6 +1129,12 @@ static struct worker *find_worker_executing_work(struct worker_pool *pool,return NULL ; } +static void mayday_cursor_func (struct work_struct *work) +{ +/* should not be processed, only for marking position */ +BUG (); +} +/** * move_linked_works - move linked works to a list * @work: start of series of works to be scheduled
@@ -1188,6 +1197,16 @@ static bool assign_work(struct work_struct *work, struct worker *worker,lockdep_assert_held (&pool->lock); +/* The cursor work should not be processed */ +if (unlikely (work->func == mayday_cursor_func)) { +/* only worker_thread() can possibly take this branch */ +WARN_ON_ONCE (worker->rescue_wq); +if (nextp) + *nextp =list_next_entry (work, entry); +list_del_init (&work->entry); +return false; + } +/* * A single work shouldn't be executed concurrently by multiple workers. * __queue_work() ensures that @work doesn't jump to a different pool
@@ -3446,22 +3465,30 @@ static int worker_thread(void *__worker)static bool assign_rescuer_work (struct pool_workqueue *pwq,struct worker *rescuer) {struct worker_pool *pool = pwq->pool; +struct work_struct *cursor = &pwq->mayday_cursor;struct work_struct *work, *n;/* need rescue? */ if (!pwq->nr_active || !need_to_create_worker (pool))return false; -/* -* Slurp in all works issued via this workqueue and -* process'em. -*/ -list_for_each_entry_safe (work, n, &pool->worklist, entry) { -if (get_work_pwq (work) == pwq &&assign_work (work, rescuer, &n)) +/* search from the start or cursor if available */ +if (list_empty (&cursor->entry)) + work = list_first_entry(&pool->worklist, struct work_struct, entry); +else + work =list_next_entry (cursor, entry); + +/* find the next work item to rescue */ +list_for_each_entry_safe_from (work, n, &pool->worklist, entry) { +if (get_work_pwq (work) == pwq &&assign_work (work, rescuer, &n)) { pwq->stats[PWQ_STAT_RESCUED ]++; +/* put the cursor for next search */ +list_move_tail (&cursor->entry, &n->entry); +return true; + } } -return !list_empty (&rescuer->scheduled); +return false; }/**
@@ -3518,6 +3545,7 @@ static int rescuer_thread(void *__rescuer)struct pool_workqueue *pwq =list_first_entry (&wq->maydays, struct pool_workqueue, mayday_node);struct worker_pool *pool = pwq->pool; +unsigned int count =0 ;__set_current_state (TASK_RUNNING );list_del_init (&pwq->mayday_node);
@@ -3530,19 +3558,16 @@ static int rescuer_thread(void *__rescuer)WARN_ON_ONCE (!list_empty (&rescuer->scheduled)); -if (assign_rescuer_work (pwq, rescuer)) { +while (assign_rescuer_work (pwq, rescuer)) {process_scheduled_works (rescuer);/* -* The above execution of rescued work items could -* have created more to rescue through -* pwq_activate_first_inactive() or chained -* queueing. Let's put @pwq back on mayday list so -* that such back-to-back work items, which may be -* being used to relieve memory pressure, don't -* incur MAYDAY_INTERVAL delay inbetween. +* If the per-turn work item limit is reached and other +* PWQs are in mayday, requeue mayday for this PWQ and +* let the rescuer handle the other PWQs first. */ -if (pwq->nr_active &&need_to_create_worker (pool)) { +if (++count >RESCUER_BATCH && !list_empty (&pwq->wq->maydays) && + pwq->nr_active &&need_to_create_worker (pool)) {raw_spin_lock (&wq_mayday_lock);/* * Queue iff we aren't racing destruction
@@ -3553,9 +3578,14 @@ static int rescuer_thread(void *__rescuer)list_add_tail (&pwq->mayday_node, &wq->maydays); }raw_spin_unlock (&wq_mayday_lock); +break ; } } +/* The cursor can not be left behind without the rescuer watching it. */ +if (!list_empty (&pwq->mayday_cursor.entry) &&list_empty (&pwq->mayday_node)) +list_del_init (&pwq->mayday_cursor.entry); +/* * Leave this pool. Notify regular workers; otherwise, we end up * with 0 concurrency and stalling the execution.
@@ -5174,6 +5204,19 @@ static void init_pwq(struct pool_workqueue *pwq, struct workqueue_struct *wq,INIT_LIST_HEAD (&pwq->pwqs_node);INIT_LIST_HEAD (&pwq->mayday_node);kthread_init_work (&pwq->release_work, pwq_release_workfn); + +/* +* Set the dummy cursor work with valid function and get_work_pwq(). +* +* The cursor work should only be in the pwq->pool->worklist, and +* should not be treated as a processable work item. +* +* WORK_STRUCT_PENDING and WORK_STRUCT_INACTIVE just make it less +* surprise for kernel debugging tools and reviewers. +*/ +INIT_WORK (&pwq->mayday_cursor, mayday_cursor_func); +atomic_long_set (&pwq->mayday_cursor.data, (unsigned long )pwq | +WORK_STRUCT_PENDING |WORK_STRUCT_PWQ |WORK_STRUCT_INACTIVE ); }/* sync @pwq with the current state of its associated wq and link it */
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 177/641 drm/panthor: Fix panthor_gpu_coherency_set()
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Boris Brezillon <[email protected]>
[ Upstream commit 9beb8dca9e749e9983e70b22e9823e6fcd519f91 ]
GPU_COHERENCY_PROTOCOL takes one of GPU_COHERENCY_xx not BIT(GPU_COHERENCY_xx).
v3:
- New commit
v4:
- Add Steve's R-b
v5:
- No changes
v6:
- No changes
v7:
- No changes
v8:
- No changes
--- drivers/gpu/drm/panthor/panthor_gpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/gpu/drm/panthor/panthor_gpu.c +1 -1
@@ -49,7 +49,7 @@ struct panthor_gpu {static void panthor_gpu_coherency_set (struct panthor_device *ptdev) {gpu_write (ptdev,GPU_COHERENCY_PROTOCOL , - ptdev->coherent ?GPU_COHERENCY_PROT_BIT (ACE_LITE ) :GPU_COHERENCY_NONE ); + ptdev->coherent ?GPU_COHERENCY_ACE_LITE :GPU_COHERENCY_NONE ); }static void panthor_gpu_irq_handler (struct panthor_device *ptdev,u32 status)
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 178/641 accel/amdxdna: Fix race where send ring appears full due to delayed head update
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Lizhi Hou <[email protected]>
[ Upstream commit 343f5683cfa443000904c88ce2e23656375fc51c ]
The firmware sends a response and interrupts the driver before advancing the mailbox send ring head pointer. As a result, the driver may observe the response and attempt to send a new request before the firmware has updated the head pointer. In this window, the send ring still appears full, causing the driver to incorrectly fail the send operation.
This race can be triggered more easily in a multithreaded environment, leading to unexpected and spurious "send ring full" failures.
To address this, poll the send ring head pointer for up to 100us before returning a full-ring condition. This allows the firmware time to update the head pointer.
--- drivers/accel/amdxdna/amdxdna_mailbox.c | 27 +++++++++++++++---------- 1 file changed, 16 insertions(+), 11 deletions(-)
drivers/accel/amdxdna/amdxdna_mailbox.c +16 -11
@@ -206,26 +206,34 @@ mailbox_send_msg(struct mailbox_channel *mb_chann, struct mailbox_msg *mb_msg)u32 head, tail;u32 start_addr;u32 tmp_tail; +int ret; head =mailbox_get_headptr (mb_chann,CHAN_RES_X2I ); tail = mb_chann->x2i_tail; - ringbuf_size =mailbox_get_ringbuf_size (mb_chann,CHAN_RES_X2I ); + ringbuf_size =mailbox_get_ringbuf_size (mb_chann,CHAN_RES_X2I ) -sizeof (u32); start_addr = mb_chann->res[CHAN_RES_X2I ].rb_start_addr; tmp_tail = tail + mb_msg->pkg_size; -if (tail < head && tmp_tail >= head) - goto no_space; - -if (tail >= head && (tmp_tail > ringbuf_size -sizeof (u32) && - mb_msg->pkg_size >= head)) - goto no_space; -if (tail >= head && tmp_tail > ringbuf_size -sizeof (u32)) { +check_again: +if (tail >= head && tmp_tail > ringbuf_size) { write_addr = mb_chann->mb->res.ringbuf_base + start_addr + tail;writel (TOMBSTONE , write_addr);/* tombstone is set. Write from the start of the ringbuf */ tail =0 ; + tmp_tail = tail + mb_msg->pkg_size; + } + +if (tail < head && tmp_tail >= head) { + ret =read_poll_timeout (mailbox_get_headptr, head, + tmp_tail < head || tail >= head, +1 ,100 , false, mb_chann,CHAN_RES_X2I ); +if (ret) +return ret; + +if (tail >= head) + goto check_again; } write_addr = mb_chann->mb->res.ringbuf_base + start_addr + tail;
@@ -237,9 +245,6 @@ mailbox_send_msg(struct mailbox_channel *mb_chann, struct mailbox_msg *mb_msg) mb_msg->pkg.header.id);return 0 ; - -no_space: -return -ENOSPC ; } static int
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 179/641 drm/panel: sw43408: Remove manual invocation of unprepare at remove
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: David Heidelberg <[email protected]>
[ Upstream commit cbc1e99a9e0a6c8b22ddcbb40ca37457066f9493 ]
The drm_panel_remove should take care of disable/unprepare. Remove the manual call from the sw43408_remove function.
--- drivers/gpu/drm/panel/panel-lg-sw43408.c | 4 ---- 1 file changed, 4 deletions(-)
drivers/gpu/drm/panel/panel-lg-sw43408.c +0 -4
@@ -294,10 +294,6 @@ static void sw43408_remove(struct mipi_dsi_device *dsi)struct sw43408_panel *ctx =mipi_dsi_get_drvdata (dsi);int ret; - ret =sw43408_unprepare (&ctx->base); -if (ret <0 ) -dev_err (&dsi->dev,"failed to unprepare panel: %d\n" , ret); - ret =mipi_dsi_detach (dsi);if (ret <0 )dev_err (&dsi->dev,"failed to detach from DSI host: %d\n" , ret);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 180/641 ALSA: pcm: Relax __free() variable declarations
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Takashi Iwai <[email protected]>
[ Upstream commit f3d233daf011abbad2f6ebd0e545b42d2f378a4f ]
We used to have a variable declaration with __free() initialized with NULL. This was to keep the old coding style rule, but recently it's relaxed and rather recommends to follow the new rule to declare in place of use for __free() -- which avoids potential deadlocks or UAFs with nested cleanups.
Although the current code has no bug, per se, let's follow the new standard and move the declaration to the place of assignment (or directly assign the allocated result) instead of NULL initializations.
--- sound/core/pcm.c | 4 ++-- sound/core/pcm_compat.c | 9 ++++---- sound/core/pcm_native.c | 50 +++++++++++++++++++++-------------------- 3 files changed, 33 insertions(+), 30 deletions(-)
sound/core/pcm.c +2 -2
@@ -328,13 +328,13 @@ static const char *snd_pcm_oss_format_name(int format)static void snd_pcm_proc_info_read (struct snd_pcm_substream *substream,struct snd_info_buffer *buffer) { - struct snd_pcm_info *info __free(kfree) = NULL;int err;if (! substream)return ; - info =kmalloc (sizeof (*info),GFP_KERNEL ); + struct snd_pcm_info *info __free(kfree) = +kmalloc (sizeof (*info),GFP_KERNEL );if (!info)return ;
sound/core/pcm_compat.c +5 -4
@@ -235,7 +235,6 @@ static int snd_pcm_ioctl_hw_params_compat(struct snd_pcm_substream *substream,int refine, struct snd_pcm_hw_params32 __user *data32) { - struct snd_pcm_hw_params *data __free(kfree) = NULL; struct snd_pcm_runtime *runtime;int err;
@@ -243,7 +242,8 @@ static int snd_pcm_ioctl_hw_params_compat(struct snd_pcm_substream *substream,if (!runtime)return -ENOTTY ; - data =kmalloc (sizeof (*data),GFP_KERNEL ); + struct snd_pcm_hw_params *data __free(kfree) = +kmalloc (sizeof (*data),GFP_KERNEL );if (!data)return -ENOMEM ;
@@ -332,7 +332,6 @@ static int snd_pcm_ioctl_xfern_compat(struct snd_pcm_substream *substream,compat_caddr_t buf;compat_caddr_t __user *bufptr;u32 frames; - void __user **bufs __free(kfree) = NULL;int err, ch, i;if (! substream->runtime)
@@ -349,7 +348,9 @@ static int snd_pcm_ioctl_xfern_compat(struct snd_pcm_substream *substream, get_user(frames, &data32->frames))return -EFAULT ; bufptr =compat_ptr (buf); - bufs =kmalloc_array (ch,sizeof (void __user *),GFP_KERNEL ); + + void __user **bufs __free(kfree) = +kmalloc_array (ch,sizeof (void __user *),GFP_KERNEL );if (bufs ==NULL )return -ENOMEM ;for (i =0 ; i < ch; i++) {
sound/core/pcm_native.c +26 -24
156 lines not on this page · raw message
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 181/641 ALSA: vmaster: Relax __free() variable declarations
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Takashi Iwai <[email protected]>
[ Upstream commit 3b7c7bda39e1e48f926fb3d280a5f5d20a939857 ]
We used to have a variable declaration with __free() initialized with NULL. This was to keep the old coding style rule, but recently it's relaxed and rather recommends to follow the new rule to declare in place of use for __free() -- which avoids potential deadlocks or UAFs with nested cleanups.
Although the current code has no bug, per se, let's follow the new standard and move the declaration to the place of assignment (or directly assign the allocated result) instead of NULL initializations.
--- sound/core/vmaster.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)
sound/core/vmaster.c +6 -6
@@ -56,10 +56,10 @@ struct link_follower {static int follower_update (struct link_follower *follower) { - struct snd_ctl_elem_value *uctl __free(kfree) = NULL;int err, ch; + struct snd_ctl_elem_value *uctl __free(kfree) = +kzalloc (sizeof (*uctl),GFP_KERNEL ); - uctl =kzalloc (sizeof (*uctl),GFP_KERNEL );if (!uctl)return -ENOMEM ; uctl->id = follower->follower.id;
@@ -74,7 +74,6 @@ static int follower_update(struct link_follower *follower)/* get the follower ctl info and save the initial values */ static int follower_init (struct link_follower *follower) { - struct snd_ctl_elem_info *uinfo __free(kfree) = NULL;int err;if (follower->info.count) {
@@ -84,7 +83,8 @@ static int follower_init(struct link_follower *follower)return 0 ; } - uinfo =kmalloc (sizeof (*uinfo),GFP_KERNEL ); + struct snd_ctl_elem_info *uinfo __free(kfree) = +kmalloc (sizeof (*uinfo),GFP_KERNEL );if (!uinfo)return -ENOMEM ; uinfo->id = follower->follower.id;
@@ -341,9 +341,9 @@ static int master_get(struct snd_kcontrol *kcontrol,static int sync_followers (struct link_master *master,int old_val,int new_val) {struct link_follower *follower; - struct snd_ctl_elem_value *uval __free(kfree) = NULL; + struct snd_ctl_elem_value *uval __free(kfree) = +kmalloc (sizeof (*uval),GFP_KERNEL ); - uval =kmalloc (sizeof (*uval),GFP_KERNEL );if (!uval)return -ENOMEM ;list_for_each_entry (follower, &master->followers, list) {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 182/641 ASoC: SDCA: Allow sample width wild cards in set_usage()
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Simon Trimmer <[email protected]>
[ Upstream commit 87783532d34050e2bff6749a4fe9860e624a0540 ]
The SDCA spec allows the sample rate and width to be wild cards, but the current implementation of set_usage() only checked for a wild card of the sample rate.
--- sound/soc/sdca/sdca_asoc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
sound/soc/sdca/sdca_asoc.c +1 -1
@@ -1519,7 +1519,7 @@ static int set_usage(struct device *dev, struct regmap *regmap,unsigned int rate =sdca_range (range,SDCA_USAGE_SAMPLE_RATE , i);unsigned int width =sdca_range (range,SDCA_USAGE_SAMPLE_WIDTH , i); -if ((!rate || rate == target_rate) && width == target_width) { +if ((!rate || rate == target_rate) && (!width || width == target_width)) {unsigned int usage =sdca_range (range,SDCA_USAGE_NUMBER , i);unsigned int reg =SDW_SDCA_CTL (function->desc->adr, entity->id, sel,0 );
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 183/641 drm/panthor: Evict groups before VM termination
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Ketil Johnsen <[email protected]>
[ Upstream commit 565ed40b5fc1242f7538a016fce5a85f802d4fb5 ]
Ensure all related groups are evicted and suspended before VM destruction takes place.
This fixes an issue where panthor_vm_destroy() destroys and unmaps the heap context while there are still on slot groups using this. The FW will do a write out to the heap context when a CSG (group) is suspended, so a premature unmap of the heap context will cause a GPU page fault.
This page fault is quite harmless, and do not affect the continued operation of the GPU.
--- drivers/gpu/drm/panthor/panthor_mmu.c | 4 ++++ drivers/gpu/drm/panthor/panthor_sched.c | 14 ++++++++++++++ drivers/gpu/drm/panthor/panthor_sched.h | 1 + 3 files changed, 19 insertions(+)
drivers/gpu/drm/panthor/panthor_mmu.c +4 -0
@@ -1561,6 +1561,10 @@ static void panthor_vm_destroy(struct panthor_vm *vm) vm->destroyed = true; +/* Tell scheduler to stop all GPU work related to this VM */ +if (refcount_read (&vm->as.active_cnt) >0 ) +panthor_sched_prepare_for_vm_destruction (vm->ptdev); +mutex_lock (&vm->heaps.lock);panthor_heap_pool_destroy (vm->heaps.pool); vm->heaps.pool =NULL ;
drivers/gpu/drm/panthor/panthor_sched.c +14 -0
@@ -2707,6 +2707,20 @@ void panthor_sched_report_mmu_fault(struct panthor_device *ptdev)panthor_sched_immediate_tick (ptdev); } +void panthor_sched_prepare_for_vm_destruction (struct panthor_device *ptdev) +{ +/* FW can write out internal state, like the heap context, during CSG +* suspend. It is therefore important that the scheduler has fully +* evicted any pending and related groups before VM destruction can +* safely continue. Failure to do so can lead to GPU page faults. +* A controlled termination of a Panthor instance involves destroying +* the group(s) before the VM. This means any relevant group eviction +* has already been initiated by this point, and we just need to +* ensure that any pending tick_work() has been completed. +*/ +flush_work (&ptdev->scheduler->tick_work.work); +} +void panthor_sched_resume (struct panthor_device *ptdev) {/* Force a tick to re-evaluate after a resume. */
drivers/gpu/drm/panthor/panthor_sched.h +1 -0
@@ -49,6 +49,7 @@ void panthor_sched_suspend(struct panthor_device *ptdev);void panthor_sched_resume (struct panthor_device *ptdev);void panthor_sched_report_mmu_fault (struct panthor_device *ptdev); +void panthor_sched_prepare_for_vm_destruction (struct panthor_device *ptdev);void panthor_sched_report_fw_events (struct panthor_device *ptdev,u32 events);void panthor_fdinfo_gather_group_samples (struct panthor_file *pfile);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 184/641 smack: /smack/doi must be > 0
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Konstantin Andreev <[email protected]>
[ Upstream commit 19c013e1551bf51e1493da1270841d60e4fd3f15 ]
/smack/doi allows writing and keeping negative doi values. Correct values are 0 < doi <= (max 32-bit positive integer)
(2008-02-04, Casey Schaufler)
--- security/smack/smackfs.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-)
security/smack/smackfs.c +7 -5
@@ -141,7 +141,7 @@ struct smack_parsed_rule {int smk_access2; }; -static int smk_cipso_doi_value =SMACK_CIPSO_DOI_DEFAULT ; +static u32 smk_cipso_doi_value =SMACK_CIPSO_DOI_DEFAULT ;/* * Values for parsing cipso rules
@@ -1562,7 +1562,7 @@ static ssize_t smk_read_doi(struct file *filp, char __user *buf,if (*ppos !=0 )return 0 ; -sprintf (temp,"%d" , smk_cipso_doi_value); +sprintf (temp,"%lu" , (unsigned long )smk_cipso_doi_value); rc =simple_read_from_buffer (buf, count, ppos, temp,strlen (temp));return rc;
@@ -1581,7 +1581,7 @@ static ssize_t smk_write_doi(struct file *file, const char __user *buf, size_t count, loff_t *ppos) { char temp[80]; -int i; +unsigned long u;if (!smack_privileged (CAP_MAC_ADMIN ))return -EPERM ;
@@ -1594,10 +1594,12 @@ static ssize_t smk_write_doi(struct file *file, const char __user *buf, temp[count] ='\0' ; -if (sscanf (temp,"%d" , &i) !=1 ) +if (kstrtoul (temp,10 , &u))return -EINVAL ; - smk_cipso_doi_value = i; +if (u ==CIPSO_V4_DOI_UNKNOWN || u >U32_MAX ) +return -EINVAL ; + smk_cipso_doi_value = u;smk_cipso_doi ();
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 185/641 smack: /smack/doi: accept previously used values
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Konstantin Andreev <[email protected]>
[ Upstream commit 33d589ed60ae433b483761987b85e0d24e54584e ]
Writing to /smack/doi a value that has ever been written there in the past disables networking for non-ambient labels.
E.g.
# cat /smack/doi
3
# netlabelctl -p cipso list
Configured CIPSO mappings (1)
DOI value : 3
mapping type : PASS_THROUGH
# netlabelctl -p map list
Configured NetLabel domain mappings (3)
domain: "_" (IPv4)
protocol: UNLABELED
domain: DEFAULT (IPv4)
protocol: CIPSO, DOI = 3
domain: DEFAULT (IPv6)
protocol: UNLABELED # cat /smack/ambient
_
# cat /proc/$$/attr/smack/current
_
# ping -c1 10.1.95.12
64 bytes from 10.1.95.12: icmp_seq=1 ttl=64 time=0.964 ms
# echo foo >/proc/$$/attr/smack/current
# ping -c1 10.1.95.12
64 bytes from 10.1.95.12: icmp_seq=1 ttl=64 time=0.956 ms
unknown option 86 # echo 4 >/smack/doi
# echo 3 >/smack/doi
!> [ 214.050395] smk_cipso_doi:691 cipso add rc = -17
# echo 3 >/smack/doi
!> [ 249.402261] smk_cipso_doi:678 remove rc = -2
!> [ 249.402261] smk_cipso_doi:691 cipso add rc = -17# ping -c1 10.1.95.12 !!> ping: 10.1.95.12: Address family for hostname not supported
# echo _ >/proc/$$/attr/smack/current
# ping -c1 10.1.95.12
64 bytes from 10.1.95.12: icmp_seq=1 ttl=64 time=0.617 msThis happens because Smack keeps decommissioned DOIs, fails to re-add them, and consequently refuses to add the “default” domain map:
# netlabelctl -p cipso list
Configured CIPSO mappings (2)
DOI value : 3
mapping type : PASS_THROUGH
DOI value : 4
mapping type : PASS_THROUGH
# netlabelctl -p map list
Configured NetLabel domain mappings (2)
domain: "_" (IPv4)
protocol: UNLABELED
!> (no ipv4 map for default domain here)
domain: DEFAULT (IPv6)
protocol: UNLABELEDFix by clearing decommissioned DOI definitions and serializing concurrent DOI updates with a new lock.
Also:
- allow /smack/doi to live unconfigured, since adding a map (netlbl_cfg_cipsov4_map_add) may fail. CIPSO_V4_DOI_UNKNOWN(0) indicates the unconfigured DOI
- add new DOI before removing the old default map, so the old map remains if the add fails
(2008-02-04, Casey Schaufler)
--- security/smack/smackfs.c | 71 +++++++++++++++++++++++++--------------- 1 file changed, 45 insertions(+), 26 deletions(-)
security/smack/smackfs.c +45 -26
@@ -70,6 +70,7 @@ enum smk_inos {static DEFINE_MUTEX (smack_cipso_lock);static DEFINE_MUTEX (smack_ambient_lock);static DEFINE_MUTEX (smk_net4addr_lock); +static DEFINE_MUTEX (smk_cipso_doi_lock);#if IS_ENABLED (CONFIG_IPV6 )static DEFINE_MUTEX (smk_net6addr_lock);#endif /* CONFIG_IPV6 */
@@ -141,7 +142,7 @@ struct smack_parsed_rule {int smk_access2; }; -static u32 smk_cipso_doi_value =SMACK_CIPSO_DOI_DEFAULT ; +static u32 smk_cipso_doi_value =CIPSO_V4_DOI_UNKNOWN ;/* * Values for parsing cipso rules
@@ -663,43 +664,60 @@ static const struct file_operations smk_load_ops = { };/** -* smk_cipso_doi - initialize the CIPSO domain +* smk_cipso_doi - set netlabel maps +* @ndoi: new value for our CIPSO DOI +* @gfp_flags: kmalloc allocation context */ -static void smk_cipso_doi (void ) +static int +smk_cipso_doi (u32 ndoi,gfp_t gfp_flags) { -int rc; +int rc =0 ;struct cipso_v4_doi *doip;struct netlbl_audit nai; -smk_netlabel_audit_set (&nai); +mutex_lock (&smk_cipso_doi_lock); - rc =netlbl_cfg_map_del (NULL ,PF_INET ,NULL ,NULL , &nai); -if (rc !=0 ) -printk (KERN_WARNING "%s:%d remove rc = %d\n" , - __func__, __LINE__, rc); +if (smk_cipso_doi_value == ndoi) + goto clr_doi_lock; + +smk_netlabel_audit_set (&nai); - doip =kmalloc (sizeof (struct cipso_v4_doi ),GFP_KERNEL | __GFP_NOFAIL); + doip =kmalloc (sizeof (struct cipso_v4_doi ), gfp_flags); +if (!doip) { + rc = -ENOMEM ; + goto clr_doi_lock; + } doip->map.std =NULL ; - doip->doi = smk_cipso_doi_value; + doip->doi = ndoi; doip->type =CIPSO_V4_MAP_PASS ; doip->tags[0 ] =CIPSO_V4_TAG_RBITMAP ;for (rc =1 ; rc <CIPSO_V4_TAG_MAXCNT ; rc++) doip->tags[rc] =CIPSO_V4_TAG_INVALID ; rc =netlbl_cfg_cipsov4_add (doip, &nai); -if (rc !=0 ) { -printk (KERN_WARNING "%s:%d cipso add rc = %d\n" , - __func__, __LINE__, rc); +if (rc) {kfree (doip); -return ; + goto clr_doi_lock; } - rc =netlbl_cfg_cipsov4_map_add (doip->doi,NULL ,NULL ,NULL , &nai); -if (rc !=0 ) { -printk (KERN_WARNING "%s:%d map add rc = %d\n" , - __func__, __LINE__, rc); -netlbl_cfg_cipsov4_del (doip->doi, &nai); -return ; + +if (smk_cipso_doi_value !=CIPSO_V4_DOI_UNKNOWN ) { + rc =netlbl_cfg_map_del (NULL ,PF_INET ,NULL ,NULL , &nai); +if (rc && rc != -ENOENT ) + goto clr_ndoi_def; + +netlbl_cfg_cipsov4_del (smk_cipso_doi_value, &nai); } + + rc =netlbl_cfg_cipsov4_map_add (ndoi,NULL ,NULL ,NULL , &nai); +if (rc) { + smk_cipso_doi_value =CIPSO_V4_DOI_UNKNOWN ;// no default map +clr_ndoi_def:netlbl_cfg_cipsov4_del (ndoi, &nai); + }else + smk_cipso_doi_value = ndoi; + +clr_doi_lock: +mutex_unlock (&smk_cipso_doi_lock); +return rc; }/**
@@ -1599,11 +1617,8 @@ static ssize_t smk_write_doi(struct file *file, const char __user *buf,if (u ==CIPSO_V4_DOI_UNKNOWN || u >U32_MAX )return -EINVAL ; - smk_cipso_doi_value = u; - -smk_cipso_doi (); -return count; +return smk_cipso_doi (u,GFP_KERNEL ) ? : count; }static const struct file_operations smk_doi_ops = {
@@ -2984,6 +2999,7 @@ static int __init init_smk_fs(void) {int err;int rc; +struct netlbl_audit nai;if (smack_enabled ==0 )return 0 ;
@@ -3002,7 +3018,10 @@ static int __init init_smk_fs(void) } } -smk_cipso_doi (); +smk_netlabel_audit_set (&nai); + (void )netlbl_cfg_map_del (NULL ,PF_INET ,NULL ,NULL , &nai); + (void )smk_cipso_doi (SMACK_CIPSO_DOI_DEFAULT , +GFP_KERNEL | __GFP_NOFAIL);smk_unlbl_ambient (NULL ); rc =smack_populate_secattr (&smack_known_floor);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 186/641 ASoC: nau8821: Fixup nau8821_enable_jack_detect()
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Cristian Ciocaltea <[email protected]>
[ Upstream commit 70237853edf0a69773a7370eb74ea2a44dfe3050 ]
The nau8821_enable_jack_detect() function was supposed to allow enabling or disabling jack events reporting. However, once enabled, any subsequent invocation would fail and the following splat is shown:
[ 3136.996771] Hardware name: Valve Jupiter/Jupiter, BIOS F7A0131 01/30/2024 [ 3136.996773] Workqueue: events_unbound deferred_probe_work_func [ 3136.996780] Call Trace: [ 3136.996782] <TASK> [ 3136.996787] dump_stack_lvl+0x6e/0xa0 [ 3136.996796] __setup_irq.cold+0x9c/0xce [ 3136.996803] ? __pfx_irq_default_primary_handler+0x10/0x10 [ 3136.996812] ? __pfx_nau8821_interrupt+0x10/0x10 [snd_soc_nau8821] [ 3136.996825] request_threaded_irq+0xd9/0x160 [ 3136.996853] devm_request_threaded_irq+0x71/0xd0 [ 3136.996859] ? __pfx_nau8821_interrupt+0x10/0x10 [snd_soc_nau8821] [ 3136.996882] nau8821_enable_jack_detect+0xa5/0xc0 [snd_soc_nau8821] [ 3136.996901] acp5x_8821_init+0x8d/0xa0 [snd_soc_acp5x_mach] [ 3136.996917] snd_soc_link_init+0x25/0x50 [snd_soc_core] [ 3136.996958] snd_soc_bind_card+0x615/0xd00 [snd_soc_core] [ 3136.997026] snd_soc_register_card+0x1b2/0x1c0 [snd_soc_core] [ 3136.997064] devm_snd_soc_register_card+0x47/0x90 [snd_soc_core] [ 3136.997108] acp5x_probe+0x72/0xb0 [snd_soc_acp5x_mach] [...] [ 3136.997508] nau8821 i2c-NVTN2020:00: Cannot request irq 58 (-16)
Introduce jdet_active flag to driver data structure and use it to provide one-time initialization of the jack detection work queue and related interrupt line.
Note this is also a prerequisite for additional fixes around module unloading and suspend handling.
--- sound/soc/codecs/nau8821.c | 5 +++++ sound/soc/codecs/nau8821.h | 1 + 2 files changed, 6 insertions(+)
sound/soc/codecs/nau8821.c +5 -0
@@ -1661,8 +1661,13 @@ int nau8821_enable_jack_detect(struct snd_soc_component *component,int ret; nau8821->jack = jack; + +if (nau8821->jdet_active) +return 0 ; +/* Initiate jack detection work queue */ INIT_DELAYED_WORK (&nau8821->jdet_work, nau8821_jdet_work); + nau8821->jdet_active = true; ret = devm_request_threaded_irq(nau8821->dev, nau8821->irq, NULL, nau8821_interrupt, IRQF_TRIGGER_LOW | IRQF_ONESHOT,
sound/soc/codecs/nau8821.h +1 -0
@@ -562,6 +562,7 @@ struct nau8821 {struct snd_soc_dapm_context *dapm;struct snd_soc_jack *jack;struct delayed_work jdet_work; +bool jdet_active;int irq;int clk_id;int micbias_voltage;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 187/641 media: chips-media: wave5: Fix memory leak on codec_info allocation failure
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Zilin Guan <[email protected]>
[ Upstream commit a519e21e32398459ba357e67b541402f7295ee1b ]
In wave5_vpu_open_enc() and wave5_vpu_open_dec(), a vpu instance is allocated via kzalloc(). If the subsequent allocation for inst->codec_info fails, the functions return -ENOMEM without freeing the previously allocated instance, causing a memory leak.
Fix this by calling kfree() on the instance in this error path to ensure it is properly released.
--- drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c | 4 +++- drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c | 4 +++- 2 files changed, 6 insertions(+), 2 deletions(-)
drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c +3 -1
@@ -1753,8 +1753,10 @@ static int wave5_vpu_open_dec(struct file *filp)spin_lock_init (&inst->state_spinlock); inst->codec_info =kzalloc (sizeof (*inst->codec_info),GFP_KERNEL ); -if (!inst->codec_info) +if (!inst->codec_info) { +kfree (inst);return -ENOMEM ; + }v4l2_fh_init (&inst->v4l2_fh, vdev);v4l2_fh_add (&inst->v4l2_fh, filp);
drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c +3 -1
@@ -1578,8 +1578,10 @@ static int wave5_vpu_open_enc(struct file *filp) inst->ops = &wave5_vpu_enc_inst_ops; inst->codec_info =kzalloc (sizeof (*inst->codec_info),GFP_KERNEL ); -if (!inst->codec_info) +if (!inst->codec_info) { +kfree (inst);return -ENOMEM ; + }v4l2_fh_init (&inst->v4l2_fh, vdev);v4l2_fh_add (&inst->v4l2_fh, filp);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 188/641 drm/amd: Drop "amdgpu kernel modesetting enabled" message
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Mario Limonciello (AMD) <[email protected]>
[ Upstream commit 8644084a74a4573278d6f454c6638ccd5965f4e2 ]
The behavior for amdgpu was changed with commit e00e5c223878 ("drm/amdgpu: adjust drm_firmware_drivers_only() handling") to potentially allow loading even if nomodeset was set, so the message is no longer accurate.
Just drop it to avoid confusion.
--- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 - 1 file changed, 1 deletion(-)
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +0 -1
@@ -3155,7 +3155,6 @@ static int __init amdgpu_init(void)if (r) goto error_fence; -DRM_INFO ("amdgpu kernel modesetting enabled.\n" );amdgpu_register_atpx_handler ();amdgpu_acpi_detect ();
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 189/641 drm/amdkfd: Fix signal_eviction_fence() bool return value
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Srinivasan Shanmugam <[email protected]>
[ Upstream commit 31dc58adda9874420ab8fa5a2f9c43377745753a ]
signal_eviction_fence() is declared to return bool, but returns -EINVAL when no eviction fence is present. This makes the "no fence" or "the NULL-fence" path evaluate to true and triggers a Smatch warning.
v2: Return true instead to explicitly indicate that there is no eviction fence to signal and that eviction is already complete. This matches the existing caller logic where a NULL fence means "nothing to do" and allows restore handling to proceed normally. (Christian)
Fixes the below:drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_process.c:2099 signal_eviction_fence()
warn: '(-22)' is not bool
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_process.c
2090 static bool signal_eviction_fence(struct kfd_process *p)
^^^^
2091 {
2092 struct dma_fence *ef;
2093 bool ret;
2094
2095 rcu_read_lock();
2096 ef = dma_fence_get_rcu_safe(&p->ef);
2097 rcu_read_unlock();
2098 if (!ef)--> 2099 return -EINVAL;
This should be either true or false.
Probably true because presumably
it has been tested?
2100
2101 ret = dma_fence_check_and_signal(ef);
2102 dma_fence_put(ef);
2103
2104 return ret;
2105 }Reported by: Dan Carpenter <[email protected]>
--- drivers/gpu/drm/amd/amdkfd/kfd_process.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/gpu/drm/amd/amdkfd/kfd_process.c +1 -1
@@ -1992,7 +1992,7 @@ static int signal_eviction_fence(struct kfd_process *p) ef =dma_fence_get_rcu_safe (&p->ef);rcu_read_unlock ();if (!ef) -return -EINVAL ; +return true; ret =dma_fence_signal (ef);dma_fence_put (ef);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 190/641 drm/amdgpu: Use explicit VCN instance 0 in SR-IOV init
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Srinivasan Shanmugam <[email protected]>
[ Upstream commit af26fa751c2eef66916acbf0d3c3e9159da56186 ]
vcn_v2_0_start_sriov() declares a local variable "i" initialized to zero and uses it only as the instance index in SOC15_REG_OFFSET(UVD, i, ...). The value is never changed and all other fields are taken from adev->vcn.inst[0], so this path only ever programs VCN instance 0.
This triggered a Smatch:
warn: iterator 'i' not incremented
Replace the dummy iterator with an explicit instance index of 0 in SOC15_REG_OFFSET() calls.
Reported by: Dan Carpenter <[email protected]>
--- drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 45 ++++++++++++++------------- 1 file changed, 23 insertions(+), 22 deletions(-)
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c +23 -22
@@ -1964,7 +1964,8 @@ static int vcn_v2_0_start_sriov(struct amdgpu_device *adev)struct mmsch_v2_0_cmd_end end = { {0 } };struct mmsch_v2_0_init_header *header;uint32_t *init_table = adev->virt.mm_table.cpu_addr; -uint8_t i =0 ; + +/* This path only programs VCN instance 0. */ header = (struct mmsch_v2_0_init_header *)init_table; direct_wt.cmd_header.command_type =MMSCH_COMMAND__DIRECT_REG_WRITE ;
@@ -1983,93 +1984,93 @@ static int vcn_v2_0_start_sriov(struct amdgpu_device *adev) size =AMDGPU_GPU_PAGE_ALIGN (adev->vcn.inst[0 ].fw->size +4 );MMSCH_V2_0_INSERT_DIRECT_RD_MOD_WT ( -SOC15_REG_OFFSET (UVD , i, mmUVD_STATUS), +SOC15_REG_OFFSET (UVD ,0 , mmUVD_STATUS),0xFFFFFFFF ,0x00000004 );/* mc resume*/ if (adev->firmware.load_type ==AMDGPU_FW_LOAD_PSP ) {MMSCH_V2_0_INSERT_DIRECT_WT ( -SOC15_REG_OFFSET (UVD , i, +SOC15_REG_OFFSET (UVD ,0 , mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW), adev->firmware.ucode[AMDGPU_UCODE_ID_VCN ].tmr_mc_addr_lo);MMSCH_V2_0_INSERT_DIRECT_WT ( -SOC15_REG_OFFSET (UVD , i, +SOC15_REG_OFFSET (UVD ,0 , mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), adev->firmware.ucode[AMDGPU_UCODE_ID_VCN ].tmr_mc_addr_hi); offset =0 ; }else {MMSCH_V2_0_INSERT_DIRECT_WT ( -SOC15_REG_OFFSET (UVD , i, +SOC15_REG_OFFSET (UVD ,0 , mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW),lower_32_bits (adev->vcn.inst->gpu_addr));MMSCH_V2_0_INSERT_DIRECT_WT ( -SOC15_REG_OFFSET (UVD , i, +SOC15_REG_OFFSET (UVD ,0 , mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH),upper_32_bits (adev->vcn.inst->gpu_addr)); offset = size; }MMSCH_V2_0_INSERT_DIRECT_WT ( -SOC15_REG_OFFSET (UVD , i, mmUVD_VCPU_CACHE_OFFSET0), +SOC15_REG_OFFSET (UVD ,0 , mmUVD_VCPU_CACHE_OFFSET0),0 );MMSCH_V2_0_INSERT_DIRECT_WT ( -SOC15_REG_OFFSET (UVD , i, mmUVD_VCPU_CACHE_SIZE0), +SOC15_REG_OFFSET (UVD ,0 , mmUVD_VCPU_CACHE_SIZE0), size);MMSCH_V2_0_INSERT_DIRECT_WT ( -SOC15_REG_OFFSET (UVD , i, +SOC15_REG_OFFSET (UVD ,0 , mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW),lower_32_bits (adev->vcn.inst->gpu_addr + offset));MMSCH_V2_0_INSERT_DIRECT_WT ( -SOC15_REG_OFFSET (UVD , i, +SOC15_REG_OFFSET (UVD ,0 , mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH),upper_32_bits (adev->vcn.inst->gpu_addr + offset));MMSCH_V2_0_INSERT_DIRECT_WT ( -SOC15_REG_OFFSET (UVD , i, mmUVD_VCPU_CACHE_OFFSET1), +SOC15_REG_OFFSET (UVD ,0 , mmUVD_VCPU_CACHE_OFFSET1),0 );MMSCH_V2_0_INSERT_DIRECT_WT ( -SOC15_REG_OFFSET (UVD , i, mmUVD_VCPU_CACHE_SIZE1), +SOC15_REG_OFFSET (UVD ,0 , mmUVD_VCPU_CACHE_SIZE1),AMDGPU_VCN_STACK_SIZE );MMSCH_V2_0_INSERT_DIRECT_WT ( -SOC15_REG_OFFSET (UVD , i, +SOC15_REG_OFFSET (UVD ,0 , mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_LOW),lower_32_bits (adev->vcn.inst->gpu_addr + offset +AMDGPU_VCN_STACK_SIZE ));MMSCH_V2_0_INSERT_DIRECT_WT ( -SOC15_REG_OFFSET (UVD , i, +SOC15_REG_OFFSET (UVD ,0 , mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH),upper_32_bits (adev->vcn.inst->gpu_addr + offset +AMDGPU_VCN_STACK_SIZE ));MMSCH_V2_0_INSERT_DIRECT_WT ( -SOC15_REG_OFFSET (UVD , i, mmUVD_VCPU_CACHE_OFFSET2), +SOC15_REG_OFFSET (UVD ,0 , mmUVD_VCPU_CACHE_OFFSET2),0 );MMSCH_V2_0_INSERT_DIRECT_WT ( -SOC15_REG_OFFSET (UVD , i, mmUVD_VCPU_CACHE_SIZE2), +SOC15_REG_OFFSET (UVD ,0 , mmUVD_VCPU_CACHE_SIZE2),AMDGPU_VCN_CONTEXT_SIZE );for (r =0 ; r < adev->vcn.inst[0 ].num_enc_rings; ++r) { ring = &adev->vcn.inst->ring_enc[r]; ring->wptr =0 ;MMSCH_V2_0_INSERT_DIRECT_WT ( -SOC15_REG_OFFSET (UVD , i, mmUVD_RB_BASE_LO), +SOC15_REG_OFFSET (UVD ,0 , mmUVD_RB_BASE_LO),lower_32_bits (ring->gpu_addr));MMSCH_V2_0_INSERT_DIRECT_WT ( -SOC15_REG_OFFSET (UVD , i, mmUVD_RB_BASE_HI), +SOC15_REG_OFFSET (UVD ,0 , mmUVD_RB_BASE_HI),upper_32_bits (ring->gpu_addr));MMSCH_V2_0_INSERT_DIRECT_WT ( -SOC15_REG_OFFSET (UVD , i, mmUVD_RB_SIZE), +SOC15_REG_OFFSET (UVD ,0 , mmUVD_RB_SIZE), ring->ring_size /4 ); } ring = &adev->vcn.inst->ring_dec; ring->wptr =0 ;MMSCH_V2_0_INSERT_DIRECT_WT ( -SOC15_REG_OFFSET (UVD , i, +SOC15_REG_OFFSET (UVD ,0 , mmUVD_LMI_RBC_RB_64BIT_BAR_LOW),lower_32_bits (ring->gpu_addr));MMSCH_V2_0_INSERT_DIRECT_WT ( -SOC15_REG_OFFSET (UVD , i, +SOC15_REG_OFFSET (UVD ,0 , mmUVD_LMI_RBC_RB_64BIT_BAR_HIGH),upper_32_bits (ring->gpu_addr));/* force RBC into idle state */
@@ -2080,7 +2081,7 @@ static int vcn_v2_0_start_sriov(struct amdgpu_device *adev) tmp =REG_SET_FIELD (tmp,UVD_RBC_RB_CNTL ,RB_NO_UPDATE ,1 ); tmp =REG_SET_FIELD (tmp,UVD_RBC_RB_CNTL ,RB_RPTR_WR_EN ,1 );MMSCH_V2_0_INSERT_DIRECT_WT ( -SOC15_REG_OFFSET (UVD , i, mmUVD_RBC_RB_CNTL), tmp); +SOC15_REG_OFFSET (UVD ,0 , mmUVD_RBC_RB_CNTL), tmp);/* add end packet */ tmp =sizeof (struct mmsch_v2_0_cmd_end );
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 191/641 drm/msm/disp/dpu: add merge3d support for sc7280
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Mahadevan P <[email protected]>
[ Upstream commit 2892de3f4f985fa779c330468e2f341fdb762ccd ]
On SC7280 targets, display modes with a width greater than the max_mixer_width (2400) are rejected during mode validation when merge3d is disabled. This limitation exists because, without a 3D merge block, two layer mixers cannot be combined(non-DSC interface), preventing large layers from being split across mixers. As a result, higher resolution modes cannot be supported.
Enable merge3d support on SC7280 to allow combining streams from two layer mixers into a single non-DSC interface. This capability removes the width restriction and enables buffer sizes beyond the 2400-pixel limit.
Patchwork: https://patchwork.freedesktop.org/patch/696713/
--- .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-)
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h +12 -2
@@ -13,6 +13,7 @@ static const struct dpu_caps sc7280_dpu_caps = { .has_dim_layer = true, .has_idle_pc = true, .max_linewidth = 2400, + .has_3d_merge = true, .pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE, };
@@ -134,17 +135,24 @@ static const struct dpu_pingpong_cfg sc7280_pp[] = { .name = "pingpong_2", .id = PINGPONG_2, .base = 0x6b000, .len = 0, .sblk = &sc7280_pp_sblk, - .merge_3d = 0, + .merge_3d = MERGE_3D_1, .intr_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10), }, { .name = "pingpong_3", .id = PINGPONG_3, .base = 0x6c000, .len = 0, .sblk = &sc7280_pp_sblk, - .merge_3d = 0, + .merge_3d = MERGE_3D_1, .intr_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11), }, }; +static const struct dpu_merge_3d_cfg sc7280_merge_3d[] = { + { + .name ="merge_3d_1" , .id =MERGE_3D_1 , + .base =0x4f000 , .len =0x8 , + }, +}; +/* NOTE: sc7280 only has one DSC hard slice encoder */ static const struct dpu_dsc_cfg sc7280_dsc[] = { {
@@ -247,6 +255,8 @@ const struct dpu_mdss_cfg dpu_sc7280_cfg = { .mixer = sc7280_lm, .pingpong_count = ARRAY_SIZE(sc7280_pp), .pingpong = sc7280_pp, + .merge_3d_count = ARRAY_SIZE(sc7280_merge_3d), + .merge_3d = sc7280_merge_3d, .dsc_count = ARRAY_SIZE(sc7280_dsc), .dsc = sc7280_dsc, .wb_count = ARRAY_SIZE(sc7280_wb),
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 192/641 drm/msm/dpu: Set vsync source irrespective of mdp top support
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Teguh Sobirin <[email protected]>
[ Upstream commit 1ad9880f059c9b0943e53714f9a59924cb035bbb ]
Since DPU 5.x the vsync source TE setup is split between MDP TOP and INTF blocks. Currently all code to setup vsync_source is only executed if MDP TOP implements the setup_vsync_source() callback. However on DPU >= 8.x this callback is not implemented, making DPU driver skip all vsync setup. Move the INTF part out of this condition, letting DPU driver to setup TE vsync selection on all new DPU devices.
Patchwork: https://patchwork.freedesktop.org/patch/696584/
--- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +8 -8
@@ -784,6 +784,8 @@ static void _dpu_encoder_update_vsync_source(struct dpu_encoder_virt *dpu_enc,return ; } + vsync_cfg.vsync_source = disp_info->vsync_source; +if (hw_mdptop->ops.setup_vsync_source) {for (i =0 ; i < dpu_enc->num_phys_encs; i++) vsync_cfg.ppnumber[i] = dpu_enc->hw_pp[i]->idx;
@@ -791,17 +793,15 @@ static void _dpu_encoder_update_vsync_source(struct dpu_encoder_virt *dpu_enc, vsync_cfg.pp_count = dpu_enc->num_phys_encs; vsync_cfg.frame_rate =drm_mode_vrefresh (&dpu_enc->base.crtc->state->adjusted_mode); - vsync_cfg.vsync_source = disp_info->vsync_source; - hw_mdptop->ops.setup_vsync_source (hw_mdptop, &vsync_cfg); + } -for (i =0 ; i < dpu_enc->num_phys_encs; i++) { - phys_enc = dpu_enc->phys_encs[i]; +for (i =0 ; i < dpu_enc->num_phys_encs; i++) { + phys_enc = dpu_enc->phys_encs[i]; -if (phys_enc->has_intf_te && phys_enc->hw_intf->ops.vsync_sel) - phys_enc->hw_intf->ops.vsync_sel (phys_enc->hw_intf, - vsync_cfg.vsync_source); - } +if (phys_enc->has_intf_te && phys_enc->hw_intf->ops.vsync_sel) + phys_enc->hw_intf->ops.vsync_sel (phys_enc->hw_intf, + vsync_cfg.vsync_source); } }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 193/641 drm/msm/dpu: fix WD timer handling on DPU 8.x
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dmitry Baryshkov <[email protected]>
[ Upstream commit 794b0e68caba49b950b42ec32e364028c2facf57 ]
Since DPU 8.x Watchdog timer settings were moved from the TOP to the INTF block. Support programming the timer in the INTF block. Fixes tag points to the commit which removed register access to those registers on DPU 8.x+ (and which also should have added proper support for WD timer on those devices).
Patchwork: https://patchwork.freedesktop.org/patch/696586/
--- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 49 +++++++++++++++++++-- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 3 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 7 --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h | 7 +++ 5 files changed, 57 insertions(+), 13 deletions(-)
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +2 -2
@@ -785,13 +785,13 @@ static void _dpu_encoder_update_vsync_source(struct dpu_encoder_virt *dpu_enc, } vsync_cfg.vsync_source = disp_info->vsync_source; + vsync_cfg.frame_rate =drm_mode_vrefresh (&dpu_enc->base.crtc->state->adjusted_mode);if (hw_mdptop->ops.setup_vsync_source) {for (i =0 ; i < dpu_enc->num_phys_encs; i++) vsync_cfg.ppnumber[i] = dpu_enc->hw_pp[i]->idx; vsync_cfg.pp_count = dpu_enc->num_phys_encs; - vsync_cfg.frame_rate =drm_mode_vrefresh (&dpu_enc->base.crtc->state->adjusted_mode); hw_mdptop->ops.setup_vsync_source (hw_mdptop, &vsync_cfg); }
@@ -801,7 +801,7 @@ static void _dpu_encoder_update_vsync_source(struct dpu_encoder_virt *dpu_enc,if (phys_enc->has_intf_te && phys_enc->hw_intf->ops.vsync_sel) phys_enc->hw_intf->ops.vsync_sel (phys_enc->hw_intf, - vsync_cfg.vsync_source); + &vsync_cfg); } }
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c +46 -3
73 lines not on this page · raw message
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h +2 -1
@@ -12,6 +12,7 @@#include "dpu_hw_util.h" struct dpu_hw_intf ; +struct dpu_vsync_source_cfg ;/* intf timing settings */ struct dpu_hw_intf_timing_params {
@@ -107,7 +108,7 @@ struct dpu_hw_intf_ops {int (*connect_external_te)(struct dpu_hw_intf *intf,bool enable_external_te); -void (*vsync_sel)(struct dpu_hw_intf *intf,enum dpu_vsync_source vsync_source); +void (*vsync_sel)(struct dpu_hw_intf *intf,struct dpu_vsync_source_cfg *cfg);/** * Disable autorefresh if enabled
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c +0 -7
@@ -22,13 +22,6 @@#define TRAFFIC_SHAPER_WR_CLIENT (num) (0x060 + (num * 4))#define TRAFFIC_SHAPER_FIXPOINT_FACTOR 4 -#define MDP_TICK_COUNT 16 -#define XO_CLK_RATE 19200 -#define MS_TICKS_IN_SEC 1000 - -#define CALCULATE_WD_LOAD_VALUE (fps) \ - ((uint32_t)((MS_TICKS_IN_SEC * XO_CLK_RATE)/(MDP_TICK_COUNT * fps))) -static void dpu_hw_setup_split_pipe (struct dpu_hw_mdp *mdp,struct split_pipe_cfg *cfg) {
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h +7 -0
@@ -21,6 +21,13 @@#define TO_S15D16 (_x_)((_x_) << 7) +#define MDP_TICK_COUNT 16 +#define XO_CLK_RATE 19200 +#define MS_TICKS_IN_SEC 1000 + +#define CALCULATE_WD_LOAD_VALUE (fps) \ + ((uint32_t)((MS_TICKS_IN_SEC * XO_CLK_RATE)/(MDP_TICK_COUNT * fps))) +extern const struct dpu_csc_cfg dpu_csc_YUV2RGB_601L;extern const struct dpu_csc_cfg dpu_csc10_YUV2RGB_601L;extern const struct dpu_csc_cfg dpu_csc10_rgb2yuv_601l;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 194/641 drm/msm/dp: Update msm_dp_controller IDs for sa8775p
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Mani Chandana Ballary Kuntumalla <[email protected]>
[ Upstream commit 1338e8ae4084e55c0359a79e617b2ae183d01579 ]
The Qualcomm SA8775P platform comes with 2 DisplayPort controllers for each mdss. Update controller id for DPTX0 and DPTX1 of mdss1.
Patchwork: https://patchwork.freedesktop.org/patch/690234/
--- drivers/gpu/drm/msm/dp/dp_display.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/gpu/drm/msm/dp/dp_display.c +2 -2
@@ -133,8 +133,8 @@ struct msm_dp_desc {static const struct msm_dp_desc msm_dp_desc_sa8775p[] = { { .io_start =0x0af54000 , .id =MSM_DP_CONTROLLER_0 , .wide_bus_supported = true }, { .io_start =0x0af5c000 , .id =MSM_DP_CONTROLLER_1 , .wide_bus_supported = true }, - { .io_start =0x22154000 , .id =MSM_DP_CONTROLLER_2 , .wide_bus_supported = true }, - { .io_start =0x2215c000 , .id =MSM_DP_CONTROLLER_3 , .wide_bus_supported = true }, + { .io_start =0x22154000 , .id =MSM_DP_CONTROLLER_0 , .wide_bus_supported = true }, + { .io_start =0x2215c000 , .id =MSM_DP_CONTROLLER_1 , .wide_bus_supported = true }, {} };
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 195/641 mei: late_bind: fix struct intel_lb_component_ops kernel-doc
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jani Nikula <[email protected]>
[ Upstream commit 936cae9254e55a39aeaa0c156a764d22f319338b ]
Fix kernel-doc warnings on struct intel_lb_component_ops:
Warning: include/drm/intel/intel_lb_mei_interface.h:55 Incorrect use of
kernel-doc format: * push_payload - Sends a payload to the authentication firmware
And a bunch more. There isn't really support for documenting function pointer struct members in kernel-doc, but at least reference the member properly.
--- include/drm/intel/intel_lb_mei_interface.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
include/drm/intel/intel_lb_mei_interface.h +2 -1
@@ -53,7 +53,8 @@ enum intel_lb_status {*/ struct intel_lb_component_ops {/** -* push_payload - Sends a payload to the authentication firmware +* @push_payload: Sends a payload to the authentication firmware +* * @dev: Device struct corresponding to the mei device * @type: Payload type (see &enum intel_lb_type) * @flags: Payload flags bitmap (e.g. %INTEL_LB_FLAGS_IS_PERSISTENT)
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 196/641 regulator: core: move supply check earlier in set_machine_constraints()
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: André Draszik <[email protected]>
[ Upstream commit 86a8eeb0e913f4b6a55dabba5122098d4e805e55 ]
Since commit 98e48cd9283d ("regulator: core: resolve supply for boot-on/always-on regulators"), set_machine_constraints() can return -EPROBE_DEFER very late, after it has done a lot of work and configuration of the regulator.
This means that configuration will happen multiple times for no benefit in that case. Furthermore, this can lead to timing-dependent voltage glitches as mentioned e.g. in commit 8a866d527ac0 ("regulator:
core: Resolve supply name earlier to prevent double-init").
We can know that it's going to fail very early, in particular before going through the complete regulator configuration by moving some code around a little.
Do so to avoid re-configuring the regulator multiple times, also avoiding the voltage glitches if we can.
--- drivers/regulator/core.c | 55 ++++++++++++++++++++++------------------ 1 file changed, 30 insertions(+), 25 deletions(-)
drivers/regulator/core.c +30 -25
@@ -1431,6 +1431,33 @@ static int set_machine_constraints(struct regulator_dev *rdev)int ret =0 ;const struct regulator_ops *ops = rdev->desc->ops; +/* +* If there is no mechanism for controlling the regulator then +* flag it as always_on so we don't end up duplicating checks +* for this so much. Note that we could control the state of +* a supply to control the output on a regulator that has no +* direct control. +*/ +if (!rdev->ena_pin && !ops->enable) { +if (rdev->supply_name && !rdev->supply) +return -EPROBE_DEFER ; + +if (rdev->supply) + rdev->constraints->always_on = + rdev->supply->rdev->constraints->always_on; +else + rdev->constraints->always_on = true; + } + +/* +* If we want to enable this regulator, make sure that we know the +* supplying regulator. +*/ +if (rdev->constraints->always_on || rdev->constraints->boot_on) { +if (rdev->supply_name && !rdev->supply) +return -EPROBE_DEFER ; + } + ret =machine_constraints_voltage (rdev, rdev->constraints);if (ret !=0 )return ret;
@@ -1596,37 +1623,15 @@ static int set_machine_constraints(struct regulator_dev *rdev) } } -/* -* If there is no mechanism for controlling the regulator then -* flag it as always_on so we don't end up duplicating checks -* for this so much. Note that we could control the state of -* a supply to control the output on a regulator that has no -* direct control. -*/ -if (!rdev->ena_pin && !ops->enable) { -if (rdev->supply_name && !rdev->supply) -return -EPROBE_DEFER ; - -if (rdev->supply) - rdev->constraints->always_on = - rdev->supply->rdev->constraints->always_on; -else - rdev->constraints->always_on = true; - } -/* If the constraints say the regulator should be on at this point * and we have control then make sure it is enabled. */ if (rdev->constraints->always_on || rdev->constraints->boot_on) {bool supply_enabled = false; -/* If we want to enable this regulator, make sure that we know -* the supplying regulator. -*/ -if (rdev->supply_name && !rdev->supply) -return -EPROBE_DEFER ; - -/* If supplying regulator has already been enabled, +/* We have ensured a potential supply has been resolved above. +* +* If supplying regulator has already been enabled, * it's not intended to have use_count increment * when rdev is only boot-on. */
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 197/641 HID: playstation: Add missing check for input_ff_create_memless
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Haotian Zhang <[email protected]>
[ Upstream commit e6807641ac94e832988655a1c0e60ccc806b76dc ]
The ps_gamepad_create() function calls input_ff_create_memless() without verifying its return value, which can lead to incorrect behavior or potential crashes when FF effects are triggered.
Add a check for the return value of input_ff_create_memless().
--- drivers/hid/hid-playstation.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
drivers/hid/hid-playstation.c +3 -1
@@ -774,7 +774,9 @@ ps_gamepad_create(struct hid_device *hdev,#if IS_ENABLED (CONFIG_PLAYSTATION_FF )if (play_effect) {input_set_capability (gamepad,EV_FF ,FF_RUMBLE ); -input_ff_create_memless (gamepad,NULL , play_effect); + ret =input_ff_create_memless (gamepad,NULL , play_effect); +if (ret) +return ERR_PTR (ret); }#endif
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 198/641 drm/msm/disp: set num_planes to 1 for interleaved YUV formats
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dmitry Baryshkov <[email protected]>
[ Upstream commit 6421e1c5075b7e1536a8fcbe6b4086db07103048 ]
Interleaved YUV formats use only one plane for all pixel data. Specify num_planes = 1 for those formats. This was left unnoticed since _dpu_format_populate_plane_sizes_linear() overrides layout->num_planes.
Patchwork: https://patchwork.freedesktop.org/patch/688162/
--- drivers/gpu/drm/msm/disp/mdp_format.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
drivers/gpu/drm/msm/disp/mdp_format.c +4 -4
@@ -479,25 +479,25 @@ static const struct msm_format mdp_formats[] = { 0, BPC8, BPC8, BPC8, C2_R_Cr, C0_G_Y, C1_B_Cb, C0_G_Y, false, CHROMA_H2V1, 4, 2, MSM_FORMAT_FLAG_YUV, - MDP_FETCH_LINEAR, 2), + MDP_FETCH_LINEAR, 1),INTERLEAVED_YUV_FMT (UYVY ,0 ,BPC8 ,BPC8 ,BPC8 , C1_B_Cb,C0_G_Y , C2_R_Cr,C0_G_Y , false,CHROMA_H2V1 ,4 ,2 ,MSM_FORMAT_FLAG_YUV , -MDP_FETCH_LINEAR ,2 ), +MDP_FETCH_LINEAR ,1 ),INTERLEAVED_YUV_FMT (YUYV ,0 ,BPC8 ,BPC8 ,BPC8 ,C0_G_Y , C1_B_Cb,C0_G_Y , C2_R_Cr, false,CHROMA_H2V1 ,4 ,2 ,MSM_FORMAT_FLAG_YUV , -MDP_FETCH_LINEAR ,2 ), +MDP_FETCH_LINEAR ,1 ),INTERLEAVED_YUV_FMT (YVYU ,0 ,BPC8 ,BPC8 ,BPC8 ,C0_G_Y , C2_R_Cr,C0_G_Y , C1_B_Cb, false,CHROMA_H2V1 ,4 ,2 ,MSM_FORMAT_FLAG_YUV , -MDP_FETCH_LINEAR ,2 ), +MDP_FETCH_LINEAR ,1 ),/* 3 plane YUV */ PLANAR_YUV_FMT(YUV420,
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 199/641 drm/msm/dpu: fix CMD panels on DPU 1.x - 3.x
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dmitry Baryshkov <[email protected]>
[ Upstream commit 59ca3d11f5311d9167015fe4f431701614ae0048 ]
DPU units before 4.x don't have a separate CTL_START IRQ to mark the begin of the data transfer. In such a case, wait for the frame transfer to complete rather than trying to wait for the CTL_START interrupt (and obviously hitting the timeout).
Patchwork: https://patchwork.freedesktop.org/patch/696490/
--- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c +4 -3
@@ -681,10 +681,11 @@ static int dpu_encoder_phys_cmd_wait_for_commit_done(if (!dpu_encoder_phys_cmd_is_master (phys_enc))return 0 ; -if (phys_enc->hw_ctl->ops.is_started (phys_enc->hw_ctl)) -return dpu_encoder_phys_cmd_wait_for_tx_complete (phys_enc); +if (phys_enc->irq[INTR_IDX_CTL_START ] && + !phys_enc->hw_ctl->ops.is_started (phys_enc->hw_ctl)) +return _dpu_encoder_phys_cmd_wait_for_ctl_start (phys_enc); -return _dpu_encoder_phys_cmd_wait_for_ctl_start (phys_enc); +return dpu_encoder_phys_cmd_wait_for_tx_complete (phys_enc); } static void dpu_encoder_phys_cmd_handle_post_kickoff(
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 200/641 drm/msm/dsi_phy_14nm: convert from divider_round_rate() to divider_determine_rate()
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Brian Masney <[email protected]>
[ Upstream commit 1d232f793d4dbffd329ad48b52954d4c8ca24db5 ]
The divider_round_rate() function is now deprecated, so let's migrate to divider_determine_rate() instead so that this deprecated API can be removed.
Note that when the main function itself was migrated to use determine_rate, this was mistakenly converted to:
req->rate = divider_round_rate(...)
This is invalid in the case when an error occurs since it can set the rate to a negative value.
Patchwork: https://patchwork.freedesktop.org/patch/697613/
--- drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-)
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c +1 -6
@@ -628,12 +628,7 @@ static int dsi_pll_14nm_postdiv_determine_rate(struct clk_hw *hw,DBG ("DSI%d PLL parent rate=%lu" , pll_14nm->phy->id, req->rate); - req->rate =divider_round_rate (hw, req->rate, &req->best_parent_rate, -NULL , - postdiv->width, - postdiv->flags); - -return 0 ; +return divider_determine_rate (hw, req,NULL , postdiv->width, postdiv->flags); } static int dsi_pll_14nm_postdiv_set_rate(struct clk_hw *hw, unsigned long rate,
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 201/641 accel/amdxdna: Fix notifier_wq flushing warning
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Lizhi Hou <[email protected]>
[ Upstream commit b36178488d479e9a53bbef2b01280378b5586e60 ]
Create notifier_wq with WQ_MEM_RECLAIM flag to fix the possible warning.
workqueue: WQ_MEM_RECLAIM amdxdna_js:drm_sched_free_job_work [gpu_sched] is flushing !WQ_MEM_RECLAIM notifier_wq:0x0
--- drivers/accel/amdxdna/amdxdna_pci_drv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/accel/amdxdna/amdxdna_pci_drv.c +1 -1
@@ -292,7 +292,7 @@ static int amdxdna_probe(struct pci_dev *pdev, const struct pci_device_id *id)fs_reclaim_release (GFP_KERNEL ); } - xdna->notifier_wq =alloc_ordered_workqueue ("notifier_wq" ,0 ); + xdna->notifier_wq =alloc_ordered_workqueue ("notifier_wq" ,WQ_MEM_RECLAIM );if (!xdna->notifier_wq)return -ENOMEM ;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 202/641 media: ccs: Accommodate C-PHY into the calculation
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: David Heidelberg <[email protected]>
[ Upstream commit 3085977e734dab74adebb1dda195befce25addff ]
We need to set correct mode for PLL to calculate correct frequency. Signalling mode is known at this point, so use it for that.
--- drivers/media/i2c/ccs/ccs-core.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-)
drivers/media/i2c/ccs/ccs-core.c +15 -1
@@ -3425,7 +3425,21 @@ static int ccs_probe(struct i2c_client *client) sensor->scale_m =CCS_LIM (sensor,SCALER_N_MIN );/* prepare PLL configuration input values */ - sensor->pll.bus_type =CCS_PLL_BUS_TYPE_CSI2_DPHY ; +switch (sensor->hwcfg.csi_signalling_mode) { +case CCS_CSI_SIGNALING_MODE_CSI_2_CPHY : + sensor->pll.bus_type =CCS_PLL_BUS_TYPE_CSI2_CPHY ; +break ; +case CCS_CSI_SIGNALING_MODE_CSI_2_DPHY : +case SMIAPP_CSI_SIGNALLING_MODE_CCP2_DATA_CLOCK : +case SMIAPP_CSI_SIGNALLING_MODE_CCP2_DATA_STROBE : + sensor->pll.bus_type =CCS_PLL_BUS_TYPE_CSI2_DPHY ; +break ; +default : +dev_err (&client->dev,"unsupported signalling mode %u\n" , + sensor->hwcfg.csi_signalling_mode); + rval = -EINVAL ; + goto out_cleanup; + } sensor->pll.csi2.lanes = sensor->hwcfg.lanes;if (CCS_LIM (sensor,CLOCK_CALCULATION ) &CCS_CLOCK_CALCULATION_LANE_SPEED ) {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 203/641 drm/msm/a2xx: fix pixel shader start on A225
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dmitry Baryshkov <[email protected]>
[ Upstream commit 6a7b0a670ba4d283285d76d45233cbecc5af5e40 ]
A225 has a different PixelShader start address, write correct address while initializing GPU.
Patchwork: https://patchwork.freedesktop.org/patch/689906/
Message-ID: <[email protected]>
--- drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
drivers/gpu/drm/msm/adreno/a2xx_gpu.c +4 -1
@@ -77,7 +77,10 @@ static bool a2xx_me_init(struct msm_gpu *gpu)/* Vertex and Pixel Shader Start Addresses in instructions * (3 DWORDS per instruction) */ -OUT_RING (ring,0x80000180 ); +if (adreno_is_a225 (adreno_gpu)) +OUT_RING (ring,0x80000300 ); +else +OUT_RING (ring,0x80000180 );/* Maximum Contexts */ OUT_RING (ring,0x00000001 );/* Write Confirm Interval and The CP will wait the
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 204/641 drm/buddy: release free_trees array on buddy mm teardown
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Michał Grzelak <[email protected]>
[ Upstream commit 7d0507772406e129329983b8b807e5b499bd74fd ]
During initialization of DRM buddy memory manager at drm_buddy_init, mm->free_trees array is allocated for both clear and dirty RB trees. During cleanup happening at drm_buddy_fini it is never freed, leading to following memory leaks observed on xe module load & unload cycles:
kmemleak_alloc+0x4a/0x90
__kmalloc_cache_noprof+0x488/0x800
drm_buddy_init+0xc2/0x330 [drm_buddy]
__xe_ttm_vram_mgr_init+0xc3/0x190 [xe]
xe_ttm_stolen_mgr_init+0xf5/0x9d0 [xe]
xe_device_probe+0x326/0x9e0 [xe]
xe_pci_probe+0x39a/0x610 [xe]
local_pci_probe+0x47/0xb0
pci_device_probe+0xf3/0x260
really_probe+0xf1/0x3c0
__driver_probe_device+0x8c/0x180
driver_probe_device+0x24/0xd0
__driver_attach+0x10f/0x220
bus_for_each_dev+0x7f/0xe0
driver_attach+0x1e/0x30
bus_add_driver+0x151/0x290Deallocate array for free trees when cleaning up buddy memory manager in the same way as if going through out_free_tree label.
--- drivers/gpu/drm/drm_buddy.c | 1 + 1 file changed, 1 insertion(+)
drivers/gpu/drm/drm_buddy.c +1 -0
@@ -419,6 +419,7 @@ void drm_buddy_fini(struct drm_buddy *mm)for_each_free_tree (i)kfree (mm->free_trees[i]); +kfree (mm->free_trees);kfree (mm->roots); }EXPORT_SYMBOL (drm_buddy_fini);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 205/641 drm/hisilicon/hibmc: fix dp probabilistical detect errors after HPD irq
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Baihan Li <[email protected]>
[ Upstream commit 3906e7a3b26d683868704fe262db443207f392fe ]
The issue is that drm_connector_helper_detect_from_ddc() returns wrong status when plugging or unplugging the monitor, which may cause the link failed err.[0] Use HPD pin status in DP's detect_ctx() for real physical monitor in/out, and implement a complete DP detection including read DPCD, check if it's a branch device and its sink count for different situations.
[0]:
hibme-drm 0000:83:00.0: [drm] *ERROR* channel equalization failed 5 times hibme-drm 0000:83:00.0: [drm] *ERROR* channel equalization failed 5 times hibme-drm 0000:83:00.0: [drm] *ERROR* dp link training failed, ret: -16 hibmc-drm 0000:83:00.0: [drm] *ERROR* hibme dp mode set failed: -16
--- drivers/gpu/drm/hisilicon/hibmc/dp/dp_comm.h | 4 ++ drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c | 19 +++++++ drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h | 6 +++ drivers/gpu/drm/hisilicon/hibmc/dp/dp_reg.h | 3 ++ .../gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c | 52 +++++++++++++++++-- 5 files changed, 80 insertions(+), 4 deletions(-)
drivers/gpu/drm/hisilicon/hibmc/dp/dp_comm.h +4 -0
@@ -40,6 +40,10 @@ struct hibmc_dp_dev {struct mutex lock;/* protects concurrent RW in hibmc_dp_reg_write_field() */ struct hibmc_dp_link link;u8 dpcd[DP_RECEIVER_CAP_SIZE ]; +u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS ]; +struct drm_dp_desc desc; +bool is_branch; +int hpd_status;void __iomem *serdes_base; };
drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c +19 -0
@@ -2,6 +2,7 @@// Copyright (c) 2024 Hisilicon Limited. #include <linux/io.h> +#include <linux/iopoll.h> #include <linux/delay.h> #include "dp_config.h" #include "dp_comm.h"
@@ -305,3 +306,21 @@ void hibmc_dp_set_cbar(struct hibmc_dp *dp, const struct hibmc_dp_cbar_cfg *cfg)hibmc_dp_reg_write_field (dp_dev,HIBMC_DP_COLOR_BAR_CTRL ,BIT (0 ), cfg->enable);writel (HIBMC_DP_SYNC_EN_MASK , dp_dev->base +HIBMC_DP_TIMING_SYNC_CTRL ); } + +bool hibmc_dp_check_hpd_status (struct hibmc_dp *dp,int exp_status) +{ +u32 status; +int ret; + + ret =readl_poll_timeout (dp->dp_dev->base +HIBMC_DP_HPD_STATUS , status, +FIELD_GET (HIBMC_DP_HPD_CUR_STATE , status) == exp_status, +1000 ,100000 );/* DP spec says 100ms */ +if (ret) { +drm_dbg_dp (dp->drm_dev,"wait hpd status timeout" ); +return false; + } + + dp->dp_dev->hpd_status = exp_status; + +return true; +}
drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h +6 -0
@@ -14,6 +14,11 @@struct hibmc_dp_dev ; +enum hibmc_hpd_status { +HIBMC_HPD_OUT , +HIBMC_HPD_IN , +}; +enum hibmc_dp_cbar_pattern {CBAR_COLOR_BAR ,CBAR_WHITE ,
@@ -60,5 +65,6 @@ void hibmc_dp_reset_link(struct hibmc_dp *dp);void hibmc_dp_hpd_cfg (struct hibmc_dp *dp);void hibmc_dp_enable_int (struct hibmc_dp *dp);void hibmc_dp_disable_int (struct hibmc_dp *dp); +bool hibmc_dp_check_hpd_status (struct hibmc_dp *dp,int exp_status);#endif
drivers/gpu/drm/hisilicon/hibmc/dp/dp_reg.h +3 -0
@@ -24,6 +24,9 @@#define HIBMC_DP_CFG_AUX_READY_DATA_BYTE GENMASK(16, 12)#define HIBMC_DP_CFG_AUX GENMASK(24, 17) +#define HIBMC_DP_HPD_STATUS 0x98 +#define HIBMC_DP_HPD_CUR_STATE GENMASK(7, 4) +#define HIBMC_DP_PHYIF_CTRL0 0xa0#define HIBMC_DP_CFG_SCRAMBLE_EN BIT(0)#define HIBMC_DP_CFG_PAT_SEL GENMASK(7, 4)
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c +48 -4
85 lines not on this page · raw message
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 206/641 drm/hisilicon/hibmc: add dp mode valid check
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Baihan Li <[email protected]>
[ Upstream commit 607805abfb747b98f43aa57d6d9ba4caed4d106f ]
If DP is connected, check the DP BW in mode_valid_ctx() to ensure that DP's link rate supports high-resolution data transmission.
--- .../gpu/drm/hisilicon/hibmc/dp/dp_config.h | 2 ++ drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c | 10 ++++++++++ drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h | 2 ++ .../gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c | 19 +++++++++++++++++++ 4 files changed, 33 insertions(+)
drivers/gpu/drm/hisilicon/hibmc/dp/dp_config.h +2 -0
@@ -17,5 +17,7 @@#define HIBMC_DP_LINK_RATE_CAL 27#define HIBMC_DP_SYNC_DELAY (lanes) ((lanes) == 0x2 ? 86 : 46)#define HIBMC_DP_INT_ENABLE 0xc +/* HIBMC_DP_LINK_RATE_CAL * 10000 * 80% = 216000 */ +#define DP_MODE_VALI_CAL 216000#endif
drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c +10 -0
@@ -264,6 +264,16 @@ void hibmc_dp_reset_link(struct hibmc_dp *dp) dp->dp_dev->link.status.channel_equalized = false; } +u8 hibmc_dp_get_link_rate (struct hibmc_dp *dp) +{ +return dp->dp_dev->link.cap.link_rate; +} + +u8 hibmc_dp_get_lanes (struct hibmc_dp *dp) +{ +return dp->dp_dev->link.cap.lanes; +} +static const struct hibmc_dp_color_raw g_rgb_raw[] = { {CBAR_COLOR_BAR ,0x000 ,0x000 ,0x000 }, {CBAR_WHITE ,0xfff ,0xfff ,0xfff },
drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h +2 -0
@@ -66,5 +66,7 @@ void hibmc_dp_hpd_cfg(struct hibmc_dp *dp);void hibmc_dp_enable_int (struct hibmc_dp *dp);void hibmc_dp_disable_int (struct hibmc_dp *dp);bool hibmc_dp_check_hpd_status (struct hibmc_dp *dp,int exp_status); +u8 hibmc_dp_get_link_rate (struct hibmc_dp *dp); +u8 hibmc_dp_get_lanes (struct hibmc_dp *dp);#endif
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c +19 -0
@@ -13,6 +13,7 @@#include "hibmc_drm_drv.h" #include "dp/dp_hw.h" #include "dp/dp_comm.h" +#include "dp/dp_config.h" #define DP_MASKED_SINK_HPD_PLUG_INT BIT(2)
@@ -81,9 +82,27 @@ static int hibmc_dp_detect(struct drm_connector *connector,return connector_status_disconnected; } +static int hibmc_dp_mode_valid (struct drm_connector *connector, +const struct drm_display_mode *mode, +struct drm_modeset_acquire_ctx *ctx, +enum drm_mode_status *status) +{ +struct hibmc_dp *dp =to_hibmc_dp (connector); +u64 cur_val, max_val; + +/* check DP link BW */ + cur_val = (u64 )mode->clock *HIBMC_DP_BPP ; + max_val = (u64 )hibmc_dp_get_link_rate (dp) *DP_MODE_VALI_CAL *hibmc_dp_get_lanes (dp); + + *status = cur_val > max_val ?MODE_CLOCK_HIGH :MODE_OK ; + +return 0 ; +} +static const struct drm_connector_helper_funcs hibmc_dp_conn_helper_funcs = { .get_modes = hibmc_dp_connector_get_modes, .detect_ctx = hibmc_dp_detect, + .mode_valid_ctx = hibmc_dp_mode_valid, };static int hibmc_dp_late_register (struct drm_connector *connector)
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 207/641 drm/hisilicon/hibmc: fix no showing problem with loading hibmc manually
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Baihan Li <[email protected]>
[ Upstream commit 0607052a6aee1e3d218a99fae70ba9f14b3b47ed ]
When using command rmmod and insmod, there is no showing in second time insmoding. Because DP controller won't send HPD signals, if connection doesn't change or controller isn't reset. So add reset before unreset in hibmc_dp_hw_init().
And also need to move the HDCP cfg after DP controller de-resets, so that HDCP configuration takes effect.
--- drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)
drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c +5 -2
@@ -177,13 +177,16 @@ int hibmc_dp_hw_init(struct hibmc_dp *dp) dp_dev->link.cap.lanes =0x2 ; dp_dev->link.cap.link_rate =DP_LINK_BW_8_1 ; -/* hdcp data */ -writel (HIBMC_DP_HDCP , dp_dev->base +HIBMC_DP_HDCP_CFG );/* int init */ writel (0 , dp_dev->base +HIBMC_DP_INTR_ENABLE );writel (HIBMC_DP_INT_RST , dp_dev->base +HIBMC_DP_INTR_ORIGINAL_STATUS );/* rst */ +writel (0 , dp_dev->base +HIBMC_DP_DPTX_RST_CTRL ); +usleep_range (30 ,50 ); +/* de-rst */ writel (HIBMC_DP_DPTX_RST , dp_dev->base +HIBMC_DP_DPTX_RST_CTRL ); +/* hdcp data */ +writel (HIBMC_DP_HDCP , dp_dev->base +HIBMC_DP_HDCP_CFG );/* clock enable */ writel (HIBMC_DP_CLK_EN , dp_dev->base +HIBMC_DP_DPTX_CLK_CTRL );
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 208/641 drm/hisilicon/hibmc: Adding reset colorbar cfg in dp init.
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Baihan Li <[email protected]>
[ Upstream commit 6dad7fa8581e96321ec8a6a4f8160762466f539a ]
Add colorbar disable operation before reset chontroller, to make sure colorbar status is clear in the DP init, so if rmmod the driver and the previous colorbar configuration will not affect the next time insmod the driver.
--- drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c | 2 ++ 1 file changed, 2 insertions(+)
drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c +2 -0
@@ -180,6 +180,8 @@ int hibmc_dp_hw_init(struct hibmc_dp *dp)/* int init */ writel (0 , dp_dev->base +HIBMC_DP_INTR_ENABLE );writel (HIBMC_DP_INT_RST , dp_dev->base +HIBMC_DP_INTR_ORIGINAL_STATUS ); +/* clr colorbar */ +writel (0 , dp_dev->base +HIBMC_DP_COLOR_BAR_CTRL );/* rst */ writel (0 , dp_dev->base +HIBMC_DP_DPTX_RST_CTRL );usleep_range (30 ,50 );
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 209/641 drm/rockchip: dw_hdmi_qp: Fix RK3576 HPD interrupt handling
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Cristian Ciocaltea <[email protected]>
[ Upstream commit 5f7be8afc40c5ccf1be0410514703e50a49532c0 ]
The threaded interrupt handler on RK3576 checks HPD IRQ status before deciding to continue with interrupt clearing and unmasking.
This is not only redundant, since a similar verification has been already performed by the hard IRQ handler before masking the interrupt, but is also error prone, because it might happen that hardware clears the status register right after the masking operation completes, and before the threaded handler reads its value.
The consequence is that HPD IRQ gets never unmasked, which breaks hotplug detection until reloading the driver or rebooting the system.
Drop the unnecessary verification of the HPD interrupt status from the threaded interrupt handler.
--- drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-)
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c +1 -6
@@ -267,12 +267,7 @@ static irqreturn_t dw_hdmi_qp_rk3576_hardirq(int irq, void *dev_id)static irqreturn_t dw_hdmi_qp_rk3576_irq (int irq,void *dev_id) {struct rockchip_hdmi_qp *hdmi = dev_id; -u32 intr_stat, val; - -regmap_read (hdmi->regmap,RK3576_IOC_HDMI_HPD_STATUS , &intr_stat); - -if (!intr_stat) -return IRQ_NONE ; +u32 val; val =FIELD_PREP_WM16 (RK3576_HDMI_HPD_INT_CLR ,1 );regmap_write (hdmi->regmap,RK3576_IOC_MISC_CON0 , val);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 210/641 drm/msm/mdss: correct HBB programmed on UBWC 5.x and 6.x devices
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dmitry Baryshkov <[email protected]>
[ Upstream commit e6177c7a2401b87b016728b75992926971d871fc ]
As in the previous generations, on UBWC 5.x and 6.x devices the Highest Bank Bit value should be programmed into the hardware with the offset of -13. Correct the value written into the register to prevent unpredictable results.
Patchwork: https://patchwork.freedesktop.org/patch/699274/
--- drivers/gpu/drm/msm/msm_mdss.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/gpu/drm/msm/msm_mdss.c +1 -1
@@ -229,7 +229,7 @@ static void msm_mdss_setup_ubwc_dec_50(struct msm_mdss *msm_mdss) {const struct qcom_ubwc_cfg_data *data = msm_mdss->mdss_data;u32 value =MDSS_UBWC_STATIC_UBWC_SWIZZLE (data->ubwc_swizzle) | -MDSS_UBWC_STATIC_HIGHEST_BANK_BIT (data->highest_bank_bit); +MDSS_UBWC_STATIC_HIGHEST_BANK_BIT (data->highest_bank_bit -13 );if (data->ubwc_bank_spread) value |=MDSS_UBWC_STATIC_UBWC_BANK_SPREAD ;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 211/641 drm/msm/dpu: offset HBB values written to DPU by -13
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dmitry Baryshkov <[email protected]>
[ Upstream commit 7ead14d4b9742b5ed244f35b999f0fe26dc23586 ]
As in all other places, the Highest Bank Bit value should be programmed into the hardware with the offset of -13. Correct the value written into the register to prevent unpredictable results.
Patchwork: https://patchwork.freedesktop.org/patch/699276/
--- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-)
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c +6 -4
@@ -270,30 +270,32 @@ static void dpu_hw_sspp_setup_format(struct dpu_sw_pipe *pipe, ((fmt->bpp -1 ) <<9 );if (fmt->fetch_mode !=MDP_FETCH_LINEAR ) { +u32 hbb = ctx->ubwc->highest_bank_bit -13 ; +if (MSM_FORMAT_IS_UBWC (fmt)) opmode |=MDSS_MDP_OP_BWC_EN ; src_format |= (fmt->fetch_mode &3 ) <<30 ;/*FRAME_FORMAT */ DPU_REG_WRITE (c,SSPP_FETCH_CONFIG ,DPU_FETCH_CONFIG_RESET_VALUE | - ctx->ubwc->highest_bank_bit <<18 ); + hbb <<18 );switch (ctx->ubwc->ubwc_enc_version) {case UBWC_1_0 : fast_clear = fmt->alpha_enable ?BIT (31 ) :0 ;DPU_REG_WRITE (c,SSPP_UBWC_STATIC_CTRL , fast_clear | (ctx->ubwc->ubwc_swizzle &0x1 ) |BIT (8 ) | - (ctx->ubwc->highest_bank_bit <<4 )); + (hbb <<4 ));break ;case UBWC_2_0 : fast_clear = fmt->alpha_enable ?BIT (31 ) :0 ;DPU_REG_WRITE (c,SSPP_UBWC_STATIC_CTRL , fast_clear | (ctx->ubwc->ubwc_swizzle) | - (ctx->ubwc->highest_bank_bit <<4 )); + (hbb <<4 ));break ;case UBWC_3_0 :DPU_REG_WRITE (c,SSPP_UBWC_STATIC_CTRL ,BIT (30 ) | (ctx->ubwc->ubwc_swizzle) | - (ctx->ubwc->highest_bank_bit <<4 )); + (hbb <<4 ));break ;case UBWC_4_0 : DPU_REG_WRITE(c, SSPP_UBWC_STATIC_CTRL,
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 212/641 drm/msm/dpu: program correct register for UBWC config on DPU 8.x+
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dmitry Baryshkov <[email protected]>
[ Upstream commit 5dcec3fc1311c277369a4bdf8b292781e5cc91fd ]
Since DPU 8.0 there is a separate register for the second rectangle, which needs to be programmed with the UBWC config if multirect is being used. Write pipe's UBWC configuration to the correct register.
Patchwork: https://patchwork.freedesktop.org/patch/699277/
--- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 25 ++++++++++++++++----- 1 file changed, 19 insertions(+), 6 deletions(-)
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c +19 -6
@@ -72,6 +72,8 @@#define SSPP_EXCL_REC_XY_REC1 0x188#define SSPP_EXCL_REC_SIZE 0x1B4#define SSPP_EXCL_REC_XY 0x1B8 +#define SSPP_UBWC_STATIC_CTRL_REC1 0x1c0 +#define SSPP_UBWC_ERROR_STATUS_REC1 0x1c8#define SSPP_CLK_CTRL 0x330/* SSPP_SRC_OP_MODE & OP_MODE_REC1 */
@@ -215,7 +217,7 @@ static void dpu_hw_sspp_setup_format(struct dpu_sw_pipe *pipe,u32 chroma_samp, unpack, src_format;u32 opmode =0 ;u32 fast_clear =0 ; -u32 op_mode_off, unpack_pat_off, format_off; +u32 op_mode_off, unpack_pat_off, format_off, ubwc_ctrl_off, ubwc_error_off;if (!ctx || !fmt)return ;
@@ -225,10 +227,21 @@ static void dpu_hw_sspp_setup_format(struct dpu_sw_pipe *pipe, op_mode_off =SSPP_SRC_OP_MODE ; unpack_pat_off =SSPP_SRC_UNPACK_PATTERN ; format_off =SSPP_SRC_FORMAT ; + ubwc_ctrl_off =SSPP_UBWC_STATIC_CTRL ; + ubwc_error_off =SSPP_UBWC_ERROR_STATUS ; }else { op_mode_off =SSPP_SRC_OP_MODE_REC1 ; unpack_pat_off =SSPP_SRC_UNPACK_PATTERN_REC1 ; format_off =SSPP_SRC_FORMAT_REC1 ; + +/* reg wasn't present before DPU 8.0 */ +if (ctx->mdss_ver->core_major_ver >=8 ) { + ubwc_ctrl_off =SSPP_UBWC_STATIC_CTRL_REC1 ; + ubwc_error_off =SSPP_UBWC_ERROR_STATUS_REC1 ; + }else { + ubwc_ctrl_off =SSPP_UBWC_STATIC_CTRL ; + ubwc_error_off =SSPP_UBWC_ERROR_STATUS ; + } } c = &ctx->hw;
@@ -281,24 +294,24 @@ static void dpu_hw_sspp_setup_format(struct dpu_sw_pipe *pipe,switch (ctx->ubwc->ubwc_enc_version) {case UBWC_1_0 : fast_clear = fmt->alpha_enable ?BIT (31 ) :0 ; -DPU_REG_WRITE (c,SSPP_UBWC_STATIC_CTRL , +DPU_REG_WRITE (c, ubwc_ctrl_off, fast_clear | (ctx->ubwc->ubwc_swizzle &0x1 ) |BIT (8 ) | (hbb <<4 ));break ;case UBWC_2_0 : fast_clear = fmt->alpha_enable ?BIT (31 ) :0 ; -DPU_REG_WRITE (c,SSPP_UBWC_STATIC_CTRL , +DPU_REG_WRITE (c, ubwc_ctrl_off, fast_clear | (ctx->ubwc->ubwc_swizzle) | (hbb <<4 ));break ;case UBWC_3_0 : -DPU_REG_WRITE (c,SSPP_UBWC_STATIC_CTRL , +DPU_REG_WRITE (c, ubwc_ctrl_off,BIT (30 ) | (ctx->ubwc->ubwc_swizzle) | (hbb <<4 ));break ;case UBWC_4_0 : -DPU_REG_WRITE (c,SSPP_UBWC_STATIC_CTRL , +DPU_REG_WRITE (c, ubwc_ctrl_off,MSM_FORMAT_IS_YUV (fmt) ?0 :BIT (30 ));break ; }
@@ -327,7 +340,7 @@ static void dpu_hw_sspp_setup_format(struct dpu_sw_pipe *pipe,DPU_REG_WRITE (c, op_mode_off, opmode);/* clear previous UBWC error */ -DPU_REG_WRITE (c,SSPP_UBWC_ERROR_STATUS ,BIT (31 )); +DPU_REG_WRITE (c, ubwc_error_off,BIT (31 )); } static void dpu_hw_sspp_setup_pe_config(struct dpu_hw_sspp *ctx,
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 213/641 drm/msm/dp: Avoid division by zero in msm_dp_ctrl_config_msa()
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Nathan Chancellor <[email protected]>
[ Upstream commit f185076da44c774241a16a82a7773ece3c1c607b ]
An (admittedly problematic) optimization change in LLVM 20 [1] turns known division by zero into the equivalent of __builtin_unreachable(), which invokes undefined behavior if it is encountered in a control flow graph, destroying code generation. When compile testing for x86_64, objtool flags an instance of this optimization triggering in msm_dp_ctrl_config_msa(), inlined into msm_dp_ctrl_on_stream():
drivers/gpu/drm/msm/msm.o: warning: objtool: msm_dp_ctrl_on_stream(): unexpected end of section .text.msm_dp_ctrl_on_stream
The zero division happens if the else branch in the first if statement in msm_dp_ctrl_config_msa() is taken because pixel_div is initialized to zero and it is not possible for LLVM to eliminate the else branch since rate is still not known after inlining into msm_dp_ctrl_on_stream().
Transform the if statements into a switch statement with a default case with the existing error print and an early return to avoid the invalid division. Add a comment to note this helps the compiler, even though the case is known to be unreachable. With this, pixel_dev's default zero initialization can be dropped, as it is dead with this change.
Patchwork: https://patchwork.freedesktop.org/patch/698355/
--- drivers/gpu/drm/msm/dp/dp_ctrl.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-)
drivers/gpu/drm/msm/dp/dp_ctrl.c +18 -6
@@ -2395,20 +2395,32 @@ static void msm_dp_ctrl_config_msa(struct msm_dp_ctrl_private *ctrl, bool is_ycbcr_420) {u32 pixel_m, pixel_n; -u32 mvid, nvid, pixel_div =0 , dispcc_input_rate; +u32 mvid, nvid, pixel_div, dispcc_input_rate;u32 const nvid_fixed =DP_LINK_CONSTANT_N_VALUE ;u32 const link_rate_hbr2 =540000 ;u32 const link_rate_hbr3 =810000 ;unsigned long den, num; -if (rate == link_rate_hbr3) +switch (rate) { +case link_rate_hbr3: pixel_div =6 ; -else if (rate ==162000 || rate ==270000 ) - pixel_div =2 ; -else if (rate == link_rate_hbr2) +break ; +case link_rate_hbr2: pixel_div =4 ; -else +break ; +case 162000 : +case 270000 : + pixel_div =2 ; +break ; +default : +/* +* This cannot be reached but the compiler is not able to know +* that statically so return early to avoid a possibly invalid +* division. +*/ DRM_ERROR ("Invalid pixel mux divider\n" ); +return ; + } dispcc_input_rate = (rate *10 ) / pixel_div;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 214/641 platform/chrome: cros_typec_switch: Dont touch struct fwnode_handle::dev
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Andy Shevchenko <[email protected]>
[ Upstream commit e1adf48853bc715f4deea074932aa1c44eb7abea ]
The 'dev' field in struct fwnode is special and related to device links, There no driver should use it for printing messages. Fix incorrect use of private field.
--- drivers/platform/chrome/cros_typec_switch.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
drivers/platform/chrome/cros_typec_switch.c +3 -3
@@ -230,20 +230,20 @@ static int cros_typec_register_switches(struct cros_typec_switch_data *sdata) adev =to_acpi_device_node (fwnode);if (!adev) { -dev_err (fwnode->dev,"Couldn't get ACPI device handle\n" ); +dev_err (dev,"Couldn't get ACPI device handle for %pfwP\n" , fwnode); ret = -ENODEV ; goto err_switch; } ret =acpi_evaluate_integer (adev->handle,"_ADR" ,NULL , &index);if (ACPI_FAILURE (ret)) { -dev_err (fwnode->dev,"_ADR wasn't evaluated\n" ); +dev_err (dev,"_ADR wasn't evaluated for %pfwP\n" , fwnode); ret = -ENODATA ; goto err_switch; }if (index >=EC_USB_PD_MAX_PORTS ) { -dev_err (fwnode->dev,"Invalid port index number: %llu\n" , index); +dev_err (dev,"%pfwP: Invalid port index number: %llu\n" , fwnode, index); ret = -EINVAL ; goto err_switch; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 215/641 pwm: tiehrpwm: Enable pwmchips parent device before setting configuration
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Gokul Praveen <[email protected]>
[ Upstream commit 75e7ed52ac7c1da90f304dcda2906636404df921 ]
The period and duty cycle configurations on J7200 and J784S4 SoCs does not get reflected after setting them using sysfs nodes. This is because at the end of ehrpwm_pwm_config function, the put_sync function is called which resets the hardware.
Hold the PWM controller out of low-power mode during .apply() to make sure it accepts the writes to its registers.
This renders the calls to pm_runtime_get_sync() and pm_runtime_put_sync() in ehrpwm_pwm_config() into no-ops, so these can be dropped.
--- drivers/pwm/pwm-tiehrpwm.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-)
drivers/pwm/pwm-tiehrpwm.c +2 -4
@@ -237,8 +237,6 @@ static int ehrpwm_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,if (period_cycles <1 ) period_cycles =1 ; -pm_runtime_get_sync (pwmchip_parent (chip)); -/* Update clock prescaler values */ ehrpwm_modify (pc->mmio_base,TBCTL ,TBCTL_CLKDIV_MASK , tb_divval);
@@ -290,8 +288,6 @@ static int ehrpwm_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,if (!(duty_cycles > period_cycles))ehrpwm_write (pc->mmio_base, cmp_reg, duty_cycles); -pm_runtime_put_sync (pwmchip_parent (chip)); -return 0 ; }
@@ -378,6 +374,8 @@ static int ehrpwm_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,int err;bool enabled = pwm->state.enabled; +guard (pm_runtime_active)(pwmchip_parent (chip)); +if (state->polarity != pwm->state.polarity) {if (enabled) {ehrpwm_pwm_disable (chip, pwm);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 216/641 media: uvcvideo: Fix allocation for small frame sizes
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Ricardo Ribalda <[email protected]>
[ Upstream commit 40d3ac25c11310bfaa50ed7614846ef75cb69a1e ]
If a frame has size of less or equal than one packet size uvc_alloc_urb_buffers() is unable to allocate memory for it due to a off-by-one error.
Fix the off-by-one-error and now that we are at it, make sure that stream->urb_size has always a valid value when we return from the function, even when an error happens.
--- drivers/media/usb/uvc/uvc_video.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/media/usb/uvc/uvc_video.c +2 -1
@@ -1812,7 +1812,7 @@ static int uvc_alloc_urb_buffers(struct uvc_streaming *stream, npackets =UVC_MAX_PACKETS ;/* Retry allocations until one succeed. */ -for (; npackets >1 ; npackets /=2 ) { +for (; npackets >0 ; npackets /=2 ) { stream->urb_size = psize * npackets;for (i =0 ; i <UVC_URBS ; ++i) {
@@ -1837,6 +1837,7 @@ static int uvc_alloc_urb_buffers(struct uvc_streaming *stream,uvc_dbg (stream->dev,VIDEO ,"Failed to allocate URB buffers (%u bytes per packet)\n" , psize); + stream->urb_size =0 ;return 0 ; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 217/641 evm: Use ordered xattrs list to calculate HMAC in evm_init_hmac()
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Roberto Sassu <[email protected]>
[ Upstream commit 0496fc9cdc384f67be4413b1c6156eb64fccd5c4 ]
Commit 8e5d9f916a96 ("smack: deduplicate xattr setting in smack_inode_init_security()") introduced xattr_dupval() to simplify setting the xattrs to be provided by the SMACK LSM on inode creation, in the smack_inode_init_security().
Unfortunately, moving lsm_get_xattr_slot() caused the SMACK64TRANSMUTE xattr be added in the array of new xattrs before SMACK64. This causes the HMAC of xattrs calculated by evm_init_hmac() for new files to diverge from the one calculated by both evm_calc_hmac_or_hash() and evmctl.
evm_init_hmac() calculates the HMAC of the xattrs of new files based on the order LSMs provide them, while evm_calc_hmac_or_hash() and evmctl calculate the HMAC based on an ordered xattrs list.
Fix the issue by making evm_init_hmac() calculate the HMAC of new files based on the ordered xattrs list too.
--- security/integrity/evm/evm_crypto.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-)
security/integrity/evm/evm_crypto.c +10 -4
@@ -401,6 +401,7 @@ int evm_init_hmac(struct inode *inode, const struct xattr *xattrs, {struct shash_desc *desc;const struct xattr *xattr; +struct xattr_list *xattr_entry; desc =init_desc (EVM_XATTR_HMAC ,HASH_ALGO_SHA1 );if (IS_ERR (desc)) {
@@ -408,11 +409,16 @@ int evm_init_hmac(struct inode *inode, const struct xattr *xattrs,return PTR_ERR (desc); } -for (xattr = xattrs; xattr->name; xattr++) { -if (!evm_protected_xattr (xattr->name)) -continue ; +list_for_each_entry_lockless (xattr_entry, &evm_config_xattrnames, + list) { +for (xattr = xattrs; xattr->name; xattr++) { +if (strcmp (xattr_entry->name + +XATTR_SECURITY_PREFIX_LEN , xattr->name) !=0 ) +continue ; -crypto_shash_update (desc, xattr->value, xattr->value_len); +crypto_shash_update (desc, xattr->value, + xattr->value_len); + } }hmac_add_misc (desc, inode,EVM_XATTR_HMAC , hmac_val);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 218/641 drm/xe/ptl: Disable DCC on PTL
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Vinay Belgaumkar <[email protected]>
[ Upstream commit 801a6e61f5fbab2c0dd76c8360f45b625b49e410 ]
On PTL, the recommendation is to disable DCC(Duty Cycle Control) as it may cause some regressions due to added latencies. Upcoming GuC releases will disable DCC on PTL as well, but we need to force it in KMD so that this behavior is propagated to older kernels.
v2: Update commit message (Rodrigo)
v3: Rebase
v4: Fix typo: s/propagted/propagated
--- drivers/gpu/drm/xe/xe_guc_pc.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+)
drivers/gpu/drm/xe/xe_guc_pc.c +34 -0
@@ -1231,6 +1231,36 @@ int xe_guc_pc_set_power_profile(struct xe_guc_pc *pc, const char *buf)return ret; } +static int pc_action_set_dcc (struct xe_guc_pc *pc,bool enable) +{ +int ret; + + ret =pc_action_set_param (pc, +SLPC_PARAM_TASK_ENABLE_DCC , + enable); +if (!ret) +return pc_action_set_param (pc, +SLPC_PARAM_TASK_DISABLE_DCC , + !enable); +else +return ret; +} + +static int pc_modify_defaults (struct xe_guc_pc *pc) +{ +struct xe_device *xe =pc_to_xe (pc); +struct xe_gt *gt =pc_to_gt (pc); +int ret =0 ; + +if (xe->info.platform ==XE_PANTHERLAKE ) { + ret =pc_action_set_dcc (pc, false); +if (unlikely (ret)) +xe_gt_err (gt,"Failed to modify DCC default: %pe\n" ,ERR_PTR (ret)); + } + +return ret; +} +/** * xe_guc_pc_start - Start GuC's Power Conservation component * @pc: Xe_GuC_PC instance
@@ -1288,6 +1318,10 @@ int xe_guc_pc_start(struct xe_guc_pc *pc) ktime_ms_delta(ktime_get(), earlier)); } + ret =pc_modify_defaults (pc); +if (ret) +return ret; + ret =pc_init_freqs (pc);if (ret) goto out;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 219/641 drm/xe: Unregister drm device on probe error
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Shuicheng Lin <[email protected]>
[ Upstream commit 96c2c72b817d70e8d110e78b0162e044a0c41f9f ]
Call drm_dev_unregister() when xe_device_probe() fails after successful drm_dev_register(). This ensures the DRM device is promptly unregistered before returning an error, avoiding leaving it registered on the failure path.
Otherwise, there is warn message if xe_device_probe() is called again:
"
[ 207.322365] [drm:drm_minor_register] [ 207.322381] debugfs: '128' already exists in 'dri' [ 207.322432] sysfs: cannot create duplicate filename '/devices/pci0000:00/0000:00:01.0/0000:01:00.0/0000:02:01.0/0000:03:00.0/drm/renderD128' [ 207.322435] CPU: 5 UID: 0 PID: 10261 Comm: modprobe Tainted: G B W 6.19.0-rc2-lgci-xe-kernel+ #223 PREEMPT(voluntary) [ 207.322439] Tainted: [B]=BAD_PAGE, [W]=WARN [ 207.322440] Hardware name: ASUS System Product Name/PRIME Z790-P WIFI, BIOS 0812 02/24/2023 [ 207.322441] Call Trace: [ 207.322442] <TASK> [ 207.322443] dump_stack_lvl+0xa0/0xc0 [ 207.322446] dump_stack+0x10/0x20 [ 207.322448] sysfs_warn_dup+0xd5/0x110 [ 207.322451] sysfs_create_dir_ns+0x1f6/0x280 [ 207.322453] ? __pfx_sysfs_create_dir_ns+0x10/0x10 [ 207.322455] ? lock_acquire+0x1a4/0x2e0 [ 207.322458] ? __kasan_check_read+0x11/0x20 [ 207.322461] kobject_add_internal+0x28d/0x8e0 [ 207.322464] kobject_add+0x11f/0x1f0 [ 207.322465] ? lock_acquire+0x1a4/0x2e0 [ 207.322467] ? __pfx_kobject_add+0x10/0x10 [ 207.322469] ? __kasan_check_write+0x14/0x20 [ 207.322471] ? kobject_put+0x62/0x4a0 [ 207.322473] ? get_device_parent.isra.0+0x1bb/0x4c0 [ 207.322475] ? kobject_put+0x62/0x4a0 [ 207.322477] device_add+0x2d7/0x1500 [ 207.322479] ? __pfx_device_add+0x10/0x10 [ 207.322481] ? drm_debugfs_add_file+0xfa/0x170 [ 207.322483] ? drm_debugfs_add_files+0x82/0xd0 [ 207.322485] ? drm_debugfs_add_files+0x82/0xd0 [ 207.322487] drm_minor_register+0x10a/0x2d0 [ 207.322489] drm_dev_register+0x143/0x860 [ 207.322491] ? xe_configfs_get_psmi_enabled+0x12/0x90 [xe] [ 207.322667] xe_device_probe+0x185b/0x2c40 [xe] [ 207.322812] ? __pfx___drm_dev_dbg+0x10/0x10 [ 207.322815] ? add_dr+0x180/0x220 [ 207.322818] ? __pfx___drmm_mutex_release+0x10/0x10 [ 207.322821] ? __pfx_xe_device_probe+0x10/0x10 [xe] [ 207.322966] ? xe_pm_init_early+0x33a/0x410 [xe] [ 207.323136] xe_pci_probe+0x936/0x1250 [xe] [ 207.323298] ? lock_acquire+0x1a4/0x2e0 [ 207.323302] ? __pfx_xe_pci_probe+0x10/0x10 [xe] [ 207.323464] local_pci_probe+0xe6/0x1a0 [ 207.323468] pci_device_probe+0x523/0x840 [ 207.323470] ? __pfx_pci_device_probe+0x10/0x10 [ 207.323473] ? sysfs_do_create_link_sd.isra.0+0x8c/0x110 [ 207.323476] ? sysfs_create_link+0x48/0xc0 [ 207.323479] really_probe+0x1fd/0x8a0
...
"
--- drivers/gpu/drm/xe/xe_device.c | 1 + 1 file changed, 1 insertion(+)
drivers/gpu/drm/xe/xe_device.c +1 -0
@@ -966,6 +966,7 @@ int xe_device_probe(struct xe_device *xe) err_unregister_display:xe_display_unregister (xe); +drm_dev_unregister (&xe->drm);return err; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 220/641 mm/slab: fix false lockdep warning in __kfree_rcu_sheaf()
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Harry Yoo <[email protected]>
[ Upstream commit f8b4cd2dad097e4ea5aed3511f42b9eb771e7b19 ]
kvfree_call_rcu() can be called while holding a raw_spinlock_t. Since __kfree_rcu_sheaf() may acquire a spinlock_t (which becomes a sleeping lock on PREEMPT_RT) and violate lock nesting rules, kvfree_call_rcu() bypasses the sheaves layer entirely on PREEMPT_RT.
However, lockdep still complains about acquiring spinlock_t while holding raw_spinlock_t, even on !PREEMPT_RT where spinlock_t is a spinning lock. This causes a false lockdep warning [1]:
=============================
[ BUG: Invalid wait context ]
6.19.0-rc6-next-20260120 #21508 Not tainted
-----------------------------
migration/1/23 is trying to lock:
ffff8afd01054e98 (&barn->lock){..-.}-{3:3}, at: barn_get_empty_sheaf+0x1d/0xb0 other info that might help us debug this:
context-{5:5}
3 locks held by migration/1/23:
#0: ffff8afd01fd89a8 (&p->pi_lock){-.-.}-{2:2}, at: __balance_push_cpu_stop+0x3f/0x200 #1: ffffffff9f15c5c8 (rcu_read_lock){....}-{1:3}, at: cpuset_cpus_allowed_fallback+0x27/0x250 #2: ffff8afd1f470be0 ((local_lock_t *)&pcs->lock){+.+.}-{3:3}, at: __kfree_rcu_sheaf+0x52/0x3d0
stack backtrace: CPU: 1 UID: 0 PID: 23 Comm: migration/1 Not tainted 6.19.0-rc6-next-20260120 #21508 PREEMPTLAZY Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS rel-1.14.0-0-g155821a1990b-prebuilt.qemu.org 04/01/2014 Stopper: __balance_push_cpu_stop+0x0/0x200 <- balance_push+0x118/0x170 Call Trace: <TASK> __dump_stack+0x22/0x30 dump_stack_lvl+0x60/0x80 dump_stack+0x19/0x24 __lock_acquire+0xd3a/0x28e0 ? __lock_acquire+0x5a9/0x28e0 ? __lock_acquire+0x5a9/0x28e0 ? barn_get_empty_sheaf+0x1d/0xb0 lock_acquire+0xc3/0x270 ? barn_get_empty_sheaf+0x1d/0xb0 ? __kfree_rcu_sheaf+0x52/0x3d0 _raw_spin_lock_irqsave+0x47/0x70 ? barn_get_empty_sheaf+0x1d/0xb0 barn_get_empty_sheaf+0x1d/0xb0 ? __kfree_rcu_sheaf+0x52/0x3d0 __kfree_rcu_sheaf+0x19f/0x3d0 kvfree_call_rcu+0xaf/0x390 set_cpus_allowed_force+0xc8/0xf0 [...] </TASK>
This wasn't triggered until sheaves were enabled for all slab caches, since kfree_rcu() wasn't being called with a raw spinlock held for caches with sheaves (vma, maple node).
As suggested by Vlastimil Babka, fix this by using a lockdep map with LD_WAIT_CONFIG wait type to tell lockdep that acquiring spinlock_t is valid in this case, as those spinlocks won't be used on PREEMPT_RT.
Note that kfree_rcu_sheaf_map should be acquired using _try() variant, otherwise the acquisition of the lockdep map itself will trigger an invalid wait context warning.
--- mm/slub.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)
mm/slub.c +20 -0
@@ -6232,11 +6232,29 @@ static void rcu_free_sheaf(struct rcu_head *head)free_empty_sheaf (s, sheaf); } +/* +* kvfree_call_rcu() can be called while holding a raw_spinlock_t. Since +* __kfree_rcu_sheaf() may acquire a spinlock_t (sleeping lock on PREEMPT_RT), +* this would violate lock nesting rules. Therefore, kvfree_call_rcu() avoids +* this problem by bypassing the sheaves layer entirely on PREEMPT_RT. +* +* However, lockdep still complains that it is invalid to acquire spinlock_t +* while holding raw_spinlock_t, even on !PREEMPT_RT where spinlock_t is a +* spinning lock. Tell lockdep that acquiring spinlock_t is valid here +* by temporarily raising the wait-type to LD_WAIT_CONFIG. +*/ +static DEFINE_WAIT_OVERRIDE_MAP(kfree_rcu_sheaf_map, LD_WAIT_CONFIG); +bool __kfree_rcu_sheaf (struct kmem_cache *s,void *obj) {struct slub_percpu_sheaves *pcs;struct slab_sheaf *rcu_sheaf; +if (WARN_ON_ONCE (IS_ENABLED (CONFIG_PREEMPT_RT ))) +return false; + +lock_map_acquire_try (&kfree_rcu_sheaf_map); +if (!local_trylock (&s->cpu_sheaves->lock)) goto fail;
@@ -6313,10 +6331,12 @@ bool __kfree_rcu_sheaf(struct kmem_cache *s, void *obj)local_unlock (&s->cpu_sheaves->lock);stat (s,FREE_RCU_SHEAF ); +lock_map_release (&kfree_rcu_sheaf_map);return true; fail:stat (s,FREE_RCU_SHEAF_FAIL ); +lock_map_release (&kfree_rcu_sheaf_map);return false; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 221/641 ASoC: tegra: Add AHUB writeable_reg for RX holes
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Sheetal <[email protected]>
[ Upstream commit 0ba6286a71581aaf8413a55b9bd90ea3463fd23b ]
Add writeable_reg callbacks for Tegra210/186 AHUB RX registers so the flat cache only treats valid RX locations as writable, avoiding holes in the register map.
--- sound/soc/tegra/tegra210_ahub.c | 57 +++++++++++++++++++++++++++++++++ sound/soc/tegra/tegra210_ahub.h | 30 +++++++++++++++++ 2 files changed, 87 insertions(+)
sound/soc/tegra/tegra210_ahub.c +57 -0
@@ -2049,6 +2049,61 @@ static const struct snd_soc_component_driver tegra264_ahub_component = { .num_dapm_routes = ARRAY_SIZE(tegra264_ahub_routes), }; +static bool tegra210_ahub_wr_reg (struct device *dev,unsigned int reg) +{ +int part; + +if (reg %TEGRA210_XBAR_RX_STRIDE ) +return false; + +for (part =0 ; part <TEGRA210_XBAR_UPDATE_MAX_REG ; part++) { +switch (reg & ~(part *TEGRA210_XBAR_PART1_RX )) { + case TEGRA210_AXBAR_PART_0_ADMAIF_RX1_0 ... TEGRA210_AXBAR_PART_0_ADMAIF_RX10_0: + case TEGRA210_AXBAR_PART_0_I2S1_RX1_0 ... TEGRA210_AXBAR_PART_0_I2S5_RX1_0: + case TEGRA210_AXBAR_PART_0_SFC1_RX1_0 ... TEGRA210_AXBAR_PART_0_SFC4_RX1_0: + case TEGRA210_AXBAR_PART_0_MIXER1_RX1_0 ... TEGRA210_AXBAR_PART_0_MIXER1_RX10_0: + case TEGRA210_AXBAR_PART_0_SPDIF1_RX1_0 ... TEGRA210_AXBAR_PART_0_SPDIF1_RX2_0: + case TEGRA210_AXBAR_PART_0_AFC1_RX1_0 ... TEGRA210_AXBAR_PART_0_AFC6_RX1_0: + case TEGRA210_AXBAR_PART_0_OPE1_RX1_0 ... TEGRA210_AXBAR_PART_0_OPE2_RX1_0: +case TEGRA210_AXBAR_PART_0_SPKPROT1_RX1_0 : + case TEGRA210_AXBAR_PART_0_MVC1_RX1_0 ... TEGRA210_AXBAR_PART_0_MVC2_RX1_0: + case TEGRA210_AXBAR_PART_0_AMX1_RX1_0 ... TEGRA210_AXBAR_PART_0_ADX2_RX1_0: +return true; +default : +break ; + } + } + +return false; +} + +static bool tegra186_ahub_wr_reg (struct device *dev,unsigned int reg) +{ +int part; + +if (reg %TEGRA210_XBAR_RX_STRIDE ) +return false; + +for (part =0 ; part <TEGRA186_XBAR_UPDATE_MAX_REG ; part++) { +switch (reg & ~(part *TEGRA210_XBAR_PART1_RX )) { + case TEGRA210_AXBAR_PART_0_ADMAIF_RX1_0 ... TEGRA186_AXBAR_PART_0_I2S6_RX1_0: + case TEGRA210_AXBAR_PART_0_SFC1_RX1_0 ... TEGRA210_AXBAR_PART_0_SFC4_RX1_0: + case TEGRA210_AXBAR_PART_0_MIXER1_RX1_0 ... TEGRA210_AXBAR_PART_0_MIXER1_RX10_0: + case TEGRA186_AXBAR_PART_0_DSPK1_RX1_0 ... TEGRA186_AXBAR_PART_0_DSPK2_RX1_0: + case TEGRA210_AXBAR_PART_0_AFC1_RX1_0 ... TEGRA210_AXBAR_PART_0_AFC6_RX1_0: +case TEGRA210_AXBAR_PART_0_OPE1_RX1_0 : + case TEGRA186_AXBAR_PART_0_MVC1_RX1_0 ... TEGRA186_AXBAR_PART_0_MVC2_RX1_0: + case TEGRA186_AXBAR_PART_0_AMX1_RX1_0 ... TEGRA186_AXBAR_PART_0_AMX3_RX4_0: + case TEGRA210_AXBAR_PART_0_ADX1_RX1_0 ... TEGRA186_AXBAR_PART_0_ASRC1_RX7_0: +return true; +default : +break ; + } + } + +return false; +} +static bool tegra264_ahub_wr_reg (struct device *dev,unsigned int reg) {int part;
@@ -2076,6 +2131,7 @@ static const struct regmap_config tegra210_ahub_regmap_config = { .reg_bits = 32, .val_bits = 32, .reg_stride = 4, + .writeable_reg = tegra210_ahub_wr_reg, .max_register = TEGRA210_MAX_REGISTER_ADDR, .cache_type = REGCACHE_FLAT, };
@@ -2084,6 +2140,7 @@ static const struct regmap_config tegra186_ahub_regmap_config = { .reg_bits = 32, .val_bits = 32, .reg_stride = 4, + .writeable_reg = tegra186_ahub_wr_reg, .max_register = TEGRA186_MAX_REGISTER_ADDR, .cache_type = REGCACHE_FLAT, };
sound/soc/tegra/tegra210_ahub.h +30 -0
@@ -68,6 +68,36 @@#define TEGRA210_MAX_REGISTER_ADDR (TEGRA210_XBAR_PART2_RX + \ (TEGRA210_XBAR_RX_STRIDE * (TEGRA210_XBAR_AUDIO_RX_COUNT - 1))) +/* AXBAR register offsets */ +#define TEGRA186_AXBAR_PART_0_AMX1_RX1_0 0x120 +#define TEGRA186_AXBAR_PART_0_AMX3_RX4_0 0x14c +#define TEGRA186_AXBAR_PART_0_ASRC1_RX7_0 0x1a8 +#define TEGRA186_AXBAR_PART_0_DSPK1_RX1_0 0xc0 +#define TEGRA186_AXBAR_PART_0_DSPK2_RX1_0 0xc4 +#define TEGRA186_AXBAR_PART_0_I2S6_RX1_0 0x54 +#define TEGRA186_AXBAR_PART_0_MVC1_RX1_0 0x110 +#define TEGRA186_AXBAR_PART_0_MVC2_RX1_0 0x114 +#define TEGRA210_AXBAR_PART_0_ADMAIF_RX10_0 0x24 +#define TEGRA210_AXBAR_PART_0_ADMAIF_RX1_0 0x0 +#define TEGRA210_AXBAR_PART_0_ADX1_RX1_0 0x160 +#define TEGRA210_AXBAR_PART_0_ADX2_RX1_0 0x164 +#define TEGRA210_AXBAR_PART_0_AFC1_RX1_0 0xd0 +#define TEGRA210_AXBAR_PART_0_AFC6_RX1_0 0xe4 +#define TEGRA210_AXBAR_PART_0_AMX1_RX1_0 0x140 +#define TEGRA210_AXBAR_PART_0_I2S1_RX1_0 0x40 +#define TEGRA210_AXBAR_PART_0_I2S5_RX1_0 0x50 +#define TEGRA210_AXBAR_PART_0_MIXER1_RX10_0 0xa4 +#define TEGRA210_AXBAR_PART_0_MIXER1_RX1_0 0x80 +#define TEGRA210_AXBAR_PART_0_MVC1_RX1_0 0x120 +#define TEGRA210_AXBAR_PART_0_MVC2_RX1_0 0x124 +#define TEGRA210_AXBAR_PART_0_OPE1_RX1_0 0x100 +#define TEGRA210_AXBAR_PART_0_OPE2_RX1_0 0x104 +#define TEGRA210_AXBAR_PART_0_SFC1_RX1_0 0x60 +#define TEGRA210_AXBAR_PART_0_SFC4_RX1_0 0x6c +#define TEGRA210_AXBAR_PART_0_SPDIF1_RX1_0 0xc0 +#define TEGRA210_AXBAR_PART_0_SPDIF1_RX2_0 0xc4 +#define TEGRA210_AXBAR_PART_0_SPKPROT1_RX1_0 0x110 +#define MUX_REG (id) (TEGRA210_XBAR_RX_STRIDE * (id))#define MUX_VALUE (npart, nbit) (1 + (nbit) + (npart) * 32)
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 222/641 platform/chrome: cros_ec_lightbar: Fix response size initialization
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Tzung-Bi Shih <[email protected]>
[ Upstream commit ec0dd36dbf8b0b209e63d0cd795451fa2203c736 ]
Commit 1e7913ff5f9f ("platform/chrome: cros_ec_lightbar: Reduce ligthbar get version command") meant to set smaller values for both request and response sizes.
However, it incorrectly assigned the response size to the result field instead of insize. Fix it.
--- drivers/platform/chrome/cros_ec_lightbar.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/platform/chrome/cros_ec_lightbar.c +1 -1
@@ -119,7 +119,7 @@ static int get_lightbar_version(struct cros_ec_dev *ec, param = (struct ec_params_lightbar *)msg->data; param->cmd =LIGHTBAR_CMD_VERSION ; msg->outsize =sizeof (param->cmd); - msg->result =sizeof (resp->version); + msg->insize =sizeof (resp->version); ret =cros_ec_cmd_xfer_status (ec->ec_dev, msg);if (ret <0 && ret != -EINVAL ) { ret =0 ;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 223/641 accel/amdxdna: Hold mm structure across iommu_sva_unbind_device()
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Lizhi Hou <[email protected]>
[ Upstream commit a9162439ad792afcddc04718408ec1380b7a5f63 ]
Some tests trigger a crash in iommu_sva_unbind_device() due to accessing iommu_mm after the associated mm structure has been freed.
Fix this by taking an explicit reference to the mm structure after successfully binding the device, and releasing it only after the device is unbound. This ensures the mm remains valid for the entire SVA bind/unbind lifetime.
--- drivers/accel/amdxdna/amdxdna_pci_drv.c | 3 +++ drivers/accel/amdxdna/amdxdna_pci_drv.h | 1 + 2 files changed, 4 insertions(+)
drivers/accel/amdxdna/amdxdna_pci_drv.c +3 -0
@@ -88,6 +88,8 @@ static int amdxdna_drm_open(struct drm_device *ddev, struct drm_file *filp) ret = -ENODEV ; goto unbind_sva; } + client->mm = current->mm; +mmgrab (client->mm);init_srcu_struct (&client->hwctx_srcu);xa_init_flags (&client->hwctx_xa,XA_FLAGS_ALLOC );mutex_init (&client->mm_lock);
@@ -127,6 +129,7 @@ static void amdxdna_drm_close(struct drm_device *ddev, struct drm_file *filp)drm_gem_object_put (to_gobj (client->dev_heap));iommu_sva_unbind_device (client->sva); +mmdrop (client->mm);XDNA_DBG (xdna,"pid %d closed" , client->pid);kfree (client);
drivers/accel/amdxdna/amdxdna_pci_drv.h +1 -0
@@ -128,6 +128,7 @@ struct amdxdna_client {struct iommu_sva *sva;int pasid; +struct mm_struct *mm; };#define amdxdna_for_each_hwctx (client, hwctx_id, entry) \
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 224/641 accel/amdxdna: Stop job scheduling across aie2_release_resource()
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Lizhi Hou <[email protected]>
[ Upstream commit f1370241fe8045702bc9d0812b996791f0500f1b ]
Running jobs on a hardware context while it is in the process of releasing resources can lead to use-after-free and crashes.
Fix this by stopping job scheduling before calling aie2_release_resource() and restarting it after the release completes. Additionally, aie2_sched_job_run() now checks whether the hardware context is still active.
--- drivers/accel/amdxdna/aie2_ctx.c | 6 ++++++ 1 file changed, 6 insertions(+)
drivers/accel/amdxdna/aie2_ctx.c +6 -0
@@ -317,6 +317,9 @@ aie2_sched_job_run(struct drm_sched_job *sched_job)struct dma_fence *fence;int ret; +if (hwctx->status !=HWCTX_STAT_READY ) +return NULL ; +if (!mmget_not_zero (job->mm))return ERR_PTR (-ESRCH );
@@ -684,7 +687,10 @@ void aie2_hwctx_fini(struct amdxdna_hwctx *hwctx)aie2_hwctx_wait_for_idle (hwctx);/* Request fw to destroy hwctx and cancel the rest pending requests */ +drm_sched_stop (&hwctx->priv->sched,NULL );aie2_release_resource (hwctx); + hwctx->status =HWCTX_STAT_STOP ; +drm_sched_start (&hwctx->priv->sched,0 );mutex_unlock (&xdna->dev_lock);drm_sched_entity_destroy (&hwctx->priv->entity);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 225/641 accel/amdxdna: Fix memory leak in amdxdna_ubuf_map
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Zishun Yi <[email protected]>
[ Upstream commit 84dd57fb0359500092f1101409ca32091731490d ]
The amdxdna_ubuf_map() function allocates memory for sg and internal sg table structures, but it fails to free them if subsequent operations (sg_alloc_table_from_pages or dma_map_sgtable) fail.
--- drivers/accel/amdxdna/amdxdna_ubuf.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)
drivers/accel/amdxdna/amdxdna_ubuf.c +8 -2
@@ -34,15 +34,21 @@ static struct sg_table *amdxdna_ubuf_map(struct dma_buf_attachment *attach, ret =sg_alloc_table_from_pages (sg, ubuf->pages, ubuf->nr_pages,0 , ubuf->nr_pages <<PAGE_SHIFT ,GFP_KERNEL );if (ret) -return ERR_PTR (ret); + goto err_free_sg;if (ubuf->flags &AMDXDNA_UBUF_FLAG_MAP_DMA ) { ret =dma_map_sgtable (attach->dev, sg, direction,0 );if (ret) -return ERR_PTR (ret); + goto err_free_table; }return sg; + +err_free_table: +sg_free_table (sg); +err_free_sg: +kfree (sg); +return ERR_PTR (ret); } static void amdxdna_ubuf_unmap(struct dma_buf_attachment *attach,
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 226/641 HID: intel-ish-hid: fix NULL-ptr-deref in ishtp_bus_remove_all_clients
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Ryan Lin <[email protected]>
[ Upstream commit 56f7db581ee73af53cd512e00a6261a025bf1d58 ]
During a warm reset flow, the cl->device pointer may be NULL if the reset occurs while clients are still being enumerated. Accessing cl->device->reference_count without a NULL check leads to a kernel panic.
This issue was identified during multi-unit warm reboot stress clycles. Add a defensive NULL check for cl->device to ensure stability under such intensive testing conditions.
KASAN: null-ptr-deref in range [0000000000000000-0000000000000007] Workqueue: ish_fw_update_wq fw_reset_work_fn Call Trace: ishtp_bus_remove_all_clients+0xbe/0x130 [intel_ishtp] ishtp_reset_handler+0x85/0x1a0 [intel_ishtp] fw_reset_work_fn+0x8a/0xc0 [intel_ish_ipc]
--- drivers/hid/intel-ish-hid/ishtp/bus.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/hid/intel-ish-hid/ishtp/bus.c +1 -1
@@ -730,7 +730,7 @@ void ishtp_bus_remove_all_clients(struct ishtp_device *ishtp_dev,spin_lock_irqsave (&ishtp_dev->cl_list_lock, flags);list_for_each_entry (cl, &ishtp_dev->cl_list, link) { cl->state =ISHTP_CL_DISCONNECTED ; -if (warm_reset && cl->device->reference_count) +if (warm_reset && cl->device && cl->device->reference_count)continue ;/*
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 227/641 accel/amdxdna: Fix incorrect error code returned for failed chain command
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Lizhi Hou <[email protected]>
[ Upstream commit 750817a7c41de083ca5d73052e97bb7b67d7c394 ]
The driver currently returns an incorrect error code when a chain command fails. In this case, ERT_CMD_STATE_ERROR is expected to be reported for failed chain commands.
--- drivers/accel/amdxdna/aie2_ctx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/accel/amdxdna/aie2_ctx.c +1 -1
@@ -294,7 +294,7 @@ aie2_sched_cmdlist_resp_handler(void *handle, void __iomem *data, size_t size) ret = -EINVAL ; goto out; } -amdxdna_cmd_set_state (cmd_abo, fail_cmd_status); +amdxdna_cmd_set_state (cmd_abo,ERT_CMD_STATE_ERROR );if (amdxdna_cmd_get_op (cmd_abo) ==ERT_CMD_CHAIN ) {struct amdxdna_cmd_chain *cc =amdxdna_cmd_get_payload (cmd_abo,NULL );
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 228/641 ASoC: SDCA: Remove outdated todo comment
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Charles Keepax <[email protected]>
[ Upstream commit b27b57f85fe3f0eca479556ac55bc9cbd1a5685a ]
Support for -cn- properties has already been added, however the TODO comment noting this feature was required was not removed. Remove the now redundant comment.
--- sound/soc/sdca/sdca_functions.c | 4 ---- 1 file changed, 4 deletions(-)
sound/soc/sdca/sdca_functions.c +0 -4
@@ -854,10 +854,6 @@ static int find_sdca_control_value(struct device *dev, struct sdca_entity *entitreturn 0 ; } -/* -* TODO: Add support for -cn- properties, allowing different channels to have -* different defaults etc. -*/ static int find_sdca_entity_control (struct device *dev,struct sdca_entity *entity,struct fwnode_handle *control_node,struct sdca_control *control)
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 229/641 ASoC: SDCA: Force some SDCA Controls to be volatile
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Charles Keepax <[email protected]>
[ Upstream commit c7b6c6b60594fd1efe35c61bc6a2176b25263ccc ]
Whilst SDCA does specify an Access Mode for each Control, there is not a 1-to-1 mapping between that and ASoC's internal representation. Some registers require being treated as volatile from the hosts perspective even in their Access Mode is Read-Write. Add an explicit list of SDCA controls that should be forced volatile.
Stable-dep-of: 9fad74b79e5f ("ASoC: SDCA: Handle volatile controls correctly")
--- include/sound/sdca_function.h | 1 + sound/soc/sdca/sdca_functions.c | 58 +++++++++++++++++++++++++++++++++ sound/soc/sdca/sdca_regmap.c | 9 +---- 3 files changed, 60 insertions(+), 8 deletions(-)
include/sound/sdca_function.h +1 -0
@@ -771,6 +771,7 @@ struct sdca_control {u8 layers;bool deferrable; +bool is_volatile;bool has_default;bool has_fixed; };
sound/soc/sdca/sdca_functions.c +58 -0
70 lines not on this page · raw message
sound/soc/sdca/sdca_regmap.c +1 -8
@@ -147,14 +147,7 @@ bool sdca_regmap_volatile(struct sdca_function_data *function, unsigned int reg)if (!control)return false; -switch (control->mode) { -case SDCA_ACCESS_MODE_RO : -case SDCA_ACCESS_MODE_RW1S : -case SDCA_ACCESS_MODE_RW1C : -return true; -default : -return false; - } +return control->is_volatile; }EXPORT_SYMBOL_NS (sdca_regmap_volatile,"SND_SOC_SDCA" );
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 230/641 ASoC: SDCA: Handle volatile controls correctly
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Charles Keepax <[email protected]>
[ Upstream commit 9fad74b79e5ff353fe156c4b685cceffa5afdb1d ]
There are very few volatile controls in SDCA that are exported as ALSA controls, typically Detected Mode is the only common one. However, the current code does not resume the device when these ALSA controls are accessed, which will result in the read/write failing.
Add a new wrapper specifically for volatile controls that will do the required pm_runtime operations before accessing the register.
--- sound/soc/sdca/sdca_asoc.c | 52 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 50 insertions(+), 2 deletions(-)
sound/soc/sdca/sdca_asoc.c +50 -2
@@ -16,6 +16,7 @@#include <linux/minmax.h> #include <linux/module.h> #include <linux/overflow.h> +#include <linux/pm_runtime.h> #include <linux/regmap.h> #include <linux/soundwire/sdw_registers.h> #include <linux/string_helpers.h>
@@ -836,6 +837,48 @@ static int control_limit_kctl(struct device *dev,return 0 ; } +static int volatile_get_volsw (struct snd_kcontrol *kcontrol, +struct snd_ctl_elem_value *ucontrol) +{ +struct snd_soc_component *component =snd_kcontrol_chip (kcontrol); +struct device *dev = component->dev; +int ret; + + ret =pm_runtime_resume_and_get (dev); +if (ret <0 ) { +dev_err (dev,"failed to resume reading %s: %d\n" , + kcontrol->id.name, ret); +return ret; + } + + ret =snd_soc_get_volsw (kcontrol, ucontrol); + +pm_runtime_put (dev); + +return ret; +} + +static int volatile_put_volsw (struct snd_kcontrol *kcontrol, +struct snd_ctl_elem_value *ucontrol) +{ +struct snd_soc_component *component =snd_kcontrol_chip (kcontrol); +struct device *dev = component->dev; +int ret; + + ret =pm_runtime_resume_and_get (dev); +if (ret <0 ) { +dev_err (dev,"failed to resume writing %s: %d\n" , + kcontrol->id.name, ret); +return ret; + } + + ret =snd_soc_put_volsw (kcontrol, ucontrol); + +pm_runtime_put (dev); + +return ret; +} + static int populate_control(struct device *dev, struct sdca_function_data *function, struct sdca_entity *entity,
@@ -890,8 +933,13 @@ static int populate_control(struct device *dev, (*kctl)->private_value = (unsigned long )mc; (*kctl)->iface =SNDRV_CTL_ELEM_IFACE_MIXER ; (*kctl)->info = snd_soc_info_volsw; - (*kctl)->get = snd_soc_get_volsw; - (*kctl)->put = snd_soc_put_volsw; +if (control->is_volatile) { + (*kctl)->get = volatile_get_volsw; + (*kctl)->put = volatile_put_volsw; + }else { + (*kctl)->get = snd_soc_get_volsw; + (*kctl)->put = snd_soc_put_volsw; + }if (readonly_control (control)) (*kctl)->access =SNDRV_CTL_ELEM_ACCESS_READ ;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 231/641 spi: tools: Add include folder to .gitignore
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Francesco Lavra <[email protected]>
[ Upstream commit 5af56f30c4fcbade4a92f94dadfea517d1db9703 ]
The Makefile for the SPI tools creates an include/linux/spi folder and some symlinks inside it. After running make -C spi/tools, this folder shows up as untracked in the git status.
Add the above folder to the .gitignore file.
--- tools/spi/.gitignore | 1 + 1 file changed, 1 insertion(+)
tools/spi/.gitignore +1 -0
@@ -1,3 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only spidev_fdx spidev_test +include/
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 232/641 Revert "hwmon: (ibmpex) fix use-after-free in high/low store"
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Guenter Roeck <[email protected]>
[ Upstream commit 8bde3e395a85017f12af2b0ba5c3684f5af9c006 ]
This reverts commit 6946c726c3f4c36f0f049e6f97e88c510b15f65d.
Jean Delvare points out that the patch does not completely fix the reported problem, that it in fact introduces a (new) race condition, and that it may actually not be needed in the first place.
Various AI reviews agree. Specific and relevant AI feedback:
"
This reordering sets the driver data to NULL before removing the sensor attributes in the loop below.
ibmpex_show_sensor() retrieves this driver data via dev_get_drvdata() but does not check if it is NULL before dereferencing it to access data->sensors[].
If a userspace process reads a sensor file (like temp1_input) while this delete function is running, could it race with the dev_set_drvdata(..., NULL) call here and crash in ibmpex_show_sensor()?
Would it be safer to keep the original order where device_remove_file() is called before clearing the driver data? device_remove_file() should wait for any active sysfs callbacks to complete, which might already prevent the use-after-free this patch intends to fix.
"
Revert the offending patch. If it can be shown that the originally reported alleged race condition does indeed exist, it can always be re-introduced with a complete fix.
--- drivers/hwmon/ibmpex.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-)
drivers/hwmon/ibmpex.c +2 -7
@@ -277,9 +277,6 @@ static ssize_t ibmpex_high_low_store(struct device *dev, {struct ibmpex_bmc_data *data =dev_get_drvdata (dev); -if (!data) -return -ENODEV ; -ibmpex_reset_high_low_data (data);return count;
@@ -511,9 +508,6 @@ static void ibmpex_bmc_delete(struct ibmpex_bmc_data *data) {int i, j; -hwmon_device_unregister (data->hwmon_dev); -dev_set_drvdata (data->bmc_device,NULL ); -device_remove_file (data->bmc_device, &sensor_dev_attr_reset_high_low.dev_attr);device_remove_file (data->bmc_device, &dev_attr_name.attr);
@@ -527,7 +521,8 @@ static void ibmpex_bmc_delete(struct ibmpex_bmc_data *data) }list_del (&data->list); - +dev_set_drvdata (data->bmc_device,NULL ); +hwmon_device_unregister (data->hwmon_dev);ipmi_destroy_user (data->user);kfree (data->sensors);kfree (data);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 233/641 hwmon: (pmbus/mpq8785) fix VOUT_MODE mismatch during identification
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Carl Lee <[email protected]>
[ Upstream commit 9e33c1dba22431bea9b2bf48adf56859e52fc7ec ]
When MPQ8785 reports VOUT_MODE as VID mode, mpq8785_identify() configures the driver for direct mode. The subsequent pmbus_identify_common() check then fails due to a mismatch between the reported mode and the configured mode, causing device initialization to fail.
Override the reported VOUT_MODE to direct mode to keep the driver configuration consistent with the reported mode and allow successful device initialization.
This does not change how voltages are interpreted, but avoids a false identification failure caused by mismatched mode handling.
--- drivers/hwmon/pmbus/mpq8785.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)
drivers/hwmon/pmbus/mpq8785.c +28 -0
@@ -47,6 +47,33 @@ static int mpq8785_identify(struct i2c_client *client,return 0 ; }; +static int mpq8785_read_byte_data (struct i2c_client *client,int page,int reg) +{ +int ret; + +switch (reg) { +case PMBUS_VOUT_MODE : + ret =pmbus_read_byte_data (client, page, reg); +if (ret <0 ) +return ret; + +if ((ret >>5 ) ==1 ) { +/* +* The MPQ8785 chip reports VOUT_MODE as VID mode, but the driver +* treats VID as direct mode. Without this, identification would fail +* due to mode mismatch. +* This override ensures the reported mode matches the driver +* configuration, allowing successful initialization. +*/ +return PB_VOUT_MODE_DIRECT ; + } + +return ret; +default : +return -ENODATA ; + } +} +static int mpm82504_read_word_data (struct i2c_client *client,int page,int phase,int reg) {
@@ -129,6 +156,7 @@ static int mpq8785_probe(struct i2c_client *client)break ;case mpq8785: info->identify = mpq8785_identify; + info->read_byte_data = mpq8785_read_byte_data;break ;default :return -ENODEV ;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 234/641 PCI: mediatek: Fix IRQ domain leak when MSI allocation fails
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Haotian Zhang <[email protected]>
[ Upstream commit 7f0cdcddf8bef1c8c18f9be6708073fd3790a20f ]
In mtk_pcie_init_irq_domain(), if mtk_pcie_allocate_msi_domains() fails after port->irq_domain has been successfully created via irq_domain_create_linear(), the function returns directly without cleaning up the allocated IRQ domain, resulting in a resource leak.
Add irq_domain_remove() call in the error path to properly release the INTx IRQ domain before returning the error.
--- drivers/pci/controller/pcie-mediatek.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
drivers/pci/controller/pcie-mediatek.c +3 -1
@@ -575,8 +575,10 @@ static int mtk_pcie_init_irq_domain(struct mtk_pcie_port *port,if (IS_ENABLED (CONFIG_PCI_MSI )) { ret =mtk_pcie_allocate_msi_domains (port); -if (ret) +if (ret) { +irq_domain_remove (port->irq_domain);return ret; + } }return 0 ;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 235/641 PCI: xilinx: Fix INTx IRQ domain leak in error paths
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Haotian Zhang <[email protected]>
[ Upstream commit f42b3c053b1554d66af6fe45bb1ef357464c0456 ]
In xilinx_pcie_init_irq_domain(), if xilinx_allocate_msi_domains() fails after pcie->leg_domain has been successfully created via irq_domain_create_linear(), the function returns directly without cleaning up the allocated IRQ domain, resulting in a resource leak. In xilinx_free_msi_domains(), pcie->leg_domain is also neglected.
Add irq_domain_remove() call in the error path to properly release the IRQ domain before returning the error. Also rename xilinx_free_msi_domains() to xilinx_free_irq_domains() and add the release of pcie->leg_domain to it.
--- drivers/pci/controller/pcie-xilinx.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-)
drivers/pci/controller/pcie-xilinx.c +6 -3
@@ -302,9 +302,10 @@ static int xilinx_allocate_msi_domains(struct xilinx_pcie *pcie)return 0 ; } -static void xilinx_free_msi_domains (struct xilinx_pcie *pcie) +static void xilinx_free_irq_domains (struct xilinx_pcie *pcie) {irq_domain_remove (pcie->msi_domain); +irq_domain_remove (pcie->leg_domain); }/* INTx Functions */
@@ -480,8 +481,10 @@ static int xilinx_pcie_init_irq_domain(struct xilinx_pcie *pcie)phys_addr_t pa =ALIGN_DOWN (virt_to_phys (pcie),SZ_4K ); ret =xilinx_allocate_msi_domains (pcie); -if (ret) +if (ret) { +irq_domain_remove (pcie->leg_domain);return ret; + }pcie_write (pcie,upper_32_bits (pa),XILINX_PCIE_REG_MSIBASE1 );pcie_write (pcie,lower_32_bits (pa),XILINX_PCIE_REG_MSIBASE2 );
@@ -600,7 +603,7 @@ static int xilinx_pcie_probe(struct platform_device *pdev) err =pci_host_probe (bridge);if (err) -xilinx_free_msi_domains (pcie); +xilinx_free_irq_domains (pcie);return err; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 236/641 Documentation: PCI: endpoint: Fix ntb/vntb copy & paste errors
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Baruch Siach <[email protected]>
[ Upstream commit ad0c6da5be901f5c181490f683d22b416059bccb ]
Fix copy & paste errors by changing the references from 'ntb' to 'vntb'.
--- Documentation/PCI/endpoint/pci-vntb-howto.rst | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)
Documentation/PCI/endpoint/pci-vntb-howto.rst +7 -7
@@ -52,14 +52,14 @@ pci-epf-vntb device, the following commands can be used:: # cd /sys/kernel/config/pci_ep/ # mkdir functions/pci_epf_vntb/func1 -The "mkdir func1" above creates the pci-epf-ntb function device that will +The "mkdir func1" above creates the pci-epf-vntb function device that will be probed by pci_epf_vntb driver. The PCI endpoint framework populates the directory with the following configurable fields:: - # ls functions/pci_epf_ntb/func1 - baseclass_code deviceid msi_interrupts pci-epf-ntb.0 + # ls functions/pci_epf_vntb/func1 + baseclass_code deviceid msi_interrupts pci-epf-vntb.0 progif_code secondary subsys_id vendorid cache_line_size interrupt_pin msix_interrupts primary revid subclass_code subsys_vendor_id
@@ -111,13 +111,13 @@ A sample configuration for virtual NTB driver for virtual PCI bus:: # echo 0x080A > functions/pci_epf_vntb/func1/pci_epf_vntb.0/vntb_pid # echo 0x10 > functions/pci_epf_vntb/func1/pci_epf_vntb.0/vbus_number -Binding pci-epf-ntb Device to EP Controller +Binding pci-epf-vntb Device to EP Controller -------------------------------------------- NTB function device should be attached to PCI endpoint controllers connected to the host. - # ln -s controllers/5f010000.pcie_ep functions/pci-epf-ntb/func1/primary + # ln -s controllers/5f010000.pcie_ep functions/pci_epf_vntb/func1/primary Once the above step is completed, the PCI endpoint controllers are ready to establish a link with the host.
@@ -139,7 +139,7 @@ lspci Output at Host side ------------------------- Note that the devices listed here correspond to the values populated in -"Creating pci-epf-ntb Device" section above:: +"Creating pci-epf-vntb Device" section above:: # lspci 00:00.0 PCI bridge: Freescale Semiconductor Inc Device 0000 (rev 01)
@@ -152,7 +152,7 @@ lspci Output at EP Side / Virtual PCI bus ----------------------------------------- Note that the devices listed here correspond to the values populated in -"Creating pci-epf-ntb Device" section above:: +"Creating pci-epf-vntb Device" section above:: # lspci 10:00.0 Unassigned class [ffff]: Dawicontrol Computersysteme GmbH Device 1234 (rev ff)
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 237/641 PCI/PM: Avoid redundant delays on D3hot->D3cold
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Brian Norris <[email protected]>
[ Upstream commit 4d982084507d663df160546c4c48066a8887ed89 ]
When transitioning to D3cold, __pci_set_power_state() first transitions to D3hot. If the device was already in D3hot, this adds excess work:
(a) read/modify/write PMCSR; and
(b) excess delay (pci_dev_d3_sleep()).
For (b), we already performed the necessary delay on the previous D3hot entry; this was extra noticeable when evaluating runtime PM transition latency.
Check whether we're already in the target state before continuing.
Note that __pci_set_power_state() already does this same check for other state transitions, but D3cold is special because __pci_set_power_state() converts it to D3hot for the purposes of PMCSR.
This seems to be an oversight in commit 0aacdc957401 ("PCI/PM: Clean up pci_set_low_power_state()").
--- drivers/pci/pci.c | 3 +++ 1 file changed, 3 insertions(+)
drivers/pci/pci.c +3 -0
@@ -1488,6 +1488,9 @@ static int pci_set_low_power_state(struct pci_dev *dev, pci_power_t state, bool || (state == PCI_D2 && !dev->d2_support))return -EIO ; +if (dev->current_state == state) +return 0 ; +pci_read_config_word (dev, dev->pm_cap +PCI_PM_CTRL , &pmcsr);if (PCI_POSSIBLE_ERROR (pmcsr)) { pci_err(dev, "Unable to change power state from %s to %s, device inaccessible\n",
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 238/641 wifi: cfg80211: Fix use_for flag update on BSS refresh
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Huang Chenming <[email protected]>
[ Upstream commit 4073ea516106e5f98ed0476f89cdede8baa98d37 ]
Userspace may fail to connect to certain BSS that were initially marked as unusable due to regulatory restrictions (use_for = 0, e.g., 6 GHz power type mismatch). Even after these restrictions are removed and the BSS becomes usable, connection attempts still fail.
The issue occurs in cfg80211_update_known_bss() where the use_for flag is updated using bitwise AND (&=) instead of direct assignment. Once a BSS is marked with use_for = 0, the AND operation masks out any subsequent non-zero values, permanently keeping the flag at 0. This causes __cfg80211_get_bss(), invoked by nl80211_assoc_bss(), to fail the check "(bss->pub.use_for & use_for) != use_for", thereby blocking association.
Replace the bitwise AND operation with direct assignment so the use_for flag accurately reflects the current BSS state.
--- net/wireless/scan.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
net/wireless/scan.c +1 -1
@@ -1959,7 +1959,7 @@ cfg80211_update_known_bss(struct cfg80211_registered_device *rdev,ether_addr_copy (known->parent_bssid, new->parent_bssid); known->pub.max_bssid_indicator = new->pub.max_bssid_indicator; known->pub.bssid_index = new->pub.bssid_index; - known->pub.use_for &= new->pub.use_for; + known->pub.use_for = new->pub.use_for; known->pub.cannot_use_reasons = new->pub.cannot_use_reasons; known->bss_source = new->bss_source;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 239/641 PCI/P2PDMA: Release per-CPU pgmap ref when vm_insert_page() fails
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Hou Tao <[email protected]>
[ Upstream commit 6220694c52a5a04102b48109e4f24e958b559bd3 ]
When vm_insert_page() fails in p2pmem_alloc_mmap(), p2pmem_alloc_mmap() doesn't invoke percpu_ref_put() to free the per-CPU ref of pgmap acquired after gen_pool_alloc_owner(), and memunmap_pages() will hang forever when trying to remove the PCI device.
Fix it by adding the missed percpu_ref_put().
--- drivers/pci/p2pdma.c | 1 + 1 file changed, 1 insertion(+)
drivers/pci/p2pdma.c +1 -0
@@ -152,6 +152,7 @@ static int p2pmem_alloc_mmap(struct file *filp, struct kobject *kobj, ret =vm_insert_page (vma, vaddr, page);if (ret) {gen_pool_free (p2pdma->pool, (uintptr_t )kaddr, len); +percpu_ref_put (ref);return ret; }percpu_ref_get (ref);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 240/641 PCI/P2PDMA: Fix p2pmem_alloc_mmap() warning condition
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Hou Tao <[email protected]>
[ Upstream commit cb500023a75246f60b79af9f7321d6e75330c5b5 ]
Commit b7e282378773 has already changed the initial page refcount of p2pdma page from one to zero, however, in p2pmem_alloc_mmap() it uses "VM_WARN_ON_ONCE_PAGE(!page_ref_count(page))" to assert the initial page refcount should not be zero and the following will be reported when CONFIG_DEBUG_VM is enabled:
page: refcount:0 mapcount:0 mapping:0000000000000000 index:0x0 pfn:0x380400000 flags: 0x20000000002000(reserved|node=0|zone=4) raw: 0020000000002000 ff1100015e3ab440 0000000000000000 0000000000000000 raw: 0000000000000000 0000000000000000 00000000ffffffff 0000000000000000 page dumped because: VM_WARN_ON_ONCE_PAGE(!page_ref_count(page)) ------------[ cut here ]------------ WARNING: CPU: 5 PID: 449 at drivers/pci/p2pdma.c:240 p2pmem_alloc_mmap+0x83a/0xa60
Fix by using "page_ref_count(page)" as the assertion condition.
--- drivers/pci/p2pdma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/pci/p2pdma.c +1 -1
@@ -147,7 +147,7 @@ static int p2pmem_alloc_mmap(struct file *filp, struct kobject *kobj,* we have just allocated the page no one else should be * using it. */ -VM_WARN_ON_ONCE_PAGE (!page_ref_count (page), page); +VM_WARN_ON_ONCE_PAGE (page_ref_count (page), page);set_page_count (page,1 ); ret =vm_insert_page (vma, vaddr, page);if (ret) {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 241/641 Documentation: tracing: Add PCI tracepoint documentation
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Shuai Xue <[email protected]>
[ Upstream commit 8236fc613d44e59f6736d6c3e9efffaf26ab7f00 ]
The PCI tracing system provides tracepoints to monitor critical hardware events that can impact system performance and reliability. Add documentation about it.
[bhelgaas: squash fixes:
https://lore.kernel.org/r/[email protected]
https://lore.kernel.org/r/[email protected]]
--- Documentation/trace/events-pci.rst | 74 ++++++++++++++++++++++++++++++ Documentation/trace/index.rst | 1 + 2 files changed, 75 insertions(+) create mode 100644 Documentation/trace/events-pci.rst
Documentation/trace/events-pci.rst new file +74 -0
@@ -0,0 +1,74 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=========================== +Subsystem Trace Points: PCI +=========================== + +Overview +======== +The PCI tracing system provides tracepoints to monitor critical hardware events +that can impact system performance and reliability. These events normally show +up here: + + /sys/kernel/tracing/events/pci + +Cf. include/trace/events/pci.h for the events definitions. + +Available Tracepoints +===================== + +pci_hp_event +------------ + +Monitors PCI hotplug events including card insertion/removal and link +state changes. +:: + + pci_hp_event "%s slot:%s, event:%s\n" + +**Event Types**: + +* ``LINK_UP`` - PCIe link established +* ``LINK_DOWN`` - PCIe link lost +* ``CARD_PRESENT`` - Card detected in slot +* ``CARD_NOT_PRESENT`` - Card removed from slot + +**Example Usage**:: + + # Enable the tracepoint + echo 1 > /sys/kernel/debug/tracing/events/pci/pci_hp_event/enable + + # Monitor events (the following output is generated when a device is hotplugged) + cat /sys/kernel/debug/tracing/trace_pipe + irq/51-pciehp-88 [001] ..... 1311.177459: pci_hp_event: 0000:00:02.0 slot:10, event:CARD_PRESENT + + irq/51-pciehp-88 [001] ..... 1311.177566: pci_hp_event: 0000:00:02.0 slot:10, event:LINK_UP + +pcie_link_event +--------------- + +Monitors PCIe link speed changes and provides detailed link status information. +:: + + pcie_link_event "%s type:%d, reason:%d, cur_bus_speed:%d, max_bus_speed:%d, width:%u, flit_mode:%u, status:%s\n" + +**Parameters**: + +* ``type`` - PCIe device type (4=Root Port, etc.) +* ``reason`` - Reason for link change: + + - ``0`` - Link retrain + - ``1`` - Bus enumeration + - ``2`` - Bandwidth notification enable + - ``3`` - Bandwidth notification IRQ + - ``4`` - Hotplug event + + +**Example Usage**:: + + # Enable the tracepoint + echo 1 > /sys/kernel/debug/tracing/events/pci/pcie_link_event/enable + + # Monitor events (the following output is generated when a device is hotplugged) + cat /sys/kernel/debug/tracing/trace_pipe + irq/51-pciehp-88 [001] ..... 381.545386: pcie_link_event: 0000:00:02.0 type:4, reason:4, cur_bus_speed:20, max_bus_speed:23, width:1, flit_mode:0, status:DLLLA
Documentation/trace/index.rst +1 -0
@@ -54,6 +54,7 @@ applications. events-power events-nmi events-msr + events-pci boottime-trace histogram histogram-design
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 242/641 PCI: Do not attempt to set ExtTag for VFs
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Håkon Bugge <[email protected]>
[ Upstream commit 73711730a1128d91ebca1a6994ceeb18f36cb0cd ]
The bit for enabling extended tags is Reserved and Preserved (RsvdP) for VFs, according to PCIe r7.0 section 7.5.3.4 table 7.21. Hence, bail out early from pci_configure_extended_tags() if the device is a VF.
Otherwise, we may see incorrect log messages such as:
kernel: pci 0000:af:00.2: enabling Extended Tags
(af:00.2 is a VF)
--- drivers/pci/probe.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/pci/probe.c +2 -1
@@ -2251,7 +2251,8 @@ int pci_configure_extended_tags(struct pci_dev *dev, void *ign)u16 ctl;int ret; -if (!pci_is_pcie (dev)) +/* PCI_EXP_DEVCTL_EXT_TAG is RsvdP in VFs */ +if (!pci_is_pcie (dev) || dev->is_virtfn)return 0 ; ret =pcie_capability_read_dword (dev,PCI_EXP_DEVCAP , &cap);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 243/641 PCI: sophgo: Disable L0s and L1 on Sophgo 2044 PCIe Root Ports
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Inochi Amaoto <[email protected]>
[ Upstream commit 613f3255a35a95f52575dd8c60b7ac9d711639ce ]
Sophgo 2044 Root Ports advertise L0 and L1 capabilities without supporting them. Since commit f3ac2ff14834 ("PCI/ASPM: Enable all ClockPM and ASPM states for devicetree platforms") force enabled ASPM on all device tree platforms, the issue became evident and the SG2044 Root Port started breaking.
Hence, disable the L0s and L1 capabilities in the LINKCAP register for the SG2044 Root Ports, so that these states won't get enabled.
--- drivers/pci/controller/dwc/pcie-sophgo.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
drivers/pci/controller/dwc/pcie-sophgo.c +18 -0
@@ -161,6 +161,22 @@ static void sophgo_pcie_msi_enable(struct dw_pcie_rp *pp)raw_spin_unlock_irqrestore (&pp->lock, flags); } +static void sophgo_pcie_disable_l0s_l1 (struct dw_pcie_rp *pp) +{ +struct dw_pcie *pci =to_dw_pcie_from_pp (pp); +u32 offset, val; + + offset =dw_pcie_find_capability (pci,PCI_CAP_ID_EXP ); + +dw_pcie_dbi_ro_wr_en (pci); + + val =dw_pcie_readl_dbi (pci,PCI_EXP_LNKCAP + offset); + val &= ~(PCI_EXP_LNKCAP_ASPM_L0S |PCI_EXP_LNKCAP_ASPM_L1 ); +dw_pcie_writel_dbi (pci,PCI_EXP_LNKCAP + offset, val); + +dw_pcie_dbi_ro_wr_dis (pci); +} +static int sophgo_pcie_host_init (struct dw_pcie_rp *pp) {int irq;
@@ -171,6 +187,8 @@ static int sophgo_pcie_host_init(struct dw_pcie_rp *pp)irq_set_chained_handler_and_data (irq, sophgo_pcie_intx_handler, pp); +sophgo_pcie_disable_l0s_l1 (pp); +sophgo_pcie_msi_enable (pp);return 0 ;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 244/641 PCI/portdrv: Fix potential resource leak
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Uwe Kleine-König <[email protected]>
[ Upstream commit 01464a3fdf91c041a381d93a1b6fefbdb819a46f ]
pcie_port_probe_service() unconditionally calls get_device() (unless it fails). So drop that reference also unconditionally as it's fine for a PCIe driver to not have a remove callback.
--- drivers/pci/pcie/portdrv.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
drivers/pci/pcie/portdrv.c +3 -3
@@ -557,10 +557,10 @@ static int pcie_port_remove_service(struct device *dev) pciedev =to_pcie_device (dev); driver =to_service_driver (dev->driver); -if (driver && driver->remove) { +if (driver && driver->remove) driver->remove (pciedev); -put_device (dev); - } + +put_device (dev);return 0 ; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 245/641 dm: fix unlocked test for dm_suspended_md
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Mikulas Patocka <[email protected]>
[ Upstream commit 24c405fdbe215c45e57bba672cc42859038491ee ]
The function dm_blk_report_zones tests if the device is suspended with the "dm_suspended_md" call. However, this function is called without holding any locks, so the device may be suspended just after it.
Move the call to dm_suspended_md after dm_get_live_table, so that the device can't be suspended after the suspended state was tested.
--- drivers/md/dm-zone.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-)
drivers/md/dm-zone.c +6 -3
@@ -66,11 +66,13 @@ int dm_blk_report_zones(struct gendisk *disk, sector_t sector,* Zone revalidation during __bind() is in progress, but this * call is from a different process */ -if (dm_suspended_md (md)) -return -EAGAIN ; - map =dm_get_live_table (md, &srcu_idx); put_table = true; + +if (dm_suspended_md (md)) { + ret = -EAGAIN ; + goto do_put_table; + } }else {/* Zone revalidation during __bind() */ map = zone_revalidate_map;
@@ -80,6 +82,7 @@ int dm_blk_report_zones(struct gendisk *disk, sector_t sector, ret =dm_blk_do_report_zones (md, map, sector, nr_zones, cb, data); +do_put_table:if (put_table)dm_put_live_table (md, srcu_idx);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 246/641 dm: use READ_ONCE in dm_blk_report_zones
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Mikulas Patocka <[email protected]>
[ Upstream commit e9f5a55b70ae6187ab64ef2d1232ae2738e31d1f ]
The functon dm_blk_report_zones reads md->zone_revalidate_map, however it may change while the function is running. Use READ_ONCE.
--- drivers/md/dm-zone.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/md/dm-zone.c +1 -1
@@ -56,7 +56,7 @@ int dm_blk_report_zones(struct gendisk *disk, sector_t sector, {struct mapped_device *md = disk->private_data;struct dm_table *map; -struct dm_table *zone_revalidate_map = md->zone_revalidate_map; +struct dm_table *zone_revalidate_map =READ_ONCE (md->zone_revalidate_map);int srcu_idx, ret = -EIO ;bool put_table = false;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 247/641 PCI/PTM: Fix pcie_ptm_create_debugfs() memory leak
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Aadityarangan Shridhar Iyengar <[email protected]>
[ Upstream commit 62171369cf17794ddd88f602c2c84d008ecafcff ]
In pcie_ptm_create_debugfs(), if devm_kasprintf() fails after successfully allocating ptm_debugfs with kzalloc(), the function returns without freeing the allocated memory, resulting in a memory leak.
Free ptm_debugfs before returning in the devm_kasprintf() error path and in pcie_ptm_destroy_debugfs().
[bhelgaas: squash additional fix from Mani:
https://lore.kernel.org/r/pdp4xc4d5ee3e547mmdro5riui3mclduqdl7j6iclfbozo2a4c@7m3qdm6yrhuv]
--- drivers/pci/pcie/ptm.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
drivers/pci/pcie/ptm.c +4 -1
@@ -519,8 +519,10 @@ struct pci_ptm_debugfs *pcie_ptm_create_debugfs(struct device *dev, void *pdata,return NULL ; dirname =devm_kasprintf (dev,GFP_KERNEL ,"pcie_ptm_%s" ,dev_name (dev)); -if (!dirname) +if (!dirname) { +kfree (ptm_debugfs);return NULL ; + } ptm_debugfs->debugfs =debugfs_create_dir (dirname,NULL ); ptm_debugfs->pdata = pdata;
@@ -551,6 +553,7 @@ void pcie_ptm_destroy_debugfs(struct pci_ptm_debugfs *ptm_debugfs)mutex_destroy (&ptm_debugfs->lock);debugfs_remove_recursive (ptm_debugfs->debugfs); + kfree(ptm_debugfs); }EXPORT_SYMBOL_GPL (pcie_ptm_destroy_debugfs);#endif
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 248/641 PCI/P2PDMA: Reset page reference count when page mapping fails
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Alistair Popple <[email protected]>
[ Upstream commit 83014d82a1100abc89f7712ad67c3e5accaddc43 ]
When mapping a p2pdma page the page reference count is initialised to 1 prior to calling vm_insert_page(). This is to avoid vm_insert_page() warning if the page refcount is zero. Prior to setting the page count there is a check to ensure the page is currently free (ie. has a zero reference count).
However vm_insert_page() can fail. In this case the pages are freed back to the genalloc pool, but that does not reset the page refcount. So a future allocation of the same page will see the elevated page refcount from the previous set_page_count() call triggering the VM_WARN_ON_ONCE_PAGE checking that the page is free.
Fix this by resetting the page refcount to zero using set_page_count(). Note that put_page() is not used because that would result in freeing the page twice due to implicitly calling p2pdma_folio_free().
--- drivers/pci/p2pdma.c | 7 +++++++ 1 file changed, 7 insertions(+)
drivers/pci/p2pdma.c +7 -0
@@ -152,6 +152,13 @@ static int p2pmem_alloc_mmap(struct file *filp, struct kobject *kobj, ret =vm_insert_page (vma, vaddr, page);if (ret) {gen_pool_free (p2pdma->pool, (uintptr_t )kaddr, len); + +/* +* Reset the page count. We don't use put_page() +* because we don't want to trigger the +* p2pdma_folio_free() path. +*/ +set_page_count (page,0 );percpu_ref_put (ref);return ret; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 249/641 wifi: ath9k: add OF dependency to AHB
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Rosen Penev <[email protected]>
[ Upstream commit 125e7b31f041cc0a4ede1e42bef69915f0a63a35 ]
The conversion to OF missed adding a Kconfig dependency.
--- drivers/net/wireless/ath/ath9k/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/net/wireless/ath/ath9k/Kconfig +1 -1
@@ -47,7 +47,7 @@ config ATH9K_PCI config ATH9K_AHB bool "Atheros ath9k AHB bus support" - depends on ATH9K + depends on ATH9K && OF default n help This option enables the AHB bus support in ath9k.
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 250/641 wifi: ath12k: do WoW offloads only on primary link
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Baochen Qiang <[email protected]>
[ Upstream commit e62102ac9b773bdb08475aa9ca24dea61ae98708 ]
In case of multi-link connection, WCN7850 firmware crashes due to WoW offloads enabled on both primary and secondary links.
Change to do it only on primary link to fix it.
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c5-00284-QCAHMTSWPL_V1.0_V2.0_SILICONZ-1
--- drivers/net/wireless/ath/ath12k/wow.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
drivers/net/wireless/ath/ath12k/wow.c +16 -0
@@ -135,6 +135,9 @@ static int ath12k_wow_cleanup(struct ath12k *ar)lockdep_assert_wiphy (ath12k_ar_to_hw (ar)->wiphy);list_for_each_entry (arvif, &ar->arvifs, list) { +if (arvif != &arvif->ahvif->deflink) +continue ; + ret =ath12k_wow_vif_cleanup (arvif);if (ret) { ath12k_warn(ar->ab, "failed to clean wow wakeups on vdev %i: %d\n",
@@ -479,8 +482,12 @@ static int ath12k_wow_set_wakeups(struct ath12k *ar,lockdep_assert_wiphy (ath12k_ar_to_hw (ar)->wiphy);list_for_each_entry (arvif, &ar->arvifs, list) { +if (arvif != &arvif->ahvif->deflink) +continue ; +if (ath12k_wow_is_p2p_vdev (arvif->ahvif))continue ; + ret =ath12k_wow_vif_set_wakeups (arvif, wowlan);if (ret) { ath12k_warn(ar->ab, "failed to set wow wakeups on vdev %i: %d\n",
@@ -538,6 +545,9 @@ static int ath12k_wow_nlo_cleanup(struct ath12k *ar)lockdep_assert_wiphy (ath12k_ar_to_hw (ar)->wiphy);list_for_each_entry (arvif, &ar->arvifs, list) { +if (arvif != &arvif->ahvif->deflink) +continue ; +if (ath12k_wow_is_p2p_vdev (arvif->ahvif))continue ;
@@ -745,6 +755,9 @@ static int ath12k_wow_arp_ns_offload(struct ath12k *ar, bool enable)list_for_each_entry (arvif, &ar->arvifs, list) { ahvif = arvif->ahvif; +if (arvif != &ahvif->deflink) +continue ; +if (ahvif->vdev_type !=WMI_VDEV_TYPE_STA )continue ;
@@ -776,6 +789,9 @@ static int ath12k_gtk_rekey_offload(struct ath12k *ar, bool enable)lockdep_assert_wiphy (ath12k_ar_to_hw (ar)->wiphy);list_for_each_entry (arvif, &ar->arvifs, list) { +if (arvif != &arvif->ahvif->deflink) +continue ; +if (arvif->ahvif->vdev_type !=WMI_VDEV_TYPE_STA || !arvif->is_up || !arvif->rekey_data.enable_offload)
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 251/641 quota: fix livelock between quotactl and freeze_super
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Abhishek Bapat <[email protected]>
[ Upstream commit 77449e453dfc006ad738dec55374c4cbc056fd39 ]
When a filesystem is frozen, quotactl_block() enters a retry loop waiting for the filesystem to thaw. It acquires s_umount, checks the freeze state, drops s_umount and uses sb_start_write() - sb_end_write() pair to wait for the unfreeze.
However, this retry loop can trigger a livelock issue, specifically on kernels with preemption disabled.
The mechanism is as follows:
1. freeze_super() sets SB_FREEZE_WRITE and calls sb_wait_write().
2. sb_wait_write() calls percpu_down_write(), which initiates synchronize_rcu().
3. Simultaneously, quotactl_block() spins in its retry loop, immediately executing the sb_start_write() - sb_end_write() pair.
4. Because the kernel is non-preemptible and the loop contains no scheduling points, quotactl_block() never yields the CPU. This prevents that CPU from reaching an RCU quiescent state.
5. synchronize_rcu() in the freezer thread waits indefinitely for the quotactl_block() CPU to report a quiescent state.
6. quotactl_block() spins indefinitely waiting for the freezer to advance, which it cannot do as it is blocked on the RCU sync.
This results in a hang of the freezer process and 100% CPU usage by the quota process.
While this can occur intermittently on multi-core systems, it is reliably reproducing on a node with the following script, running both the freezer and the quota toggle on the same CPU:
# mkfs.ext4 -O quota /dev/sda 2g && mkdir a_mount
# mount /dev/sda -o quota,usrquota,grpquota a_mount
# taskset -c 3 bash -c "while true; do xfs_freeze -f a_mount; \
xfs_freeze -u a_mount; done" &
# taskset -c 3 bash -c "while true; do quotaon a_mount; \
quotaoff a_mount; done" &Adding cond_resched() to the retry loop fixes the issue. It acts as an RCU quiescent state, allowing synchronize_rcu() in percpu_down_write() to complete.
--- fs/quota/quota.c | 1 + 1 file changed, 1 insertion(+)
fs/quota/quota.c +1 -0
@@ -899,6 +899,7 @@ static struct super_block *quotactl_block(const char __user *special, int cmd)sb_start_write (sb);sb_end_write (sb);put_super (sb); +cond_resched (); goto retry; }return sb;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 252/641 net: mctp-i2c: fix duplicate reception of old data
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jian Zhang <[email protected]>
[ Upstream commit ae4744e173fadd092c43eda4ca92dcb74645225a ]
The MCTP I2C slave callback did not handle I2C_SLAVE_READ_REQUESTED events. As a result, i2c read event will trigger repeated reception of old data, reset rx_pos when a read request is received.
Stable-dep-of: 2a14e91b6d76 ("mctp i2c: initialise event handler read bytes")
--- drivers/net/mctp/mctp-i2c.c | 6 ++++++ 1 file changed, 6 insertions(+)
drivers/net/mctp/mctp-i2c.c +6 -0
@@ -242,6 +242,9 @@ static int mctp_i2c_slave_cb(struct i2c_client *client,return 0 ;switch (event) { +case I2C_SLAVE_READ_REQUESTED : + midev->rx_pos =0 ; +break ;case I2C_SLAVE_WRITE_RECEIVED :if (midev->rx_pos <MCTP_I2C_BUFSZ ) { midev->rx_buffer[midev->rx_pos] = *val;
@@ -279,6 +282,9 @@ static int mctp_i2c_recv(struct mctp_i2c_dev *midev)size_t recvlen;int status; +if (midev->rx_pos ==0 ) +return 0 ; +/* + 1 for the PEC */ if (midev->rx_pos <MCTP_I2C_MINLEN +1 ) { ndev->stats.rx_length_errors++;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 253/641 mctp i2c: initialise event handler read bytes
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Matt Johnston <[email protected]>
[ Upstream commit 2a14e91b6d76639dac70ea170f4384c1ee3cb48d ]
Set a 0xff value for i2c reads of an mctp-i2c device. Otherwise reads will return "val" from the i2c bus driver. For i2c-aspeed and i2c-npcm7xx that is a stack uninitialised u8.
Tested with "i2ctransfer -y 1 r10@0x34" where 0x34 is a mctp-i2c instance, now it returns all 0xff.
--- drivers/net/mctp/mctp-i2c.c | 3 +++ 1 file changed, 3 insertions(+)
drivers/net/mctp/mctp-i2c.c +3 -0
@@ -243,7 +243,10 @@ static int mctp_i2c_slave_cb(struct i2c_client *client,switch (event) {case I2C_SLAVE_READ_REQUESTED : +case I2C_SLAVE_READ_PROCESSED : +/* MCTP I2C transport only uses writes */ midev->rx_pos =0 ; + *val =0xff ;break ;case I2C_SLAVE_WRITE_RECEIVED :if (midev->rx_pos <MCTP_I2C_BUFSZ ) {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 254/641 wifi: cfg80211: stop NAN and P2P in cfg80211_leave
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Miri Korenblit <[email protected]>
[ Upstream commit e1696c8bd0056bc1a5f7766f58ac333adc203e8a ]
Seems that there is an assumption that this function should be called only for netdev interfaces, but it can also be called in suspend, or from nl80211_netlink_notify (indirectly).
Note that the documentation of NL80211_ATTR_SOCKET_OWNER explicitly says that NAN interfaces would be destroyed as well in the nl80211_netlink_notify case.
Fix this by also stopping P2P and NAN.
--- net/wireless/core.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
net/wireless/core.c +3 -1
@@ -1400,8 +1400,10 @@ void cfg80211_leave(struct cfg80211_registered_device *rdev,cfg80211_leave_ocb (rdev, dev);break ;case NL80211_IFTYPE_P2P_DEVICE : +cfg80211_stop_p2p_device (rdev, wdev); +break ;case NL80211_IFTYPE_NAN : -/* cannot happen, has no netdev */ +cfg80211_stop_nan (rdev, wdev);break ;case NL80211_IFTYPE_AP_VLAN :case NL80211_IFTYPE_MONITOR :
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 255/641 ext4: fast commit: make s_fc_lock reclaim-safe
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Li Chen <[email protected]>
[ Upstream commit 491f2927ae097e2d405afe0b3fe841931ab8aad2 ]
s_fc_lock can be acquired from inode eviction and thus is reclaim unsafe. Since the fast commit path holds s_fc_lock while writing the commit log, allocations under the lock can enter reclaim and invert the lock order with fs_reclaim. Add ext4_fc_lock()/ext4_fc_unlock() helpers which acquire s_fc_lock under memalloc_nofs_save()/restore() context and use them everywhere so allocations under the lock cannot recurse into filesystem reclaim.
--- fs/ext4/ext4.h | 16 ++++++++++++++ fs/ext4/fast_commit.c | 51 ++++++++++++++++++++++++------------------- 2 files changed, 44 insertions(+), 23 deletions(-)
fs/ext4/ext4.h +16 -0
@@ -1771,6 +1771,10 @@ struct ext4_sb_info {* Main fast commit lock. This lock protects accesses to the * following fields: * ei->i_fc_list, s_fc_dentry_q, s_fc_q, s_fc_bytes, s_fc_bh. +* +* s_fc_lock can be taken from reclaim context (inode eviction) and is +* thus reclaim unsafe. Use ext4_fc_lock()/ext4_fc_unlock() helpers +* when acquiring / releasing the lock. */ struct mutex s_fc_lock;struct buffer_head *s_fc_bh;
@@ -1815,6 +1819,18 @@ static inline void ext4_writepages_up_write(struct super_block *sb, int ctx)percpu_up_write (&EXT4_SB (sb)->s_writepages_rwsem); } +static inline int ext4_fc_lock (struct super_block *sb) +{ +mutex_lock (&EXT4_SB (sb)->s_fc_lock); +return memalloc_nofs_save (); +} + +static inline void ext4_fc_unlock (struct super_block *sb,int ctx) +{ +memalloc_nofs_restore (ctx); +mutex_unlock (&EXT4_SB (sb)->s_fc_lock); +} +static inline int ext4_valid_inum (struct super_block *sb,unsigned long ino) { return ino == EXT4_ROOT_INO ||
fs/ext4/fast_commit.c +28 -23
209 lines not on this page · raw message
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 256/641 netfilter: nf_tables: reset table validation state on abort
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Florian Westphal <[email protected]>
[ Upstream commit 6f93616a7323d646d18db9c09f147e453b40fdd7 ]
If a transaction fails the final validation in the commit hook, the table validation state is changed to NFT_VALIDATE_DO and a replay of the batch is performed. Every rule insert will then do a graph validation.
This is much slower, but provides better error reporting to the user because we can point at the rule that introduces the validation issue.
Without this reset the affected table(s) remain in full validation mode, i.e. on next transaction we start with slow-mode.
This makes the next transaction after a failed incremental update very slow:
# time iptables-restore < /tmp/ruleset real 0m0.496s [..] # time iptables -A CALLEE -j CALLER iptables v1.8.11 (nf_tables): RULE_APPEND failed (Too many links): rule in chain CALLEE real 0m0.022s [..] # time iptables-restore < /tmp/ruleset real 1m22.355s [..]
After this patch, 2nd iptables-restore is back to ~0.5s.
--- net/netfilter/nf_tables_api.c | 7 +++++++ 1 file changed, 7 insertions(+)
net/netfilter/nf_tables_api.c +7 -0
@@ -11538,6 +11538,13 @@ static int nf_tables_abort(struct net *net, struct sk_buff *skb, ret =__nf_tables_abort (net, action);nft_gc_seq_end (nft_net, gc_seq); +if (action ==NFNL_ABORT_NONE ) { +struct nft_table *table; + +list_for_each_entry (table, &nft_net->tables, list) + table->validate_state =NFT_VALIDATE_SKIP ; + } +WARN_ON_ONCE (!list_empty (&nft_net->commit_list));/* module autoload needs to happen after GC sequence update because it
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 257/641 netfilter: nf_conncount: make nf_conncount_gc_list() to disable BH
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Fernando Fernandez Mancera <[email protected]>
[ Upstream commit c0362b5748282e22fa1592a8d3474f726ad964c2 ]
For convenience when performing GC over the connection list, make nf_conncount_gc_list() to disable BH. This unifies the behavior with nf_conncount_add() and nf_conncount_count().
Stable-dep-of: 21d033e47273 ("netfilter: nf_conncount: increase the connection clean up limit to 64")
--- net/netfilter/nf_conncount.c | 24 +++++++++++++++++------- net/netfilter/nft_connlimit.c | 7 +------ 2 files changed, 18 insertions(+), 13 deletions(-)
net/netfilter/nf_conncount.c +17 -7
@@ -282,8 +282,8 @@ void nf_conncount_list_init(struct nf_conncount_list *list)EXPORT_SYMBOL_GPL (nf_conncount_list_init);/* Return true if the list is empty. Must be called with BH disabled. */ -bool nf_conncount_gc_list (struct net *net, -struct nf_conncount_list *list) +static bool __nf_conncount_gc_list (struct net *net, +struct nf_conncount_list *list) {const struct nf_conntrack_tuple_hash *found;struct nf_conncount_tuple *conn, *conn_n;
@@ -295,10 +295,6 @@ bool nf_conncount_gc_list(struct net *net,if ((u32 )jiffies ==READ_ONCE (list->last_gc))return false; -/* don't bother if other cpu is already doing GC */ -if (!spin_trylock (&list->list_lock)) -return false; -list_for_each_entry_safe (conn, conn_n, &list->head, node) { found =find_or_evict (net, list, conn);if (IS_ERR (found)) {
@@ -327,7 +323,21 @@ bool nf_conncount_gc_list(struct net *net,if (!list->count) ret = true; list->last_gc = (u32 )jiffies; -spin_unlock (&list->list_lock); + +return ret; +} + +bool nf_conncount_gc_list (struct net *net, +struct nf_conncount_list *list) +{ +bool ret; + +/* don't bother if other cpu is already doing GC */ +if (!spin_trylock_bh (&list->list_lock)) +return false; + + ret =__nf_conncount_gc_list (net, list); +spin_unlock_bh (&list->list_lock);return ret; }
net/netfilter/nft_connlimit.c +1 -6
@@ -232,13 +232,8 @@ static void nft_connlimit_destroy_clone(const struct nft_ctx *ctx,static bool nft_connlimit_gc (struct net *net,const struct nft_expr *expr) {struct nft_connlimit *priv =nft_expr_priv (expr); -bool ret; -local_bh_disable (); - ret =nf_conncount_gc_list (net, priv->list); -local_bh_enable (); - -return ret; +return nf_conncount_gc_list (net, priv->list); }static struct nft_expr_type nft_connlimit_type;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 258/641 netfilter: nf_conncount: increase the connection clean up limit to 64
In reply to Greg Kroah-Hartman6.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Fernando Fernandez Mancera <[email protected]>
[ Upstream commit 21d033e472735ecec677f1ae46d6740b5e47a4f3 ]
After the optimization to only perform one GC per jiffy, a new problem was introduced. If more than 8 new connections are tracked per jiffy the list won't be cleaned up fast enough possibly reaching the limit wrongly.
In order to prevent this issue, only skip the GC if it was already triggered during the same jiffy and the increment is lower than the clean up limit. In addition, increase the clean up limit to 64 connections to avoid triggering GC too often and do more effective GCs.
This has been tested using a HTTP server and several performance tools while having nft_connlimit/xt_connlimit or OVS limit configured.
Output of slowhttptest + OVS limit at 52000 connections:
slow HTTP test status on 340th second:
initializing: 0 pending: 432 connected: 51998 error: 0 closed: 0 service available: YES
--- include/net/netfilter/nf_conntrack_count.h | 1 + net/netfilter/nf_conncount.c | 15 ++++++++++----- 2 files changed, 11 insertions(+), 5 deletions(-)
include/net/netfilter/nf_conntrack_count.h +1 -0
@@ -13,6 +13,7 @@ struct nf_conncount_list {u32 last_gc;/* jiffies at most recent gc */ struct list_head head;/* connections with the same filtering key */ unsigned int count;/* length of list */ +unsigned int last_gc_count;/* length of list at most recent gc */ };struct nf_conncount_data *nf_conncount_init (struct net *net,unsigned int keylen);
net/netfilter/nf_conncount.c +10 -5
@@ -34,8 +34,9 @@#define CONNCOUNT_SLOTS 256U -#define CONNCOUNT_GC_MAX_NODES 8 -#define MAX_KEYLEN 5 +#define CONNCOUNT_GC_MAX_NODES 8 +#define CONNCOUNT_GC_MAX_COLLECT 64 +#define MAX_KEYLEN 5/* we will save the tuples of all connections we care about */ struct nf_conncount_tuple {
@@ -182,12 +183,13 @@ static int __nf_conncount_add(struct net *net, goto out_put; } -if ((u32 )jiffies == list->last_gc) +if ((u32 )jiffies == list->last_gc && + (list->count - list->last_gc_count) <CONNCOUNT_GC_MAX_COLLECT ) goto add_new_node;/* check the saved connections */ list_for_each_entry_safe (conn, conn_n, &list->head, node) { -if (collect >CONNCOUNT_GC_MAX_NODES ) +if (collect >CONNCOUNT_GC_MAX_COLLECT )break ; found =find_or_evict (net, list, conn);
@@ -230,6 +232,7 @@ static int __nf_conncount_add(struct net *net,nf_ct_put (found_ct); } list->last_gc = (u32 )jiffies; + list->last_gc_count = list->count; add_new_node:if (WARN_ON_ONCE (list->count >INT_MAX )) {
@@ -277,6 +280,7 @@ void nf_conncount_list_init(struct nf_conncount_list *list)spin_lock_init (&list->list_lock);INIT_LIST_HEAD (&list->head); list->count =0 ; + list->last_gc_count =0 ; list->last_gc = (u32 )jiffies; }EXPORT_SYMBOL_GPL (nf_conncount_list_init);
@@ -316,13 +320,14 @@ static bool __nf_conncount_gc_list(struct net *net, }nf_ct_put (found_ct); -if (collected >CONNCOUNT_GC_MAX_NODES ) +if (collected >CONNCOUNT_GC_MAX_COLLECT )break ; }if (!list->count) ret = true; list->last_gc = (u32 )jiffies; + list->last_gc_count = list->count;return ret; }
Signature · 1 line
2.51.0