mtd: spi-nor: Fix SST AAI write mode

PATCH Applied Sanjaikumar V S 3 participants 10 messages Mar 11 – Mar 31

Subsystems (3)

Stable branch Memory technology devices (MTD) SPI NOR

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Sanjaikumar V S

author

2026-03-11 10:31 UTC #1 lore raw

PATCH v4 1/2 mtd: spi-nor: sst: Fix write enable before AAI sequence

From: Sanjaikumar V S <[email protected]>

When writing to SST flash starting at an odd address, a single byte is first programmed using the byte program (BP) command. After this operation completes, the flash hardware automatically clears the Write Enable Latch (WEL) bit.

If an AAI (Auto Address Increment) word program sequence follows, it requires WEL to be set. Without re-enabling writes, the AAI sequence fails.

Add spi_nor_write_enable() after the odd-address byte program when more data needs to be written. Use a local boolean for clarity.

Fixes b199489d37b2 ("mtd: spi-nor: add the framework for SPI NOR")

Cc [email protected]

Signed-off-by Sanjaikumar V S <[email protected]>

---
 drivers/mtd/spi-nor/sst.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

drivers/mtd/spi-nor/sst.c +13 -0

index 175211fe6a5e..db02c14ba16f 100644
@@ -203,6 +203,8 @@ static int sst_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
 
 	/* Start write from odd address. */
 	if (to % 2) {
+		bool needs_write_enable = (len > 1);
+
 		/* write one byte. */
 		ret = sst_nor_write_data(nor, to, 1, buf);
 		if (ret < 0)

@@ -210,6 +212,17 @@ static int sst_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
 
 		to++;
 		actual++;
+
+		/*
+		 * Byte program clears the write enable latch. If more
+		 * data needs to be written using the AAI sequence,
+		 * re-enable writes.
+		 */
+		if (needs_write_enable) {
+			ret = spi_nor_write_enable(nor);
+			if (ret)
+				goto out;
+		}
 	}
 
 	/* Write out most of the data here. */

Signature · 1 line

2.43.0

Hendrik Donner

Tested-by Reviewed-by on v4 1/2

2026-03-16 13:44 UTC #2 lore raw

Re: [PATCH v4 1/2] mtd: spi-nor: sst: Fix write enable before AAI sequence

Hello,

Quoted 42 lines · Sanjaikumar V S

From: Sanjaikumar V S <[email protected]>
When writing to SST flash starting at an odd address, a single byte is first programmed using the byte program (BP) command. After this operation completes, the flash hardware automatically clears the Write Enable Latch (WEL) bit.
If an AAI (Auto Address Increment) word program sequence follows, it requires WEL to be set. Without re-enabling writes, the AAI sequence fails.
Add spi_nor_write_enable() after the odd-address byte program when more data needs to be written. Use a local boolean for clarity.
Fixes b199489d37b2 ("mtd: spi-nor: add the framework for SPI NOR")
Cc [email protected]
Signed-off-by Sanjaikumar V S <[email protected]>
---
  drivers/mtd/spi-nor/sst.c | 13 +++++++++++++
  1 file changed, 13 insertions(+)
drivers/mtd/spi-nor/sst.c +6 -0
index 175211fe6a5e..db02c14ba16f 100644
@@ -203,6 +203,8 @@ static int sst_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
 
  	/* Start write from odd address. */
  	if (to % 2) {
+		bool needs_write_enable = (len > 1);
+
  		/* write one byte. */
  		ret = sst_nor_write_data(nor, to, 1, buf);
  		if (ret < 0)
@@ -210,6 +212,17 @@ static int sst_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
 
  		to++;
  		actual++;
+
+		/*
+		 * Byte program clears the write enable latch. If more
+		 * data needs to be written using the AAI sequence,

drivers/mtd/spi-nor/sst.c static int sst_nor_write(struct mtd_info *mtd, loff_t to, size_t len, · line 228

Quoted 10 lines

drivers/mtd/spi-nor/sst.c +7 -0

+		 * re-enable writes.
+		 */
+		if (needs_write_enable) {
+			ret = spi_nor_write_enable(nor);
+			if (ret)
+				goto out;
+		}
  	}
 
  	/* Write out most of the data here. */

found a board with

spi-nor spi0.0: sst25vf032b (4096 Kbytes)

for testing. Tests are on top of

94645aa41bf9e (mtd/spi-nor/next)

This should be done according to the datasheet and fixes that only 1 byte is written on writes to a an odd address and following AAI writes fail, resulting in something looking like this:

ffa9 ffff ffff ffff ffff ffff ffff ffff

when

24a9 91b3 7cb6 f01c 2994 c368 fdad d3a2

was supposed to be written.

Tested-by Hendrik Donner <[email protected]>

Reviewed-by Hendrik Donner <[email protected]>

Regards,
Hendrik

Pratyush Yadav

maintainer Acked-by on v4 1/2

2026-03-30 14:21 UTC #3 lore raw

Re: [PATCH v4 1/2] mtd: spi-nor: sst: Fix write enable before AAI sequence

In reply to Sanjaikumar V S

Quoted 11 lines · Sanjaikumar V S

From: Sanjaikumar V S <[email protected]>
When writing to SST flash starting at an odd address, a single byte is first programmed using the byte program (BP) command. After this operation completes, the flash hardware automatically clears the Write Enable Latch (WEL) bit.
If an AAI (Auto Address Increment) word program sequence follows, it requires WEL to be set. Without re-enabling writes, the AAI sequence fails.

Quoted 6 lines

Add spi_nor_write_enable() after the odd-address byte program when more data needs to be written. Use a local boolean for clarity.
Fixes b199489d37b2 ("mtd: spi-nor: add the framework for SPI NOR")
Cc [email protected]
Signed-off-by Sanjaikumar V S <[email protected]>

Acked-by Pratyush Yadav <[email protected]>

[...]

Signature · 2 lines

Regards,
Pratyush Yadav

Sanjaikumar V S

author

2026-03-11 10:31 UTC #4 lore raw

PATCH v4 2/2 mtd: spi-nor: core: Fix AAI mode when dirmap is not available

In reply to Sanjaikumar V S

From: Sanjaikumar V S <[email protected]>

When the SPI controller lacks direct mapping support, the fallback path in spi_nor_spimem_write_data() uses nor->write_proto based operation template. However, this template uses the standard page program opcode set during probe, not the AAI opcode required for SST flash.

Add check for nodirmap flag to ensure the code falls through to spi_nor_spimem_exec_op() path which builds the operation at runtime with the correct program_opcode set by sst_nor_write_data().

Fixes df5c21002cf4 ("mtd: spi-nor: use spi-mem dirmap API")

Cc [email protected]

Signed-off-by Sanjaikumar V S <[email protected]>

---
 drivers/mtd/spi-nor/core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/mtd/spi-nor/core.c +1 -1

index 8ffeb41c3e08..cb7f4d447156 100644
@@ -281,7 +281,7 @@ static ssize_t spi_nor_spimem_write_data(struct spi_nor *nor, loff_t to,
 	if (spi_nor_spimem_bounce(nor, &op))
 		memcpy(nor->bouncebuf, buf, op.data.nbytes);
 
-	if (nor->dirmap.wdesc) {
+	if (nor->dirmap.wdesc && !nor->dirmap.wdesc->nodirmap) {
 		nbytes = spi_mem_dirmap_write(nor->dirmap.wdesc, op.addr.val,
 					      op.data.nbytes, op.data.buf.out);
 	} else {

Signature · 1 line

2.43.0

Hendrik Donner

Tested-by Reviewed-by on v4 2/2

2026-03-16 13:44 UTC #5 lore raw

Re: [PATCH v4 2/2] mtd: spi-nor: core: Fix AAI mode when dirmap is not available

Hello,

Quoted 23 lines · Sanjaikumar V S

From: Sanjaikumar V S <[email protected]>
When the SPI controller lacks direct mapping support, the fallback path in spi_nor_spimem_write_data() uses nor->write_proto based operation template. However, this template uses the standard page program opcode set during probe, not the AAI opcode required for SST flash.
Add check for nodirmap flag to ensure the code falls through to spi_nor_spimem_exec_op() path which builds the operation at runtime with the correct program_opcode set by sst_nor_write_data().
Fixes df5c21002cf4 ("mtd: spi-nor: use spi-mem dirmap API")
Cc [email protected]
Signed-off-by Sanjaikumar V S <[email protected]>
---
  drivers/mtd/spi-nor/core.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
drivers/mtd/spi-nor/core.c +0 -0
index 8ffeb41c3e08..cb7f4d447156 100644

drivers/mtd/spi-nor/core.c static ssize_t spi_nor_spimem_write_data(struct spi_nor *nor, loff_t to, · line 287

Quoted 8 lines

drivers/mtd/spi-nor/core.c +1 -1

@@ -281,7 +281,7 @@ static ssize_t spi_nor_spimem_write_data(struct spi_nor *nor, loff_t to,
  	if (spi_nor_spimem_bounce(nor, &op))
  		memcpy(nor->bouncebuf, buf, op.data.nbytes);
 
-	if (nor->dirmap.wdesc) {
+	if (nor->dirmap.wdesc && !nor->dirmap.wdesc->nodirmap) {
  		nbytes = spi_mem_dirmap_write(nor->dirmap.wdesc, op.addr.val,
  					      op.data.nbytes, op.data.buf.out);
  	} else {

found a board with

spi-nor spi0.0: sst25vf032b (4096 Kbytes)

for testing. Tests are on top of

94645aa41bf9e (mtd/spi-nor/next)

This patch fixes write errors, easily seen with flashcp, which tries to verify writes:

flashcp: verification mismatch at 0x0

Tested-by Hendrik Donner <[email protected]>

Reviewed-by Hendrik Donner <[email protected]>

Regards,
Hendrik

Pratyush Yadav

maintainer

2026-03-30 14:23 UTC #6 lore raw

Re: [PATCH v4 2/2] mtd: spi-nor: core: Fix AAI mode when dirmap is not available

In reply to Sanjaikumar V S

Quoted 6 lines · Sanjaikumar V S

From: Sanjaikumar V S <[email protected]>
When the SPI controller lacks direct mapping support, the fallback path in spi_nor_spimem_write_data() uses nor->write_proto based operation template. However, this template uses the standard page program opcode set during probe, not the AAI opcode required for SST flash.

But if the controller does support direct mapping, won't it end up using the wrong opcode? Would it be a better idea to update the dirmap_info with the right opcodes?

Quoted 25 lines

Add check for nodirmap flag to ensure the code falls through to spi_nor_spimem_exec_op() path which builds the operation at runtime with the correct program_opcode set by sst_nor_write_data().
Fixes df5c21002cf4 ("mtd: spi-nor: use spi-mem dirmap API")
Cc [email protected]
Signed-off-by Sanjaikumar V S <[email protected]>
---
 drivers/mtd/spi-nor/core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/mtd/spi-nor/core.c +1 -1
index 8ffeb41c3e08..cb7f4d447156 100644
@@ -281,7 +281,7 @@ static ssize_t spi_nor_spimem_write_data(struct spi_nor *nor, loff_t to,
 	if (spi_nor_spimem_bounce(nor, &op))
 		memcpy(nor->bouncebuf, buf, op.data.nbytes);
 
-	if (nor->dirmap.wdesc) {
+	if (nor->dirmap.wdesc && !nor->dirmap.wdesc->nodirmap) {
 		nbytes = spi_mem_dirmap_write(nor->dirmap.wdesc, op.addr.val,
 					      op.data.nbytes, op.data.buf.out);
 	} else {

Signature · 2 lines

Regards,
Pratyush Yadav

Sanjaikumar V S

author

2026-03-31 06:24 UTC #7 lore raw

Re: [PATCH v4 2/2] mtd: spi-nor: core: Fix AAI mode when dirmap is not available

Hi,

Quoted 3 lines

But if the controller does support direct mapping, won't it end up using the wrong opcode? Would it be a better idea to update the dirmap_info with the right opcodes?

You're right. If the controller supports direct mapping, it would still use the wrong opcode from the template created at probe time.

Updating dirmap_info at runtime is problematic because SST AAI mode requires dynamic changes per write:
- cmd.opcode: SPINOR_OP_BP (single byte) vs SPINOR_OP_AAI_WP (word)
- addr.nbytes: must be 0 for subsequent AAI writes

Controllers may also cache the template at dirmap_create time, so modifying it at runtime could cause issues.

A cleaner approach is to disable dirmap for SST AAI devices by setting nodirmap=1 in sst_nor_late_init(). This ensures all writes go through spi_nor_spimem_exec_op() which uses the runtime opcode.

This only affects devices with SST_WRITE flag (sst25wf*, sst25vf016b, sst25vf032b, sst25vf040b, sst25vf080b). Other SST devices that use standard page program can still benefit from dirmap.

I'll send a v5 with this change.

Thanks,
Sanjaikumar

Sanjaikumar V S

author

2026-03-30 07:31 UTC #8 lore raw

In reply to Sanjaikumar V S

Hi,

I wanted to follow up on this patch series fixing SST AAI write mode issues. It has received Tested-by and Reviewed-by tags from Hendrik Donner.

Could you please let me know if any further changes or actions are required for these patches to be considered for inclusion?

Thanks,
Sanjaikumar

Pratyush Yadav

maintainer Applied

2026-03-30 14:26 UTC #9 lore raw

Quoted 8 lines · Sanjaikumar V S

Hi,
I wanted to follow up on this patch series fixing SST AAI write mode issues. It has received Tested-by and Reviewed-by tags from Hendrik Donner.
Could you please let me know if any further changes or actions are required for these patches to be considered for inclusion?

Applied patch 1 to spi-nor/next. Thanks!

For patch 2, I left a comment. I am not sure if it takes the right approach.

Signature · 2 lines

Regards,
Pratyush Yadav