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FAILED: patch "[PATCH] drm/i915/alpm: ALPM disable fixes" failed to apply to 6.12-stable tree

PATCH In review [email protected] 3 participants 11 messages Mar 17 – Mar 18

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author maintainer
#0 lore raw

The patch below does not apply to the 6.12-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.

To reproduce the conflict and resubmit, you may use the following commands:

git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.12.y
git checkout FETCH_HEAD
git cherry-pick -x eb4a7139e97374f42b7242cc754e77f1623fbcd5
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '2026031731-secret-rocket-af05@gregkh' --subject-prefix 'PATCH 6.12.y' HEAD^..

Possible dependencies:

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From eb4a7139e97374f42b7242cc754e77f1623fbcd5 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jouni=20H=C3=B6gander?= <[email protected]>
Date: Thu, 12 Feb 2026 08:27:31 +0200
Subject: [PATCH] drm/i915/alpm: ALPM disable fixes
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

PORT_ALPM_CTL is supposed to be written only before link training. Remove writing it from ALPM disable.

Also clearing ALPM_CTL_ALPM_AUX_LESS_ENABLE and is not about disabling ALPM but switching to AUX-Wake ALPM. Stop touching this bit on ALPM disable.

Fixes 1ccbf135862b ("drm/i915/psr: Enable ALPM on source side for eDP Panel replay")
Cc Animesh Manna <[email protected]>
Cc Jani Nikula <[email protected]>
Cc <[email protected]> # v6.10+
(cherry picked from commit 008304c9ae75c772d3460040de56e12112cdf5e6)
drivers/gpu/drm/i915/display/intel_alpm.c +1 -6
index 7ce8c674bb03..07ffee38974b 100644
@@ -562,12 +562,7 @@ void intel_alpm_disable(struct intel_dp *intel_dp)
 	mutex_lock(&intel_dp->alpm.lock);
 
 	intel_de_rmw(display, ALPM_CTL(display, cpu_transcoder),
-		     ALPM_CTL_ALPM_ENABLE | ALPM_CTL_LOBF_ENABLE |
-		     ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
-
-	intel_de_rmw(display,
-		     PORT_ALPM_CTL(cpu_transcoder),
-		     PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
+		     ALPM_CTL_ALPM_ENABLE | ALPM_CTL_LOBF_ENABLE, 0);
 
 	drm_dbg_kms(display->drm, "Disabling ALPM\n");
 	mutex_unlock(&intel_dp->alpm.lock);
maintainer
#1 lore raw

PATCH 1/8 drm/i915:Remove unused parameter in marco

From: He Lugang <[email protected]>

[ Upstream commit 09b003ad1dd6a4bf1b364e8f03cba87b2de38d21 ]

The parameter dev_priv is actually not used in macro PORT_ALPM_CTL and PORT_ALPM_LFPS_CTL,so remove it to simplify the code.

Stable-dep-of: eb4a7139e973 ("drm/i915/alpm: ALPM disable fixes")

---
 drivers/gpu/drm/i915/display/intel_alpm.c     | 4 ++--
 drivers/gpu/drm/i915/display/intel_psr.c      | 2 +-
 drivers/gpu/drm/i915/display/intel_psr_regs.h | 4 ++--
 3 files changed, 5 insertions(+), 5 deletions(-)
drivers/gpu/drm/i915/display/intel_alpm.c +2 -2
index 186cf4833f716..57afb25191bd9 100644
@@ -330,7 +330,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
 			ALPM_CTL_AUX_LESS_WAKE_TIME(intel_dp->alpm_parameters.aux_less_wake_lines);
 
 		intel_de_write(display,
-			       PORT_ALPM_CTL(display, port),
+			       PORT_ALPM_CTL(port),
 			       PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE |
 			       PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(15) |
 			       PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(0) |
@@ -338,7 +338,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
 				       intel_dp->alpm_parameters.silence_period_sym_clocks));
 
 		intel_de_write(display,
-			       PORT_ALPM_LFPS_CTL(display, port),
+			       PORT_ALPM_LFPS_CTL(port),
 			       PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) |
 			       PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION(
 				       intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms) |
drivers/gpu/drm/i915/display/intel_psr.c +1 -1
index 34d61e44c6bd9..16fd393de04fc 100644
@@ -2118,7 +2118,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 			     ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
 
 		intel_de_rmw(display,
-			     PORT_ALPM_CTL(display, cpu_transcoder),
+			     PORT_ALPM_CTL(cpu_transcoder),
 			     PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
 	}
 
drivers/gpu/drm/i915/display/intel_psr_regs.h +2 -2
index 25c0424e34db2..8f2b3372bf6c9 100644
@@ -295,7 +295,7 @@
 
 #define _PORT_ALPM_CTL_A			0x16fa2c
 #define _PORT_ALPM_CTL_B			0x16fc2c
-#define PORT_ALPM_CTL(dev_priv, port)		_MMIO_PORT(port, _PORT_ALPM_CTL_A, _PORT_ALPM_CTL_B)
+#define PORT_ALPM_CTL(port)			_MMIO_PORT(port, _PORT_ALPM_CTL_A, _PORT_ALPM_CTL_B)
 #define  PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE	REG_BIT(31)
 #define  PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK	REG_GENMASK(23, 20)
 #define  PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(val)	REG_FIELD_PREP(PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK, val)
@@ -306,7 +306,7 @@
 
 #define _PORT_ALPM_LFPS_CTL_A					0x16fa30
 #define _PORT_ALPM_LFPS_CTL_B					0x16fc30
-#define PORT_ALPM_LFPS_CTL(dev_priv, port)			_MMIO_PORT(port, _PORT_ALPM_LFPS_CTL_A, _PORT_ALPM_LFPS_CTL_B)
+#define PORT_ALPM_LFPS_CTL(port)				_MMIO_PORT(port, _PORT_ALPM_LFPS_CTL_A, _PORT_ALPM_LFPS_CTL_B)
 #define  PORT_ALPM_LFPS_CTL_LFPS_START_POLARITY			REG_BIT(31)
 #define  PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MASK		REG_GENMASK(27, 24)
 #define  PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MIN		7
Signature · 1 line
2.51.0
maintainer
#2 lore raw

PATCH 2/8 drm/i915/display: Disable PSR before disabling VRR

From: Ankit Nautiyal <[email protected]>

[ Upstream commit 8b68938364b6fa528d5ae1cd2ffbcd95880bff19 ]

As per bspec 49268: Disable PSR before disabling VRR.

Stable-dep-of: eb4a7139e973 ("drm/i915/alpm: ALPM disable fixes")

---
 drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/gpu/drm/i915/display/intel_display.c +2 -2
index 4f8899cd125d9..a0f78e1399306 100644
@@ -1195,6 +1195,8 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
 		intel_atomic_get_new_crtc_state(state, crtc);
 	enum pipe pipe = crtc->pipe;
 
+	intel_psr_pre_plane_update(state, crtc);
+
 	if (intel_crtc_vrr_disabling(state, crtc)) {
 		intel_vrr_disable(old_crtc_state);
 		intel_crtc_update_active_timings(old_crtc_state, false);
@@ -1205,8 +1207,6 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
 
 	intel_drrs_deactivate(old_crtc_state);
 
-	intel_psr_pre_plane_update(state, crtc);
-
 	if (hsw_ips_pre_update(state, crtc))
 		intel_crtc_wait_for_next_vblank(crtc);
 
Signature · 1 line
2.51.0
maintainer
#3 lore raw

PATCH 3/8 drm/i915/display: Move intel_psr_post_plane_update() at the later

In reply to Sasha Levin

From: Ankit Nautiyal <[email protected]>

[ Upstream commit 9c29a0dd8c6eae77f3d0addac78331d1a516dc39 ]

In intel_post_plane_update() there are things which might need to do vblank waits, so enabling PSR as early as we do now is simply counter-productive. Therefore move intel_psr_post_plane_update() at the last of intel_post_plane_update().

Stable-dep-of: eb4a7139e973 ("drm/i915/alpm: ALPM disable fixes")

---
 drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/gpu/drm/i915/display/intel_display.c +2 -2
index a0f78e1399306..e2736f50fef83 100644
@@ -1087,8 +1087,6 @@ static void intel_post_plane_update(struct intel_atomic_state *state,
 		intel_atomic_get_new_crtc_state(state, crtc);
 	enum pipe pipe = crtc->pipe;
 
-	intel_psr_post_plane_update(state, crtc);
-
 	intel_frontbuffer_flip(dev_priv, new_crtc_state->fb_bits);
 
 	if (new_crtc_state->update_wm_post && new_crtc_state->hw.active)
@@ -1117,6 +1115,8 @@ static void intel_post_plane_update(struct intel_atomic_state *state,
 
 	if (audio_enabling(old_crtc_state, new_crtc_state))
 		intel_encoders_audio_enable(state, crtc);
+
+	intel_psr_post_plane_update(state, crtc);
 }
 
 static void intel_crtc_enable_flip_done(struct intel_atomic_state *state,
Signature · 1 line
2.51.0
maintainer
#4 lore raw

PATCH 4/8 drm/i915/lobf: Add lobf enablement in post plane update

In reply to Sasha Levin

From: Animesh Manna <[email protected]>

[ Upstream commit 172757acd6f60625f09760ef0ffdcac01d8ed58a ]

Enablement of LOBF is added in post plane update whenever has_lobf flag is set. As LOBF can be enabled in non-psr case as well so adding in post plane update. There is no change of configuring alpm with psr path.

v1: Initial version.
v2: Use encoder-mask to find the associated encoder from crtc-state. [Jani]
v3: Remove alpm_configure from intel_psr.c. [Jouni]

Stable-dep-of: eb4a7139e973 ("drm/i915/alpm: ALPM disable fixes")

---
 drivers/gpu/drm/i915/display/intel_alpm.c    | 25 ++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_alpm.h    |  4 ++++
 drivers/gpu/drm/i915/display/intel_display.c |  3 +++
 drivers/gpu/drm/i915/display/intel_psr.c     |  3 ---
 4 files changed, 32 insertions(+), 3 deletions(-)
drivers/gpu/drm/i915/display/intel_alpm.c +25 -0
index 57afb25191bd9..d256bb831b136 100644
@@ -365,6 +365,31 @@ void intel_alpm_configure(struct intel_dp *intel_dp,
 	lnl_alpm_configure(intel_dp, crtc_state);
 }
 
+void intel_alpm_post_plane_update(struct intel_atomic_state *state,
+				  struct intel_crtc *crtc)
+{
+	struct intel_display *display = to_intel_display(state);
+	const struct intel_crtc_state *crtc_state =
+		intel_atomic_get_new_crtc_state(state, crtc);
+	struct intel_encoder *encoder;
+
+	if (!crtc_state->has_lobf && !crtc_state->has_psr)
+		return;
+
+	for_each_intel_encoder_mask(display->drm, encoder,
+				    crtc_state->uapi.encoder_mask) {
+		struct intel_dp *intel_dp;
+
+		if (!intel_encoder_is_dp(encoder))
+			continue;
+
+		intel_dp = enc_to_intel_dp(encoder);
+
+		if (intel_dp_is_edp(intel_dp))
+			intel_alpm_configure(intel_dp, crtc_state);
+	}
+}
+
 static int i915_edp_lobf_info_show(struct seq_file *m, void *data)
 {
 	struct intel_connector *connector = m->private;
drivers/gpu/drm/i915/display/intel_alpm.h +4 -0
index 8c409b10dce6c..2f862b0476a8a 100644
@@ -12,6 +12,8 @@ struct intel_dp;
 struct intel_crtc_state;
 struct drm_connector_state;
 struct intel_connector;
+struct intel_atomic_state;
+struct intel_crtc;
 
 void intel_alpm_init_dpcd(struct intel_dp *intel_dp);
 bool intel_alpm_compute_params(struct intel_dp *intel_dp,
@@ -21,6 +23,8 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,
 				    struct drm_connector_state *conn_state);
 void intel_alpm_configure(struct intel_dp *intel_dp,
 			  const struct intel_crtc_state *crtc_state);
+void intel_alpm_post_plane_update(struct intel_atomic_state *state,
+				  struct intel_crtc *crtc);
 void intel_alpm_lobf_debugfs_add(struct intel_connector *connector);
 bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp);
 bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp);
drivers/gpu/drm/i915/display/intel_display.c +3 -0
index e2736f50fef83..bb05c8fd5e5f3 100644
@@ -57,6 +57,7 @@
 #include "i9xx_plane.h"
 #include "i9xx_plane_regs.h"
 #include "i9xx_wm.h"
+#include "intel_alpm.h"
 #include "intel_atomic.h"
 #include "intel_atomic_plane.h"
 #include "intel_audio.h"
@@ -1116,6 +1117,8 @@ static void intel_post_plane_update(struct intel_atomic_state *state,
 	if (audio_enabling(old_crtc_state, new_crtc_state))
 		intel_encoders_audio_enable(state, crtc);
 
+	intel_alpm_post_plane_update(state, crtc);
+
 	intel_psr_post_plane_update(state, crtc);
 }
 
drivers/gpu/drm/i915/display/intel_psr.c +0 -3
index 16fd393de04fc..855f22f1f8328 100644
@@ -1886,9 +1886,6 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
 			     intel_dp->psr.psr2_sel_fetch_enabled ?
 			     IGNORE_PSR2_HW_TRACKING : 0);
 
-	if (intel_dp_is_edp(intel_dp))
-		intel_alpm_configure(intel_dp, crtc_state);
-
 	/*
 	 * Wa_16013835468
 	 * Wa_14015648006
Signature · 1 line
2.51.0
#5 lore raw

Re: [PATCH 6.12.y 4/8] drm/i915/lobf: Add lobf enablement in post plane update

Quoted 14 lines · Sasha Levin

From: Animesh Manna <[email protected]>

[ Upstream commit 172757acd6f60625f09760ef0ffdcac01d8ed58a ]

Enablement of LOBF is added in post plane update whenever has_lobf flag is set. As LOBF can be enabled in non-psr case as well so adding in post plane update. There is no change of configuring alpm with psr path.

v1: Initial version.
v2: Use encoder-mask to find the associated encoder from crtc-state. [Jani]
v3: Remove alpm_configure from intel_psr.c. [Jouni]

Quoted 6 lines

Link:
https://lore.kernel.org/r/[email protected]
Stable-dep-of: eb4a7139e973 ("drm/i915/alpm: ALPM disable fixes")

I think it is a bit risky to backport this many dependencies for this patch. This specific patch is enabling a new feature (Link Off Between Frames). I'm planning to send backport of "drm/i915/alpm: ALPM disable fixes" which failed to apply to 6.12-stable tree.

BR,
Jouni Högander

Quoted 111 lines

---
 drivers/gpu/drm/i915/display/intel_alpm.c    | 25
++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_alpm.h    |  4 ++++ drivers/gpu/drm/i915/display/intel_display.c |  3 +++ drivers/gpu/drm/i915/display/intel_psr.c     |  3 ---

 4 files changed, 32 insertions(+), 3 deletions(-)
drivers/gpu/drm/i915/display/intel_alpm.c +0 -0
index 57afb25191bd9..d256bb831b136 100644
@@ -365,6 +365,31 @@ void intel_alpm_configure(struct intel_dp
 *intel_dp,
  	lnl_alpm_configure(intel_dp, crtc_state);
  }

drivers/gpu/drm/i915/display/intel_alpm.c +25 -0
+void intel_alpm_post_plane_update(struct intel_atomic_state *state,
+				  struct intel_crtc *crtc)
+{
+	struct intel_display *display = to_intel_display(state);
+	const struct intel_crtc_state *crtc_state =
+		intel_atomic_get_new_crtc_state(state, crtc);
+	struct intel_encoder *encoder;
+
+	if (!crtc_state->has_lobf && !crtc_state->has_psr)
+		return;
+
+	for_each_intel_encoder_mask(display->drm, encoder,
+				    crtc_state->uapi.encoder_mask) {
+		struct intel_dp *intel_dp;
+
+		if (!intel_encoder_is_dp(encoder))
+			continue;
+
+		intel_dp = enc_to_intel_dp(encoder);
+
+		if (intel_dp_is_edp(intel_dp))
+			intel_alpm_configure(intel_dp, crtc_state);
+	}
+}
+

 static int i915_edp_lobf_info_show(struct seq_file *m, void *data) {
  struct intel_connector *connector = m->private;

drivers/gpu/drm/i915/display/intel_alpm.h +2 -0
index 8c409b10dce6c..2f862b0476a8a 100644
@@ -12,6 +12,8 @@ struct intel_dp;
  struct intel_crtc_state;
  struct drm_connector_state;
  struct intel_connector;
+struct intel_atomic_state;
+struct intel_crtc;


 void intel_alpm_init_dpcd(struct intel_dp *intel_dp); bool intel_alpm_compute_params(struct intel_dp *intel_dp,

drivers/gpu/drm/i915/display/intel_alpm.h +0 -0
@@ -21,6 +23,8 @@ void intel_alpm_lobf_compute_config(struct intel_dp
 *intel_dp,

      struct drm_connector_state *conn_state);
 void intel_alpm_configure(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state);

drivers/gpu/drm/i915/display/intel_alpm.h +2 -0
+void intel_alpm_post_plane_update(struct intel_atomic_state *state,
+				  struct intel_crtc *crtc);

 void intel_alpm_lobf_debugfs_add(struct intel_connector *connector); bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp); bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp);

drivers/gpu/drm/i915/display/intel_display.c +1 -0
index e2736f50fef83..bb05c8fd5e5f3 100644
@@ -57,6 +57,7 @@
  #include "i9xx_plane.h"
  #include "i9xx_plane_regs.h"
  #include "i9xx_wm.h"
+#include "intel_alpm.h"
  #include "intel_atomic.h"
  #include "intel_atomic_plane.h"
  #include "intel_audio.h"
@@ -1116,6 +1117,8 @@ static void intel_post_plane_update(struct
 intel_atomic_state *state,
  	if (audio_enabling(old_crtc_state, new_crtc_state))
  		intel_encoders_audio_enable(state, crtc);

drivers/gpu/drm/i915/display/intel_display.c +2 -0
+	intel_alpm_post_plane_update(state, crtc);
+

  intel_psr_post_plane_update(state, crtc);
 }

drivers/gpu/drm/i915/display/intel_psr.c +0 -0
index 16fd393de04fc..855f22f1f8328 100644
@@ -1886,9 +1886,6 @@ static void intel_psr_enable_source(struct
 intel_dp *intel_dp,

       intel_dp->psr.psr2_sel_fetch_enabled ? IGNORE_PSR2_HW_TRACKING : 0);

drivers/gpu/drm/i915/display/intel_psr.c +0 -3
-	if (intel_dp_is_edp(intel_dp))
-		intel_alpm_configure(intel_dp, crtc_state);
-

  /*
  * Wa_16013835468
  * Wa_14015648006

maintainer
#6 lore raw

PATCH 5/8 drm/i915/lobf: Disintegrate alpm_disable from psr_disable

In reply to Sasha Levin

From: Animesh Manna <[email protected]>

[ Upstream commit 504766382edb2a8babe030aad507965be1d632ee ]

Currently clearing of alpm registers is done through psr_disable() which is always not correct, without psr also alpm can exist. So dis-integrate alpm_disable() from psr_disable().

v1: Initial version.
v2:
- Remove h/w register read from alpm_disable(). [Jani]

Stable-dep-of: eb4a7139e973 ("drm/i915/alpm: ALPM disable fixes")

---
 drivers/gpu/drm/i915/display/intel_alpm.c      | 18 ++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_alpm.h      |  1 +
 drivers/gpu/drm/i915/display/intel_ddi.c       |  2 ++
 .../gpu/drm/i915/display/intel_display_types.h |  1 +
 drivers/gpu/drm/i915/display/intel_psr.c       | 11 -----------
 5 files changed, 22 insertions(+), 11 deletions(-)
drivers/gpu/drm/i915/display/intel_alpm.c +18 -0
index d256bb831b136..8f83dfb899308 100644
@@ -363,6 +363,7 @@ void intel_alpm_configure(struct intel_dp *intel_dp,
 			  const struct intel_crtc_state *crtc_state)
 {
 	lnl_alpm_configure(intel_dp, crtc_state);
+	intel_dp->alpm_parameters.transcoder = crtc_state->cpu_transcoder;
 }
 
 void intel_alpm_post_plane_update(struct intel_atomic_state *state,
@@ -438,3 +439,20 @@ void intel_alpm_lobf_debugfs_add(struct intel_connector *connector)
 	debugfs_create_file("i915_edp_lobf_info", 0444, root,
 			    connector, &i915_edp_lobf_info_fops);
 }
+
+void intel_alpm_disable(struct intel_dp *intel_dp)
+{
+	struct intel_display *display = to_intel_display(intel_dp);
+	enum transcoder cpu_transcoder = intel_dp->alpm_parameters.transcoder;
+
+	if (DISPLAY_VER(display) < 20)
+		return;
+
+	intel_de_rmw(display, ALPM_CTL(display, cpu_transcoder),
+		     ALPM_CTL_ALPM_ENABLE | ALPM_CTL_LOBF_ENABLE |
+		     ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
+
+	intel_de_rmw(display,
+		     PORT_ALPM_CTL(cpu_transcoder),
+		     PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
+}
drivers/gpu/drm/i915/display/intel_alpm.h +1 -0
index 2f862b0476a8a..91f51fb24f981 100644
@@ -28,4 +28,5 @@ void intel_alpm_post_plane_update(struct intel_atomic_state *state,
 void intel_alpm_lobf_debugfs_add(struct intel_connector *connector);
 bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp);
 bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp);
+void intel_alpm_disable(struct intel_dp *intel_dp);
 #endif
drivers/gpu/drm/i915/display/intel_ddi.c +2 -0
index 5b24460c01341..6514ebbaf0025 100644
@@ -34,6 +34,7 @@
 #include "i915_drv.h"
 #include "i915_reg.h"
 #include "icl_dsi.h"
+#include "intel_alpm.h"
 #include "intel_audio.h"
 #include "intel_audio_regs.h"
 #include "intel_backlight.h"
@@ -3423,6 +3424,7 @@ static void intel_disable_ddi_dp(struct intel_atomic_state *state,
 	intel_dp->link_trained = false;
 
 	intel_psr_disable(intel_dp, old_crtc_state);
+	intel_alpm_disable(intel_dp);
 	intel_edp_backlight_off(old_conn_state);
 	/* Disable the decompression in DP Sink */
 	intel_dp_sink_disable_decompression(state,
drivers/gpu/drm/i915/display/intel_display_types.h +1 -0
index 9812191e7ef29..b6a388f5a7c8b 100644
@@ -1906,6 +1906,7 @@ struct intel_dp {
 	struct {
 		u8 io_wake_lines;
 		u8 fast_wake_lines;
+		enum transcoder transcoder;
 
 		/* LNL and beyond */
 		u8 check_entry_lines;
drivers/gpu/drm/i915/display/intel_psr.c +0 -11
index 855f22f1f8328..3a8da3dcab6d5 100644
@@ -2108,17 +2108,6 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 	if (intel_dp_is_edp(intel_dp))
 		intel_snps_phy_update_psr_power_state(&dp_to_dig_port(intel_dp)->base, false);
 
-	/* Panel Replay on eDP is always using ALPM aux less. */
-	if (intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp)) {
-		intel_de_rmw(display, ALPM_CTL(display, cpu_transcoder),
-			     ALPM_CTL_ALPM_ENABLE |
-			     ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
-
-		intel_de_rmw(display,
-			     PORT_ALPM_CTL(cpu_transcoder),
-			     PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
-	}
-
 	/* Disable PSR on Sink */
 	if (!intel_dp->psr.panel_replay_enabled) {
 		drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0);
Signature · 1 line
2.51.0
maintainer
#7 lore raw

PATCH 6/8 drm/i915/lobf: Update lobf if any change in dependent parameters

In reply to Sasha Levin

From: Animesh Manna <[email protected]>

[ Upstream commit 64a5dd770d35cb2b14f929eb13fb7863d1bedb1c ]

For every commit the dependent condition for LOBF is checked and accordingly update has_lobf flag which will be used to update the ALPM_CTL register during commit.

v1: Initial version.
v2: Avoid reading h/w register without has_lobf check. [Jani]
v3: Update LOBF in post plane update instead of separate function. [Jouni] v4:
- Add lobf disable print. [Jouni]
- Simplify condition check for enabling/disabling lobf. [Jouni]
v5: Disable LOBF in pre_plane_update(). [Jouni]
v6: use lobf flag of old_crtc_state and write 0 into ALPM_CTL. [Jouni]

Stable-dep-of: eb4a7139e973 ("drm/i915/alpm: ALPM disable fixes")

---
 drivers/gpu/drm/i915/display/intel_alpm.c    | 41 +++++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_alpm.h    |  2 +
 drivers/gpu/drm/i915/display/intel_display.c |  1 +
 3 files changed, 43 insertions(+), 1 deletion(-)
drivers/gpu/drm/i915/display/intel_alpm.c +40 -1
index 8f83dfb899308..e3004725e044b 100644
@@ -366,15 +366,54 @@ void intel_alpm_configure(struct intel_dp *intel_dp,
 	intel_dp->alpm_parameters.transcoder = crtc_state->cpu_transcoder;
 }
 
+void intel_alpm_pre_plane_update(struct intel_atomic_state *state,
+				 struct intel_crtc *crtc)
+{
+	struct intel_display *display = to_intel_display(state);
+	const struct intel_crtc_state *crtc_state =
+		intel_atomic_get_new_crtc_state(state, crtc);
+	const struct intel_crtc_state *old_crtc_state =
+		intel_atomic_get_old_crtc_state(state, crtc);
+	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+	struct intel_encoder *encoder;
+
+	if (DISPLAY_VER(display) < 20)
+		return;
+
+	if (crtc_state->has_lobf || crtc_state->has_lobf == old_crtc_state->has_lobf)
+		return;
+
+	for_each_intel_encoder_mask(display->drm, encoder,
+				    crtc_state->uapi.encoder_mask) {
+		struct intel_dp *intel_dp;
+
+		if (!intel_encoder_is_dp(encoder))
+			continue;
+
+		intel_dp = enc_to_intel_dp(encoder);
+
+		if (!intel_dp_is_edp(intel_dp))
+			continue;
+
+		if (old_crtc_state->has_lobf) {
+			intel_de_write(display, ALPM_CTL(display, cpu_transcoder), 0);
+			drm_dbg_kms(display->drm, "Link off between frames (LOBF) disabled\n");
+		}
+	}
+}
+
 void intel_alpm_post_plane_update(struct intel_atomic_state *state,
 				  struct intel_crtc *crtc)
 {
 	struct intel_display *display = to_intel_display(state);
 	const struct intel_crtc_state *crtc_state =
 		intel_atomic_get_new_crtc_state(state, crtc);
+	const struct intel_crtc_state *old_crtc_state =
+		intel_atomic_get_old_crtc_state(state, crtc);
 	struct intel_encoder *encoder;
 
-	if (!crtc_state->has_lobf && !crtc_state->has_psr)
+	if ((!crtc_state->has_lobf ||
+	     crtc_state->has_lobf == old_crtc_state->has_lobf) && !crtc_state->has_psr)
 		return;
 
 	for_each_intel_encoder_mask(display->drm, encoder,
drivers/gpu/drm/i915/display/intel_alpm.h +2 -0
index 91f51fb24f981..77bae022a0eaf 100644
@@ -23,6 +23,8 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,
 				    struct drm_connector_state *conn_state);
 void intel_alpm_configure(struct intel_dp *intel_dp,
 			  const struct intel_crtc_state *crtc_state);
+void intel_alpm_pre_plane_update(struct intel_atomic_state *state,
+				 struct intel_crtc *crtc);
 void intel_alpm_post_plane_update(struct intel_atomic_state *state,
 				  struct intel_crtc *crtc);
 void intel_alpm_lobf_debugfs_add(struct intel_connector *connector);
drivers/gpu/drm/i915/display/intel_display.c +1 -0
index bb05c8fd5e5f3..62c0d2e968db8 100644
@@ -1198,6 +1198,7 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
 		intel_atomic_get_new_crtc_state(state, crtc);
 	enum pipe pipe = crtc->pipe;
 
+	intel_alpm_pre_plane_update(state, crtc);
 	intel_psr_pre_plane_update(state, crtc);
 
 	if (intel_crtc_vrr_disabling(state, crtc)) {
Signature · 1 line
2.51.0
maintainer
#8 lore raw

PATCH 7/8 drm/i915/lobf: Add mutex for alpm update

In reply to Sasha Levin

From: Animesh Manna <[email protected]>

[ Upstream commit acff6d6bded31d98698693827860adc5befdd854 ]

The ALPM_CTL can be updated from different context, so add mutex to sychonize the update.

Stable-dep-of: eb4a7139e973 ("drm/i915/alpm: ALPM disable fixes")

---
 drivers/gpu/drm/i915/display/intel_alpm.c          | 11 ++++++++++-
 drivers/gpu/drm/i915/display/intel_alpm.h          |  2 +-
 drivers/gpu/drm/i915/display/intel_display_types.h |  1 +
 drivers/gpu/drm/i915/display/intel_dp.c            |  2 +-
 4 files changed, 13 insertions(+), 3 deletions(-)
drivers/gpu/drm/i915/display/intel_alpm.c +10 -1
index e3004725e044b..d72e10160f1d4 100644
@@ -21,7 +21,7 @@ bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp)
 	return intel_dp->alpm_dpcd & DP_ALPM_AUX_LESS_CAP;
 }
 
-void intel_alpm_init_dpcd(struct intel_dp *intel_dp)
+void intel_alpm_init(struct intel_dp *intel_dp)
 {
 	u8 dpcd;
 
@@ -29,6 +29,7 @@ void intel_alpm_init_dpcd(struct intel_dp *intel_dp)
 		return;
 
 	intel_dp->alpm_dpcd = dpcd;
+	mutex_init(&intel_dp->alpm_parameters.lock);
 }
 
 /*
@@ -318,6 +319,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
 	    (!intel_dp->psr.sel_update_enabled && !intel_dp_is_edp(intel_dp)))
 		return;
 
+	mutex_lock(&intel_dp->alpm_parameters.lock);
 	/*
 	 * Panel Replay on eDP is always using ALPM aux less. I.e. no need to
 	 * check panel support at this point.
@@ -357,6 +359,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
 	alpm_ctl |= ALPM_CTL_ALPM_ENTRY_CHECK(intel_dp->alpm_parameters.check_entry_lines);
 
 	intel_de_write(display, ALPM_CTL(display, cpu_transcoder), alpm_ctl);
+	mutex_unlock(&intel_dp->alpm_parameters.lock);
 }
 
 void intel_alpm_configure(struct intel_dp *intel_dp,
@@ -396,8 +399,10 @@ void intel_alpm_pre_plane_update(struct intel_atomic_state *state,
 			continue;
 
 		if (old_crtc_state->has_lobf) {
+			mutex_lock(&intel_dp->alpm_parameters.lock);
 			intel_de_write(display, ALPM_CTL(display, cpu_transcoder), 0);
 			drm_dbg_kms(display->drm, "Link off between frames (LOBF) disabled\n");
+			mutex_unlock(&intel_dp->alpm_parameters.lock);
 		}
 	}
 }
@@ -487,6 +492,8 @@ void intel_alpm_disable(struct intel_dp *intel_dp)
 	if (DISPLAY_VER(display) < 20)
 		return;
 
+	mutex_lock(&intel_dp->alpm_parameters.lock);
+
 	intel_de_rmw(display, ALPM_CTL(display, cpu_transcoder),
 		     ALPM_CTL_ALPM_ENABLE | ALPM_CTL_LOBF_ENABLE |
 		     ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
@@ -494,4 +501,6 @@ void intel_alpm_disable(struct intel_dp *intel_dp)
 	intel_de_rmw(display,
 		     PORT_ALPM_CTL(cpu_transcoder),
 		     PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
+
+	mutex_unlock(&intel_dp->alpm_parameters.lock);
 }
drivers/gpu/drm/i915/display/intel_alpm.h +1 -1
index 77bae022a0eaf..c043a071f84f3 100644
@@ -15,7 +15,7 @@ struct intel_connector;
 struct intel_atomic_state;
 struct intel_crtc;
 
-void intel_alpm_init_dpcd(struct intel_dp *intel_dp);
+void intel_alpm_init(struct intel_dp *intel_dp);
 bool intel_alpm_compute_params(struct intel_dp *intel_dp,
 			       const struct intel_crtc_state *crtc_state);
 void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,
drivers/gpu/drm/i915/display/intel_display_types.h +1 -0
index b6a388f5a7c8b..cb4b192c9e9bd 100644
@@ -1907,6 +1907,7 @@ struct intel_dp {
 		u8 io_wake_lines;
 		u8 fast_wake_lines;
 		enum transcoder transcoder;
+		struct mutex lock;
 
 		/* LNL and beyond */
 		u8 check_entry_lines;
drivers/gpu/drm/i915/display/intel_dp.c +1 -1
index eb4952be7bccc..fd9d9649c962d 100644
@@ -6716,7 +6716,7 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
 	 */
 	intel_hpd_enable_detection(encoder);
 
-	intel_alpm_init_dpcd(intel_dp);
+	intel_alpm_init(intel_dp);
 
 	/* Cache DPCD and EDID for edp. */
 	has_dpcd = intel_edp_init_dpcd(intel_dp, intel_connector);
Signature · 1 line
2.51.0
maintainer
#9 lore raw

PATCH 8/8 drm/i915/alpm: ALPM disable fixes

In reply to Sasha Levin

From: Jouni Högander <[email protected]>

[ Upstream commit eb4a7139e97374f42b7242cc754e77f1623fbcd5 ]

PORT_ALPM_CTL is supposed to be written only before link training. Remove writing it from ALPM disable.

Also clearing ALPM_CTL_ALPM_AUX_LESS_ENABLE and is not about disabling ALPM but switching to AUX-Wake ALPM. Stop touching this bit on ALPM disable.

Fixes 1ccbf135862b ("drm/i915/psr: Enable ALPM on source side for eDP Panel replay")
Cc Animesh Manna <[email protected]>
Cc Jani Nikula <[email protected]>
Cc <[email protected]> # v6.10+
(cherry picked from commit 008304c9ae75c772d3460040de56e12112cdf5e6)
---
 drivers/gpu/drm/i915/display/intel_alpm.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)
drivers/gpu/drm/i915/display/intel_alpm.c +1 -6
index d72e10160f1d4..b5f4d77562c90 100644
@@ -495,12 +495,7 @@ void intel_alpm_disable(struct intel_dp *intel_dp)
 	mutex_lock(&intel_dp->alpm_parameters.lock);
 
 	intel_de_rmw(display, ALPM_CTL(display, cpu_transcoder),
-		     ALPM_CTL_ALPM_ENABLE | ALPM_CTL_LOBF_ENABLE |
-		     ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
-
-	intel_de_rmw(display,
-		     PORT_ALPM_CTL(cpu_transcoder),
-		     PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
+		     ALPM_CTL_ALPM_ENABLE | ALPM_CTL_LOBF_ENABLE, 0);
 
 	mutex_unlock(&intel_dp->alpm_parameters.lock);
 }
Signature · 1 line
2.51.0
#10 lore raw

PATCH 1/1 drm/i915/alpm: ALPM disable fixes

In reply to [email protected]

commit eb4a7139e97374f42b7242cc754e77f1623fbcd5 upstream

PORT_ALPM_CTL is supposed to be written only before link training. Remove writing it from ALPM disable.

Also clearing ALPM_CTL_ALPM_AUX_LESS_ENABLE and is not about disabling ALPM but switching to AUX-Wake ALPM. Stop touching this bit on ALPM disable.

Fixes 1ccbf135862b ("drm/i915/psr: Enable ALPM on source side for eDP Panel replay")
Cc Animesh Manna <[email protected]>
Cc Jani Nikula <[email protected]>
Cc <[email protected]> # v6.10+
(cherry picked from commit 008304c9ae75c772d3460040de56e12112cdf5e6)
(cherry picked from commit eb4a7139e97374f42b7242cc754e77f1623fbcd5)
---
 drivers/gpu/drm/i915/display/intel_psr.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)
drivers/gpu/drm/i915/display/intel_psr.c +1 -6
index 34d61e44c6bd..4d697b44078c 100644
@@ -2114,12 +2114,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 	/* Panel Replay on eDP is always using ALPM aux less. */
 	if (intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp)) {
 		intel_de_rmw(display, ALPM_CTL(display, cpu_transcoder),
-			     ALPM_CTL_ALPM_ENABLE |
-			     ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
-
-		intel_de_rmw(display,
-			     PORT_ALPM_CTL(display, cpu_transcoder),
-			     PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
+			     ALPM_CTL_ALPM_ENABLE, 0);
 	}
 
 	/* Disable PSR on Sink */
Signature · 1 line
2.43.0