MPXY MSI availability and RPMI notification updates

PATCH In review David E. Garcia Porras 2 participants 5 messages Apr 9 – Jun 8

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David E. Garcia Porras

author

2026-04-09 14:57 UTC #0 lore raw

cover MPXY MSI availability and RPMI notification updates

This series enables proper MSI availability determination for MPXY channels and updates RPMI notification structures and Performance service group event definitions.

Patch 1 replaces the hardcoded msi_avail = false in MPXY channel setup with a runtime check using imsic_get_data() to detect IMSIC presence per hart. A static inline stub is added for builds without CONFIG_IRQCHIP_IMSIC.

Patch 2 adds RPMI notification header macros, rpmi_event_notification_state enum, and missing req_state/current_state fields to the RPMI enable notification request/response structs for RPMI spec compliance. Also adds notification event ID enums and data structures for RPMI Performance service group events (power change, limit change, and level change).

David E. Garcia Porras (2):
lib: sbi_mpxy: Enable MPXY channel MSI availability determination
include: mailbox: Update RPMI notification structs and add Performance
event definitions

 include/sbi_utils/irqchip/imsic.h        |  2 +
 include/sbi_utils/mailbox/rpmi_msgprot.h | 49 ++++++++++++++++++++++++
 lib/sbi/sbi_mpxy.c                       |  8 ++--
 3 files changed, 55 insertions(+), 4 deletions(-)

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David E. Garcia Porras

author

2026-04-09 14:57 UTC #1 lore raw

PATCH 1/2 lib: sbi_mpxy: Enable MPXY channel MSI availability determination

Use imsic_get_data() to determine MSI availability for each MPXY channel based on IMSIC presence per hart, instead of unconditionally disabling it.

Add a static inline stub for imsic_get_data() when CONFIG_IRQCHIP_IMSIC is not enabled.

Signed-off-by David E. Garcia Porras <[email protected]>

---
 include/sbi_utils/irqchip/imsic.h | 2 ++
 lib/sbi/sbi_mpxy.c                | 8 ++++----
 2 files changed, 6 insertions(+), 4 deletions(-)

include/sbi_utils/irqchip/imsic.h +2 -0

index 88dd3cfb..68f3c4ad 100644
@@ -54,6 +54,8 @@ static inline void imsic_local_irqchip_init(void) { }
 
 static inline int imsic_data_check(struct imsic_data *imsic) { return 0; }
 
+static inline struct imsic_data *imsic_get_data(u32 hartindex) { return NULL; }
+
 #endif
 
 #endif

lib/sbi/sbi_mpxy.c +4 -4

index a83cf16c..8ff52bb6 100644
@@ -20,6 +20,7 @@
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_byteorder.h>
+#include <sbi_utils/irqchip/imsic.h>
 
 /** Shared memory size across all harts */
 static unsigned long mpxy_shmem_size = PAGE_SIZE;

@@ -255,11 +256,10 @@ static int domain_mpxy_state_data_setup(struct sbi_domain *dom,
 			return SBI_ENOMEM;
 
 		/*
-		 * TODO: Proper support for checking msi support from
-		 * platform. Currently disable msi and sse and use
-		 * polling
+		 * TODO: Proper support for checking sse support from
+		 * platform. Currently disable sse and use polling
 		 */
-		ms->msi_avail = false;
+		ms->msi_avail = !!imsic_get_data(i);
 		ms->sse_avail = false;
 
 		sbi_mpxy_shmem_disable(ms);

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Anup Patel

2026-06-08 12:29 UTC #2 lore raw

Re: [PATCH 1/2] lib: sbi_mpxy: Enable MPXY channel MSI availability determination

Quoted 41 lines · David E. Garcia Porras

Use imsic_get_data() to determine MSI availability for each MPXY channel based on IMSIC presence per hart, instead of unconditionally disabling it.

Add a static inline stub for imsic_get_data() when CONFIG_IRQCHIP_IMSIC is not enabled.

Signed-off-by David E. Garcia Porras <[email protected]>

---
 include/sbi_utils/irqchip/imsic.h | 2 ++
 lib/sbi/sbi_mpxy.c                | 8 ++++----
 2 files changed, 6 insertions(+), 4 deletions(-)

include/sbi_utils/irqchip/imsic.h +2 -0

index 88dd3cfb..68f3c4ad 100644
@@ -54,6 +54,8 @@ static inline void imsic_local_irqchip_init(void) { }
 
 static inline int imsic_data_check(struct imsic_data *imsic) { return 0; }
 
+static inline struct imsic_data *imsic_get_data(u32 hartindex) { return NULL; }
+
 #endif
 
 #endif

lib/sbi/sbi_mpxy.c +1 -0

index a83cf16c..8ff52bb6 100644
@@ -20,6 +20,7 @@
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_byteorder.h>
+#include <sbi_utils/irqchip/imsic.h>
 
 /** Shared memory size across all harts */
 static unsigned long mpxy_shmem_size = PAGE_SIZE;

@@ -255,11 +256,10 @@ static int domain_mpxy_state_data_setup(struct sbi_domain *dom,
                        return SBI_ENOMEM;

lib/sbi/sbi_mpxy.c static int domain_mpxy_state_data_setup(struct sbi_domain *dom, · line 262

Quoted 10 lines

lib/sbi/sbi_mpxy.c +3 -4

 
                /*
-                * TODO: Proper support for checking msi support from
-                * platform. Currently disable msi and sse and use
-                * polling
+                * TODO: Proper support for checking sse support from
+                * platform. Currently disable sse and use polling
                 */
-               ms->msi_avail = false;
+               ms->msi_avail = !!imsic_get_data(i);

Instead of directly calling irqchip driver function from sbi_mpxy framework it is better to check presence of MSI controller through the sbi_irqchip framework.

I am thinking of extending "struct sbi_irqchip_device" to allow irqchip drivers advertise capabilities of the interrupt controller (such as wired irqs, MSIs, etc). Let me take a stab at it.

Quoted 11 lines

lib/sbi/sbi_mpxy.c +0 -1
                ms->sse_avail = false;
 
                sbi_mpxy_shmem_disable(ms);
--
2.43.0
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Regards,
Anup

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David E. Garcia Porras

author

2026-04-09 14:57 UTC #3 lore raw

PATCH 2/2 include: mailbox: Update RPMI notification structs and add Performance event definitions

In reply to David E. Garcia Porras

Add RPMI notification header size and offset macros, and event header composition macro. Add rpmi_event_notification_state enum with disable, enable, and return current state IDs. Add req_state field to rpmi_enable_notification_req and current_state field to rpmi_enable_notification_resp for RPMI spec compliance.

Add notification event ID enum and data structures for RPMI Performance service group events: power change, limit change, and level change.

Signed-off-by David E. Garcia Porras <[email protected]>

---
 include/sbi_utils/mailbox/rpmi_msgprot.h | 49 ++++++++++++++++++++++++
 1 file changed, 49 insertions(+)

include/sbi_utils/mailbox/rpmi_msgprot.h +49 -0

index c35788f0..8526ace3 100644
@@ -87,6 +87,18 @@
 #define RPMI_DEF_TX_TIMEOUT			20
 #define RPMI_DEF_RX_TIMEOUT			20
 
+/** RPMI Notification header size */
+#define RPMI_NOTIF_HDR_SIZE 16
+
+/** RPMI Notification header offsets */
+#define RPMI_NOTIF_HDR_REMAINING_OFFSET 0x00
+#define RPMI_NOTIF_HDR_RETURNED_OFFSET 0x04
+#define RPMI_NOTIF_HDR_LOST_OFFSET 0x08
+#define RPMI_NOTIF_HDR_RESERVED_OFFSET 0x0C
+
+/** RPMI Notification event header constructor */
+#define RPMI_NOTIF_EVENT_HDR(eid, dlen) ((u32)(eid) << 16) | ((u32)(dlen) & 0xFFFF)
+
 /**
  * Common macro to generate composite version from major
  * and minor version numbers.

@@ -232,14 +244,24 @@ enum rpmi_servicegroup_id {
 	RPMI_SRVGRP_VENDOR_END = 0xFFFF,
 };
 
+/** RPMI event notification state IDs */
+enum rpmi_event_notification_state {
+	RPMI_EVENT_NOTIF_DISABLE_STATE = 0,
+	RPMI_EVENT_NOTIF_ENABLE_STATE = 1,
+	RPMI_EVENT_NOTIF_RET_CURR_STATE = 2,
+	RPMI_EVENT_NOTIF_MAX_COUNT = 3,
+};
+
 /** RPMI enable notification request */
 struct rpmi_enable_notification_req {
 	u32 eventid;
+	u32 req_state;
 };
 
 /** RPMI enable notification response */
 struct rpmi_enable_notification_resp {
 	s32 status;
+	u32 current_state;
 };
 
 /** RPMI Base ServiceGroup Service IDs */

@@ -846,6 +868,33 @@ enum rpmi_performance_service_id {
 	RPMI_PERF_SRV_MAX_COUNT,
 };
 
+/** RPMI Performance ServiceGroup Notification Event IDs */
+enum rpmi_performance_event_id {
+	RPMI_PERF_EVENT_POWER_CHANGE = 0x01,
+	RPMI_PERF_EVENT_LIMIT_CHANGE = 0x02,
+	RPMI_PERF_EVENT_LEVEL_CHANGE = 0x03,
+	RPMI_PERF_EVENT_MAX_COUNT,
+};
+
+/** RPMI Performance power change notification data */
+struct rpmi_perf_event_power_change {
+	u32 domain_id;
+	u32 power_uw;
+};
+
+/** RPMI Performance limit change notification data */
+struct rpmi_perf_event_limit_change {
+	u32 domain_id;
+	u32 max_level;
+	u32 min_level;
+};
+
+/** RPMI Performance level change notification data */
+struct rpmi_perf_event_level_change {
+	u32 domain_id;
+	u32 level;
+};
+
 struct rpmi_perf_get_num_domain_resp {
 	s32 status;
 	u32 num_domains;

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Anup Patel

Reviewed-by on v1 2/2

2026-06-08 12:35 UTC #4 lore raw

Re: [PATCH 2/2] include: mailbox: Update RPMI notification structs and add Performance event definitions

Quoted 21 lines · David E. Garcia Porras

Add RPMI notification header size and offset macros, and event header composition macro. Add rpmi_event_notification_state enum with disable, enable, and return current state IDs. Add req_state field to rpmi_enable_notification_req and current_state field to rpmi_enable_notification_resp for RPMI spec compliance.
Add notification event ID enum and data structures for RPMI Performance service group events: power change, limit change, and level change.
Signed-off-by David E. Garcia Porras <[email protected]>
---
 include/sbi_utils/mailbox/rpmi_msgprot.h | 49 ++++++++++++++++++++++++
 1 file changed, 49 insertions(+)
include/sbi_utils/mailbox/rpmi_msgprot.h +0 -0
index c35788f0..8526ace3 100644
@@ -87,6 +87,18 @@
 #define RPMI_DEF_TX_TIMEOUT                    20

include/sbi_utils/mailbox/rpmi_msgprot.h line 97

Quoted 10 lines

include/sbi_utils/mailbox/rpmi_msgprot.h +8 -0

 #define RPMI_DEF_RX_TIMEOUT                    20
 
+/** RPMI Notification header size */
+#define RPMI_NOTIF_HDR_SIZE 16
+
+/** RPMI Notification header offsets */
+#define RPMI_NOTIF_HDR_REMAINING_OFFSET 0x00
+#define RPMI_NOTIF_HDR_RETURNED_OFFSET 0x04
+#define RPMI_NOTIF_HDR_LOST_OFFSET 0x08
+#define RPMI_NOTIF_HDR_RESERVED_OFFSET 0x0C

These above RPMI_NOTIF_HDR_xyz defines are not part of the RPMI specification. Rather these are defined by the SBI MPXY extension. Please add these as part of the sbi_ecall_interface.h and drop from this patch.

Quoted 70 lines

include/sbi_utils/mailbox/rpmi_msgprot.h +41 -1

+
+/** RPMI Notification event header constructor */
+#define RPMI_NOTIF_EVENT_HDR(eid, dlen) ((u32)(eid) << 16) | ((u32)(dlen) & 0xFFFF)
+
 /**
  * Common macro to generate composite version from major
  * and minor version numbers.

@@ -232,14 +244,24 @@ enum rpmi_servicegroup_id {
        RPMI_SRVGRP_VENDOR_END = 0xFFFF,
 };
 
+/** RPMI event notification state IDs */
+enum rpmi_event_notification_state {
+       RPMI_EVENT_NOTIF_DISABLE_STATE = 0,
+       RPMI_EVENT_NOTIF_ENABLE_STATE = 1,
+       RPMI_EVENT_NOTIF_RET_CURR_STATE = 2,
+       RPMI_EVENT_NOTIF_MAX_COUNT = 3,
+};
+
 /** RPMI enable notification request */
 struct rpmi_enable_notification_req {
        u32 eventid;
+       u32 req_state;
 };
 
 /** RPMI enable notification response */
 struct rpmi_enable_notification_resp {
        s32 status;
+       u32 current_state;
 };
 
 /** RPMI Base ServiceGroup Service IDs */

@@ -846,6 +868,33 @@ enum rpmi_performance_service_id {
        RPMI_PERF_SRV_MAX_COUNT,
 };
 
+/** RPMI Performance ServiceGroup Notification Event IDs */
+enum rpmi_performance_event_id {
+       RPMI_PERF_EVENT_POWER_CHANGE = 0x01,
+       RPMI_PERF_EVENT_LIMIT_CHANGE = 0x02,
+       RPMI_PERF_EVENT_LEVEL_CHANGE = 0x03,
+       RPMI_PERF_EVENT_MAX_COUNT,
+};
+
+/** RPMI Performance power change notification data */
+struct rpmi_perf_event_power_change {
+       u32 domain_id;
+       u32 power_uw;
+};
+
+/** RPMI Performance limit change notification data */
+struct rpmi_perf_event_limit_change {
+       u32 domain_id;
+       u32 max_level;
+       u32 min_level;
+};
+
+/** RPMI Performance level change notification data */
+struct rpmi_perf_event_level_change {
+       u32 domain_id;
+       u32 level;
+};
+
 struct rpmi_perf_get_num_domain_resp {
        s32 status;
        u32 num_domains;
--

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Quoted 4 lines

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Otherwise, this looks good to me.

Reviewed-by Anup Patel <[email protected]>

Thanks,
Anup

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