dt-bindings: arm: altera: document the Agilex7-M devkit
PATCH v2 1/2 dt-bindings: arm: altera: document the Agilex7-M devkit
The Agilex7-M is a rebranded version of the original Agilex SoC. The Agilex7-M SoC has the same core peripherals as the Agilex device.
This change is to document the Agilex7m devkit which has the Agilex7-M device. The Agilex7-M SoC supports DDR4, DDR5, LPDDR5, PCIE 5.0(x16), but not QSPI.
Also, now that Altera has separated from Intel, use the "altr" company prefix.
---
v2: use a specific binding, "altr,socfpga-agilex7m" for the Agilex7-M SoC
--- Documentation/devicetree/bindings/arm/altera.yaml | 6 ++++++ 1 file changed, 6 insertions(+)
Documentation/devicetree/bindings/arm/altera.yaml +6 -0
@@ -108,6 +108,12 @@ properties: - intel,socfpga-agilex5-socdk-nand - const: intel,socfpga-agilex5 + - description: Agilex7m boards + items: + - enum: + - altr,socfpga-agilex7m-socdk + - const: altr,socfpga-agilex7m + - description: SoCFPGA VT items: - const: altr,socfpga-vt
Signature · 1 line
2.42.0.411.g813d9a9188
PATCH v2 2/2 arm64: dts: socfpga: agilex7m: Add SoCFPGA Agilex7-M devkit
The Agilex7-M devkit contains an Agilex7M SoC, which is a newly branded version of the original Agilex SoC. The Agilex7M core peripherals are identical to the Agilex SoC.
We can re-use the socfpga_agilex.dtsi for this devkit. The Agilex7-M devkit supports PCIE 5.0(x16), DDR4, DDR5, LPDDR5 and does not have QSPI.
---
v2: use the updated "altr,socfpga-agilex7m" and
"altr,socfpga-agilex7m-socdk"
--- arch/arm64/boot/dts/intel/Makefile | 1 + .../boot/dts/intel/socfpga_agilex7m_socdk.dts | 104 ++++++++++++++++++ 2 files changed, 105 insertions(+) create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex7m_socdk.dts
arch/arm64/boot/dts/intel/Makefile +1 -0
@@ -8,5 +8,6 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_n6000.dtb \ socfpga_agilex5_socdk_013b.dtb \ socfpga_agilex5_socdk_modular.dtb \ socfpga_agilex5_socdk_nand.dtb \ + socfpga_agilex7m_socdk.dtb \ socfpga_n5x_socdk.dtb dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb
arch/arm64/boot/dts/intel/socfpga_agilex7m_socdk.dts new file +104 -0
104 lines not on this page · raw message
Signature · 1 line
2.42.0.411.g813d9a9188
Quoted 11 lines · Dinh Nguyen
The Agilex7-M is a rebranded version of the original Agilex SoC. The Agilex7-M SoC has the same core peripherals as the Agilex device.
This change is to document the Agilex7m devkit which has the Agilex7-M device. The Agilex7-M SoC supports DDR4, DDR5, LPDDR5, PCIE 5.0(x16), but not QSPI.
Also, now that Altera has separated from Intel, use the "altr" company prefix.
Signed-off-by Dinh Nguyen <[email protected]>
pw-bot: not-applicable