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riscv: dts: microchip: fix pic64gx gpio interrupt-cells

PATCH New Conor Dooley 1 participant 1 message May 5

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Conor Dooley

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PATCH 1/1 riscv: dts: microchip: fix pic64gx gpio interrupt-cells

From: Conor Dooley <[email protected]>

As the pic64gx devicetree files got added in parallel to the GPIO interrupt-cells being fixed for PolarFire SoC, they didn't get changed to the correct values. Fix them now.

Fixes 7219d20f9f421 ("riscv: dts: microchip: add pic64gx and its curiosity kit")
Signed-off-by Conor Dooley <[email protected]>

---
CC: Conor Dooley <[email protected]>
CC: Daire McNamara <[email protected]>
CC: Rob Herring <[email protected]>
CC: Krzysztof Kozlowski <[email protected]>
CC: Pierre-Henry Moussay <[email protected]>
CC: [email protected]
CC: [email protected]
CC: [email protected]

---
 arch/riscv/boot/dts/microchip/pic64gx.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
arch/riscv/boot/dts/microchip/pic64gx.dtsi +3 -3
index 5cf3e3de0e067..5addfd4357117 100644
@@ -494,7 +494,7 @@ gpio0: gpio@20120000 {
 			reg = <0x0 0x20120000 0x0 0x1000>;
 			interrupt-parent = <&irqmux>;
 			interrupt-controller;
-			#interrupt-cells = <1>;
+			#interrupt-cells = <2>;
 			interrupts = <0>, <1>, <2>, <3>,
 				     <4>, <5>, <6>, <7>,
 				     <8>, <9>, <10>, <11>,

@@ -511,7 +511,7 @@ gpio1: gpio@20121000 {
 			reg = <0x0 0x20121000 0x0 0x1000>;
 			interrupt-parent = <&irqmux>;
 			interrupt-controller;
-			#interrupt-cells = <1>;
+			#interrupt-cells = <2>;
 			interrupts = <32>, <33>, <34>, <35>,
 				     <36>, <37>, <38>, <39>,
 				     <40>, <41>, <42>, <43>,

@@ -530,7 +530,7 @@ gpio2: gpio@20122000 {
 			reg = <0x0 0x20122000 0x0 0x1000>;
 			interrupt-parent = <&irqmux>;
 			interrupt-controller;
-			#interrupt-cells = <1>;
+			#interrupt-cells = <2>;
 			interrupts = <64>, <65>, <66>, <67>,
 				     <68>, <69>, <70>, <71>,
 				     <72>, <73>, <74>, <75>,
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