memory: tegra264: Add full set of MC clients

PATCH Superseded Sumit Gupta 3 participants 5 messages May 15 – May 18

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Device tree bindings Tegra architecture support Memory controller drivers

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Sumit Gupta

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2026-05-15 17:19 UTC #0 lore raw

PATCH 1/1 memory: tegra264: Add full set of MC clients

Extend the Tegra264 MC dt-bindings header and tegra264_mc_clients table to cover the full set of memory clients exposed by the SoC. Client name is used for MC fault reporting. Clients managed by the bandwidth manager in BPMP additionally carry their bpmp_id and type.

Entries in tegra264_mc_clients[] are sorted in increasing order of their client IDs, which matches the order of the override and security register offsets used in previous SoCs.

Signed-off-by Sumit Gupta <[email protected]>

---
 drivers/memory/tegra/tegra264.c              | 564 +++++++++++++++++--
 include/dt-bindings/memory/nvidia,tegra264.h | 287 ++++++++++
 2 files changed, 819 insertions(+), 32 deletions(-)

drivers/memory/tegra/tegra264.c +532 ~~-32~~

index e43ef14da1ee..4e7c5ef126f4 100644
@@ -21,45 +21,62 @@
  */
 static const struct tegra_mc_client tegra264_mc_clients[] = {
 	{
-		.id = TEGRA264_MEMORY_CLIENT_HDAR,
-		.name = "hdar",
-		.bpmp_id = TEGRA264_BWMGR_HDA,
-		.type = TEGRA_ICC_ISO_AUDIO,
+		.id = TEGRA264_MEMORY_CLIENT_PTCR,
+		.name = "ptcr",
 	}, {
-		.id = TEGRA264_MEMORY_CLIENT_HDAW,
-		.name = "hdaw",
-		.bpmp_id = TEGRA264_BWMGR_HDA,
-		.type = TEGRA_ICC_ISO_AUDIO,
+		.id = TEGRA264_MEMORY_CLIENT_HOST1XR,
+		.name = "host1xr",
 	}, {
-		.id = TEGRA264_MEMORY_CLIENT_MGBE0R,
-		.name = "mgbe0r",
-		.bpmp_id = TEGRA264_BWMGR_EQOS,
-		.type = TEGRA_ICC_NISO,
+		.id = TEGRA264_MEMORY_CLIENT_MPCORER,
+		.name = "mpcorer",
 	}, {
-		.id = TEGRA264_MEMORY_CLIENT_MGBE0W,
-		.name = "mgbe0w",
-		.bpmp_id = TEGRA264_BWMGR_EQOS,
-		.type = TEGRA_ICC_NISO,
+		.id = TEGRA264_MEMORY_CLIENT_PSCR,
+		.name = "pscr",
 	}, {
-		.id = TEGRA264_MEMORY_CLIENT_MGBE1R,
-		.name = "mgbe1r",
-		.bpmp_id = TEGRA264_BWMGR_EQOS,
-		.type = TEGRA_ICC_NISO,
+		.id = TEGRA264_MEMORY_CLIENT_PSCW,
+		.name = "pscw",
 	}, {
-		.id = TEGRA264_MEMORY_CLIENT_MGBE1W,
-		.name = "mgbe1w",
-		.bpmp_id = TEGRA264_BWMGR_EQOS,
-		.type = TEGRA_ICC_NISO,
+		.id = TEGRA264_MEMORY_CLIENT_ISP0R,
+		.name = "isp0r",
 	}, {
-		.id = TEGRA264_MEMORY_CLIENT_SDMMC0R,
-		.name = "sdmmc0r",
-		.bpmp_id = TEGRA264_BWMGR_SDMMC_1,
-		.type = TEGRA_ICC_NISO,
+		.id = TEGRA264_MEMORY_CLIENT_MPCOREW,
+		.name = "mpcorew",
 	}, {
-		.id = TEGRA264_MEMORY_CLIENT_SDMMC0W,
-		.name = "sdmmc0w",
-		.bpmp_id = TEGRA264_BWMGR_SDMMC_1,
-		.type = TEGRA_ICC_NISO,
+		.id = TEGRA264_MEMORY_CLIENT_ISP0W,
+		.name = "isp0w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_ISP1W,
+		.name = "isp1w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_ISPFALCONR,
+		.name = "ispfalconr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_ISPFALCONW,
+		.name = "ispfalconw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MGBE2R,
+		.name = "mgbe2r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_OFAR2MC,
+		.name = "ofar2mc",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_OFAW2MC,
+		.name = "ofaw2mc",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MGBE2W,
+		.name = "mgbe2w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MGBE3R,
+		.name = "mgbe3r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MGBE3W,
+		.name = "mgbe3w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SEU1RD,
+		.name = "seu1rd",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SEU1WR,
+		.name = "seu1wr",
 	}, {
 		.id = TEGRA264_MEMORY_CLIENT_VICR,
 		.name = "vicr",

@@ -70,6 +87,15 @@ static const struct tegra_mc_client tegra264_mc_clients[] = {
 		.name = "vicw",
 		.bpmp_id = TEGRA264_BWMGR_VIC,
 		.type = TEGRA_ICC_NISO,
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_VIW,
+		.name = "viw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_XSPI0R,
+		.name = "xspi0r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_XSPI0W,
+		.name = "xspi0w",
 	}, {
 		.id = TEGRA264_MEMORY_CLIENT_APER,
 		.name = "aper",

@@ -80,6 +106,48 @@ static const struct tegra_mc_client tegra264_mc_clients[] = {
 		.name = "apew",
 		.bpmp_id = TEGRA264_BWMGR_APE,
 		.type = TEGRA_ICC_ISO_AUDIO,
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SER,
+		.name = "ser",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SEW,
+		.name = "sew",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_AXIAPR,
+		.name = "axiapr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_AXIAPW,
+		.name = "axiapw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_ETRR,
+		.name = "etrr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_ETRW,
+		.name = "etrw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_TSECR,
+		.name = "tsecr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_TSECW,
+		.name = "tsecw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_BPMPR,
+		.name = "bpmpr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_BPMPW,
+		.name = "bpmpw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_AONR,
+		.name = "aonr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_AONW,
+		.name = "aonw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_GPCDMAR,
+		.name = "gpcdmar",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_GPCDMAW,
+		.name = "gpcdmaw",
 	}, {
 		.id = TEGRA264_MEMORY_CLIENT_APEDMAR,
 		.name = "apedmar",

@@ -90,6 +158,36 @@ static const struct tegra_mc_client tegra264_mc_clients[] = {
 		.name = "apedmaw",
 		.bpmp_id = TEGRA264_BWMGR_APEDMA,
 		.type = TEGRA_ICC_ISO_AUDIO,
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MIU0R,
+		.name = "miu0r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MIU0W,
+		.name = "miu0w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MIU1R,
+		.name = "miu1r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MIU1W,
+		.name = "miu1w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MIU2R,
+		.name = "miu2r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MIU2W,
+		.name = "miu2w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MIU3R,
+		.name = "miu3r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MIU3W,
+		.name = "miu3w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MIU4R,
+		.name = "miu4r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MIU4W,
+		.name = "miu4w",
 	}, {
 		.id = TEGRA264_MEMORY_CLIENT_VIFALCONR,
 		.name = "vifalconr",

@@ -110,6 +208,12 @@ static const struct tegra_mc_client tegra264_mc_clients[] = {
 		.name = "rcew",
 		.bpmp_id = TEGRA264_BWMGR_RCE,
 		.type = TEGRA_ICC_NISO,
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_NVENC1SRD2MC,
+		.name = "nvenc1srd2mc",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_NVENC1SWR2MC,
+		.name = "nvenc1swr2mc",
 	}, {
 		.id = TEGRA264_MEMORY_CLIENT_PCIE0W,
 		.name = "pcie0w",

@@ -185,6 +289,402 @@ static const struct tegra_mc_client tegra264_mc_clients[] = {
 		.name = "nvdecswr2mc",
 		.bpmp_id = TEGRA264_BWMGR_NVDEC,
 		.type = TEGRA_ICC_NISO,
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MIU5R,
+		.name = "miu5r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MIU5W,
+		.name = "miu5w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MIU6W,
+		.name = "miu6w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_RISTR,
+		.name = "ristr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_RISTW,
+		.name = "ristw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_OESPR,
+		.name = "oespr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_OESPW,
+		.name = "oespw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MIU7W,
+		.name = "miu7w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MIU8R,
+		.name = "miu8r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MIU8W,
+		.name = "miu8w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MIU9R,
+		.name = "miu9r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MIU9W,
+		.name = "miu9w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_PMA0AWR,
+		.name = "pma0awr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_NVJPG1SRD2MC,
+		.name = "nvjpg1srd2mc",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_NVJPG1SWR2MC,
+		.name = "nvjpg1swr2mc",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU0CTWR,
+		.name = "smmu0ctwr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU0CMDQVR,
+		.name = "smmu0cmdqvr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU0CMDQVW,
+		.name = "smmu0cmdqvw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU0EVNTQW,
+		.name = "smmu0evntqw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU1PTWR,
+		.name = "smmu1ptwr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU1CTWR,
+		.name = "smmu1ctwr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU1CMDQVR,
+		.name = "smmu1cmdqvr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU1CMDQVW,
+		.name = "smmu1cmdqvw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU1EVNTQW,
+		.name = "smmu1evntqw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU2PTWR,
+		.name = "smmu2ptwr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU2CTWR,
+		.name = "smmu2ctwr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU2CMDQVR,
+		.name = "smmu2cmdqvr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU2CMDQVW,
+		.name = "smmu2cmdqvw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU2EVNTQW,
+		.name = "smmu2evntqw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU0CMDQR,
+		.name = "smmu0cmdqr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU1CMDQR,
+		.name = "smmu1cmdqr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU2CMDQR,
+		.name = "smmu2cmdqr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_APE1R,
+		.name = "ape1r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_APE1W,
+		.name = "ape1w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_UFSR,
+		.name = "ufsr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_UFSW,
+		.name = "ufsw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_XUSB_DEVR,
+		.name = "xusb_devr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_XUSB_DEVW,
+		.name = "xusb_devw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_XUSB_DEV1R,
+		.name = "xusb_dev1r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_XUSB_DEV2W,
+		.name = "xusb_dev2w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_XUSB_DEV3R,
+		.name = "xusb_dev3r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_XUSB_DEV3W,
+		.name = "xusb_dev3w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_XUSB_DEV4R,
+		.name = "xusb_dev4r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_XUSB_DEV4W,
+		.name = "xusb_dev4w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_XUSB_DEV5R,
+		.name = "xusb_dev5r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_XUSB_DEV5W,
+		.name = "xusb_dev5w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_DCER,
+		.name = "dcer",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_DCEW,
+		.name = "dcew",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_HDAR,
+		.name = "hdar",
+		.bpmp_id = TEGRA264_BWMGR_HDA,
+		.type = TEGRA_ICC_ISO_AUDIO,
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_HDAW,
+		.name = "hdaw",
+		.bpmp_id = TEGRA264_BWMGR_HDA,
+		.type = TEGRA_ICC_ISO_AUDIO,
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_DISPNISOR,
+		.name = "dispnisor",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_DISPNISOW,
+		.name = "dispnisow",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_XUSB_DEV1W,
+		.name = "xusb_dev1w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_XUSB_DEV2R,
+		.name = "xusb_dev2r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_DISPR,
+		.name = "dispr",
+		.bpmp_id = TEGRA264_BWMGR_DISPLAY,
+		.type = TEGRA_ICC_ISO_DISPLAY,
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MSSSEQR,
+		.name = "mssseqr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MSSSEQW,
+		.name = "mssseqw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU3PTWR,
+		.name = "smmu3ptwr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU3CTWR,
+		.name = "smmu3ctwr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU3CMDQVR,
+		.name = "smmu3cmdqvr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU3CMDQVW,
+		.name = "smmu3cmdqvw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU3EVNTQW,
+		.name = "smmu3evntqw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU3CMDQR,
+		.name = "smmu3cmdqr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU4PTWR,
+		.name = "smmu4ptwr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU4CTWR,
+		.name = "smmu4ctwr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU4CMDQVR,
+		.name = "smmu4cmdqvr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU4CMDQVW,
+		.name = "smmu4cmdqvw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU4EVNTQW,
+		.name = "smmu4evntqw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SMMU4CMDQR,
+		.name = "smmu4cmdqr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MGBE0R,
+		.name = "mgbe0r",
+		.bpmp_id = TEGRA264_BWMGR_EQOS,
+		.type = TEGRA_ICC_NISO,
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MGBE0W,
+		.name = "mgbe0w",
+		.bpmp_id = TEGRA264_BWMGR_EQOS,
+		.type = TEGRA_ICC_NISO,
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MGBE1R,
+		.name = "mgbe1r",
+		.bpmp_id = TEGRA264_BWMGR_EQOS,
+		.type = TEGRA_ICC_NISO,
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MGBE1W,
+		.name = "mgbe1w",
+		.bpmp_id = TEGRA264_BWMGR_EQOS,
+		.type = TEGRA_ICC_NISO,
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_VI1W,
+		.name = "vi1w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_VIFALCON1R,
+		.name = "vifalcon1r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_VIFALCON1W,
+		.name = "vifalcon1w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_ISPFALCON1R,
+		.name = "ispfalcon1r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_ISPFALCON1W,
+		.name = "ispfalcon1w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_RCE1R,
+		.name = "rce1r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_RCE1W,
+		.name = "rce1w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SEU2R,
+		.name = "seu2r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SEU2W,
+		.name = "seu2w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SEU3R,
+		.name = "seu3r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SEU3W,
+		.name = "seu3w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_PVA0R,
+		.name = "pva0r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_PVA0W,
+		.name = "pva0w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_PVA1R,
+		.name = "pva1r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_PVA1W,
+		.name = "pva1w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_PVA2R,
+		.name = "pva2r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_PVA2W,
+		.name = "pva2w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_ISP3W,
+		.name = "isp3w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_ISP2R,
+		.name = "isp2r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_ISP2W,
+		.name = "isp2w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_EQOSR,
+		.name = "eqosr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_EQOSW,
+		.name = "eqosw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_FSI0R,
+		.name = "fsi0r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_FSI0W,
+		.name = "fsi0w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_FSI1R,
+		.name = "fsi1r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_FSI1W,
+		.name = "fsi1w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SDMMC0R,
+		.name = "sdmmc0r",
+		.bpmp_id = TEGRA264_BWMGR_SDMMC_1,
+		.type = TEGRA_ICC_NISO,
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SDMMC0W,
+		.name = "sdmmc0w",
+		.bpmp_id = TEGRA264_BWMGR_SDMMC_1,
+		.type = TEGRA_ICC_NISO,
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SBR,
+		.name = "sbr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SBW,
+		.name = "sbw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_HSS_MIU0R,
+		.name = "hss_miu0r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_HSS_MIU0W,
+		.name = "hss_miu0w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_HSS_MIU1R,
+		.name = "hss_miu1r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_HSS_MIU1W,
+		.name = "hss_miu1w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_HSS_MIU2R,
+		.name = "hss_miu2r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_HSS_MIU2W,
+		.name = "hss_miu2w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_HSS_MIU3R,
+		.name = "hss_miu3r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_HSS_MIU3W,
+		.name = "hss_miu3w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_HSS_MIU4R,
+		.name = "hss_miu4r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_HSS_MIU4W,
+		.name = "hss_miu4w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_HSS_MIU5R,
+		.name = "hss_miu5r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_HSS_MIU5W,
+		.name = "hss_miu5w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_HSS_MIU6R,
+		.name = "hss_miu6r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_HSS_MIU6W,
+		.name = "hss_miu6w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_HSS_MIU7R,
+		.name = "hss_miu7r",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_HSS_MIU7W,
+		.name = "hss_miu7w",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_GMMUR2MC,
+		.name = "gmmur2mc",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_UCFELAR,
+		.name = "ucfelar",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_UCFELAW,
+		.name = "ucfelaw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SLCR,
+		.name = "slcr",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_SLCW,
+		.name = "slcw",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_REMOTER,
+		.name = "remoter",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_REMOTEW,
+		.name = "remotew",
 	},
 };

include/dt-bindings/memory/nvidia,tegra264.h +287 -0

342 lines not on this page · raw message

Signature · 1 line

2.34.1

[email protected]

AI review

2026-05-15 17:46 UTC #1 lore raw

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider: - [High] Newly added BPMP-managed memory clients are missing their `.bpmp_id` and `.type` initializations.…

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Newly added BPMP-managed memory clients are missing their .bpmp_id and .type initializations.
- [Medium] The tegra264_mc_clients array is not strictly sorted by client ID, contradicting the commit message. --

commit fefb4bd46910389b4d7cd1d39ffbe180883f7665
Author: Sumit Gupta <[email protected]>

memory: tegra264: Add full set of MC clients

This commit extends the Tegra264 MC dt-bindings header and tegra264_mc_clients table to cover the full set of memory clients exposed by the SoC.

Quoted 4 lines

Extend the Tegra264 MC dt-bindings header and tegra264_mc_clients table to cover the full set of memory clients exposed by the SoC. Client name is used for MC fault reporting. Clients managed by the bandwidth manager in BPMP additionally carry their bpmp_id and type.

The commit message states that clients managed by the bandwidth manager in BPMP carry their bpmp_id and type. Should these fields be initialized for the newly added clients like NVENC, NVJPG, ISP, PVA, XUSB, and TSEC?

Quoted 3 lines

drivers/memory/tegra/tegra264.c +0 -0

[ ... ]

drivers/memory/tegra/tegra264.c static const struct tegra_mc_client tegra264_mc_clients[] = { · line 219

Quoted 13 lines

drivers/memory/tegra/tegra264.c +6 -0

@@ -110,6 +208,12 @@ static const struct tegra_mc_client tegra264_mc_clients[] = {
 		.name = "rcew",
 		.bpmp_id = TEGRA264_BWMGR_RCE,
 		.type = TEGRA_ICC_NISO,
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_NVENC1SRD2MC,
+		.name = "nvenc1srd2mc",
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_NVENC1SWR2MC,
+		.name = "nvenc1swr2mc",
 	}, {
 		.id = TEGRA264_MEMORY_CLIENT_PCIE0W,
 		.name = "pcie0w",

If the bpmp_id and type fields are omitted here, they default to 0. Would this cause drivers for these components to inadvertently pass 0 as the client ID to the BPMP firmware when attempting to configure interconnect bandwidth?

Quoted 3 lines

Entries in tegra264_mc_clients[] are sorted in increasing order of their client IDs, which matches the order of the override and security register offsets used in previous SoCs.

This isn't a functional bug, but are these entries strictly sorted by their client IDs as the commit message indicates?

[ ... ]

drivers/memory/tegra/tegra264.c static const struct tegra_mc_client tegra264_mc_clients[] = { · line 295

Quoted 8 lines

drivers/memory/tegra/tegra264.c +4 -0

@@ -185,6 +289,402 @@ static const struct tegra_mc_client tegra264_mc_clients[] = {
 		.name = "nvdecswr2mc",
 		.bpmp_id = TEGRA264_BWMGR_NVDEC,
 		.type = TEGRA_ICC_NISO,
+	}, {
+		.id = TEGRA264_MEMORY_CLIENT_MIU5R,
+		.name = "miu5r",
+	}, {

Looking at the tegra264_mc_clients array, GPUR02MC (0xb6), GPUW02MC (0xb7), NVDECSRD2MC (0x78), and NVDECSWR2MC (0x79) appear immediately after PCIE5W (0xe3), and the newly added MIU5R (0xfc) is appended after them.

Could this mismatch between the array's actual order and the commit message's claim cause confusion during future maintenance?

Signature · 1 line

Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=1

Sumit Gupta

author

2026-05-18 10:44 UTC #2 lore raw

Quoted 5 lines · On 15/05/26 23:16, [email protected] wrote:

External email: Use caution opening links or attachments
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Newly added BPMP-managed memory clients are missing their .bpmp_id and .type initializations.

Will add a separate patch in v2 with a check in tegra264_mc_icc_set() to not forward ICC requests for clients without .bpmp_id/.type. Some clients are added only for names in fault-log.

Quoted 1 line

- [Medium] The tegra264_mc_clients array is not strictly sorted by client ID, contradicting the commit message.

The array follows MC override/security register offsets and not MC client_ID order. Will correct the commit message in v2.

Thank you,
Sumit Gupta

Quoted 55 lines

-- commit fefb4bd46910389b4d7cd1d39ffbe180883f7665 Author: Sumit Gupta
<[email protected]> memory: tegra264: Add full set of MC clients This commit extends the Tegra264 MC dt-bindings header and tegra264_mc_clients table to cover the full set of memory clients exposed by the SoC.
Quoted 4 lines
Extend the Tegra264 MC dt-bindings header and tegra264_mc_clients table to cover the full set of memory clients exposed by the SoC. Client name is used for MC fault reporting. Clients managed by the bandwidth manager in BPMP additionally carry their bpmp_id and type.
The commit message states that clients managed by the bandwidth manager in BPMP carry their bpmp_id and type. Should these fields be initialized for the newly added clients like NVENC, NVJPG, ISP, PVA, XUSB, and TSEC?
Quoted 3 lines
drivers/memory/tegra/tegra264.c +0 -0
[ ... ]
drivers/memory/tegra/tegra264.c static const struct tegra_mc_client tegra264_mc_clients[] = { · line 219
Quoted 13 lines
drivers/memory/tegra/tegra264.c +6 -0
@@ -110,6 +208,12 @@ static const struct tegra_mc_client tegra264_mc_clients[] = {
               .name = "rcew",
               .bpmp_id = TEGRA264_BWMGR_RCE,
               .type = TEGRA_ICC_NISO,
+     }, {
+             .id = TEGRA264_MEMORY_CLIENT_NVENC1SRD2MC,
+             .name = "nvenc1srd2mc",
+     }, {
+             .id = TEGRA264_MEMORY_CLIENT_NVENC1SWR2MC,
+             .name = "nvenc1swr2mc",
       }, {
               .id = TEGRA264_MEMORY_CLIENT_PCIE0W,
               .name = "pcie0w",
If the bpmp_id and type fields are omitted here, they default to 0. Would this cause drivers for these components to inadvertently pass 0 as the client ID to the BPMP firmware when attempting to configure interconnect bandwidth?
Quoted 3 lines
Entries in tegra264_mc_clients[] are sorted in increasing order of their client IDs, which matches the order of the override and security register offsets used in previous SoCs.
This isn't a functional bug, but are these entries strictly sorted by their client IDs as the commit message indicates?
[ ... ]
drivers/memory/tegra/tegra264.c static const struct tegra_mc_client tegra264_mc_clients[] = { · line 295
Quoted 8 lines
drivers/memory/tegra/tegra264.c +4 -0
@@ -185,6 +289,402 @@ static const struct tegra_mc_client tegra264_mc_clients[] = {
               .name = "nvdecswr2mc",
               .bpmp_id = TEGRA264_BWMGR_NVDEC,
               .type = TEGRA_ICC_NISO,
+     }, {
+             .id = TEGRA264_MEMORY_CLIENT_MIU5R,
+             .name = "miu5r",
+     }, {
Looking at the tegra264_mc_clients array, GPUR02MC (0xb6), GPUW02MC (0xb7), NVDECSRD2MC (0x78), and NVDECSWR2MC (0x79) appear immediately after PCIE5W (0xe3), and the newly added MIU5R (0xfc) is appended after them.
Could this mismatch between the array's actual order and the commit message's claim cause confusion during future maintenance?
--
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=1

Krzysztof Kozlowski

maintainer

2026-05-16 10:09 UTC #3 lore raw

In reply to Sumit Gupta

Quoted 9 lines · Sumit Gupta

Extend the Tegra264 MC dt-bindings header and tegra264_mc_clients table to cover the full set of memory clients exposed by the SoC. Client name is used for MC fault reporting. Clients managed by the bandwidth manager in BPMP additionally carry their bpmp_id and type.
Entries in tegra264_mc_clients[] are sorted in increasing order of their client IDs, which matches the order of the override and security register offsets used in previous SoCs.

Quoted 6 lines

Signed-off-by Sumit Gupta <[email protected]>

---
 drivers/memory/tegra/tegra264.c              | 564 +++++++++++++++++--
 include/dt-bindings/memory/nvidia,tegra264.h | 287 ++++++++++
 2 files changed, 819 insertions(+), 32 deletions(-)

Please run scripts/checkpatch.pl on the patches and fix reported warnings. After that, run also 'scripts/checkpatch.pl --strict' on the patches and (probably) fix more warnings. Some warnings can be ignored, especially from --strict run, but the code here looks like it needs a fix. Feel free to get in touch if the warning is not clear.

Best regards,
Krzysztof

Sumit Gupta

author

2026-05-18 11:15 UTC #4 lore raw

Quoted 19 lines · Krzysztof Kozlowski

External email: Use caution opening links or attachments
Quoted 9 lines · Sumit Gupta
Extend the Tegra264 MC dt-bindings header and tegra264_mc_clients table to cover the full set of memory clients exposed by the SoC. Client name is used for MC fault reporting. Clients managed by the bandwidth manager in BPMP additionally carry their bpmp_id and type.
Entries in tegra264_mc_clients[] are sorted in increasing order of their client IDs, which matches the order of the override and security register offsets used in previous SoCs.
Quoted 6 lines
Signed-off-by Sumit Gupta <[email protected]>
---
  drivers/memory/tegra/tegra264.c              | 564 +++++++++++++++++--
  include/dt-bindings/memory/nvidia,tegra264.h | 287 ++++++++++
  2 files changed, 819 insertions(+), 32 deletions(-)

Quoted 9 lines

Please run scripts/checkpatch.pl on the patches and fix reported warnings. After that, run also 'scripts/checkpatch.pl --strict' on the patches and (probably) fix more warnings. Some warnings can be ignored, especially from --strict run, but the code here looks like it needs a fix. Feel free to get in touch if the warning is not clear.
Best regards,
Krzysztof

checkpatch.pl --strict reports one warning:
WARNING: DT binding docs and includes should be a separate patch.

Will split the nvidia,tegra264.h changes into a separate patch in v2.

Thank you,
Sumit Gupta