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Miscellaneous patches for 2026-06-17

GIT PULL Applied Paolo Bonzini 3 participants 20 messages Jun 17 – Jun 19

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#0 lore raw

The following changes since commit b0df6e2f2c6c45df8d4d286933799c623e124d98:

Merge tag 'pull-riscv-to-apply-20260616' of https://github.com/alistair23/qemu into staging (2026-06-16 10:41:47 -0400)

are available in the Git repository at:

https://gitlab.com/bonzini/qemu.git tags/for-upstream

for you to fetch changes up to fe487bc5a79e0a6f1824ea52b10bc806c69cc0c1:

qga/vss: Drop unused define uuid(x) (2026-06-17 15:15:43 +0200)

----------------------------------------------------------------
* GNU/Hurd support
* More patches to support qemu-ga builds with clang-cl
* gdbstub: Update x86 control register bits
* rust: fix incorrect dependency in Cargo.toml
* target/i386: apply mod to immediate count of an RCL/RCR operation

----------------------------------------------------------------
Damien Zammit (4):
Add GNU/Hurd host_os=gnu
tpm: Add conditional to not compile ioctls on GNU/Hurd block/file-posix: Clean up sys/ioctl import Make copy_file_range non-static on GNU/Hurd

Kostiantyn Kostiuk (7):
qga/win: Use swprintf instead of snwprintf
qga/meson: Remove unused lib stdc++
qga/meson: Use windows.compile_resources instead of custom_target qga/meson: Allow to use MSVC message compiler 'mc' qga/vss: Use MAX_PATH instead of PATH_MAX
qga/vss: Remove unused undefs
qga/vss: Drop unused define uuid(x)

Manolo de Medici (1):
Include new arbitrary limits if not already defined

Mathias Krause (1):
gdbstub: Update x86 control register bits

Paolo Bonzini (3):
rust: fix incorrect dependency in Cargo.toml target/i386: apply mod to immediate count of an RCL/RCR operation target/i386: add more easy cases to gen_eflags_adcox

 configure                           |  2 +
 backends/tpm/tpm_ioctl.h            |  2 +-
 include/qemu/osdep.h                | 15 ++++++--
 qga/vss-win32/vss-common.h          | 15 --------
 block/file-posix.c                  | 17 +++------
 qga/commands-win32.c                |  2 +-
 target/i386/tcg/emit.c.inc          | 74 +++++++++++++++++++++----------------
 gdbstub/gdb-xml/i386-32bit.xml      | 47 +++++++++++++----------
 gdbstub/gdb-xml/i386-64bit.xml      |  7 ++++
 qga/meson.build                     | 12 +++---
 qga/vss-win32/requester.cpp         |  2 +-
 rust/bindings/hwcore-sys/Cargo.toml |  1 -
 rust/bindings/system-sys/Cargo.toml |  1 +
 13 files changed, 103 insertions(+), 94 deletions(-)
Signature · 1 line
2.54.0
#1 lore raw

[PULL 07/16] tpm: Add conditional to not compile ioctls on GNU/Hurd

From: Damien Zammit <[email protected]>

The Hurd currently doesn't have any TPM driver, compilation fails for missing _IOT__IOTBASE_* symbols unless these are left undefined.

---
 backends/tpm/tpm_ioctl.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
backends/tpm/tpm_ioctl.h +1 -1
index ee2dd15d35e..e4663114558 100644
@@ -285,7 +285,7 @@ typedef struct ptm_lockstorage ptm_lockstorage;
 #define PTM_CAP_SEND_COMMAND_HEADER (1 << 15)
 #define PTM_CAP_LOCK_STORAGE       (1 << 16)
 
-#ifndef _WIN32
+#if !defined(_WIN32) && !defined(__GNU__)
 enum {
     PTM_GET_CAPABILITY     = _IOR('P', 0, ptm_cap),
     PTM_INIT               = _IOWR('P', 1, ptm_init),
Signature · 1 line
2.54.0
#2 lore raw

[PULL 03/16] target/i386: add more easy cases to gen_eflags_adcox

In reply to Paolo Bonzini

prepare_update_cf() sometimes results in CC_OP_ADCX, so this improves a bit the handling of BT+RCL and the like.

---
 target/i386/tcg/emit.c.inc | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)
target/i386/tcg/emit.c.inc +7 -3
index 8eca66b6967..83c889cc3b2 100644
@@ -3332,17 +3332,21 @@ static bool gen_eflags_adcox(DisasContext *s, X86DecodedInsn *decode, bool want_
      * to be followed by rotations within the same basic block.
      */
     switch (s->cc_op) {
+    case CC_OP_ADCX:
+    case CC_OP_ADOX:
     case CC_OP_ADCOX:
         /* No need to compute the full EFLAGS, CF/OF are already isolated.  */
-        tcg_gen_mov_tl(decode->cc_src, cpu_cc_src);
-        if (need_flags) {
+        if (s->cc_op != CC_OP_ADCX && need_flags) {
             tcg_gen_mov_tl(decode->cc_src2, cpu_cc_src2);
             got_of = true;
         }
-        if (want_carry || need_flags) {
+        if (s->cc_op != CC_OP_ADOX && (want_carry || need_flags)) {
             tcg_gen_mov_tl(decode->cc_dst, cpu_cc_dst);
             got_cf = true;
         }
+        /* fallthrough */
+    case CC_OP_EFLAGS:
+        tcg_gen_mov_tl(decode->cc_src, cpu_cc_src);
         break;
 
     case CC_OP_LOGICB ... CC_OP_LOGICQ:
Signature · 1 line
2.54.0
#3 lore raw

[PULL 12/16] qga/meson: Use windows.compile_resources instead of custom_target

In reply to Paolo Bonzini

From: Kostiantyn Kostiuk <[email protected]>

windows.compile_resources supports more compiles and works in both MinGW and MSVC environment. While 'windres' is a MinGW specific tool.

---
 qga/meson.build | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)
qga/meson.build +3 -5
index 1c6433ef250..85bdacf7e2a 100644
@@ -105,16 +105,14 @@ endif
 qga_objs = []
 if host_os == 'windows'
   windmc = find_program('windmc', required: true)
-  windres = find_program('windres', required: true)
 
   msgrc = custom_target('messages-win32.rc',
                         input: 'messages-win32.mc',
                         output: ['messages-win32.rc', 'MSG00409.bin', 'messages-win32.h'],
                         command: [windmc, '-h', '@OUTDIR@', '-r', '@OUTDIR@', '@INPUT@'])
-  msgobj = custom_target('messages-win32.o',
-                         input: msgrc[0],
-                         output: 'messages-win32.o',
-                         command: [windres, '-I', '@OUTDIR@', '-o', '@OUTPUT@', '@INPUT@'])
+
+  windows = import('windows')
+  msgobj = windows.compile_resources(msgrc[0])
 
   qga_objs = [msgobj]
 endif
Signature · 1 line
2.54.0
#4 lore raw

[PULL 10/16] qga/win: Use swprintf instead of snwprintf

In reply to Paolo Bonzini

From: Kostiantyn Kostiuk <[email protected]>

snwprintf is a Microsoft extension, and according to the MSVC spec, it is called _snwprintf. MinGW defines both snwprintf and _snwprintf, while MSVC defines only _snwprintf.

We can also use swprintf here. The only difference between the two is the return value, and we are not using it. So change the function to support MSVC build env.

---
 qga/commands-win32.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
qga/commands-win32.c +1 -1
index c0bf3467bdd..2bf5581aaa7 100644
@@ -1590,7 +1590,7 @@ static DWORD get_interface_index(const char *guid)
     ULONG index;
     DWORD status;
     wchar_t wbuf[INTERFACE_PATH_BUF_SZ];
-    snwprintf(wbuf, INTERFACE_PATH_BUF_SZ, L"\\device\\tcpip_%s", guid);
+    swprintf(wbuf, INTERFACE_PATH_BUF_SZ, L"\\device\\tcpip_%s", guid);
     wbuf[INTERFACE_PATH_BUF_SZ - 1] = 0;
     status = GetAdapterIndex (wbuf, &index);
     if (status != NO_ERROR) {
Signature · 1 line
2.54.0
#5 lore raw

[PULL 08/16] block/file-posix: Clean up sys/ioctl import

In reply to Paolo Bonzini

From: Damien Zammit <[email protected]>

Since all platforms except sun include this header, clean up the ifdefs.

---
 block/file-posix.c | 15 ++++-----------
 1 file changed, 4 insertions(+), 11 deletions(-)
block/file-posix.c +4 -11
index 5019ddade9b..5998448b1e8 100644
@@ -43,9 +43,11 @@
 #include "scsi/constants.h"
 #include "scsi/utils.h"
 
-#if defined(__APPLE__) && (__MACH__)
+#ifndef __sun__
 #include <sys/ioctl.h>
-#if defined(HAVE_HOST_BLOCK_DEVICE)
+#endif
+
+#if defined(__APPLE__) && (__MACH__) && defined(HAVE_HOST_BLOCK_DEVICE)
 #include <paths.h>
 #include <sys/param.h>
 #include <sys/mount.h>
@@ -57,7 +59,6 @@
 //#include <IOKit/storage/IOCDTypes.h>
 #include <IOKit/storage/IODVDMedia.h>
 #include <CoreFoundation/CoreFoundation.h>
-#endif /* defined(HAVE_HOST_BLOCK_DEVICE) */
 #endif
 
 #ifdef __sun__
@@ -65,7 +66,6 @@
 #include <sys/dkio.h>
 #endif
 #ifdef __linux__
-#include <sys/ioctl.h>
 #include <sys/param.h>
 #include <sys/syscall.h>
 #include <sys/vfs.h>
@@ -95,27 +95,20 @@
 #endif
 
 #ifdef __OpenBSD__
-#include <sys/ioctl.h>
 #include <sys/disklabel.h>
 #include <sys/dkio.h>
 #endif
 
 #ifdef __NetBSD__
-#include <sys/ioctl.h>
 #include <sys/disklabel.h>
 #include <sys/dkio.h>
 #include <sys/disk.h>
 #endif
 
 #ifdef __DragonFly__
-#include <sys/ioctl.h>
 #include <sys/diskslice.h>
 #endif
 
-#ifdef EMSCRIPTEN
-#include <sys/ioctl.h>
-#endif
-
 /* OS X does not have O_DSYNC */
 #ifndef O_DSYNC
 #ifdef O_SYNC
Signature · 1 line
2.54.0
#6 lore raw

[PULL 02/16] target/i386: apply mod to immediate count of an RCL/RCR operation

In reply to Paolo Bonzini

RCR and RCL instructions with a count of 9 are the same as if the count was 0, but they generated incorrect code because the can_be_zero flag is false. This causes 0 to underflow into -1 at tcg_gen_subi_tl(count, count, 1).

Fix by absorbing the modulo computation into gen_shift_count(), now renamed gen_shift_count_1(), so that it can handle both reductions.

Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3452

---
 target/i386/tcg/emit.c.inc | 64 +++++++++++++++++++++-----------------
 1 file changed, 35 insertions(+), 29 deletions(-)
target/i386/tcg/emit.c.inc +35 -29
index ce636b6c56c..8eca66b6967 100644
@@ -3244,8 +3244,9 @@ static void gen_PUSHF(DisasContext *s, X86DecodedInsn *decode)
     assume_cc_op(s, CC_OP_EFLAGS);
 }
 
-static MemOp gen_shift_count(DisasContext *s, X86DecodedInsn *decode,
-                             bool *can_be_zero, TCGv *count, int unit)
+static MemOp gen_shift_count_1(DisasContext *s, X86DecodedInsn *decode,
+                               bool *can_be_zero, TCGv *count, int unit,
+                               int mod)
 {
     MemOp ot = decode->op[0].ot;
     int mask = (ot <= MO_32 ? 0x1f : 0x3f);
@@ -3255,16 +3256,31 @@ static MemOp gen_shift_count(DisasContext *s, X86DecodedInsn *decode,
     case X86_OP_INT:
         *count = tcg_temp_new();
         tcg_gen_andi_tl(*count, cpu_regs[R_ECX], mask);
+
+        if (mod < mask) {
+            TCGv temp = tcg_temp_new();
+            assert(mod * 4 >= mask);
+            if (mod * 2 < mask) {
+                tcg_gen_subi_tl(temp, *count, mod * 2);
+                tcg_gen_movcond_tl(TCG_COND_GE, *count, temp, tcg_constant_tl(0), temp, *count);
+            }
+            tcg_gen_subi_tl(temp, *count, mod);
+            tcg_gen_movcond_tl(TCG_COND_GE, *count, temp, tcg_constant_tl(0), temp, *count);
+        }
         *can_be_zero = true;
         break;
 
     case X86_OP_IMM:
-        if ((decode->immediate & mask) == 0) {
+        decode->immediate &= mask;
+        if (mod < mask) {
+            decode->immediate %= mod;
+        }
+        if (decode->immediate == 0) {
             *count = NULL;
             break;
         }
         *count = tcg_temp_new();
-        tcg_gen_movi_tl(*count, decode->immediate & mask);
+        tcg_gen_movi_tl(*count, decode->immediate);
         break;
 
     case X86_OP_SKIP:
@@ -3279,6 +3295,13 @@ static MemOp gen_shift_count(DisasContext *s, X86DecodedInsn *decode,
     return ot;
 }
 
+static MemOp gen_shift_count(DisasContext *s, X86DecodedInsn *decode,
+                             bool *can_be_zero, TCGv *count, int unit)
+{
+    return gen_shift_count_1(s, decode, can_be_zero, count, unit,
+                             INT_MAX);
+}
+
 /*
  * Compute existing flags in decode->cc_src, for gen_* functions that wants
  * to set the cc_op set to CC_OP_ADCOX.  In particular, this allows rotate
@@ -3397,29 +3420,14 @@ static void gen_rot_overflow(X86DecodedInsn *decode, TCGv result, TCGv old,
 /*
  * RCx operations are invariant modulo 8*operand_size+1.  For 8 and 16-bit operands,
  * this is less than 0x1f (the mask applied by gen_shift_count) so reduce further.
+ * FIXME: are flags updated if the count is nonzero, but a multiple of (8 << op) + 1?
  */
-static void gen_rotc_mod(MemOp ot, TCGv count)
+static MemOp gen_rotc_count(DisasContext *s, X86DecodedInsn *decode,
+                            bool *can_be_zero, TCGv *count, int unit)
 {
-    TCGv temp;
-
-    switch (ot) {
-    case MO_8:
-        temp = tcg_temp_new();
-        tcg_gen_subi_tl(temp, count, 18);
-        tcg_gen_movcond_tl(TCG_COND_GE, count, temp, tcg_constant_tl(0), temp, count);
-        tcg_gen_subi_tl(temp, count, 9);
-        tcg_gen_movcond_tl(TCG_COND_GE, count, temp, tcg_constant_tl(0), temp, count);
-        break;
-
-    case MO_16:
-        temp = tcg_temp_new();
-        tcg_gen_subi_tl(temp, count, 17);
-        tcg_gen_movcond_tl(TCG_COND_GE, count, temp, tcg_constant_tl(0), temp, count);
-        break;
-
-    default:
-        break;
-    }
+    MemOp ot = decode->op[0].ot;
+    return gen_shift_count_1(s, decode, can_be_zero, count, unit,
+                             (8 << ot) + 1);
 }
 
 /*
@@ -3440,7 +3448,7 @@ static void gen_RCL(DisasContext *s, X86DecodedInsn *decode)
     bool have_1bit_cin, can_be_zero;
     TCGv count;
     TCGLabel *zero_label = NULL;
-    MemOp ot = gen_shift_count(s, decode, &can_be_zero, &count, decode->op[2].unit);
+    MemOp ot = gen_rotc_count(s, decode, &can_be_zero, &count, decode->op[2].unit);
     TCGv low, high, low_count;
 
     if (!count) {
@@ -3451,7 +3459,6 @@ static void gen_RCL(DisasContext *s, X86DecodedInsn *decode)
     high = tcg_temp_new();
     low_count = tcg_temp_new();
 
-    gen_rotc_mod(ot, count);
     have_1bit_cin = gen_eflags_adcox(s, decode, true, can_be_zero);
     if (can_be_zero) {
         zero_label = gen_new_label();
@@ -3492,7 +3499,7 @@ static void gen_RCR(DisasContext *s, X86DecodedInsn *decode)
     bool have_1bit_cin, can_be_zero;
     TCGv count;
     TCGLabel *zero_label = NULL;
-    MemOp ot = gen_shift_count(s, decode, &can_be_zero, &count, decode->op[2].unit);
+    MemOp ot = gen_rotc_count(s, decode, &can_be_zero, &count, decode->op[2].unit);
     TCGv low, high, high_count;
 
     if (!count) {
@@ -3503,7 +3510,6 @@ static void gen_RCR(DisasContext *s, X86DecodedInsn *decode)
     high = tcg_temp_new();
     high_count = tcg_temp_new();
 
-    gen_rotc_mod(ot, count);
     have_1bit_cin = gen_eflags_adcox(s, decode, true, can_be_zero);
     if (can_be_zero) {
         zero_label = gen_new_label();
Signature · 1 line
2.54.0
#7 lore raw

Re: [PULL 02/16] target/i386: apply mod to immediate count of an RCL/RCR operation

Quoted 5 lines · Paolo Bonzini

RCR and RCL instructions with a count of 9 are the same as if the count was 0, but they generated incorrect code because the can_be_zero flag is false. This causes 0 to underflow into -1 at tcg_gen_subi_tl(count, count, 1).

Quoted 8 lines

Fix by absorbing the modulo computation into gen_shift_count(), now renamed gen_shift_count_1(), so that it can handle both reductions.

Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3452

---
  target/i386/tcg/emit.c.inc | 64 +++++++++++++++++++++-----------------
  1 file changed, 35 insertions(+), 29 deletions(-)

This feels like qemu-stable material, is it not?

Thanks,

/mjt

#8 lore raw

Re: [PULL 02/16] target/i386: apply mod to immediate count of an RCL/RCR operation

Quoted 9 lines · Michael Tokarev
Quoted 8 lines · Paolo Bonzini

RCR and RCL instructions with a count of 9 are the same as if the count was 0, but they generated incorrect code because the can_be_zero flag is false.  This causes 0 to underflow into -1 at tcg_gen_subi_tl(count, count, 1).

Fix by absorbing the modulo computation into gen_shift_count(), now renamed gen_shift_count_1(), so that it can handle both reductions.

Quoted 7 lines
Quoted 5 lines

Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3452

---
  target/i386/tcg/emit.c.inc | 64 +++++++++++++++++++++-----------------

  1 file changed, 35 insertions(+), 29 deletions(-)

This feels like qemu-stable material, is it not?

It's really unlikely to occur in the wild (RCL/RCR are rare except on old pre-386 code that did not have SHLD/SHRD; and the version with count >1 is basically never used) and there's still a FIXME that I didn't have time to check with code on real processors, so I didn't tag it. But it wouldn't hurt.

Paolo

#9 lore raw

[PULL 15/16] qga/vss: Remove unused undefs

In reply to Paolo Bonzini

From: Kostiantyn Kostiuk <[email protected]>

We don't include any headers that provides VSS_E*, so no need to undefine it before including vss.h

---
 qga/vss-win32/vss-common.h | 13 -------------
 1 file changed, 13 deletions(-)
qga/vss-win32/vss-common.h +0 -13
index 0e67e7822ce..db849127c2f 100644
@@ -33,19 +33,6 @@
 #undef uuid
 #define uuid(x)
 
-/* Undef some duplicated error codes redefined in vss.h */
-#undef VSS_E_BAD_STATE
-#undef VSS_E_PROVIDER_NOT_REGISTERED
-#undef VSS_E_PROVIDER_VETO
-#undef VSS_E_OBJECT_NOT_FOUND
-#undef VSS_E_VOLUME_NOT_SUPPORTED
-#undef VSS_E_VOLUME_NOT_SUPPORTED_BY_PROVIDER
-#undef VSS_E_OBJECT_ALREADY_EXISTS
-#undef VSS_E_UNEXPECTED_PROVIDER_ERROR
-#undef VSS_E_INVALID_XML_DOCUMENT
-#undef VSS_E_MAXIMUM_NUMBER_OF_VOLUMES_REACHED
-#undef VSS_E_MAXIMUM_NUMBER_OF_SNAPSHOTS_REACHED
-
 #include <vss.h>
 #include "vss-handles.h"
 
Signature · 1 line
2.54.0
#10 lore raw

[PULL 11/16] qga/meson: Remove unused lib stdc++

In reply to Paolo Bonzini

From: Kostiantyn Kostiuk <[email protected]>

qga_libs are libraries for guest agent linking. Guest Agent is a pure C-language application and doesn't need any C++ libs. VSS linking dependencies are placed in a separate file.

---
 qga/meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
qga/meson.build +1 -1
index 89a4a8f713d..1c6433ef250 100644
@@ -97,7 +97,7 @@ if host_os == 'windows'
   qga_libs += ['-lws2_32', '-lwinmm', '-lpowrprof', '-lwtsapi32', '-lwininet', '-liphlpapi', '-lnetapi32',
                '-lsetupapi', '-lcfgmgr32', '-luserenv', '-lpdh' ]
   if have_qga_vss
-    qga_libs += ['-lole32', '-loleaut32', '-lshlwapi', '-lstdc++', '-Wl,--enable-stdcall-fixup']
+    qga_libs += ['-lole32', '-loleaut32', '-lshlwapi', '-Wl,--enable-stdcall-fixup']
     subdir('vss-win32')
   endif
 endif
Signature · 1 line
2.54.0
#11 lore raw

[PULL 16/16] qga/vss: Drop unused define uuid(x)

In reply to Paolo Bonzini

From: Kostiantyn Kostiuk <[email protected]>

There is no place in code where we use uuid(x), at the same time MSVC vss.h use it and this define broke compilation.

---
 qga/vss-win32/vss-common.h | 2 --
 1 file changed, 2 deletions(-)
qga/vss-win32/vss-common.h +0 -2
index db849127c2f..5e993f9eda4 100644
@@ -30,8 +30,6 @@
 #define __RPC__out_ecount_part(x, y)
 #endif
 #define _declspec(x)
-#undef uuid
-#define uuid(x)
 
 #include <vss.h>
 #include "vss-handles.h"
Signature · 1 line
2.54.0
#12 lore raw

[PULL 05/16] Include new arbitrary limits if not already defined

In reply to Paolo Bonzini

From: Manolo de Medici <[email protected]>

Although GNU/Hurd supports unlimited path lengths
only bounded by available memory, for now we can use an arbitrary limit on PATH_MAX that matches what POSIX requires. We don't have bandwidth to fix this properly right now.

Author: Manolo de Medici <[email protected]>

---
 include/qemu/osdep.h | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)
include/qemu/osdep.h +11 -4
index 2f0e61ad6b2..1ec5b42230b 100644
@@ -384,6 +384,17 @@ void QEMU_ERROR("code path is reachable")
 #define TIME_MAX TYPE_MAXIMUM(time_t)
 #endif
 
+#ifndef PATH_MAX
+#define PATH_MAX 1024
+#endif
+
+/*
+ * Use the same value as Linux for now.
+ */
+#ifndef IOV_MAX
+#define IOV_MAX 1024
+#endif
+
 /* Mac OSX has a <stdint.h> bug that incorrectly defines SIZE_MAX with
  * the wrong type. Our replacement isn't usable in preprocessor
  * expressions, but it is sufficient for our needs. */
@@ -661,10 +672,6 @@ struct iovec {
     void *iov_base;
     size_t iov_len;
 };
-/*
- * Use the same value as Linux for now.
- */
-#define IOV_MAX 1024
 
 ssize_t readv(int fd, const struct iovec *iov, int iov_cnt);
 ssize_t writev(int fd, const struct iovec *iov, int iov_cnt);
Signature · 1 line
2.54.0
#13 lore raw

[PULL 13/16] qga/meson: Allow to use MSVC message compiler 'mc'

In reply to Paolo Bonzini

From: Kostiantyn Kostiuk <[email protected]>

---
 qga/meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
qga/meson.build +1 -1
index 85bdacf7e2a..cfa2157efb2 100644
@@ -104,7 +104,7 @@ endif
 
 qga_objs = []
 if host_os == 'windows'
-  windmc = find_program('windmc', required: true)
+  windmc = find_program('windmc', 'mc', required: true)
 
   msgrc = custom_target('messages-win32.rc',
                         input: 'messages-win32.mc',
Signature · 1 line
2.54.0
#14 lore raw

[PULL 14/16] qga/vss: Use MAX_PATH instead of PATH_MAX

In reply to Paolo Bonzini

From: Kostiantyn Kostiuk <[email protected]>

MAX_PATH defined in windows.h
This is more correct way for Windows.

---
 qga/vss-win32/requester.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
qga/vss-win32/requester.cpp +1 -1
index 626d6ab1ff4..493ecd57172 100644
@@ -444,7 +444,7 @@ void requester_freeze(int *num_vols, void *mountpoints, ErrorSet *errset)
                 hr = vss_ctx.pVssbc->AddToSnapshotSet(short_volume_name,
                                                       g_gProviderId, &pid);
                 if (FAILED(hr)) {
-                    WCHAR volume_path_name[PATH_MAX];
+                    WCHAR volume_path_name[MAX_PATH];
                     if (GetVolumePathNamesForVolumeNameW(
                             short_volume_name, volume_path_name,
                             sizeof(volume_path_name), NULL) &&
Signature · 1 line
2.54.0
#15 lore raw

[PULL 09/16] Make copy_file_range non-static on GNU/Hurd

In reply to Paolo Bonzini

From: Damien Zammit <[email protected]>

glibc has a stubs mechanism: a function can be declared in the system headers, but only implemented as a stub that always fails with ENOSYS, for example. Therefore when implementing this function we cannot use static.

---
 block/file-posix.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
block/file-posix.c +1 -1
index 5998448b1e8..3c985da94f5 100644
@@ -2091,7 +2091,7 @@ static int handle_aiocb_write_zeroes_unmap(void *opaque)
 }
 
 #ifndef HAVE_COPY_FILE_RANGE
-#ifndef EMSCRIPTEN
+#if !defined(EMSCRIPTEN) && !defined(__GNU__)
 static
 #endif
 ssize_t copy_file_range(int in_fd, off_t *in_off, int out_fd,
Signature · 1 line
2.54.0
#16 lore raw

[PULL 06/16] Add GNU/Hurd host_os=gnu

In reply to Paolo Bonzini

From: Damien Zammit <[email protected]>

---
 configure | 2 ++
 1 file changed, 2 insertions(+)
configure +2 -0
index d786d3a7c9b..bf728d6d993 100755
@@ -371,6 +371,8 @@ elif check_define __APPLE__; then
 elif check_define EMSCRIPTEN ; then
   host_os=emscripten
   cross_compile="yes"
+elif check_define __GNU__; then
+  host_os=gnu
 else
   # This is a fatal error, but don't report it yet, because we
   # might be going to just print the --help text, or it might
Signature · 1 line
2.54.0
#17 lore raw

[PULL 04/16] gdbstub: Update x86 control register bits

In reply to Paolo Bonzini

From: Mathias Krause <[email protected]>

The control register bits haven't been updated in a few years, making them lack behind features QEMU ganied in these years.

Update them to the current version of the SDM and sort the 32bit version to be in line with all the other definitions (descending order).

This should remove confusion when debugging, for example, CET-enabled guests:

- before the change:
(gdb) info registers cr4
cr4 0x8000f0 [ PGE MCE PAE PSE ]

- after the change:
(gdb) info registers cr4
cr4 0x8000f0 [ CET PGE MCE PAE PSE ]

---
 gdbstub/gdb-xml/i386-32bit.xml | 47 +++++++++++++++++++---------------
 gdbstub/gdb-xml/i386-64bit.xml |  7 +++++
 2 files changed, 34 insertions(+), 20 deletions(-)
gdbstub/gdb-xml/i386-32bit.xml +27 -20
index 7a66a02b67e..1dec40e1d2c 100644
@@ -87,27 +87,34 @@
   </flags>
 
   <flags id="i386_cr4" size="4">
-	<field name="VME" start="0" end="0"/>
-	<field name="PVI" start="1" end="1"/>
-	<field name="TSD" start="2" end="2"/>
-	<field name="DE" start="3" end="3"/>
-	<field name="PSE" start="4" end="4"/>
-	<field name="PAE" start="5" end="5"/>
-	<field name="MCE" start="6" end="6"/>
-	<field name="PGE" start="7" end="7"/>
-	<field name="PCE" start="8" end="8"/>
-	<field name="OSFXSR" start="9" end="9"/>
-	<field name="OSXMMEXCPT" start="10" end="10"/>
-	<field name="UMIP" start="11" end="11"/>
-	<field name="LA57" start="12" end="12"/>
-	<field name="VMXE" start="13" end="13"/>
-	<field name="SMXE" start="14" end="14"/>
-	<field name="FSGSBASE" start="16" end="16"/>
-	<field name="PCIDE" start="17" end="17"/>
-	<field name="OSXSAVE" start="18" end="18"/>
-	<field name="SMEP" start="20" end="20"/>
-	<field name="SMAP" start="21" end="21"/>
+	<field name="LAM_SUP" start="28" end="28"/>
+	<field name="LASS" start="27" end="27"/>
+	<field name="UINTR" start="25" end="25"/>
+	<field name="PKS" start="24" end="24"/>
+	<field name="CET" start="23" end="23"/>
 	<field name="PKE" start="22" end="22"/>
+	<field name="PKE" start="22" end="22"/>
+	<field name="SMAP" start="21" end="21"/>
+	<field name="SMEP" start="20" end="20"/>
+	<field name="KL" start="19" end="19"/>
+	<field name="OSXSAVE" start="18" end="18"/>
+	<field name="PCIDE" start="17" end="17"/>
+	<field name="FSGSBASE" start="16" end="16"/>
+	<field name="SMXE" start="14" end="14"/>
+	<field name="VMXE" start="13" end="13"/>
+	<field name="LA57" start="12" end="12"/>
+	<field name="UMIP" start="11" end="11"/>
+	<field name="OSXMMEXCPT" start="10" end="10"/>
+	<field name="OSFXSR" start="9" end="9"/>
+	<field name="PCE" start="8" end="8"/>
+	<field name="PGE" start="7" end="7"/>
+	<field name="MCE" start="6" end="6"/>
+	<field name="PAE" start="5" end="5"/>
+	<field name="PSE" start="4" end="4"/>
+	<field name="DE" start="3" end="3"/>
+	<field name="TSD" start="2" end="2"/>
+	<field name="PVI" start="1" end="1"/>
+	<field name="VME" start="0" end="0"/>
   </flags>
 
   <flags id="i386_efer" size="4">
gdbstub/gdb-xml/i386-64bit.xml +7 -0
index 6d889692114..9ac9164e6a9 100644
@@ -102,9 +102,16 @@
   </flags>
 
   <flags id="x64_cr4" size="8">
+	<field name="FRED" start="32" end="32"/>
+	<field name="LAM_SUP" start="28" end="28"/>
+	<field name="LASS" start="27" end="27"/>
+	<field name="UINTR" start="25" end="25"/>
+	<field name="PKS" start="24" end="24"/>
+	<field name="CET" start="23" end="23"/>
 	<field name="PKE" start="22" end="22"/>
 	<field name="SMAP" start="21" end="21"/>
 	<field name="SMEP" start="20" end="20"/>
+	<field name="KL" start="19" end="19"/>
 	<field name="OSXSAVE" start="18" end="18"/>
 	<field name="PCIDE" start="17" end="17"/>
 	<field name="FSGSBASE" start="16" end="16"/>
Signature · 1 line
2.54.0
#18 lore raw

[PULL 01/16] rust: fix incorrect dependency in Cargo.toml

In reply to Paolo Bonzini
---
 rust/bindings/hwcore-sys/Cargo.toml | 1 -
 rust/bindings/system-sys/Cargo.toml | 1 +
 2 files changed, 1 insertion(+), 1 deletion(-)
rust/bindings/hwcore-sys/Cargo.toml +0 -1
index c20024e921a..b5ae33da8ed 100644
@@ -21,7 +21,6 @@ chardev-sys = { path = "../chardev-sys" }
 qom-sys = { path = "../qom-sys" }
 migration-sys = { path = "../migration-sys" }
 util-sys = { path = "../util-sys" }
-system-sys = { path = "../system-sys" }
 
 [lints]
 workspace = true
rust/bindings/system-sys/Cargo.toml +1 -0
index 7e527130ff5..1e0fa8cf79c 100644
@@ -20,6 +20,7 @@ common = { path = "../../common" }
 migration-sys = { path = "../migration-sys" }
 util-sys = { path = "../util-sys" }
 qom-sys = { path = "../qom-sys" }
+hwcore-sys = { path = "../hwcore-sys" }
 
 [lints]
 workspace = true
Signature · 1 line
2.54.0